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Alpha AXP architecture

Published: 01 February 1993 Publication History
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References

[1]
Adahl, G.M Balluw G. and Brooks, F.P Jr. Architecture of the IBM System 360. IBM J. Res. Development 8,2 (Apr.1967) 87-101
[2]
Burnner,R. Ed. VAX Architecture Reference Manual,Second ed. digital Press,Bedford, Mass 1991.
[3]
Conard, R.et.al. A 50 Mips (peak)32/ 64b Microprocesser,ISSCC Digest Tech. Papers (Feb.1989), 76-77
[4]
Cray-I Computer Sysatem, References Manual,From 2240004, Cray Reascherch., Inc.,1977
[5]
Ibm System/370 Principals of Operation, from GA22-7000-4,IBM Crop,. 1974,., 1992
[6]
Institute of Electrial and Electronic Engineers,Binary floting-point arithmetic for microproccser systems Standerd number IEEE-754, New York, N.Y. 1985.
[7]
Kane,G. and Heinrich,J. MIPS RISC Architerture Prentice-Hall, Englewood Califs. New Jersy .1992
[8]
Sites,R.L Ed Alpha Architeture Reference Manul .Degital Press,Beford. Mass.,1992
[9]
Sites et.al Binary Translstion .Commun. ACM 36,2.(Feb.1993)

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John A. Fulcher

When the first minicomputers began to appear during the late 1960s, mainframe manufacturers such as IBM did not take them seriously at first—much to their detriment. This enabled the subsequent rise to prominence of DEC, first by way of the PDP-11, then courtesy of the VAX. When the first microcomputers began to appear during the late 1970s, IBM was not going to be caught out a second time. Instead, it released an Apple II–like microcomputer of its own. The rest is history; the IBM PC family (or clones) has become the most widely used type of computer in the world. Surprisingly, however, DEC—by then a computer giant—ignored microcomputers at first. Subsequent forays into the field were short-lived and failed to capture the public imagination as the IBM PC juggernaut did. By the late 1980s, customers were abandoning DEC minicomputers in favor of either the newer RISC UNIX/X Window workstations (epitomized by Sun) or later-generation PC clones running Microsoft Windows. Moreover, the early 1990s saw IBM experience difficulties that would have seemed impossible just a few years earlier. Nervously eyeing such disturbing developments, DEC wondered what strategy it could employ to prosper or survive into the 21st century. Its response was the Alpha architecture. Sites's paper is the first of a series of papers published in a special section of Communications of the ACM entitled “Digital's Alpha Chip Project”; others cover an Alpha-based hardware development platform (ADU), porting of OpenVMS from VAX to Alpha, and binary translation of software from VAX and MIPS to Alpha. In Robert Supnik's introduction to the section, he points out that in 1977, DEC introduced the VAX by way of one hardware platform (VAX 11/780), one operating system (VMS), one network (DECnet), and one high-level language (FORTRAN). In 1992, DEC introduced the Alpha by way of seven hardware platforms, three operating systems, multiple networking protocols, and multiple language compilers. Moreover, Alpha constitutes the largest engineering project ever undertaken by DEC, involving more than 30 engineering groups spread across 10 countries. What I found most interesting about Sites's paper was not so much the technical detail but rather the corporate thinking that led to the design decisions taken with Alpha. For example, from the beginning a distinction was made between architecture and implementation (much in the manner of the designers of the IBM/360 years earlier). The initial Alpha design goals were high performance, longevity, the ability to run both the Open VMS and UNIX operating systems, and facility for easy migration of both VAX and MIPS customer bases. The first goal led to Alpha's 64-bit architecture. The second goal led to the decision to use multiple-instruction issue. PALcode—the Privileged Architecture Library—provided the architecture with expansion capability, and facilitated realization of the third goal. The fourth goal led to the development of the binary translation compiler technique, and to the adoption of little-endian addressing in the first instance. My only criticism of this paper is that the accompanying figures are rather unimaginative. Nevertheless, if you want the inside information on Alpha design, then this special section of CACM is the definitive reference—it is fascinating reading.

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cover image Communications of the ACM
Communications of the ACM  Volume 36, Issue 2
Feb. 1993
90 pages
ISSN:0001-0782
EISSN:1557-7317
DOI:10.1145/151220
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 February 1993
Published in CACM Volume 36, Issue 2

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