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Deterministic VLSI block placement algorithm using Less Flexibility First principle

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Abstract

In this paper, a simple while effective deterministic algorithm for solving the VLSI block placement problem is proposed considering the packing area and interconnect wiring simultaneously. The algorithm is based on a principle inspired by observations of ancient professionals in solving their similar problems. Using the so-called Less Flexibility First principle, it is tried to pack blocks with the least packing flexibility on its shape and interconnect requirement to the empty space with the least packing flexibility in a greedy manner. Experimental results demonstrate that the algorithm, though simple, is quite effective in solving the problem. The same philosophy could also be used in designing efficient heuristics for other hard problems, such as placement with preplaced modules, placement with L/T shape modules, etc.

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Author information

Authors and Affiliations

  1. Department of Computer Science and Technology, Tsinghua University, 100084, Beijing, P.R. China

    Dong SheQin & Hong XianLong

  2. Department of Computer Science and Engineering, The Chinese University of Hong Kong, Hong Kong, P.R. China

    Wu YuLiang

  3. Department of Computer Science, Hong Kong University of Science and Technology, Hong Kong, P.R. China

    Gu Jun

Authors
  1. Dong SheQin
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  2. Hong XianLong
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  3. Wu YuLiang
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  4. Gu Jun
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Corresponding author

Correspondence to Dong SheQin.

Additional information

This work is supported by the National Natural Science Foundation of China (Grant No.60218004) and the National Grand Fundamental Research 973 Program of China (Grant No.G19980304111).

DONG SheQin received the B.S. degree in computer science in 1985, M.S. degree in semiconductor physics and device in 1988, and Ph.D. degree in mechanical control and automation in 1996, all from Harbin Institute of Technology. From 1997 to 1999 he worked as a postdoctoral fellow in the State Key Lab. of CAD&CG at Zhejiang University. He is currently an associate professor of the Department of Computer Science and Technology, Tsinghua University. His current research interests include CAD for VLSI, parallel algorithms, multi-media ASIC and hardware design.

WU YuLiang finished his B.S. and M.S. degrees in computer science at Florida International University and University of Miami in 1983 and 1984 respectively. He received Ph.D. degree in electrical and computer engineering from University of California at Santa Barbara in 1994. Before he joined the Chinese University of Hong Kong in Junuary 1996, he had worked at Cadence Design Systems Incorporation as a senior MTS since December 1994, where he worked in the R&D of the silicon synthesis product (PBS) targeting at binding the gap between logic and physical level optimizations for deep-submicron chip designs. His current research interests are mainly related to hard optimization problems in object packings, optimal FPGA architecture designs, and logical/physical design automation (CAD) of VLSI designs.

For the biography ofHONG XianLong/GU Jun please refer to P.639, No.5, Vol.18 of this journal.

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Dong, S., Hong, X., Wu, Y. et al. Deterministic VLSI block placement algorithm using Less Flexibility First principle. J. Comput. Sci. & Technol. 18, 739–746 (2003). https://doi.org/10.1007/BF02945462

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  • DOI: https://doi.org/10.1007/BF02945462

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