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Publication search results
found 129 matches
- 2001
- Amir H. Ajami, Massoud Pedram:
Post-layout timing-driven cell placement using an accurate net length model with movable Steiner points. ASP-DAC 2001: 595-600 - Yasuo Arai:
Multi-hit time-to-digital converter VLSI for high-energy physics experiments. ASP-DAC 2001: 5-6 - Florin Balasa:
Device-level placement for analog layout: an opportunity for non-slicing topological representations. ASP-DAC 2001: 281-286 - Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty:
Synthesis of single-output space compactors with application to scan-based IP cores. ASP-DAC 2001: 496-502 - Shekhar Borkar:
Low power design challenges for the decade (invited talk). ASP-DAC 2001: 293-296 - Elaheh Bozorgzadeh, Seda Ogrenci Memik, Majid Sarrafzadeh:
RPack: routability-driven packing for cluster-based FPGAs. ASP-DAC 2001: 629-634 - Wanlin Cao, D. M. H. Walker, Rajarshi Mukherjee:
An efficient solution to the storage correspondence problem for large sequential circuits. ASP-DAC 2001: 181-186 - Subash Chandar G., S. Vaideeswaran:
Addressing verification bottlenecks of fully synthesized processor cores using equivalence checkers. ASP-DAC 2001: 175-180 - Jiunn-Chern Chen, Yirng-An Chen:
Equivalence checking of integer multipliers. ASP-DAC 2001: 169-174 - Ming-Chih Chen, Ing-Jer Huang, Chung-Ho Chen:
Parameterized MAC unit implementation. ASP-DAC 2001: 23-24 - Yu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky:
Hierarchical dummy fill for process uniformity. ASP-DAC 2001: 139-144 - Chung-Kuan Cheng, Andrew B. Kahng, Bao Liu, Dirk Stroobandt:
Toward better wireload models in the presence of obstacles. ASP-DAC 2001: 527-532 - Wei-Chung Cheng, Massoud Pedram:
Low power techniques for address encoding and memory allocation. ASP-DAC 2001: 245-250 - Yih-Chih Chou, Youn-Long Lin:
A 3-step approach for performance-driven whole-chip routing. ASP-DAC 2001: 187-191 - Jason Cong, David Zhigang Pan, Prasanna V. Srinivas:
Improved crosstalk modeling for noise constrained interconnect optimization. ASP-DAC 2001: 373-378 - Denis Deschacht, Grégory Servel:
On-chip interconnections: impact of adjacent lines on timing. ASP-DAC 2001: 539-544 - Sheqin Dong, Xianlong Hong, Youliang Wu, Yizhou Lin, Jun Gu:
VLSI block placement using less flexibility first principles. ASP-DAC 2001: 601-604 - Feodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu, Sudhakar Muddu, Alexander Zelikovsky:
Provably good global buffering by multi-terminal multicommodity flow approximation. ASP-DAC 2001: 120-125 - Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama, Ashok Halambi:
New directions in compiler technology for embedded systems (embedded tutorial). ASP-DAC 2001: 409-414 - José Alberto Espejo, Luis Entrena, Enrique San Millán, Emilio Olías:
Functional extension of structural logic optimization techniques. ASP-DAC 2001: 467-472 - Hongbing Fan, Jiping Liu, Yu-Liang Wu:
Combinatorial routing analysis and design of universal switch blocks. ASP-DAC 2001: 641-644 - Martin R. Frerichs:
Precise extraction of ultra deep submicron interconnect parasitics with parameterizable 3D-modeling: invited talk. ASP-DAC 2001: 50-56 - Youxin Gao, D. F. Wong:
A fast and accurate delay estimation method for buffered interconnects. ASP-DAC 2001: 533-538 - Patrice Gerin, Sungjoo Yoo, Gabriela Nicolescu, Ahmed Amine Jerraya:
Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures. ASP-DAC 2001: 63-68 - Frank Gilbert, Alexander Worm, Norbert Wehn:
Low power implementation of a turbo-decoder on programmable architectures. ASP-DAC 2001: 400-403 - Tony Givargis, Frank Vahid, Jörg Henkel:
Trace-driven system-level power evaluation of system-on-a-chip peripheral cores. ASP-DAC 2001: 306-312 - Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, Brian J. Mulvaney:
An optimum fitting algorithm for generation of reduced-order models. ASP-DAC 2001: 209-213 - Flavius Gruian, Krzysztof Kuchcinski:
LEneS: task scheduling for low-energy systems using variable supply voltage processors. ASP-DAC 2001: 449-455 - Wolfgang Günther, Andreas Hett, Bernd Becker:
Application of linearly transformed BDDs in sequential verification. ASP-DAC 2001: 91-96 - Yajun Ha, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man:
Virtual Java/FPGA interface for networked reconfiguration. ASP-DAC 2001: 558-563
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