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"Hierarchical Modeling of the VLSI Design Process."
Amir K. Hekmatpour, Alex Orailoglu, Paul M. Chau (1991)
- Amir K. Hekmatpour, Alex Orailoglu, Paul M. Chau:
Hierarchical Modeling of the VLSI Design Process. IEEE Expert 6(2): 56-70 (1991)
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