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Paul M. Chau
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- affiliation: University of California, San Diego, USA
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2010 – 2019
- 2014
- [j19]Cláudio S. Marino, Paul M. Chau:
Constrained Sensor System Resolves Closely Spaced Obscured Low-SNR Sources Using Virtual Beamforming. IEEE Trans. Instrum. Meas. 63(1): 231-242 (2014) - 2012
- [j18]Cláudio S. Marino, Paul M. Chau:
Low-Level Sinusoidal Signal Detection From a High-Resolution Virtual Spectral Image Using Autoregressive Vector Extrapolation. IEEE Trans. Instrum. Meas. 61(9): 2413-2421 (2012)
2000 – 2009
- 2006
- [j17]Jeanette F. Arrigo, Paul M. Chau:
Power aware attitude computation during rapid rotational motion. IEEE Trans. Instrum. Meas. 55(1): 63-69 (2006) - [c26]David Chih-Che Lin, Paul M. Chau:
Objective Human Visual System Based Video Quality Assessment Metric for Low Bit-Rate Video Communication Systems. MMSP 2006: 320-323 - 2002
- [j16]Laurence Goodby, Alex Orailoglu, Paul M. Chau:
Microarchitectural synthesis of performance-constrained, low-power VLSI designs. ACM Trans. Design Autom. Electr. Syst. 7(1): 122-136 (2002) - [c25]Philip P. Dang, Paul M. Chau:
Reduce complexity hardware implementation of discrete wavelet transform for JPEG 2000 standard. ICME (1) 2002: 321-324 - 2000
- [j15]Philip P. Dang, Paul M. Chau:
Image encryption for secure Internet multimedia applications. IEEE Trans. Consumer Electron. 46(3): 395-403 (2000) - [j14]Philip P. Dang, Paul M. Chau:
Robust image transmission over CDMA channels. IEEE Trans. Consumer Electron. 46(3): 664-672 (2000) - [c24]Philip P. Dang, Paul M. Chau:
Image encryption for multimedia applications. CATA 2000: 203-206 - [c23]Philip P. Dang, Paul M. Chau:
Hardware/software implementation 3-way algorithm for image encryption. Security and Watermarking of Multimedia Contents 2000: 274-285
1990 – 1999
- 1999
- [j13]Amir Sarajedini, Robert Hecht-Nielsen, Paul M. Chau:
Conditional probability density function estimation with sigmoidal neural networks. IEEE Trans. Neural Networks 10(2): 231-238 (1999) - [c22]Jeremy Risher, Philip P. Dang, Paul M. Chau:
Reconfigurable Hardware for Encryption. Applied Informatics 1999: 554-557 - [c21]Philip P. Dang, Paul M. Chau:
FPGA architecture for noise filters on a reconfigurable processor. CATA 1999: 250-253 - [c20]Michael B. Bendak, Baernard A. Xavier, Paul M. Chau:
A 1.2 GHz CMOS quadrature self-oscillating mixer. ISCAS (5) 1999: 434-437 - 1998
- [j12]Kevin J. Page, Paul M. Chau:
Improved architectures for the add-compare-select operation in long constraint length Viterbi decoding. IEEE J. Solid State Circuits 33(1): 151-155 (1998) - [c19]Paul M. Chau, Gerald Clark, Anthony V. Sebald:
Evolvable Hardware Control for Dynamic Reconfigurable and Adaptive Computing. Evolutionary Programming 1998: 137-146 - [c18]Jeanette F. Arrigo, Kevin J. Page, Paul M. Chau, N. C. Tien:
Reconfigurable Processing for Robust Navigation and Control (Abstract). FPGA 1998: 260 - [c17]Amir Sarajedini, Paul M. Chau:
Blind signal separation with a projection pursuit index. ICASSP 1998: 2125-2128 - [c16]Philip P. Dang, Paul M. Chau:
A Feature Extraction Application on a Reconfigurable Image Processor. IVCNZ 1998: 352-356 - 1996
- [j11]Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau:
A wire length estimation technique utilizing neighborhood density equations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(8): 912-922 (1996) - [j10]Dan Picker, Ronald D. Fellman, Paul M. Chau:
An extension to the SCI flow control protocol for increased network efficiency. IEEE/ACM Trans. Netw. 4(1): 71-85 (1996) - [c15]Amir Sarajedini, Paul M. Chau:
Casasent network density estimation. ICNN 1996: 202-206 - 1995
- [j9]Yu-jhih Wu, Paul M. Chau, Robert Hecht-Nielsen:
A supervised learning neural network coprocessor for soft-decision maximum-likelihood decoding. IEEE Trans. Neural Networks 6(4): 986-992 (1995) - [j8]Steven S. Watkins, Paul M. Chau, Raoul Tawel, Bjorn H. Lambrigsten:
Execution of a remote sensing application on a custom neurocomputer. IEEE Trans. Neural Networks 6(6): 1505-1515 (1995) - [j7]Sati Banerjee, Takeo Hamada, Paul M. Chau, Ronald D. Fellman:
Macro pipelining based scheduling on high performance heterogeneous multiprocessor systems. IEEE Trans. Signal Process. 43(6): 1468-1484 (1995) - [j6]Sati Banerjee, Paul M. Chau, Ronald D. Fellman:
Rapid prototyping methodology for multiprocessor implementation of digital signal processing systems. J. VLSI Signal Process. 11(1-2): 21-34 (1995) - 1994
- [c14]Patrick H. Kelly, Kevin J. Page, Paul M. Chau:
Rapid Prototyping of ASIC Based Systems. DAC 1994: 460-465 - [c13]Laurence Goodby, Alex Orailoglu, Paul M. Chau:
Microarchitectural Synthesis of Performance-Constrained, Low-Power VLSI Designs. ICCD 1994: 323-326 - 1993
- [j5]Paul M. Chau, Sati Banerjee:
Parallel implementations of direction finding algorithms on networks of general purpose DSP processors. Integr. 16(3): 247-266 (1993) - [j4]Yu-jhih Wu, Michael D. Alston, Paul M. Chau:
Dynamic adaptation of quantization thresholds for soft-decision viterbi decoding with a reinforcement learning neural network. J. VLSI Signal Process. 6(1): 77-84 (1993) - [c12]Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau:
Prime: A Timing-Driven Placement Tool using A Piecewise Linear Resistive Network Approach. DAC 1993: 531-536 - [c11]Sati Banerjee, Paul M. Chau:
Recursive least squares problem implementation on a generalized interconnection of DSP processors. ICASSP (3) 1993: 575-578 - [c10]Dan Picker, Ronald D. Fellman, Paul M. Chau:
Enhancing SCI's fairness protocol for increased throughput. ICNP 1993: 292-299 - [c9]Steven S. Watkins, Paul M. Chau, Raoul Tawel, Bjorn Lambrigtsen, Mark Plutowski:
A Hybrid Radial Basis Function Neurocomputer and Its Applications. NIPS 1993: 850-857 - 1992
- [j3]Paul M. Chau, Scott R. Powell:
Power dissipation of VLSI array processing systems. J. VLSI Signal Process. 4(2-3): 199-212 (1992) - [c8]Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau:
A Wire Length Estimation Technique Utilizing Neighborhood Density Equations. DAC 1992: 57-61 - [c7]Scott R. Powell, Paul M. Chau:
Sigma-delta encoding for efficient equalization of prefilter based FIR filters. ICASSP 1992: 89-92 - [c6]Takeo Hamada, Sati Banerjee, Paul M. Chau, Ronald D. Fellman:
Macropipelining based heterogeneous multiprocessor scheduling. ICASSP 1992: 597-600 - 1991
- [j2]Amir K. Hekmatpour, Alex Orailoglu, Paul M. Chau:
Hierarchical Modeling of the VLSI Design Process. IEEE Expert 6(2): 56-70 (1991) - [j1]Scott R. Powell, Paul M. Chau:
A technique for realizing linear phase IIR filters. IEEE Trans. Signal Process. 39(11): 2425-2435 (1991) - 1990
- [c5]Amir Hekmatpour, Scott R. Powell, Paul M. Chau:
KINFIDA: an object-oriented model-based digital filter design assistant. ICASSP 1990: 1069-1072 - [c4]Michael D. Alston, Paul M. Chau:
A neural network architecture for the decoding of long constraint length convolutional codes. IJCNN 1990: 121-126
1980 – 1989
- 1989
- [c3]David Rivas, Steven S. Watkins, Paul M. Chau:
VLSI for a Physical Model of Musical Instruments Oscillations. ICMC 1989 - 1987
- [c2]Paul M. Chau, Kay-Cheung Chew, Walter H. Ku:
A bit-serial floating-point complex multiplier-accumulator for fault-tolerant digital signal processing arrays. ICASSP 1987: 483-486 - 1984
- [c1]Richard W. Linderman, Peter P. Reusens, Paul M. Chau, Walter H. Ku:
Digital signal processing capabilities of CUSP, a high performance bit-serial VLSI processor. ICASSP 1984: 660-663
Coauthor Index
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