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Tokinori Kozawa
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2000 – 2009
- 2003
- [c15]Kazuo Nakajima, Brian Schott, Tokinori Kozawa, Jose L. Muñoz, Wolfgang Rosenstiel, Sakae Takahashi, Chen-Wen Wu:
Roles of funding agencies in technology-driven economic development. ASP-DAC 2003: 547
1990 – 1999
- 1997
- [c14]Tokinori Kozawa:
Collaboration between university and industry. ASP-DAC 1997: 433 - 1991
- [c13]Hidekazu Terai, Fumio Goto, Katsuro Wakai, Tokinori Kozawa, Mitsugu Edagawa, Satoshi Hososaka, Masahiro Hashimoto:
Basic Concepts of Timing-oriented Design Automation for High-performance Mainframe Computers. DAC 1991: 193-198
1980 – 1989
- 1988
- [c12]Yasushi Ogawa, Hidekazu Terai, Tokinori Kozawa:
Automatic Layout Procedures for Serial Routing Devices. DAC 1988: 642-645 - 1987
- [j3]Akira Tsukizoe, Tokinori Kozawa, Jun'ya Sakemi, Chihei Miura, Tatsuki Ishii:
A concurrent pattern operation algorithm for VLSI mask data. Syst. Comput. Jpn. 18(2): 98-108 (1987) - [j2]Takao Nishida, Shunsuke Miyamoto, Tokinori Kozawa, Katsuya Satoh:
RFSIM: Reduced Fault Simulator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(3): 392-402 (1987) - 1986
- [c11]Yasuhiro Ohno, Masayuki Miyoshi, Norio Yamada, Toshihiko Odaka, Tokinori Kozawa, Kooichiro Ishihara:
Principles of design automatioon system for very large scale computer design. DAC 1986: 354-359 - [c10]Yasushi Ogawa, Tatsuki Ishii, Yoichi Shiraishi, Hidekazu Terai, Tokinori Kozawa, Kyoji Yuyama, Kyoji Chiba:
Efficient placement algorithms optimizing delay for high-speed ECL masterslice LSIs. DAC 1986: 404-410 - 1985
- [j1]Tokinori Kozawa, Hidekazu Terai:
Research in Design Automation for VLSI Layout. IEEE Des. Test 2(5): 43-53 (1985) - [c9]Hidekazu Terai, Michiyoshi Hayase, Tokinori Kozawa:
A routing procedure for mixed array of custom macros and standard cells. DAC 1985: 503-508 - 1984
- [c8]Tokinori Kozawa, Chihei Miura, Hidekazu Terai:
Combine and top down block placement algorithm for hierarchical logic VLSI layout. DAC 1984: 667-669 - 1983
- [c7]Tokinori Kozawa, Hidekazu Terai, Tatsuki Ishii, Michiyoshi Hayase, Chihei Miura, Yasushi Ogawa, Kuniaki Kishida, Norio Yamada, Yasuhiro Ohno:
Automatic placement algorithms for high packing density V L S I. DAC 1983: 175-181 - [c6]Akira Tsukizoe, Jun'ya Sakemi, Tokinori Kozawa, Hiroshi Fukuda:
MACH : a high-hitting pattern checker for VLSI mask data. DAC 1983: 726-731 - 1981
- [c5]Xiong Ji-Guang, Tokinori Kozawa:
An algorithm for searching shortest path by propagating wave fronts in four quadrants. DAC 1981: 29-36 - [c4]Susumu Goshima, Yuichi Oka, Tokinori Kozawa, Teruo Mori, Yoshimitsu Takeguchi, Yasuhiro Ohno:
Diagnostic system for large scale logic cards and LSI'S. DAC 1981: 256-259 - [c3]Tokinori Kozawa, Akira Tsukizoe, Jun'ya Sakemi, Chihei Miura, Tatsuki Ishii:
A concurrent pattern operation algorithm for VLSI mask data. DAC 1981: 563-570
1970 – 1979
- 1975
- [c2]Tadakatsu Ishiga, Tokinori Kozawa, Shoji Sato:
A logic partitioning procedure by interchanging clusters. DAC 1975: 369-377 - 1974
- [c1]Tokinori Kozawa, Hiroshi Horino, Tadakatu Ishiga, Jun'ya Sakemi, Shoji Sato:
Advanced LILAC - an Automated Layout Generation system for MOS/LSIs. DAC 1974: 26-46
Coauthor Index
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