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Avi Ziv
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2020 – today
- 2023
- [j15]Yibo Lin
, Avi Ziv
Introduction to the Special Issue on Machine Learning for CAD/EDA. ACM Trans. Design Autom. Electr. Syst. 28(2): 14:1-14:2 (2023) - [c57]Brian Irwin
Neural Network Accelerated Implicit Filtering: Integrating Neural Network Surrogates With Provably Convergent Derivative Free Optimization Methods. ICML 2023: 14376-14389 - 2021
- [c56]Raviv Gal, Eldad Haber, Wesam Ibraheem, Brian Irwin
Automatic Scalable System for the Coverage-Directed Generation (CDG) Problem. DATE 2021: 206-211 - [c55]Raviv Gal, Eldad Haber, Brian Irwin
Using Deep Neural Networks And Derivative Free Optimization To Accelerate Coverage Closure. MLCAD 2021: 1-6 - [i2]Brian Irwin
Deep Neural Network Accelerated Implicit Filtering. CoRR abs/2105.08883 (2021) - 2020
- [c54]Raviv Gal, Haim Kermany, Alexander Ivrii, Ziv Nevo, Avi Ziv:
Late Breaking Results: FRIENDS - Finding Related Interesting Events via Neighbor Detection. DAC 2020: 1-2 - [c53]Raviv Gal, Eldad Haber, Avi Ziv:
Using DNNs and Smart Sampling for Coverage Closure Acceleration. MLCAD 2020: 15-20 - [c52]Raviv Gal, David Z. Pan, Haoxing Ren, Manish Pandey, Marilyn Wolf, Avi Ziv:
ML for CAD - Where is the Treasure Hiding? MLCAD 2020: 137 - [c51]Raviv Gal, Giora Simchoni
Using Machine Learning Clustering To Find Large Coverage Holes. MLCAD 2020: 139-144
2010 – 2019
- 2019
- [c50]Avi Ziv:
Challenges and Solutions in Post-Silicon Validation of High-end Processors (Invited Tutorial). FMCAD 2019: 1 - [i1]Raviv Gal, Eldad Haber, Brian Irwin
How To Catch A Lion In The Desert - On The Solution Of The Coverage Directed Generation (CDG) Problem. CoRR abs/1910.00170 (2019) - 2017
- [j14]Prabhat Mishra
Post-Silicon Validation in the SoC Era: A Tutorial Introduction. IEEE Des. Test 34(3): 68-92 (2017) - [c49]Erez Bilgory, Eyal Bin, Avi Ziv:
Solving Constraint Satisfaction Problems Containing Vectors of Unknown Size. CP 2017: 55-70 - [c48]Raviv Gal, Einat Kermany, Bilal Saleh
Template Aware Coverage: Taking Coverage Analysis to the Next Level. DAC 2017: 36:1-36:6 - [c47]Farimah Farahmandi, Ronny Morad, Avi Ziv, Ziv Nevo, Prabhat Mishra
Cost-effective analysis of post-silicon functional coverage events. DATE 2017: 392-397 - 2016
- [c46]Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco:
Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification. DAC 2016: 24:1-24:6 - 2015
- [c45]Moab Arar, Michael L. Behm, Odellia Boni, Raviv Gal, Alex Goldin, Maxim Ilyaev, Einat Kermany, John R. Reysa, Bilal Saleh
The Verification Cockpit - Creating the Dream Playground for Data Analytics over the Verification Process. Haifa Verification Conference 2015: 51-66 - 2014
- [c44]Allon Adir, Dave Goodman, Daniel Hershcovich, Oz Hershkovitz, Bryan G. Hickerson, Karen Holtz, Wisam Kadry, Anatoly Koyfman, John M. Ludden, Charles Meissner, Amir Nahir, Randall R. Pratt, Mike Schiffli, Brett St. Onge, Brian W. Thompto, Elena Tsanko, Avi Ziv:
Verification of Transactional Memory in POWER8. DAC 2014: 58:1-58:6 - [c43]Yoav Katz, Eitan Marcus, Avi Ziv:
Enhancing Scenario Quality Using Quasi-Events. Haifa Verification Conference 2014: 17-29 - 2013
- [c42]Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv, Valeria Bertacco:
Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms. ICCAD 2013: 311-317 - 2012
- [j13]Allon Adir, Amir Nahir, Avi Ziv:
Concurrent Generation of Concurrent Programs for Post-Silicon Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1297-1302 (2012) - [c41]Amir Nahir, Avi Ziv, Subrat Panda:
Optimizing test-generation to the execution platform. ASP-DAC 2012: 304-309 - [c40]Debapriya Chatterjee, Anatoly Koyfman, Ronny Morad, Avi Ziv, Valeria Bertacco:
Checking architectural outputs instruction-by-instruction on acceleration platforms. DAC 2012: 955-961 - [c39]Yoav Katz, Michal Rimon, Avi Ziv:
Generating instruction streams using abstract CSP. DATE 2012: 15-20 - [c38]Biruk Mammo, Debapriya Chatterjee, Dmitry Pidan, Amir Nahir, Avi Ziv, Ronny Morad, Valeria Bertacco:
Approximating checkers for simulation acceleration. DATE 2012: 153-158 - [c37]Yoav Katz, Michal Rimon, Avi Ziv:
A Novel Approach for Implementing Microarchitectural Verification Plans in Processor Designs. Haifa Verification Conference 2012: 148-161 - 2011
- [j12]Dorit Baras, Shai Fine, Laurent Fournier, Dan Geiger, Avi Ziv:
Automatic boosting of cross-product coverage using Bayesian networks. Int. J. Softw. Tools Technol. Transf. 13(3): 247-261 (2011) - [j11]Laurent Fournier, Avi Ziv, Ekaterina Kutsy, Ofer Strichman
A probabilistic analysis of coverage methods. ACM Trans. Design Autom. Electr. Syst. 16(4): 38:1-38:20 (2011) - [c36]Allon Adir, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann:
Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor. DAC 2011: 569-574 - [c35]Yoav Katz, Michal Rimon, Avi Ziv, Gai Shaked:
Learning microarchitectural behaviors to improve stimuli generation quality. DAC 2011: 848-853 - [c34]Allon Adir, Maxim Golubev, Shimon Landa, Amir Nahir, Gil Shurek, Vitali Sokhin, Avi Ziv:
Threadmill: a post-silicon exerciser for multi-threaded processors. DAC 2011: 860-865 - [c33]Allon Adir, Shady Copty, Shimon Landa, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann:
A unified methodology for pre-silicon verification and post-silicon validation. DATE 2011: 1590-1595 - [c32]Ariel J. Birnbaum, Laurent Fournier, Steven Mittermaier, Avi Ziv:
Reverse Coverage Analysis. Haifa Verification Conference 2011: 190-202 - [e2]Kedar S. Namjoshi, Andreas Zeller
Hardware and Software: Verification and Testing - 5th International Haifa Verification Conference, HVC 2009, Haifa, Israel, October 19-22, 2009, Revised Selected Papers. Lecture Notes in Computer Science 6405, Springer 2011, ISBN 978-3-642-19236-4 [contents] - 2010
- [c31]Amir Nahir, Avi Ziv, Rajesh Galivanche, Alan J. Hu, Miron Abramovici, Albert Camilleri, Bob Bentley, Harry Foster, Valeria Bertacco, Shakti Kapoor:
Bridging pre-silicon verification and post-silicon validation. DAC 2010: 94-95 - [c30]Allon Adir, Amir Nahir, Avi Ziv, Charles Meissner, John Schumann:
Reaching Coverage Closure in Post-silicon Validation. Haifa Verification Conference 2010: 60-75
2000 – 2009
- 2009
- [j10]Shai Fine, Laurent Fournier, Avi Ziv:
Using Bayesian networks and virtual coverage to hit hard-to-reach events. Int. J. Softw. Tools Technol. Transf. 11(4): 291-305 (2009) - 2008
- [j9]Shady Copty, Shai Fine, Shmuel Ur, Elad Yom-Tov
A probabilistic alternative to regression suites. Theor. Comput. Sci. 404(3): 219-234 (2008) - [c29]Avi Ziv, Chris Wilson, Adnan Hamid, Joerg Grosse:
Special session - What's so intelligent about testbenches? HLDVT 2008: 141-142 - [c28]Dorit Baras, Laurent Fournier, Avi Ziv:
Automatic Boosting of Cross-Product Coverage Using Bayesian Networks. Haifa Verification Conference 2008: 53-67 - [c27]Alan Hunter, Andrew Piziali, Avi Ziv, Kelly Larson, Shankar Hemmady:
Ensuring Functional Closure of a Multi-core SoC through Verification Planning, Implementation and Execution. MTV 2008: 7-13 - 2007
- [c26]Francine Bacchini, Alan J. Hu, Tom Fitzpatrick, Rajeev Ranjan, David Lacey, Mercedes Tan, Andrew Piziali, Avi Ziv:
Verification Coverage: When is Enough, Enough? DAC 2007: 744-745 - [c25]Laurent Fournier, Avi Ziv:
Using Virtual Coverage to Hit Hard-To-Reach Events. Haifa Verification Conference 2007: 104-119 - [e1]Eyal Bin, Avi Ziv, Shmuel Ur:
Hardware and Software, Verification and Testing, Second International Haifa Verification Conference, HVC 2006, Haifa, Israel, October 23-26, 2006. Revised Selected Papers. Lecture Notes in Computer Science 4383, Springer 2007, ISBN 978-3-540-70888-9 [contents] - 2006
- [j8]Shai Fine, Ari Freund, Itai Jaeger, Yishay Mansour, Yehuda Naveh, Avi Ziv:
Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation. IEEE Trans. Computers 55(11): 1344-1355 (2006) - [j7]Hezi Azatchi, Laurent Fournier, Eitan Marcus, Shmuel Ur, Avi Ziv, Keren Zohar:
Advanced Analysis Techniques for Cross-Product Coverage. IEEE Trans. Computers 55(11): 1367-1379 (2006) - [c24]Amir Nahir, Avi Ziv, Roy Emek, Tal Keidar, Nir Ronen:
Scheduling-based test-case generation for verification of multimedia SoCs. DAC 2006: 348-351 - [c23]Amir Nahir, Yossi Shiloach, Avi Ziv:
Using Linear Programming Techniques for Scheduling-Based Random Test-Case Generation. Haifa Verification Conference 2006: 16-33 - 2005
- [c22]Shai Fine, Ari Freund, Itai Jaeger, Yehuda Naveh, Avi Ziv, Yishay Mansour:
Harnessing machine learning to improve the success rate of stimuli generation. HLDVT 2005: 112-118 - [c21]Hezi Azatchi, Laurent Fournier, Avi Ziv, Keren Zohar:
Advanced analysis techniques for cross-product coverage. HLDVT 2005: 229-236 - [c20]Andrew Piziali, Avi Ziv:
Panel: Functional coverage - is your design exposed? HLDVT 2005: 247 - 2004
- [j6]Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv:
Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification. IEEE Des. Test Comput. 21(2): 84-93 (2004) - [c19]Sigal Asaf, Eitan Marcus, Avi Ziv:
Defining coverage views to improve functional coverage analysis. DAC 2004: 41-44 - [c18]Shai Fine, Shmuel Ur, Avi Ziv:
Probabilistic regression suites for functional verification. DAC 2004: 49-54 - [c17]Avi Ziv:
Stimuli Generation with Late Binding of Values. DATE 2004: 558-563 - [c16]Markus Braun, Shai Fine, Avi Ziv:
Enhancing the efficiency of Bayesian network based coverage directed test generation. HLDVT 2004: 75-80 - [c15]Shady Copty, Shai Fine, Shmuel Ur, Avi Ziv:
Probabilistic Alternative Regression Suites. ISoLA (Preliminary proceedings) 2004: 89-91 - 2003
- [j5]Avi Ziv, Laurent Fournier:
Solving the generalized mask constraint for test generation of binary floating point add operation. Theor. Comput. Sci. 291(2): 183-201 (2003) - [c14]Avi Ziv, Merav Aharoni, Sigal Asaf:
Solving Range Constraints for Binary Floating-Point Instructions. IEEE Symposium on Computer Arithmetic 2003: 158-164 - [c13]Shai Fine, Avi Ziv:
Coverage directed test generation for functional verification using bayesian networks. DAC 2003: 286-291 - [c12]Avi Ziv:
Cross-Product Functional Coverage Measurement with Temporal Properties-Based Assertions . DATE 2003: 10834-10841 - [c11]Avi Ziv:
Functional Verification Environment for Object-oriented Hardware Designs. FDL 2003: 637-646 - [c10]Allon Adir, Eyal Bin, Ofer Peled, Avi Ziv:
Piparazzi: a test program generator for micro-architecture flow verification. HLDVT 2003: 23-28 - [c9]Shai Fine, Avi Ziv:
Enhancing the control and efficiency of the covering process [logic verification]. HLDVT 2003: 96-101 - [c8]Moshe Levinger, Avi Ziv, Brian Bailey, Jacob Abraham, Bob Bentley, William H. Joyner, Yaron Kas:
Panel: What's the next 'big thing' in simulation-based verification? HLDVT 2003: 175 - 2002
- [j4]Eyal Bin, Roy Emek, Gil Shurek, Avi Ziv:
Using a constraint satisfaction formulation and solution techniques for random test program generation. IBM Syst. J. 41(3): 386-402 (2002) - [c7]Oded Lachish, Eitan Marcus, Shmuel Ur, Avi Ziv:
Hole analysis for functional coverage data. DAC 2002: 807-812 - 2001
- [c6]Gilly Nativ, Steven Mittermaier, Shmuel Ur, Avi Ziv:
Cost evaluation of coverage directed test generation for the IBM mainframe. ITC 2001: 793-802
1990 – 1999
- 1998
- [j3]Avi Ziv, Jehoshua Bruck
Analysis of Checkpointing Schemes with Task Duplication. IEEE Trans. Computers 47(2): 222-227 (1998) - [c5]Raanan Grinwald, Eran Harel, Michael Orgad, Shmuel Ur, Avi Ziv:
User Defined Coverage - A Tool Supported Methodology for Design Verification. DAC 1998: 158-163 - [c4]Yossi Malka, Avi Ziv:
Design Reliability - Estimation through Statistical Analysis of Bug Discovery Data. DAC 1998: 644-649 - 1997
- [j2]Avi Ziv, Jehoshua Bruck
An On-Line Algorithm for Checkpoint Placement. IEEE Trans. Computers 46(9): 976-985 (1997) - [j1]Avi Ziv, Jehoshua Bruck
Performance Optimization of Checkpointing Schemes with Task Duplication. IEEE Trans. Computers 46(12): 1381-1386 (1997) - 1996
- [c3]Avi Ziv, Jehoshua Bruck
An on-line algorithm for checkpoint placement. ISSRE 1996: 274-283 - 1994
- [c2]Sanko Lan, Avi Ziv, Abbas El Gamal:
Placement and Routing for a Field Programmable Multi-Chip Module. DAC 1994: 295-300 - [c1]Avi Ziv, Jehoshua Bruck
Analysis of Checkpointing Schemes for Multiprocessor Systems. SRDS 1994: 52-61
Coauthor Index
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last updated on 2024-10-07 21:18 CEST by the dblp team
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