Analog circuit test based on a digital signature
Authors: 
A. Gómez, R. Sanahuja, L. Balado, J. FiguerasAuthors Info & Claims
Abstract
Production verification of analog circuit specifications is a challenging task requiring expensive test equipment and time consuming procedures. This paper presents a method for low cost on-chip parameter verification based on the analysis of a digital signature. A 65 nm CMOS on-chip monitor is proposed and validated in practice. The monitor composes two signals (x(t), y(t)) and divides the X-Y plane with nonlinear boundaries in order to generate a digital code for every analog (x, y) location. A digital signature is obtained using the digital code and its time duration. A metric defining a discrepancy factor is used to verify circuit parameters. The method is applied to detect possible deviations in the natural frequency of a Biquad filter. Simulated and experimental results show the possibilities of the proposal.
References
[1]
IEEE Standard for a Mixed-Signal Test Bus, IEEE std. 1149.4--1999.
[2]
A. Sehgal, S. Ozev, and K. Chakrabarty, "Test infrastructure design for mixed-signal SOCs with wrapped analog cores," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 14, pp. 292--304, March 2006, issue 3.
[3]
A. Valdés-Gracia, F. A. L. Hussien, J. Silva-Martínez, and E. Sánchez-Sinencio, "An Integrated Frequency Response Characterization System With a Digital Interface for Analog Testing," IEEE Journal of Solid-State Circuits, vol. 41, pp. 2301--2313, October 2006, issue 10.
[4]
Chee-Kian Ong, Kwang-Ting Cheng, and L. C. Wang, "A new sigma-delta modulator architecture for testing using digital stimulus," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 51, pp. 206--213, January 2004, issue 1.
[5]
K. Arabi and B. Kaminska, "Oscillation-Test Strategy for Analog and Mixed-Signal Integrated Circuits," VLSI Test Symposium, pp. 476--482, 1996.
[6]
G. Huertas, D. Vázquez, A. Rueda, and J. L. Huertas, "Oscillation-based test in bandpass oversampled A/D converters," Microelectronics Journal, vol. 34, pp. 927--936, 2003.
[7]
A. Walker, "A Step Response Based Mixed-Signal BIST Approach," IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 329--337, 2001.
[8]
H. G. D. Stratigopoulos and Y. Makris, "Concurrent detection of erroneous responses in linear analog circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, pp. 878--891, May 2006, issue 5.
[9]
Fang Liu and S. Ozev, "Statistical Test Development for Analog Circuits Under High Process Variations," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, pp. 1465--1477, August 2007, issue 8.
[10]
P. N. Variyam and A. Chatterjee, "Specification-Driven Test Generation for Analog Circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1189--1201, 2000.
[11]
R. Voorakaranam, S. S. Akbay, S. Bhattacharya, S. Cherubal, and A. Chatterjee, "Signature Testing of Analog and RF Circuits: Algorithms and Methodology," IEEE Transactions on Circuits and Systems, vol. 54, pp. 1018--1031, 2007.
[12]
A. M. Brosa and J. Figueras, "Digital Signature Proposal for Mixed-Signal Circuits," Journal of Electronic Testing, vol. 17, pp. 385--393, October 2001, number 5.
[13]
R. Sanahuja, V. Barcons, L. Balado, and J. Figueras, "Testing Biquad Filters under Parametric Shifts using X-Y zoning," Journal of Electronic Testing-Theory and Application, vol. 20, pp. 257--265, 2005.
[14]
L. Balado, E. Lupon, J. Figueras, M. Roca, E. Isern, and R. Picos, "Verifying Functional Specifications by Regression Techniques on Lissajous Test Signatures," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 56, pp. 754--762, April 2009, issue 4.
[15]
R. Sanahuja, A. Gómez, L. Balado, and J. Figueras, "Digital Signature Generator for Mixed-Signal Testing," European Test Symposium, 2009.
[16]
Yongwang Ding and Ramesh Harjani, High-Linearity CMOS RF Front-End Circuits. Springer US, 2005, ISBN 978-0-387-23801-2.
[17]
Di Long, Xianlong Hong, and Sheqin Dong, "Optimal Two-Dimension Common Centroid Layout generation for MOS Transistors Unit-Circuit," IEEE International Symposium on Circuits and Systems, vol. 3, pp. 2999--3002, 2005.
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Information
Published In
March 2010
1868 pages
ISBN:9783981080162
- General Chairs:
- Giovanni De Micheli,
- Bashir Al-Hashimi,
- Program Chairs:
- Wolfgang Mueller,
- Enrico Macii
Sponsors
- EDAA: European Design Automation Association
- ECSI
- EDAC: Electronic Design Automation Consortium
- SIGDA: ACM Special Interest Group on Design Automation
- The IEEE Computer Society TTTC
- The IEEE Computer Society DATC
- The Russian Academy of Sciences: The Russian Academy of Sciences
Publisher
European Design and Automation Association
Leuven, Belgium
Publication History
Published: 08 March 2010
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DATE '10
Sponsor:
- EDAA
- EDAC
- SIGDA
- The Russian Academy of Sciences
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Overall Acceptance Rate 518 of 1,794 submissions, 29%
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