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WO2024117311A1 - Laminated semiconductor light-emitting element for display pixel, and display device comprising same - Google Patents

Laminated semiconductor light-emitting element for display pixel, and display device comprising same Download PDF

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Publication number
WO2024117311A1
WO2024117311A1 PCT/KR2022/019288 KR2022019288W WO2024117311A1 WO 2024117311 A1 WO2024117311 A1 WO 2024117311A1 KR 2022019288 W KR2022019288 W KR 2022019288W WO 2024117311 A1 WO2024117311 A1 WO 2024117311A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor light
light emitting
emitting device
electrode
layer
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Application number
PCT/KR2022/019288
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French (fr)
Korean (ko)
Inventor
남정범
장영학
방형석
장성규
Original Assignee
엘지전자 주식회사
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Priority to PCT/KR2022/019288 priority Critical patent/WO2024117311A1/en
Publication of WO2024117311A1 publication Critical patent/WO2024117311A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00
    • H01L33/38
    • H01L33/42
    • H01L33/44
    • H01L33/52
    • H01L33/60
    • H01L33/62

Definitions

  • the embodiment relates to a stacked semiconductor light emitting device for display pixels and a display device including the same.
  • Smart glasses for AR or VR require high-resolution and high ppi displays.
  • planar RGB light emitting devices when one color emits light, the area of the color that does not emit light appears empty, making it difficult to implement high ppi.
  • RGB semiconductor light emitting devices are vertically stacked on a substrate, and micro-LEDs, etc. can be used as semiconductor light emitting devices.
  • a micro-LED display is a display that uses micro-LED, a semiconductor light emitting device with a diameter or cross-sectional area of 100 ⁇ m or less, as a display element.
  • micro-LED displays use micro-LED, a semiconductor light-emitting device, as a display device, they have excellent performance in many characteristics such as contrast ratio, response speed, color reproduction rate, viewing angle, brightness, resolution, lifespan, luminous efficiency, and luminance.
  • the micro-LED display has the advantage of being able to freely adjust the size and resolution and implement a flexible display because the screen can be separated and combined in a modular manner.
  • the embodiments aim to solve the above-described problems and other problems.
  • Another object of the embodiment is to provide a stacked semiconductor light-emitting device for display pixels capable of implementing a high ppi and high-resolution display, and a display device including the same.
  • another purpose of the embodiment is to provide a stacked semiconductor light emitting device for display pixels that can increase light efficiency through light scattering and a display device including the same.
  • another purpose of the embodiment is to provide a stacked semiconductor light emitting device for display pixels that can improve the speed of electrical signal transmission and a display device including the same.
  • another object of the embodiment is to provide a stacked semiconductor light emitting device for a display pixel capable of forming a via hole outside the semiconductor epi layer and a display device including the same.
  • Another object of the embodiment is to provide a stacked semiconductor light emitting device for display pixels capable of improving light extraction in the vertical direction and a display device including the same.
  • Another object of the embodiment is to provide a stacked semiconductor light emitting device for display pixels that can minimize loss of the light emitting area and a display device including the same.
  • a stacked semiconductor light emitting device for display pixels includes a substrate; first, second and third semiconductor light emitting devices arranged vertically on the substrate; a common electrode electrically connected to the first, second, and third semiconductor light emitting devices; disposed on one side of each of the first, second, and third semiconductor light emitting devices to be spaced apart from each other in the vertical direction; A first electrode, a second electrode, and a third electrode electrically connected; It includes first, second and third transparent conductive layers respectively in contact with one surface of the first, second and third semiconductor light emitting devices and connected to the first electrode, second electrode and third electrode respectively,
  • the first, second and third transparent conductive layers include regions that overlap with the first, second and third semiconductor light emitting devices and regions that do not overlap with the first, second and third semiconductor light emitting devices, It may include first, second, and third light conversion layers respectively disposed on lower surfaces of the first, second, and third transparent conductive layers.
  • the first transparent conductive layer extends horizontally from one surface of the first semiconductor light emitting device and is connected to the first electrode
  • the second transparent conductive layer extends horizontally from one surface of the second semiconductor light emitting device and is connected to the second electrode
  • the third transparent conductive layer may extend horizontally from one surface of the third semiconductor light emitting device and be connected to the third electrode.
  • the first transparent conductive layer may have a larger area than the first semiconductor light emitting device.
  • the common electrode and the first, second, and third electrodes may surround the semiconductor light emitting device.
  • the first light conversion layer may include a light reflection layer.
  • the second and third light conversion layers may include a light scattering layer.
  • the first, second, and third light conversion layers may include nanowires containing Ag.
  • the common electrode includes a fourth electrode connected to the first, second, and third semiconductor light emitting devices,
  • the fourth electrode may be disposed on at least a portion of the other surface of the first, second, and third semiconductor light emitting devices.
  • each of the first, second, and third electrodes may have different heights.
  • it may further include a passivation layer disposed on the substrate and covering the first, second, and third semiconductor light emitting devices, the common electrode, and the first, second, and third electrodes.
  • the stacked semiconductor light emitting device for display pixels according to the embodiment and the display device including the same there is a technical effect of realizing high resolution and high ppi by forming it in a stacked structure.
  • the embodiment has the technical effect of enabling electrical connection without loss of the light-emitting area of the semiconductor light-emitting device.
  • a semiconductor light-emitting device can receive electrical signals by being connected to an individual electrode through a transparent conductive layer disposed on the bottom of the semiconductor light-emitting device, and there is no need to form a via for electrical connection in the semiconductor light-emitting device, so the light-emitting area is There is a technical effect of increasing luminous efficiency because there is no loss.
  • the transparent conductive layer 150 is disposed in the area overlapping the semiconductor light emitting device 130 to improve the efficiency of light emitted upward from the stacked semiconductor light emitting device.
  • the embodiment has the technical effect of improving light efficiency through light scattering.
  • light efficiency can be improved by placing a light conversion layer under the transparent conductive layer.
  • the embodiment has the technical effect of improving the speed of electrical signal transmission.
  • the light conversion layer disposed below the transparent conductive layer has higher electrical conductivity than the transparent conductive layer, so the signal transmission speed from the electrode to the semiconductor light emitting device can be improved.
  • the embodiment has the technical effect of improving light efficiency through light reflection.
  • a light reflection layer is disposed below the transparent conductive layer connected to the bottommost semiconductor light emitting device in the stacked structure, so that light emitted from the bottom of the stacked structure is reflected upward to improve light efficiency.
  • the embodiment has the technical effect of lowering the difficulty of the process by eliminating the need to form via holes in the semiconductor epitaxial layer.
  • the embodiment provides a technical effect in which the electrode connected to the semiconductor light-emitting device is disposed outside the light-emitting area, thereby improving light output, and is arranged to surround the semiconductor light-emitting device on the substrate, thereby securing a sufficient light-emitting area to improve luminance.
  • the electrode layer disposed in the area that does not overlap with the semiconductor light emitting device 130 also has a transparent conductive layer 150 to prevent reverse reflection of light emitted upward from the stacked semiconductor light emitting device, thereby significantly improving luminance.
  • a transparent conductive layer 150 to prevent reverse reflection of light emitted upward from the stacked semiconductor light emitting device, thereby significantly improving luminance.
  • FIG. 1 is a perspective view of a stacked semiconductor light emitting device for display pixels according to an embodiment.
  • Figure 2 is a conceptual diagram of a stacked semiconductor light emitting device for display pixels according to an embodiment.
  • Figure 3 is a cross-sectional view showing in detail the structure of the semiconductor light emitting device shown in Figure 2.
  • 4A to 4G are process diagrams of a stacked semiconductor light emitting device for display pixels according to an embodiment.
  • Semiconductor light emitting devices described in this specification include smart glasses, digital TVs, mobile phones, smart phones, laptop computers, digital broadcasting terminals, personal digital assistants (PDAs), portable multimedia players (PMPs), and navigation devices. , Slate PC, Tablet PC, Ultra-Book, desktop computer, etc. may be included. However, the configuration according to the embodiment described in this specification can be applied to a device capable of displaying even if it is a new product type that is developed in the future.
  • Figure 1 is a perspective view of a stacked semiconductor light emitting device for display pixels (hereinafter referred to as 'stacked semiconductor light emitting device') according to an embodiment.
  • the semiconductor light emitting device may be a micro-LED or nano-LED, but is not limited thereto.
  • a semiconductor light emitting device 130 may be disposed on a substrate 110.
  • the semiconductor light emitting device 130 may include first, second, and third semiconductor light emitting devices 131, 132, and 133, and may be formed in a cylindrical shape, but is not limited thereto.
  • the first, second, and third semiconductor light emitting devices 131, 132, and 133 may be vertically stacked.
  • the common electrode 120, the first electrode 125a, the second electrode 125b, and the third electrode 125c (not shown) may be disposed on the substrate 110.
  • the substrate 110 may include CMOS to drive a semiconductor light emitting device, and may be made of silicon or the like.
  • the semiconductor light emitting device 130 may be electrically connected to the common electrode 120.
  • the common electrode 120 may commonly supply power to the first to third semiconductor light emitting devices 131, 132, and 133.
  • the first semiconductor light emitting device 131 may be electrically connected to the first electrode 125a.
  • the second semiconductor light emitting device 132 may be electrically connected to the second electrode 125b.
  • the third semiconductor light emitting device 133 may be electrically connected to the third electrode 125c (see FIG. 2).
  • the common electrode 120 and the first, second, and third electrodes 125a, 125b, and 125c are electrically connected to the CMOS provided in the substrate 110 to drive semiconductor light emitting devices.
  • An insulating layer 140 may be disposed under the first, second, and third semiconductor light emitting devices 131, 132, and 133.
  • the insulating layer may be formed of SiO 2 , but is not limited thereto.
  • the insulating layer 140 prevents electrical short circuits in each semiconductor light emitting device, and has adhesive strength to stabilize the stacked structure. In addition, there is a technical effect of absorbing heat generated from the semiconductor light-emitting device 130 and performing the heat dissipation function of the semiconductor light-emitting device 130.
  • the first, second, and third electrodes 125a, 125b, and 125c are connected to the first, second, and second electrodes through the first, second, and third transparent conductive layers 150a, 150b, and 150c. , may be electrically connected to the third semiconductor light emitting device (131, 132, 133).
  • the stacked semiconductor light-emitting device 130 for display pixels is a semiconductor light-emitting device ( 130) and the substrate are electrically connected, there is no need to form a via hole, so there is no loss of area of the epi layer, and there is a complex technical effect of improving the reliability of the epi layer because the via process is not performed on the epi layer.
  • the transparent conductive layer 150 may include an area that overlaps the semiconductor light-emitting device 130 and an area that extends outside the semiconductor light-emitting device 130 and does not overlap the semiconductor light-emitting device 130.
  • high resolution and high ppi are realized by forming a stacked structure, and at the same time, unlike the prior art, the lower electrode layer is placed on the outside so as not to overlap the semiconductor light emitting device 130, thereby enabling electrical connection without loss of the light emitting area.
  • the lower electrode layer is placed on the outside so as not to overlap the semiconductor light emitting device 130, thereby enabling electrical connection without loss of the light emitting area.
  • the transparent conductive layer 150 is disposed in the area overlapping the semiconductor light emitting device 130 to improve the efficiency of light emitted upward from the stacked semiconductor light emitting device.
  • the transparent conductive layer 150 is disposed on the electrode layer disposed in an area that does not overlap the semiconductor light emitting device 130 to prevent reverse reflection of light emitted upward from the stacked semiconductor light emitting device, thereby increasing the luminance.
  • the transparent conductive layer 150 is disposed on the electrode layer disposed in an area that does not overlap the semiconductor light emitting device 130 to prevent reverse reflection of light emitted upward from the stacked semiconductor light emitting device, thereby increasing the luminance.
  • a light conversion layer 160 may be disposed on the lower surface of the transparent conductive layer 150.
  • the light conversion layer 160 may include a first light conversion layer 161, a second light conversion layer 162, and a third light conversion layer 163, and each includes a first transparent conductive layer 150a. , electrically connected to the first semiconductor light-emitting device 131, the second semiconductor light-emitting device 132, and the third semiconductor light-emitting device 133 through the second transparent conductive layer 150b and the third transparent conductive layer 150c. You can.
  • the light conversion layer 160 may be formed in a nanowire structure.
  • the light conversion layer 160 may have lower electrical resistance than the transparent conductive layer 150. This will be explained in detail in Figure 4a.
  • the embodiment has a technical feature in that optical characteristics vary depending on the content of Ag nanowires in the light conversion layer 160.
  • optical characteristics vary depending on the content of Ag nanowires in the light conversion layer 160.
  • the content of Ag nanowires is small, light transmittance can increase and light scattering rate can increase. Additionally, as the content of Ag nanowires increases, light transmittance may decrease and light reflectance may increase. Therefore, in the embodiment, the light conversion layer 160 can obtain specific optical characteristics by adjusting the content of Ag nanowires.
  • the stacked semiconductor light emitting device for display pixels according to the embodiment and the display device including the same have the technical effect of improving the speed of electrical signal transmission through the light conversion layer.
  • the common electrode 120 and the first, second, and third electrodes 125a, 125b, and 125c may be arranged to surround the semiconductor light emitting device 130. Accordingly, there is a technical effect of maximizing the light emitting area of the semiconductor light emitting device disposed on the substrate 110. Additionally, there is a technical effect of minimizing electrical interference between electrodes.
  • the transparent conductive layer 150 may be formed of, for example, indium tin oxide (ITO). Since the conductive layer through which light emitted from the bottom of the semiconductor light emitting device of the stacked structure passes is transparent and has transparency, there is a technical effect of increasing the light traveling upward.
  • ITO indium tin oxide
  • the first light conversion layer 161 may have a higher Ag nanowire content than the second and third light conversion layers 162 and 163.
  • the first light conversion layer 161, which has a large content of Ag nanowires, may have low light transmittance and high light reflectance.
  • the second and third light conversion layers 162 and 163, which contain a small amount of Ag nanowires may have high light transmittance and high light scattering rate.
  • the second light conversion layer 162 and the third light conversion layer 163 disposed on the lower surfaces of the second transparent conductive layer 150b and the third transparent conductive layer 150c may be used as a light scattering layer. Accordingly, there is a technical effect that light efficiency can be improved in a display device including a semiconductor light emitting device with a stacked structure.
  • the second light conversion layer 162 when light is extracted from the first semiconductor light emitting device 131, it may pass through the second light conversion layer 162 and be emitted upward. At this time, the emitted light is scattered by the second light conversion layer 162, and light efficiency can be improved.
  • the embodiment has the technical effect of improving light efficiency as the second and third light conversion layers 162 and 163 are used as light scattering layers.
  • the first light conversion layer 161 disposed on the lower surface of the first transparent conductive layer 161 may be used as a light reflection layer.
  • the embodiment has the technical effect of improving light extraction efficiency as the first light conversion layer 161 is used as a light reflection layer.
  • the semiconductor light emitting device 130, the common electrode 120, and the first, second, and third electrodes 125a, 125b, and 125c disposed on the substrate may be surrounded by the passivation layer 140.
  • the passivation layer 140 can protect the semiconductor light emitting device 130, the common electrode 120, and the first, second, and third electrodes 125a, 125b, and 125c from external shock and prevents electrical shorts from occurring. You can avoid it.
  • the passivation layer 140 may be formed of SiO 2 , but is not limited thereto.
  • Figure 2 is a conceptual diagram of a stacked semiconductor light emitting device according to an embodiment.
  • a stacked semiconductor light emitting device 130 including first to third semiconductor light emitting devices 131 , 132 , and 133 may be disposed on the substrate 110 . Additionally, an individual electrode 125 and a common electrode 120 may be disposed on the substrate 110. The individual electrode 125 may include a first electrode 125a, a second electrode 125b, and a third electrode 125c. The semiconductor light emitting device 130 may be connected to the individual electrode 125 and the common electrode 120 through a transparent conductive layer 150.
  • the transparent conductive layer 150 may include a first transparent conductive layer 150a, a second transparent conductive layer 150b, and a third transparent conductive layer 150c.
  • the first semiconductor light emitting device 131 may be electrically connected to the first electrode 125a through the first transparent conductive layer 150a.
  • the second semiconductor light emitting device 132 may be electrically connected to the second electrode 125b through the second transparent conductive layer 150b.
  • the third semiconductor light emitting device 133 may be electrically connected to the third electrode 125c through the third transparent conductive layer 150c.
  • a light conversion layer 160 may be disposed on the lower surface of the transparent conductive layer 150.
  • a first light conversion layer 161 is disposed on the lower surface of the first transparent conductive layer 150a
  • a second light conversion layer 162 is disposed on the lower surface of the second transparent conductive layer 150b
  • a third transparent conductive layer is disposed on the lower surface of the first transparent conductive layer 150a.
  • a third light conversion layer 163 may be disposed on the lower surface of the layer 150c.
  • the light conversion layer 160 may be formed to have lower resistance than the transparent conductive layer 150.
  • the light conversion layer 160 may be formed of nanowires or Ag, but is not limited thereto.
  • the first semiconductor light-emitting device 131 emits a red color
  • the second semiconductor light-emitting device 132 emits a green color
  • the third semiconductor light-emitting device 133 is a semiconductor light-emitting device that emits a blue color. It may be possible, but it is not limited to this.
  • the first, second, and third electrodes 125a, 125b, and 125c may each be formed at different heights.
  • the transparent conductive layer 150 is formed of a light-transmitting material to minimize light loss when light generated from the semiconductor light emitting device located below is directed upward, and is connected to the first, second, and third electrodes 125a and 125b. , 125c) and the first, second, and third semiconductor light emitting devices 131, 132, and 133 have the technical effect of being able to electrically connect them.
  • the fourth electrode 121 may be formed on a portion of the upper surface of the semiconductor light emitting device 130 to correspond to the shape of the upper surface.
  • the fourth electrode 121 may have a ring shape.
  • the fourth electrode 121 includes 4-1 to 4-3 electrodes 121a, 121b, and 121c that are electrically connected to the first, second, and third semiconductor light emitting devices 131, 132, and 133, respectively. ) may include.
  • the first semiconductor light emitting device 131 may be electrically connected to the common electrode 120 through the 4-1 electrode 121a
  • the second semiconductor light emitting device 132 may be electrically connected to the 4-2 electrode ( It can be electrically connected to the common electrode 120 through 121b)
  • the third semiconductor light emitting device 133 can be electrically connected to the common electrode 120 through the 4-3 electrode 121c.
  • Figure 3 is a diagram showing the semiconductor light emitting device in detail in the stacked semiconductor light emitting device for display pixels according to an embodiment. The following description can be applied to the first, second, and third semiconductor light emitting devices 131, 132, and 133.
  • the semiconductor light emitting device 130 may include a first conductivity type semiconductor layer 136, a second conductivity type semiconductor layer 138, and an active layer 137 disposed between them.
  • the first conductive semiconductor layer 136 may be an n-type semiconductor layer
  • the second conductive semiconductor layer 138 may be a p-type semiconductor layer, but are not limited thereto.
  • the active layer 137 is a region that generates light, and can generate light with a specific wavelength band depending on the material properties of the compound semiconductor. That is, the wavelength band can be determined by the energy band gap of the compound semiconductor included in the active layer 137. Therefore, depending on the energy band gap of the compound semiconductor included in the active layer 157, the semiconductor light emitting device 130 of the embodiment can generate UV light, blue light, green light, and red light.
  • the first conductive semiconductor layer 156, the active layer 157, and the second conductive semiconductor layer 158 may be made of a compound semiconductor material.
  • the compound semiconductor material may be a group 3-5 compound semiconductor material, a group 2-6 compound semiconductor material, etc.
  • the compound semiconductor material may include GaN, InGaN, AlN, AlInN, AlGaN, AlInGaN, InP, GaAs, GaP, GaInP, etc.
  • first electrode layer 134 may be disposed under the first conductive semiconductor layer 136, and the second electrode layer 139 may be disposed on the second conductive semiconductor layer 138.
  • the first electrode layer 134 is electrically connected to one of the first, second, and third electrodes through the transparent conductive layer 150 and the light conversion layer 160, and the second electrode layer 139 is a common electrode ( 120) and can be electrically connected.
  • 4A to 4G are manufacturing process diagrams of a stacked semiconductor light emitting device for display pixels according to an embodiment.
  • the epitaxial layer 135 may be grown on the growth substrate 115.
  • the epitaxial layer 135 may be made of a compound semiconductor material.
  • the compound semiconductor material may be a group 3-5 compound semiconductor material, a group 2-6 compound semiconductor material, etc.
  • the compound semiconductor material may include GaN, InGaN, AlN, AlInN, AlGaN, AlInGaN, InP, GaAs, GaP, GaInP, etc.
  • a transparent conductive layer 150 may be formed on the epi layer.
  • the transparent conductive layer 150 is made of a light-transmissive material and may have electrical conductivity.
  • the transparent conductive layer 150 may be formed of, for example, ITO (Indum Tin Oxide), but is not limited thereto.
  • the light conversion layer 160 may be formed on the light-transmitting conductive layer 150.
  • a dispersion containing Ag can be applied on the light-transmitting conductive layer 150 by spin coating, and then soft baking can be performed.
  • the dispersion may contain nanoscale Ag wires.
  • photonic welding is performed on the light-transmitting conductive layer 150 at about 300°C, it is attached to the light-transmitting conductive layer and can be formed in the form of a nano-sized wire.
  • the formed light conversion layer may have superior current diffusion characteristics compared to the transparent conductive layer.
  • the light conversion layer 160 formed on the light-transmitting conductive layer 150 can be formed by varying the content of Ag nanowires.
  • the light conversion layer 160 may have different optical characteristics depending on the content of Ag nanowires. In detail, if the content of Ag nanowires is small, light transmittance can increase and light scattering rate can increase. Additionally, as the content of Ag nanowires increases, light transmittance may decrease and light reflectance may increase. Therefore, the light conversion layer 160 can obtain specific optical characteristics by adjusting the content of Ag nanowires.
  • the embodiment has the technical effect of improving the speed of electrical signal transmission to the semiconductor light-emitting device by forming the light conversion layer in the form of nanowires containing Ag.
  • the 1-1 insulating layer 140a may be disposed under the light conversion layer 160. Then, the 1-2 insulating layer 140b can be formed and prepared on the substrate 110 on which the CMOS is formed. The 1-1 insulating layer 140a disposed below the light conversion layer 160 may be bonded so that the 1-2 insulating layer 140b disposed on the substrate 110 faces each other.
  • the 1-1 and 1-2 insulating layers 140a and 140b may be SiO 2 , but are not limited thereto. SiO 2 and Bonding of SiO 2 originally requires a high temperature process of about 700°C, but the surfaces of the 1-1 and 1-2 insulating layers 140a1 and 140b can be plasma treated, and thus, at a temperature of about 400°C. The bonding process can be performed so that the epitaxial layer 135 is not damaged by high temperature.
  • the epi layer 135 may be formed of GaN, etc., and the growth substrate may be removed through a laser lift-off (LLO) method, but is not limited to this.
  • LLO laser lift-off
  • the epitaxial layer 135 may be formed of GaAs, etc., and the growth substrate may be removed through a chemical lift-off (CLO) method, but is not limited to this.
  • a hard mask (not shown) can be deposited on the epi layer 135 and a photo process and an etching process can be performed.
  • the transparent conductive layer 150 may be formed in an oval shape.
  • a hard mask (not shown) can be deposited on the epi layer 135 and a photo process and an etching process can be performed.
  • the epitaxial layer 135 may be etched into an oval shape.
  • the epi layer may be formed to have a smaller area than the transparent conductive layer 150.
  • the exposed transparent conductive layer 150 and epi layer 135 are covered with an insulating layer. And, it can be flattened through the CMP process.
  • a first via hole is formed from the surface of the insulating layer 140 through the transparent conductive layer 150 to the surface of the substrate 110, and a semiconductor light emitting device 135 is formed on the surface of the insulating layer.
  • a second via hole may be formed up to the top surface of the substrate so as not to overlap the transparent conductive layer 150.
  • An individual electrode 125 may be formed in the first via hole.
  • the individual electrode 125 may be electrically connected to the semiconductor light emitting device 135 through the transparent conductive layer 150. Additionally, the individual electrode 125 may be electrically connected to the semiconductor light emitting device 135 through the light conversion layer 160 disposed on the lower surface of the transparent conductive layer 150.
  • the light conversion layer 160 may be formed in the form of an Ag nanowire, but is not limited to this. Accordingly, since the light conversion layer 160 may have a lower resistance than the transparent conductive layer 150, the speed of electrical signal transmission from the individual electrode 125 to the semiconductor light emitting device 135 will be improved. There are technical effects that can be achieved.
  • a common electrode 120 may be formed in the second via hole.
  • the common electrode 120 may be electrically connected to the semiconductor light emitting device 135 and the fourth electrode 121.
  • the fourth electrode may be formed at the edge of the upper surface of the semiconductor light emitting device 135, for example, in a ring shape, but is not limited to this.
  • the above manufacturing process can be repeated to manufacture a semiconductor light emitting device with a stacked structure as shown in FIG. 4g.
  • a second semiconductor light-emitting device 132 is disposed on the first semiconductor light-emitting device 131, and a third semiconductor light-emitting device 133 is disposed on the second semiconductor light-emitting device 132. You can.
  • the first semiconductor light emitting device 131 may be connected to the first electrode 125a through the first transparent conductive layer 150a. Additionally, a first light conversion layer 161 may be disposed on the lower surface of the first transparent conductive layer 150a.
  • the second semiconductor light emitting device 132 may be connected to the second electrode 125b through the second transparent conductive layer 150b. Additionally, a second light conversion layer 162 may be disposed on the lower surface of the second transparent conductive layer 150b.
  • the third semiconductor light emitting device 133 may be connected to the third electrode 125c through the third transparent conductive layer 150c. Additionally, a third light conversion layer 163 may be disposed on the lower surface of the third transparent conductive layer 150c.
  • the second light conversion layer 162 and the third light conversion layer 163 may be used as a light scattering layer. Accordingly, the second light conversion layer 162 can scatter the light emitted from the first semiconductor light emitting device 131 and increase the amount of light exiting the top. Additionally, the third light conversion layer 163 may scatter light emitted from the first and second semiconductor light emitting devices 131 and 132 and increase the amount of light exiting the top.
  • the embodiment has the technical effect of increasing light efficiency in a semiconductor light emitting device with a stacked structure as the light conversion layer disposed on the bottom of the transparent conductive layer is used as a light scattering layer.
  • the first light conversion layer 161 may be used as a light reflection layer.
  • the first light conversion layer 161 may reflect light emitted downward from the first semiconductor light emitting device 131 to increase the amount of light exiting upward. Therefore, the embodiment has the technical effect of increasing light efficiency in a semiconductor light emitting device with a stacked structure as the light conversion layer disposed on the lower surface of the transparent conductive layer is used as a light reflection layer.
  • the first semiconductor light emitting device 131 emits red color
  • luminous efficiency is low, but luminous efficiency can be improved to correspond to a semiconductor light emitting device that emits blue or green color through the light reflection layer.
  • the stacked semiconductor light emitting device for display pixels according to the embodiment and the display device including the same there is a technical effect of realizing high resolution and high ppi by forming it in a stacked structure.
  • the embodiment has the technical effect of enabling electrical connection without loss of the light-emitting area of the semiconductor light-emitting device.
  • a semiconductor light emitting device can receive an electrical signal by being connected to an electrode through a transparent conductive layer disposed on the bottom, and there is no need to form a via for electrical connection in the semiconductor light emitting device, so there is no loss of the light emitting area and the light is emitted.
  • the transparent conductive layer 150 is disposed in the area overlapping the semiconductor light emitting device 130 to improve the efficiency of light emitted upward from the stacked semiconductor light emitting device.
  • the embodiment has the technical effect of improving light efficiency through light scattering.
  • light efficiency can be improved by placing a light conversion layer under the transparent conductive layer.
  • the embodiment has the technical effect of improving the speed of electrical signal transmission.
  • the light conversion layer disposed below the transparent conductive layer has higher electrical conductivity than the transparent conductive layer, so the signal transmission speed from the electrode to the semiconductor light emitting device can be improved.
  • the embodiment has the technical effect of improving light efficiency through light reflection.
  • a light reflection layer is disposed below the transparent conductive layer connected to the bottommost semiconductor light emitting device in the stacked structure, so that light emitted from the bottom of the stacked structure is reflected upward to improve light efficiency.
  • the embodiment has the technical effect of lowering the difficulty of the process by eliminating the need to form via holes in the semiconductor epitaxial layer.
  • the embodiment provides a technical effect in which the electrode connected to the semiconductor light emitting device is disposed outside the light emitting area to improve light output, and the electrode is disposed to surround the semiconductor light emitting device on the substrate to sufficiently secure the light emitting area to improve luminance.
  • the electrode layer disposed in the area that does not overlap with the semiconductor light emitting device 130 also has a transparent conductive layer 150 to prevent reverse reflection of light emitted upward from the stacked semiconductor light emitting device, thereby significantly improving luminance.
  • a transparent conductive layer 150 to prevent reverse reflection of light emitted upward from the stacked semiconductor light emitting device, thereby significantly improving luminance.

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Abstract

This laminated semiconductor light-emitting element for a display pixel according to an embodiment may comprise: a substrate; a plurality of semiconductor light-emitting elements vertically disposed on the substrate; a common electrode and an individual electrode that are electrically connected to the plurality of semiconductor light-emitting elements; a transparent conductive layer that is in contact with one surface of each of the plurality of semiconductor light-emitting elements and connected to the individual electrode; and an optical conversion layer arranged on the lower surface of the transparent conductive layer.

Description

디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치Stacked semiconductor light emitting device for display pixels and display device including the same
실시예는 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치에 관한 것이다.The embodiment relates to a stacked semiconductor light emitting device for display pixels and a display device including the same.
AR 또는 VR 등을 위한 스마트 글라스는 고해상도와 고ppi의 디스플레이가 요구된다. 그런데 평면형 RGB 발광소자의 경우, 하나의 컬러가 발광할 때 발광하지 않는 컬러의 영역은 비어 있는 것처럼 보이게 되어 고ppi를 구현하기 어려운 문제점이 있다.Smart glasses for AR or VR require high-resolution and high ppi displays. However, in the case of planar RGB light emitting devices, when one color emits light, the area of the color that does not emit light appears empty, making it difficult to implement high ppi.
따라서, 기판 상에 RGB의 반도체 발광소자를 수직으로 적층한 구조를 통해 고ppi의 디스플레이 장치에 대한 연구가 있으며, 반도체 발광소자에는 마이크로-LED 등이 사용될 수 있다.Therefore, there is research on a high ppi display device through a structure in which RGB semiconductor light emitting devices are vertically stacked on a substrate, and micro-LEDs, etc. can be used as semiconductor light emitting devices.
마이크로-LED 디스플레이는 100㎛ 이하의 직경 또는 단면적을 가지는 반도체 발광소자인 마이크로-LED를 표시소자로 사용하는 디스플레이이다. A micro-LED display is a display that uses micro-LED, a semiconductor light emitting device with a diameter or cross-sectional area of 100㎛ or less, as a display element.
마이크로-LED 디스플레이는 반도체 발광소자인 마이크로-LED를 표시소자로 사용하기 때문에 명암비, 응답속도, 색 재현률, 시야각, 밝기, 해상도, 수명, 발광효율이나 휘도 등 많은 특성에서 우수한 성능을 가지고 있다.Because micro-LED displays use micro-LED, a semiconductor light-emitting device, as a display device, they have excellent performance in many characteristics such as contrast ratio, response speed, color reproduction rate, viewing angle, brightness, resolution, lifespan, luminous efficiency, and luminance.
특히 마이크로-LED 디스플레이는 화면을 모듈 방식으로 분리, 결합할 수 있어 크기나 해상도 조절이 자유로운 장점 및 플렉서블 디스플레이 구현이 가능한 장점이 있다.In particular, the micro-LED display has the advantage of being able to freely adjust the size and resolution and implement a flexible display because the screen can be separated and combined in a modular manner.
반면에, 스마트 글라스와 같은 소형 디스플레이 장치의 경우 초소형 마이크로-LED를 사용한 적층형 반도체 발광소자에서 각 RGB 반도체 발광소자에 비아를 형성하기 어려워, 전원을 공급하기 어려운 문제가 있으며, 본 발명을 통하여 문제점을 해결하고자 한다.On the other hand, in the case of small display devices such as smart glasses, it is difficult to form vias in each RGB semiconductor light emitting device in a stacked semiconductor light emitting device using ultra-small micro-LEDs, making it difficult to supply power, and the problem is solved through the present invention. I want to solve it.
실시예는 전술한 문제 및 다른 문제를 해결하는 것을 목적으로 한다.The embodiments aim to solve the above-described problems and other problems.
실시예의 다른 목적은 고ppi 및 고해상도 디스플레이를 구현할 수 있는 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치를 제공하는 것이다.Another object of the embodiment is to provide a stacked semiconductor light-emitting device for display pixels capable of implementing a high ppi and high-resolution display, and a display device including the same.
또한, 실시예의 또 다른 목적은 광 산란을 통해 광 효율을 높일 수 있는 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치를 제공하는 것이다.Additionally, another purpose of the embodiment is to provide a stacked semiconductor light emitting device for display pixels that can increase light efficiency through light scattering and a display device including the same.
또한, 실시예의 또 다른 목적은 전기적 신호 전달 속도를 향상시킬 수 있는 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치를 제공하는 것이다.Additionally, another purpose of the embodiment is to provide a stacked semiconductor light emitting device for display pixels that can improve the speed of electrical signal transmission and a display device including the same.
또한, 실시예의 또 다른 목적은 비아 홀을 반도체 에피층 외부에 형성할 수 있는 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치를 제공하는 것이다.In addition, another object of the embodiment is to provide a stacked semiconductor light emitting device for a display pixel capable of forming a via hole outside the semiconductor epi layer and a display device including the same.
실시예의 또 다른 목적은 수직 방향으로 광 추출을 향상시킬 수 있는 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치를 제공하는 것이다.Another object of the embodiment is to provide a stacked semiconductor light emitting device for display pixels capable of improving light extraction in the vertical direction and a display device including the same.
실시예의 또 다른 목적은 발광 영역의 손실을 최소화할 수 있는 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치를 제공하는 것이다.Another object of the embodiment is to provide a stacked semiconductor light emitting device for display pixels that can minimize loss of the light emitting area and a display device including the same.
실시예의 기술적 과제는 본 항목에 기재된 것에 한정되지 않으며, 명세서 전체를 통해 파악될 수 있는 것을 포함한다.The technical problems of the embodiments are not limited to those described in this item and include those that can be understood throughout the specification.
실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자는 기판; 상기 기판 상에 수직으로 배치되는 제1, 제2 및 제3 반도체 발광소자; 상기 제1, 제2 및 제3 반도체 발광소자에 전기적으로 연결되는 공통전극, 상기 제1, 제2 및 제3 반도체 발광소자와 수직 방향으로 중첩되지 않도록 각각의 일측에 이격되어 배치되며, 각각에 전기적으로 연결되는 제1 전극, 제2 전극 및 제3 전극; 상기 제1, 제2 및 제3 반도체 발광소자의 일면에 각각 접하며 상기 제1 전극, 제2 전극 및 제3 전극에 각각 연결되는 제1, 제2 및 제3 투명 전도층;을 포함하며,A stacked semiconductor light emitting device for display pixels according to an embodiment includes a substrate; first, second and third semiconductor light emitting devices arranged vertically on the substrate; a common electrode electrically connected to the first, second, and third semiconductor light emitting devices; disposed on one side of each of the first, second, and third semiconductor light emitting devices to be spaced apart from each other in the vertical direction; A first electrode, a second electrode, and a third electrode electrically connected; It includes first, second and third transparent conductive layers respectively in contact with one surface of the first, second and third semiconductor light emitting devices and connected to the first electrode, second electrode and third electrode respectively,
상기 제1, 제2 및 제3 투명 전도층은 상기 제1, 제2 및 제3 반도체 발광소자와 중첩되는 영역과 상기 제1, 제2 및 제3 반도체 발광소자과 중첩되지 않는 영역을 포함하고, 상기 제1, 제2 및 제3 투명 전도층의 하면에 각각 배치되는 제1, 제2 및 제3 광 변환층을 포함할 수 있다.The first, second and third transparent conductive layers include regions that overlap with the first, second and third semiconductor light emitting devices and regions that do not overlap with the first, second and third semiconductor light emitting devices, It may include first, second, and third light conversion layers respectively disposed on lower surfaces of the first, second, and third transparent conductive layers.
또한, 실시예에서 상기 제1 투명 전도층은 상기 제1 반도체 발광소자의 일면에서 수평방향으로 연장되어 상기 제1 전극과 연결되며,Additionally, in an embodiment, the first transparent conductive layer extends horizontally from one surface of the first semiconductor light emitting device and is connected to the first electrode,
상기 제2 투명 전도층은 상기 제2 반도체 발광소자의 일면에서 수평방향으로 연장되어 상기 제2 전극과 연결되고,The second transparent conductive layer extends horizontally from one surface of the second semiconductor light emitting device and is connected to the second electrode,
상기 제3 투명 전도층은 상기 제3 반도체 발광소자의 일면에서 수평방향으로 연장되어 상기 제3 전극과 연결될 수 있다.The third transparent conductive layer may extend horizontally from one surface of the third semiconductor light emitting device and be connected to the third electrode.
또한, 실시예에서, 상기 제1 투명 전도층은 상기 제1 반도체 발광소자 보다 큰 면적을 가질 수 있다.Additionally, in an embodiment, the first transparent conductive layer may have a larger area than the first semiconductor light emitting device.
또한, 실시예에서 상기 공통전극과 상기 제1, 제2 및 제3 전극은 상기 반도체 발광소자를 둘러쌀 수 있다.Additionally, in an embodiment, the common electrode and the first, second, and third electrodes may surround the semiconductor light emitting device.
또한, 실시예에서 상기 제1 광 변환층은 광 반사층을 포함할 수 있다.Additionally, in an embodiment, the first light conversion layer may include a light reflection layer.
또한, 실시예에서 상기 제2 및 제3 광 변환층은 광 산란층을 포함할 수 있다.Additionally, in an embodiment, the second and third light conversion layers may include a light scattering layer.
또한, 실시예에서 상기 제1, 제2 및 제3 광 변환층은 Ag를 포함하는 나노 와이어를 포함할 수 있다.Additionally, in an embodiment, the first, second, and third light conversion layers may include nanowires containing Ag.
또한, 실시예에서 상기 공통전극은 상기 제1, 제2 및 제3 반도체 발광소자와 연결되는 제4 전극을 포함하며,Additionally, in the embodiment, the common electrode includes a fourth electrode connected to the first, second, and third semiconductor light emitting devices,
상기 제4 전극은 상기 제1, 제2 및 제3 반도체 발광소자의 타면의 적어도 일부에 배치될 수 있다.The fourth electrode may be disposed on at least a portion of the other surface of the first, second, and third semiconductor light emitting devices.
또한, 실시예에서 상기 제1, 제2 및 제3 전극 각각은 높이가 서로 다를 수 있다.Additionally, in an embodiment, each of the first, second, and third electrodes may have different heights.
또한, 실시예에서 상기 기판 상에 배치되어 상기 제1, 제2 및 제3 반도체 발광소자와 상기 공통전극 및 상기 제1, 제2 및 제3 전극을 덮는 패시베이션층을 더 포함할 수 있다.Additionally, in an embodiment, it may further include a passivation layer disposed on the substrate and covering the first, second, and third semiconductor light emitting devices, the common electrode, and the first, second, and third electrodes.
실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치에 의하면, 적층형 구조로 형성하여 고해상도 및 고ppi를 구현할 수 있는 기술적 효과가 있다.According to the stacked semiconductor light emitting device for display pixels according to the embodiment and the display device including the same, there is a technical effect of realizing high resolution and high ppi by forming it in a stacked structure.
또한, 실시예는 반도체 발광 소자의 발광 영역의 손실이 없이 전기적 연결이 가능하도록 하는 기술적 효과가 있다. Additionally, the embodiment has the technical effect of enabling electrical connection without loss of the light-emitting area of the semiconductor light-emitting device.
예를 들어, 반도체 발광 소자는 반도체 발광 소자의 하면에 배치된 투명 전도층을 통해 개별전극과 연결되어 전기적 신호를 공급받을 수 있으며, 반도체 발광 소자에 전기적 연결을 위한 비아를 형성하지 않아도 되어 발광 영역의 손실이 없어 발광 효율을 높일 수 있는 기술적 효과가 있다.For example, a semiconductor light-emitting device can receive electrical signals by being connected to an individual electrode through a transparent conductive layer disposed on the bottom of the semiconductor light-emitting device, and there is no need to form a via for electrical connection in the semiconductor light-emitting device, so the light-emitting area is There is a technical effect of increasing luminous efficiency because there is no loss.
또한 반도체 발광소자(130)와 중첩되는 영역은 투명 전도층(150)을 배치하여 적층형 반도체 발광소자에서 상측으로 출사되는 빛의 효율을 향상시킬 수 있다.In addition, the transparent conductive layer 150 is disposed in the area overlapping the semiconductor light emitting device 130 to improve the efficiency of light emitted upward from the stacked semiconductor light emitting device.
또한, 실시예는 광 산란을 통해서 광 효율이 향상되는 기술적 효과가 있다.Additionally, the embodiment has the technical effect of improving light efficiency through light scattering.
예를 들어, 투명 전도층 아래에 광 변환층을 배치하여, 광 효율을 향상시킬 수 있다.For example, light efficiency can be improved by placing a light conversion layer under the transparent conductive layer.
또한, 실시예는 전기적 신호 전달 속도가 향상될 수 있는 기술적 효과가 있다.Additionally, the embodiment has the technical effect of improving the speed of electrical signal transmission.
예를 들어, 투명 전도층 아래에 배치되는 광 변환층은 투명 전도층 보다 높은 전기 전도성을 가지므로, 전극으로부터 반도체 발광소자까지의 신호 전달 속도가 향상될 수 있다.For example, the light conversion layer disposed below the transparent conductive layer has higher electrical conductivity than the transparent conductive layer, so the signal transmission speed from the electrode to the semiconductor light emitting device can be improved.
또한, 실시예는 광 반사를 통해서 광 효율이 향상되는 기술적 효과가 있다.Additionally, the embodiment has the technical effect of improving light efficiency through light reflection.
예를 들어, 적층 구조에서 가장 밑에 배치되는 반도체 발광소자와 연결되는 투명 전도층 아래에는 광 반사층이 배치되어, 적층 구조에서 하부로 출사되는 빛을 상부로 반사시켜 광 효율을 향상시킬 수 있다.For example, a light reflection layer is disposed below the transparent conductive layer connected to the bottommost semiconductor light emitting device in the stacked structure, so that light emitted from the bottom of the stacked structure is reflected upward to improve light efficiency.
또한, 실시예는 반도체 에피층에 비아 홀을 형성하지 않아도 되어 공정의 난이도를 낮출 수 있는 기술적 효과가 있다.In addition, the embodiment has the technical effect of lowering the difficulty of the process by eliminating the need to form via holes in the semiconductor epitaxial layer.
또한, 실시예는 반도체 발광 소자와 연결되는 전극이 발광 영역 외측에 배치되어 광 출력이 향상되며, 기판 상에 반도체 발광 소자를 둘러싸도록 배치되어 발광 영역을 충분히 확보하여 휘도를 향상시킬 수 있는 기술적 효과가 있다.In addition, the embodiment provides a technical effect in which the electrode connected to the semiconductor light-emitting device is disposed outside the light-emitting area, thereby improving light output, and is arranged to surround the semiconductor light-emitting device on the substrate, thereby securing a sufficient light-emitting area to improve luminance. There is.
또한 실시예에서는 반도체 발광소자(130)와 중첩되지 않는 영역에 배치되는 전극층도 투명 전도층(150)을 배치하여 적층형 반도체 발광소자에서 상측으로 출사되는 빛의 역 반사를 방지하여 휘도를 현저히 항샹시킬 수 있는 특별한 기술적 효과가 있다.In addition, in the embodiment, the electrode layer disposed in the area that does not overlap with the semiconductor light emitting device 130 also has a transparent conductive layer 150 to prevent reverse reflection of light emitted upward from the stacked semiconductor light emitting device, thereby significantly improving luminance. There are special technical effects that can be achieved.
실시예의 기술적 효과는 본 항목에 기재된 것에 한정되지 않으며, 명세서 전체를 통해 파악될 수 있는 것을 포함한다.The technical effects of the embodiments are not limited to those described in this item and include those that can be understood throughout the specification.
도 1은 실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자의 사시도이다.1 is a perspective view of a stacked semiconductor light emitting device for display pixels according to an embodiment.
도 2는 실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자의 개념도이다.Figure 2 is a conceptual diagram of a stacked semiconductor light emitting device for display pixels according to an embodiment.
도 3은 도2에서 나타낸 반도체 발광소자의 구조를 상세히 나타낸 단면도이다.Figure 3 is a cross-sectional view showing in detail the structure of the semiconductor light emitting device shown in Figure 2.
도 4a 내지 도 4g는 실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자의 공정도이다.4A to 4G are process diagrams of a stacked semiconductor light emitting device for display pixels according to an embodiment.
이하, 첨부된 도면을 참조하여 본 명세서에 개시된 실시예를 상세히 설명하기로 한다. 이하의 설명에서 사용되는 구성요소에 대한 접미사 '모듈' 및 '부'는 명세서 작성의 용이함이 고려되어 부여되거나 혼용되는 것으로서, 그 자체로 서로 구별되는 의미 또는 역할을 갖는 것은 아니다. 또한, 첨부된 도면은 본 명세서에 개시된 실시예를 쉽게 이해할 수 있도록 하기 위한 것이며, 첨부된 도면에 의해 본 명세서에 개시된 기술적 사상이 제한되는 것은 아니다. 또한, 층, 영역 또는 기판과 같은 요소가 다른 구성요소 '상(on)'에 존재하는 것으로 언급될 때, 이것은 직접적으로 다른 요소 상에 존재하거나 또는 그 사이에 다른 중간 요소가 존재할 수도 있는 것을 포함한다.Hereinafter, embodiments disclosed in this specification will be described in detail with reference to the attached drawings. The suffixes 'module' and 'part' for components used in the following description are given or used interchangeably in consideration of ease of specification preparation, and do not have distinct meanings or roles in themselves. In addition, the attached drawings are intended to facilitate easy understanding of the embodiments disclosed in this specification, and the technical ideas disclosed in this specification are not limited by the attached drawings. Additionally, when an element such as a layer, region or substrate is referred to as being 'on' another component, this includes either directly on the other element or there may be other intermediate elements in between. do.
본 명세서에서 설명되는 반도체 발광소자는 스마트 글라스, 디지털 TV, 휴대폰, 스마트 폰(smart phone), 노트북 컴퓨터(laptop computer), 디지털방송용 단말기, PDA(personal digital assistants), PMP(portable multimedia player), 네비게이션, 슬레이트(Slate) PC, 태블릿(Tablet) PC, 울트라 북(Ultra-Book), 데스크탑 컴퓨터 등이 포함될 수 있다. 그러나, 본 명세서에 기재된 실시예에 따른 구성은 추후 개발되는 새로운 제품형태이라도, 디스플레이가 가능한 장치에도 적용될 수 있다.Semiconductor light emitting devices described in this specification include smart glasses, digital TVs, mobile phones, smart phones, laptop computers, digital broadcasting terminals, personal digital assistants (PDAs), portable multimedia players (PMPs), and navigation devices. , Slate PC, Tablet PC, Ultra-Book, desktop computer, etc. may be included. However, the configuration according to the embodiment described in this specification can be applied to a device capable of displaying even if it is a new product type that is developed in the future.
이하, 실시예에 따른 반도체 발광소자를 포함하는 디스플레이 화소용 적층형 반도체 발광소자에 대해 설명한다.Hereinafter, a stacked semiconductor light-emitting device for display pixels including a semiconductor light-emitting device according to an embodiment will be described.
도 1은 실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자(이하 '적층형 반도체 발광소자' 라 한다)의 사시도이다. 실시예에서 반도체 발광 소자는 마이크로-LED나 Nano-LED일 수 있으나 이에 한정되는 것은 아니다.Figure 1 is a perspective view of a stacked semiconductor light emitting device for display pixels (hereinafter referred to as 'stacked semiconductor light emitting device') according to an embodiment. In the embodiment, the semiconductor light emitting device may be a micro-LED or nano-LED, but is not limited thereto.
도 1을 참조하면, 기판(110) 상에 반도체 발광 소자(130)가 배치될 수 있다. 상기 반도체 발광 소자(130)는 제1, 제2, 제3 반도체 발광소자들(131, 132, 133)을 포함할 수 있으며, 원통형으로 형성될 수 있으나 이에 한정하지 않는다. 상기 제1, 제2, 제3 반도체 발광소자들(131, 132, 133)은 수직으로 적층될 수 있다. 또한, 공통전극(120)과 제1 전극(125a), 제2 전극(125b) 및 제3 전극(125c)(미도시) 기판(110) 상에 배치될 수 있다. 그리고, 상기 기판(110)은 반도체 발광소자를 구동할 수 있도록 CMOS를 구비할 수 있으며, 실리콘 등으로 형성될 수 있다.Referring to FIG. 1, a semiconductor light emitting device 130 may be disposed on a substrate 110. The semiconductor light emitting device 130 may include first, second, and third semiconductor light emitting devices 131, 132, and 133, and may be formed in a cylindrical shape, but is not limited thereto. The first, second, and third semiconductor light emitting devices 131, 132, and 133 may be vertically stacked. Additionally, the common electrode 120, the first electrode 125a, the second electrode 125b, and the third electrode 125c (not shown) may be disposed on the substrate 110. Additionally, the substrate 110 may include CMOS to drive a semiconductor light emitting device, and may be made of silicon or the like.
상기 반도체 발광소자(130)는 공통전극(120)과 전기적으로 연결될 수 있다. 공통전극(120)은 제1 내지 제3 반도체 발광소자들(131, 132, 133)에 공통으로 전원을 공급할 수 있다. 제1 반도체 발광소자(131)는 제1 전극(125a)와 전기적으로 연결될 수 있다. 제2 반도체 발광소자(132)는 제2 전극(125b)과 전기적으로 연결될 수 있다. 제3 반도체 발광소자(133)는 제3 전극(125c)(도 2 참조)와 전기적으로 연결될 수 있다. 공통전극(120)과 제1, 제2, 제3 전극들(125a, 125b, 125c)은 기판(110) 내에 구비되어 있는 CMOS와 전기적으로 연결되어 반도체 발광소자들을 구동할 수 있다.The semiconductor light emitting device 130 may be electrically connected to the common electrode 120. The common electrode 120 may commonly supply power to the first to third semiconductor light emitting devices 131, 132, and 133. The first semiconductor light emitting device 131 may be electrically connected to the first electrode 125a. The second semiconductor light emitting device 132 may be electrically connected to the second electrode 125b. The third semiconductor light emitting device 133 may be electrically connected to the third electrode 125c (see FIG. 2). The common electrode 120 and the first, second, and third electrodes 125a, 125b, and 125c are electrically connected to the CMOS provided in the substrate 110 to drive semiconductor light emitting devices.
상기 제1, 제2 및 제3 반도체 발광소자들(131, 132, 133) 아래에는 절연층(140)이 배치될 수 있다. 상기 절연층은 SiO2로 형성될 수 있으나 이에 한정하지 않는다. 상기 절연층(140)은 반도체 발광소자 각각의 전기적 쇼트를 방지하며, 접착력을 가지고 있어서 적층형 구조를 안정화시킬 수 있다. 또한, 반도체 발광소자(130)에서 발생한 열을 흡수하여, 반도체 발광소자의 방열 기능을 수행할 수 있는 기술적 효과가 있다.An insulating layer 140 may be disposed under the first, second, and third semiconductor light emitting devices 131, 132, and 133. The insulating layer may be formed of SiO 2 , but is not limited thereto. The insulating layer 140 prevents electrical short circuits in each semiconductor light emitting device, and has adhesive strength to stabilize the stacked structure. In addition, there is a technical effect of absorbing heat generated from the semiconductor light-emitting device 130 and performing the heat dissipation function of the semiconductor light-emitting device 130.
한편, 적층형 반도체 발광소자에 대한 내부 연구에 따르면, 기존 적층형 반도체 발광소자는 R, G, B 컬러를 발광하는 발광소자를 수직으로 적층 후, 각 발광소자의 에피층에 비아를 형성하여 전기적으로 연결시켰다. Meanwhile, according to internal research on stacked semiconductor light emitting devices, existing stacked semiconductor light emitting devices vertically stack light emitting devices that emit R, G, and B colors, and then form vias in the epi layer of each light emitting device to electrically connect them. I ordered it.
하지만, VR이나 AR, MR 등과 같이 고ppi와 고해상도가 요구되는 디스플레이 장치에서는, 초소형 반도체 발광소자가 사용되며, 초소형 마이크로-LED의 경우, 에피층에 비아를 형성하기 어려울 정도로 작은 사이즈를 가지고 있다. 또한, 발광하는 컬러에 따라서 에피층의 물질이 다르기 때문에, 식각 조건이 달라 비아 홀을 형성하기에 어려움이 존재했다. 따라서, 적층형 반도체 발광소자에서 비아 홀을 통한 전기적 연결이 아닌 다른 전기적 연결 방법에 대한 연구가 필요한 상황이다.However, in display devices that require high ppi and high resolution, such as VR, AR, and MR, ultra-small semiconductor light emitting devices are used, and in the case of ultra-small micro-LEDs, the size is so small that it is difficult to form a via in the epi layer. In addition, because the material of the epi layer was different depending on the color of the light emitting, the etching conditions were different, making it difficult to form via holes. Therefore, there is a need to research electrical connection methods other than electrical connection through via holes in stacked semiconductor light emitting devices.
다시, 도 1을 참조하면, 제1, 제2, 제3 전극(125a, 125b, 125c)은 제1, 제2, 제3 투명 전도층(150a, 150b, 150c)을 통해 제1, 제2, 제3 반도체 발광소자(131, 132, 133)와 전기적으로 연결될 수 있다.Referring again to FIG. 1, the first, second, and third electrodes 125a, 125b, and 125c are connected to the first, second, and second electrodes through the first, second, and third transparent conductive layers 150a, 150b, and 150c. , may be electrically connected to the third semiconductor light emitting device (131, 132, 133).
실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자(130)는 공통전극(120)과 제1, 제2, 제3 전극(125a, 125b, 125c) 및 투명 전도층(150)을 통해서 반도체 발광소자(130)와 기판이 전기적으로 연결되기 때문에, 비아 홀을 형성하지 않아도 되어 에피층의 면적 손실이 없고, 에피층에 비아공정이 진행되지 않아 에피층의 신뢰성이 향상되는 복합적 기술적 효과가 있다. The stacked semiconductor light-emitting device 130 for display pixels according to an embodiment is a semiconductor light-emitting device ( 130) and the substrate are electrically connected, there is no need to form a via hole, so there is no loss of area of the epi layer, and there is a complex technical effect of improving the reliability of the epi layer because the via process is not performed on the epi layer.
실시예에서 투명 전도층(150)은 반도체 발광소자(130)와 중첩되는 영역과 반도체 발광소자(130)의 외측으로 연장되어 반도체 발광소자(130)와 중첩되지 않은 영역을 포함할 수 있다.In an embodiment, the transparent conductive layer 150 may include an area that overlaps the semiconductor light-emitting device 130 and an area that extends outside the semiconductor light-emitting device 130 and does not overlap the semiconductor light-emitting device 130.
이에 따라 실시예에 의하면, 적층형 구조로 형성하여 고해상도 및 고ppi를 구현함과 동시에 종래와 달리 하부 전극층을 반도체 발광소자(130)와 중첩되지 않도록 외측에 배치하여 발광 영역의 손실이 없이 전기적 연결이 가능하도록 하는 기술적 효과가 있다. Accordingly, according to the embodiment, high resolution and high ppi are realized by forming a stacked structure, and at the same time, unlike the prior art, the lower electrode layer is placed on the outside so as not to overlap the semiconductor light emitting device 130, thereby enabling electrical connection without loss of the light emitting area. There is a technical effect that makes it possible.
또한 실시예는 반도체 발광소자(130)와 중첩되는 영역은 투명 전도층(150)을 배치하여 적층형 반도체 발광소자에서 상측으로 출사되는 빛의 효율을 향상시킬 수 있다.Additionally, in the embodiment, the transparent conductive layer 150 is disposed in the area overlapping the semiconductor light emitting device 130 to improve the efficiency of light emitted upward from the stacked semiconductor light emitting device.
또한 실시예에서는 종래기술과 달리 반도체 발광소자(130)와 중첩되지 않는 영역에 배치되는 전극층에도 투명 전도층(150)을 배치하여 적층형 반도체 발광소자에서 상측으로 출사되는 빛의 역 반사를 방지하여 휘도를 현저히 항샹시킬 수 있는 특별한 기술적 효과가 있다.In addition, in the embodiment, unlike the prior art, the transparent conductive layer 150 is disposed on the electrode layer disposed in an area that does not overlap the semiconductor light emitting device 130 to prevent reverse reflection of light emitted upward from the stacked semiconductor light emitting device, thereby increasing the luminance. There is a special technical effect that can significantly improve.
한편, 상기 투명 전도층(150)의 하면에는 광 변환층(160)이 배치될 수 있다. 상기 광 변환층(160)은 제1 광 변환층(161), 제2 광 변환층(162), 및 제3 광 변환층(163)을 포함할 수 있으며, 각각 제1 투명 전도층(150a), 제2 투명 전도층(150b), 제3 투명 전도층(150c)를 통해 제1 반도체 발광 소자(131), 제2 반도체 발광 소자(132), 제3 반도체 발광 소자(133)와 전기적으로 연결될 수 있다.Meanwhile, a light conversion layer 160 may be disposed on the lower surface of the transparent conductive layer 150. The light conversion layer 160 may include a first light conversion layer 161, a second light conversion layer 162, and a third light conversion layer 163, and each includes a first transparent conductive layer 150a. , electrically connected to the first semiconductor light-emitting device 131, the second semiconductor light-emitting device 132, and the third semiconductor light-emitting device 133 through the second transparent conductive layer 150b and the third transparent conductive layer 150c. You can.
상기 광 변환층(160)은 나노 와이어의 구조로 형성될 수 있다. 상기 광 변환층(160)은 상기 투명 전도층(150)의 전기 저항성 보다 낮을 수 있다. 이에 대해서는 도 4a에서 자세히 설명하도록 한다.The light conversion layer 160 may be formed in a nanowire structure. The light conversion layer 160 may have lower electrical resistance than the transparent conductive layer 150. This will be explained in detail in Figure 4a.
한편, 실시예에서는 상기 광 변환층(160)의 Ag 나노 와이어의 함량에 따라서 광 특성이 달라지는 기술적 특징이 있다. 자세하게, Ag 나노 와이어의 함량이 적으면 광 투과율이 증가하고, 광 산란율이 증가할 수 있다. 또한, Ag 나노 와이어의 함량이 증가하면 광 투과율이 감소하며, 광 반사율이 증가할 수 있다. 따라서, 실시예는 상기 광 변환층(160)은 Ag 나노 와이어의 함량을 조절하여 특정한 광 특성을 얻을 수 있다.Meanwhile, the embodiment has a technical feature in that optical characteristics vary depending on the content of Ag nanowires in the light conversion layer 160. In detail, if the content of Ag nanowires is small, light transmittance can increase and light scattering rate can increase. Additionally, as the content of Ag nanowires increases, light transmittance may decrease and light reflectance may increase. Therefore, in the embodiment, the light conversion layer 160 can obtain specific optical characteristics by adjusting the content of Ag nanowires.
또한, 상기 제1, 제2, 제3 전극(125a, 125b, 125c)에서 반도체 발광 소자로 전원이 공급될 때, 상기 광 변환층(160)을 통해서 전원이 공급될 수 있다. 따라서, 실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치는 광 변환층을 통해서 전기적 신호 전달 속도가 향상되는 기술적 효과가 있다.Additionally, when power is supplied from the first, second, and third electrodes 125a, 125b, and 125c to the semiconductor light emitting device, the power may be supplied through the light conversion layer 160. Therefore, the stacked semiconductor light emitting device for display pixels according to the embodiment and the display device including the same have the technical effect of improving the speed of electrical signal transmission through the light conversion layer.
또한, 공통전극(120) 및 제1, 제2, 제3 전극(125a, 125b, 125c)은 반도체 발광소자(130)를 둘러싸도록 배치될 수 있다. 이에 따라, 기판(110) 상에 배치되는 반도체 발광소자의 발광면적을 최대한 확보할 수 있는 기술적 효과가 있다. 또한, 전극간에 전기적 간섭을 최소화할 수 있는 기술적 효과가 있다.Additionally, the common electrode 120 and the first, second, and third electrodes 125a, 125b, and 125c may be arranged to surround the semiconductor light emitting device 130. Accordingly, there is a technical effect of maximizing the light emitting area of the semiconductor light emitting device disposed on the substrate 110. Additionally, there is a technical effect of minimizing electrical interference between electrodes.
또한, 상기 투명 전도층(150)은 예를 들어 ITO(Indium tin oxide) 등으로 형성될 수 있다. 적층형 구조의 반도체 발광소자 하부에서 출광되는 빛이 통과되는 전도층이 투명하여 투과성을 갖기 때문에, 상부로 진행되는 광이 증가하는 기술적 효과가 있다.Additionally, the transparent conductive layer 150 may be formed of, for example, indium tin oxide (ITO). Since the conductive layer through which light emitted from the bottom of the semiconductor light emitting device of the stacked structure passes is transparent and has transparency, there is a technical effect of increasing the light traveling upward.
한편, 상기 제1 광 변환층(161)은 제2, 제3 광 변환층(162, 163) 보다 Ag 나노 와이어의 함량이 높을 수 있다. Ag 나노 와이어의 함량이 많은 제1 광 변환층(161)은 광 투과율이 적고, 광 반사율이 높을 수 있다. 또한, Ag 나노 와이어의 함량이 적은 제2, 제3 광 변환층(162, 163)은 광 투과율이 높고 광 산란율이 높을 수 있다.Meanwhile, the first light conversion layer 161 may have a higher Ag nanowire content than the second and third light conversion layers 162 and 163. The first light conversion layer 161, which has a large content of Ag nanowires, may have low light transmittance and high light reflectance. Additionally, the second and third light conversion layers 162 and 163, which contain a small amount of Ag nanowires, may have high light transmittance and high light scattering rate.
제2 투명 전도층(150b)와 제3 투명 전도층(150c)의 하면에 배치되는 제2 광 변환층(162)과 제3 광 변환층(163)은 광 산란층으로 이용될 수 있다. 이에 따라, 적층형 구조의 반도체 발광소자를 포함하는 디스플레이 장치에서 광 효율이 향상될 수 있는 기술적 효과가 있다.The second light conversion layer 162 and the third light conversion layer 163 disposed on the lower surfaces of the second transparent conductive layer 150b and the third transparent conductive layer 150c may be used as a light scattering layer. Accordingly, there is a technical effect that light efficiency can be improved in a display device including a semiconductor light emitting device with a stacked structure.
자세하게, 제1 반도체 발광 소자(131)에서 광이 추출될 때, 제2 광 변환층(162)을 지나서 상부로 출사될 수 있다. 이때 출사되는 광은 상기 제2 광 변환층(162)에 의해 산란되며 광 효율이 향상될 수 있다. In detail, when light is extracted from the first semiconductor light emitting device 131, it may pass through the second light conversion layer 162 and be emitted upward. At this time, the emitted light is scattered by the second light conversion layer 162, and light efficiency can be improved.
또한, 제1 및 제2 반도체 발광 소자(131, 132)에서 광이 추출될 때, 제3 광 변환층(163)을 지나서 상부로 향할 수 있다. 상기 제3 광 변환층(163)에 의해 광이 산란되며 광 효율이 향상될 수 있다. 따라서, 실시예는 제2 및 제3 광 변환층(162, 163)이 광 산란층으로 이용됨에 따라, 광 효율이 향상되는 기술적 효과가 있다.Additionally, when light is extracted from the first and second semiconductor light emitting devices 131 and 132, it may pass through the third light conversion layer 163 and head upward. Light is scattered by the third light conversion layer 163, and light efficiency can be improved. Accordingly, the embodiment has the technical effect of improving light efficiency as the second and third light conversion layers 162 and 163 are used as light scattering layers.
또한, 제1 투명 전도층(161)의 하면에 배치되는 제1 광 변환층(161)은 광 반사층으로 이용될 수 있다. 자세하게, 제1, 제2, 제3 반도체 발광 소자(131, 132, 133)에서 광이 추출될 때, 하부로 향하는 빛이 제1 광 변환층(161)에 의해서 상부로 반사될 수 있다. 따라서, 실시예는 제1 광 변환층(161)이 광 반사층으로 이용됨에 따라, 광 추출 효율이 향상되는 기술적 효과가 있다.Additionally, the first light conversion layer 161 disposed on the lower surface of the first transparent conductive layer 161 may be used as a light reflection layer. In detail, when light is extracted from the first, second, and third semiconductor light emitting devices 131, 132, and 133, the light directed downward may be reflected upward by the first light conversion layer 161. Accordingly, the embodiment has the technical effect of improving light extraction efficiency as the first light conversion layer 161 is used as a light reflection layer.
한편, 기판 상에 배치된 반도체 발광소자(130), 공통전극(120) 및 제1, 제2, 제3 전극(125a, 125b, 125c)은 패시베이션층(140)에 의하여 둘러싸일 수 있다. 패시베이션층(140)은 반도체 발광소자(130), 공통전극(120) 및 제1, 제2, 제3 전극(125a, 125b, 125c)을 외부의 충격으로부터 보호할 수 있으며, 전기적 쇼트가 발생하지 않도록 할 수 있다. 패시베이션층(140)은 SiO2로 형성될 수 있으나 이에 한정하지 않는다. Meanwhile, the semiconductor light emitting device 130, the common electrode 120, and the first, second, and third electrodes 125a, 125b, and 125c disposed on the substrate may be surrounded by the passivation layer 140. The passivation layer 140 can protect the semiconductor light emitting device 130, the common electrode 120, and the first, second, and third electrodes 125a, 125b, and 125c from external shock and prevents electrical shorts from occurring. You can avoid it. The passivation layer 140 may be formed of SiO 2 , but is not limited thereto.
도 2는 실시예에 따른 적층형 반도체 발광소자의 개념도이다.Figure 2 is a conceptual diagram of a stacked semiconductor light emitting device according to an embodiment.
도 2를 참조하면, 제1 내지 제3 반도체 발광소자들(131, 132, 133)을 포함하는 적층형 반도체 발광소자(130)가 기판(110) 상에 배치될 수 있다. 또한, 상기 기판(110) 상에 개별전극(125)과 공통전극(120)이 배치될 수 있다. 상기 개별전극(125)은 제1 전극(125a), 제2 전극(125b), 및 제3 전극(125c)을 포함할 수 있다. 상기 반도체 발광소자(130)는 투명 전도층(150)을 통해 상기 개별전극(125) 및 상기 공통전극(120)과 연결될 수 있다.Referring to FIG. 2 , a stacked semiconductor light emitting device 130 including first to third semiconductor light emitting devices 131 , 132 , and 133 may be disposed on the substrate 110 . Additionally, an individual electrode 125 and a common electrode 120 may be disposed on the substrate 110. The individual electrode 125 may include a first electrode 125a, a second electrode 125b, and a third electrode 125c. The semiconductor light emitting device 130 may be connected to the individual electrode 125 and the common electrode 120 through a transparent conductive layer 150.
상기 투명 전도층(150)은 제1 투명 전도층(150a), 제2 투명 전도층(150b), 및 제3 투명 전도층(150c)을 포함할 수 있다.The transparent conductive layer 150 may include a first transparent conductive layer 150a, a second transparent conductive layer 150b, and a third transparent conductive layer 150c.
제1 반도체 발광소자(131)는 제1 투명 전도층(150a)을 통해서 제1 전극(125a)과 전기적으로 연결될 수 있다. 제2 반도체 발광소자(132)는 제2 투명 전도층(150b)을 통해서 제2 전극(125b)과 전기적으로 연결될 수 있다. 제3 반도체 발광소자(133)는 제3 투명 전도층(150c)을 통해서 제3 전극(125c)과 전기적으로 연결될 수 있다. The first semiconductor light emitting device 131 may be electrically connected to the first electrode 125a through the first transparent conductive layer 150a. The second semiconductor light emitting device 132 may be electrically connected to the second electrode 125b through the second transparent conductive layer 150b. The third semiconductor light emitting device 133 may be electrically connected to the third electrode 125c through the third transparent conductive layer 150c.
또한, 상기 투명 전도층(150)의 하면에는 광 변환층(160)이 배치될 수 있다. 제1 투명 전도층(150a)의 하면에는 제1 광 변환층(161)이 배치되며, 제2 투명 전도층(150b)의 하면에는 제2 광 변환층(162)이 배치되고, 제3 투명 전도층(150c)의 하면에는 제3 광 변환층(163)이 배치될 수 있다.Additionally, a light conversion layer 160 may be disposed on the lower surface of the transparent conductive layer 150. A first light conversion layer 161 is disposed on the lower surface of the first transparent conductive layer 150a, a second light conversion layer 162 is disposed on the lower surface of the second transparent conductive layer 150b, and a third transparent conductive layer is disposed on the lower surface of the first transparent conductive layer 150a. A third light conversion layer 163 may be disposed on the lower surface of the layer 150c.
상기 광 변환층(160)은 상기 투명 전도층(150) 보다 낮은 저항을 가지도록 형성될 수 있다. 예를 들어, 상기 광 변환층(160)은 나노 와이어로 형성될 수 있으며, Ag로 형성될 수 있으나, 이에 한정하지 않는다.The light conversion layer 160 may be formed to have lower resistance than the transparent conductive layer 150. For example, the light conversion layer 160 may be formed of nanowires or Ag, but is not limited thereto.
한편, 제1 반도체 발광소자(131)는 레드 컬러를 발광하고, 제2 반도체 발광소자(132)는 그린 컬러를 발광하고, 제3 반도체 발광소자(133)는 블루 컬러를 발광하는 반도체 발광소자일 수 있으나 이에 한정되는 것은 아니다.Meanwhile, the first semiconductor light-emitting device 131 emits a red color, the second semiconductor light-emitting device 132 emits a green color, and the third semiconductor light-emitting device 133 is a semiconductor light-emitting device that emits a blue color. It may be possible, but it is not limited to this.
이때, 제1, 제2, 제3 전극(125a, 125b, 125c)은 각각 높이가 다르게 형성될 수 있다. 투명 전도층(150)은 투광성 재료로 형성되어 아래에 위치한 반도체 발광소자에서 발생한 빛이 상부로 향할 때, 빛의 손실을 최소화할 수 있는 있으며, 제1, 제2, 제3전극(125a, 125b, 125c)과 제1, 제2, 제3 반도체 발광소자들(131, 132, 133)을 전기적으로 연결시킬 수 있는 기술적 효과가 있다.At this time, the first, second, and third electrodes 125a, 125b, and 125c may each be formed at different heights. The transparent conductive layer 150 is formed of a light-transmitting material to minimize light loss when light generated from the semiconductor light emitting device located below is directed upward, and is connected to the first, second, and third electrodes 125a and 125b. , 125c) and the first, second, and third semiconductor light emitting devices 131, 132, and 133 have the technical effect of being able to electrically connect them.
그리고, 실시예에서 제4 전극(121)은 반도체 발광소자(130) 상면에 그 상면의 형태에 대응되도록 상면 일부에 형성될 수 있다. 예를 들어, 반도체 발광소자(130)가 원통형의 형상을 가질 경우, 제4 전극(121)은 고리형태의 형상을 가질 수 있다.And, in the embodiment, the fourth electrode 121 may be formed on a portion of the upper surface of the semiconductor light emitting device 130 to correspond to the shape of the upper surface. For example, when the semiconductor light emitting device 130 has a cylindrical shape, the fourth electrode 121 may have a ring shape.
상기 제4 전극(121)은 제1, 제2, 제3 반도체 발광소자들(131, 132, 133) 각각에 전기적으로 연결되는 제4-1 내지 제4-3 전극들(121a, 121b, 121c)을 포함할 수 있다.The fourth electrode 121 includes 4-1 to 4-3 electrodes 121a, 121b, and 121c that are electrically connected to the first, second, and third semiconductor light emitting devices 131, 132, and 133, respectively. ) may include.
예를 들어, 제1 반도체 발광소자(131)는 제4-1전극(121a)을 통해서 공통전극(120)과 전기적으로 연결될 수 있으며, 제2 반도체 발광소자(132)는 제4-2전극(121b)을 통해서 공통전극(120)과 전기적으로 연결될 수 있으며, 제3 반도체 발광소자(133)는 제4-3전극(121c)을 통해서 공통전극(120)과 전기적으로 연결될 수 있다. For example, the first semiconductor light emitting device 131 may be electrically connected to the common electrode 120 through the 4-1 electrode 121a, and the second semiconductor light emitting device 132 may be electrically connected to the 4-2 electrode ( It can be electrically connected to the common electrode 120 through 121b), and the third semiconductor light emitting device 133 can be electrically connected to the common electrode 120 through the 4-3 electrode 121c.
다음으로 도 3은 실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자에서 반도체 발광소자를 상세히 나타낸 도면이다. 이하 설명은 제1, 제2 및 제3 반도체 발광소자(131, 132, 133)에 적용될 수 있다.Next, Figure 3 is a diagram showing the semiconductor light emitting device in detail in the stacked semiconductor light emitting device for display pixels according to an embodiment. The following description can be applied to the first, second, and third semiconductor light emitting devices 131, 132, and 133.
도 3을 참조하면, 반도체 발광소자(130)는 제1 도전형 반도체층(136), 제2 도전형 반도체층(138) 및 그 사이에 배치되는 활성층(137)을 포함할 수 있다. 제1 도전형 반도체층(136)은 n형 반도체층일 수 있고, 제2 도전형 반도체층(138)은 p형 반도체층일 수 있으나 이에 한정되는 것은 아니다.Referring to FIG. 3, the semiconductor light emitting device 130 may include a first conductivity type semiconductor layer 136, a second conductivity type semiconductor layer 138, and an active layer 137 disposed between them. The first conductive semiconductor layer 136 may be an n-type semiconductor layer, and the second conductive semiconductor layer 138 may be a p-type semiconductor layer, but are not limited thereto.
활성층(137)은 광을 생성하는 영역으로서, 화합물 반도체의 물질 특성에 따라 특정 파장 대역을 갖는 광을 생성할 수 있다. 즉, 활성층(137)에 포함된 화합물 반도체의 에너지 밴드갭에 의해 파장 대역이 결정될 수 있다. 따라서, 활성층(157)에 포함된 화합물 반도체의 에너지 밴드갭에 따라 실시예의 반도체 발광소자(130)는 UV 광, 청색 광, 녹색 광, 적색 광을 생성할 수 있다.The active layer 137 is a region that generates light, and can generate light with a specific wavelength band depending on the material properties of the compound semiconductor. That is, the wavelength band can be determined by the energy band gap of the compound semiconductor included in the active layer 137. Therefore, depending on the energy band gap of the compound semiconductor included in the active layer 157, the semiconductor light emitting device 130 of the embodiment can generate UV light, blue light, green light, and red light.
상기 제1 도전형 반도체층(156), 활성층(157) 및 제2 도전형 반도체층(158)은 화합물 반도체 물질로 이루어질 수 있다. 예컨대, 화합물 반도체 물질은 3족-5족 화합물 반도체 물질, 2족-6족 화합물 물질 등일 수 있다. 예컨대, 화합물 반도체 물질은 GaN, InGaN, AlN, AlInN, AlGaN, AlInGaN, InP, GaAs, GaP, GaInP 등을 포함할 수 있다. The first conductive semiconductor layer 156, the active layer 157, and the second conductive semiconductor layer 158 may be made of a compound semiconductor material. For example, the compound semiconductor material may be a group 3-5 compound semiconductor material, a group 2-6 compound semiconductor material, etc. For example, the compound semiconductor material may include GaN, InGaN, AlN, AlInN, AlGaN, AlInGaN, InP, GaAs, GaP, GaInP, etc.
또한, 제1 전극층(134)은 제1 도전형 반도체층(136) 아래에 배치되며, 제2 전극층(139)은 제2 도전형 반도체층(138) 상에 배치될 수 있다. 상기 제1 전극층(134)은 투명 전도층(150) 및 광 변환층(160)을 통해서 제1, 제2, 제3 전극 중 하나와 전기적으로 연결되며, 제2 전극층(139)는 공통전극(120)과 전기적으로 연결될 수 있다.Additionally, the first electrode layer 134 may be disposed under the first conductive semiconductor layer 136, and the second electrode layer 139 may be disposed on the second conductive semiconductor layer 138. The first electrode layer 134 is electrically connected to one of the first, second, and third electrodes through the transparent conductive layer 150 and the light conversion layer 160, and the second electrode layer 139 is a common electrode ( 120) and can be electrically connected.
도 4a 내지 4g는 실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자의 제조 공정도이다.4A to 4G are manufacturing process diagrams of a stacked semiconductor light emitting device for display pixels according to an embodiment.
도 4a를 참조하면, 성장기판(115) 상에 에피층(135)이 성장할 수 있다. 상기 에피층(135)은 화합물 반도체 물질로 이루어질 수 있다. 예컨대, 화합물 반도체 물질은 3족-5족 화합물 반도체 물질, 2족-6족 화합물 물질 등일 수 있다. 예컨대, 화합물 반도체 물질은 GaN, InGaN, AlN, AlInN, AlGaN, AlInGaN, InP, GaAs, GaP, GaInP 등을 포함할 수 있다.Referring to FIG. 4A, the epitaxial layer 135 may be grown on the growth substrate 115. The epitaxial layer 135 may be made of a compound semiconductor material. For example, the compound semiconductor material may be a group 3-5 compound semiconductor material, a group 2-6 compound semiconductor material, etc. For example, the compound semiconductor material may include GaN, InGaN, AlN, AlInN, AlGaN, AlInGaN, InP, GaAs, GaP, GaInP, etc.
상기 에피층 상에 투명 전도층(150)이 형성될 수 있다. 상기 투명 전도층(150)은 광 투성 물질로 형성되며, 전기적 전도성을 가질 수 있다. 상기 투명 전도층(150)은 예를 들어 ITO(Indum Tin Oxcide)로 형성될 수 있으나, 이에 한정하지 않는다.A transparent conductive layer 150 may be formed on the epi layer. The transparent conductive layer 150 is made of a light-transmissive material and may have electrical conductivity. The transparent conductive layer 150 may be formed of, for example, ITO (Indum Tin Oxide), but is not limited thereto.
이어서, 광 변환층(160)은 투광성 전도층(150) 상에 형성될 수 있다. 자세하게, 투광성 전도층(150) 상에 Ag를 포함한 분산액을 스핀 코팅으로 도포 후, 소프트 베이크를 진행할 수 있다. 분산액은 나노 스케일의 Ag와이어를 포함할 수 있다. 그리고, 상기 투광성 전도층(150) 상에 약 300℃에서 Photonic welding을 진행하면, 상기 투광성 전도층 상에 부착되며, 나노 사이즈의 와이어 형태로 형성될 수 있다. 형성된 광 변환층은 투과성 전도층에 비하여 전류 확산 특성이 우수할 수 있다.Subsequently, the light conversion layer 160 may be formed on the light-transmitting conductive layer 150. In detail, a dispersion containing Ag can be applied on the light-transmitting conductive layer 150 by spin coating, and then soft baking can be performed. The dispersion may contain nanoscale Ag wires. Then, when photonic welding is performed on the light-transmitting conductive layer 150 at about 300°C, it is attached to the light-transmitting conductive layer and can be formed in the form of a nano-sized wire. The formed light conversion layer may have superior current diffusion characteristics compared to the transparent conductive layer.
한편, 상기 투광성 전도층(150) 상에 형성되는 광 변환층(160)은 Ag 나노 와이어의 함량을 다르게 하여 형성할 수 있다. 상기 광 변환층(160)은 Ag 나노 와이어의 함량에 따라서 광 특성이 달라질 수 있다. 자세하게, Ag 나노 와이어의 함량이 적으면 광 투과율이 증가하고, 광 산란율이 증가할 수 있다. 또한, Ag 나노 와이어의 함량이 증가하면 광 투과율이 감소하며, 광 반사율이 증가할 수 있다. 따라서, 상기 광 변환층(160)은 Ag 나노 와이어의 함량을 조절하여 특정한 광 특성을 얻을 수 있다.Meanwhile, the light conversion layer 160 formed on the light-transmitting conductive layer 150 can be formed by varying the content of Ag nanowires. The light conversion layer 160 may have different optical characteristics depending on the content of Ag nanowires. In detail, if the content of Ag nanowires is small, light transmittance can increase and light scattering rate can increase. Additionally, as the content of Ag nanowires increases, light transmittance may decrease and light reflectance may increase. Therefore, the light conversion layer 160 can obtain specific optical characteristics by adjusting the content of Ag nanowires.
이에 따라, 실시예는 Ag를 포함한 나노와이어의 형태로 광 변환층을 형성함에 따라, 반도체 발광 소자로의 전기적 신호 전달속도가 향상될 수 있는 기술적 효과가 있다. 또한, 반도체 발광 소자에서 발생하는 빛을 상부로 향하게 하여, 광 효율이 향상할 수 있는 복합적인 기술적 효과가 있다.Accordingly, the embodiment has the technical effect of improving the speed of electrical signal transmission to the semiconductor light-emitting device by forming the light conversion layer in the form of nanowires containing Ag. In addition, there is a complex technical effect in which light efficiency can be improved by directing the light generated from the semiconductor light emitting device upward.
이어서 도 4b를 참조하면, 광 변환층(160) 아래에 1-1 절연층(140a)이 배치될 수 있다. 그리고, CMOS가 형성된 기판(110) 상에 1-2 절연층(140b)을 형성하여 준비할 수 있다. 상기 광 변환층(160) 아래에 배치된 1-1 절연층(140a)과 상기 기판(110) 상에 배치된 1-2 절연층(140b)이 마주보도록 본딩할 수 있다. 상기 제1-1, 제1-2 절연층들(140a, 140b)은 SiO2일 수 있으나 이에 한정되는 것은 아니다. SiO2 SiO2의 본딩에는 본래 약 700℃의 고온공정이 필요하지만, 제1-1, 제1-2 절연층(140a1, 140b)의 표면에 플라즈마 처리를 할 수 있고, 이에 따라 약 400℃의 온도에서 본딩공정을 진행할 수 있게 되어 에피층(135)에 고온에 의한 손상을 입히지 않을 수 있다.Next, referring to FIG. 4B, the 1-1 insulating layer 140a may be disposed under the light conversion layer 160. Then, the 1-2 insulating layer 140b can be formed and prepared on the substrate 110 on which the CMOS is formed. The 1-1 insulating layer 140a disposed below the light conversion layer 160 may be bonded so that the 1-2 insulating layer 140b disposed on the substrate 110 faces each other. The 1-1 and 1-2 insulating layers 140a and 140b may be SiO 2 , but are not limited thereto. SiO 2 and Bonding of SiO 2 originally requires a high temperature process of about 700°C, but the surfaces of the 1-1 and 1-2 insulating layers 140a1 and 140b can be plasma treated, and thus, at a temperature of about 400°C. The bonding process can be performed so that the epitaxial layer 135 is not damaged by high temperature.
도 4c를 참조하면, 이어서 성장기판(115)을 떼어내는 공정을 진행한다. 블루 또는 그린 컬러를 발광하는 반도체 발광소자일 경우, 에피층(135)은 GaN 등으로 형성될 수 있으며, 레이저 리프트 오프법(LLO) 등을 통해서 성장기판을 떼어낼 수 있으나 이에 한정하지 않는다. 레드 컬러를 발광하는 반도체 발광소자일 경우, 에피층(135)은 GaAs 등으로 형성될 수 있으며, 케미칼 리프트 오프법(CLO) 등을 통해서 성장기판을 떼어낼 수 있으나 이에 한정하지 않는다.Referring to FIG. 4C, a process of removing the growth substrate 115 is then performed. In the case of a semiconductor light emitting device that emits blue or green color, the epi layer 135 may be formed of GaN, etc., and the growth substrate may be removed through a laser lift-off (LLO) method, but is not limited to this. In the case of a semiconductor light emitting device that emits red color, the epitaxial layer 135 may be formed of GaAs, etc., and the growth substrate may be removed through a chemical lift-off (CLO) method, but is not limited to this.
도 4d를 참조하면, 에피층(135) 상에 하드마스크(미도시)를 증착하고 포토공정과 에칭공정을 진행할 수 있다. 투명 전도층(150)은 타원형으로 형성될 수 있다.Referring to FIG. 4D, a hard mask (not shown) can be deposited on the epi layer 135 and a photo process and an etching process can be performed. The transparent conductive layer 150 may be formed in an oval shape.
도 4e를 참조하면, 에피층(135) 상에 하드마스크(미도시)를 증착하고 포토공정과 에칭공정을 진행할 수 있다. 상기 에피층(135)은 타원형으로 식각될 수 있다. 상기 에피층은 투명 전도층(150)보다 작은 면적을 갖도록 형성될 수 있다. 이어서, 노출된 투명 전도층(150)과 에피층(135)을 절연층으로 덮는다. 그리고, CMP공정을 통하여 평탄화할 수 있다. Referring to FIG. 4E, a hard mask (not shown) can be deposited on the epi layer 135 and a photo process and an etching process can be performed. The epitaxial layer 135 may be etched into an oval shape. The epi layer may be formed to have a smaller area than the transparent conductive layer 150. Next, the exposed transparent conductive layer 150 and epi layer 135 are covered with an insulating layer. And, it can be flattened through the CMP process.
도 4f를 참조하면, 절연층(140)의 표면에서 투명 전도층(150)을 지나 기판(110)의 표면까지 제1 비아 홀을 형성하고, 상기 절연층의 표면에서, 반도체 발광 소자(135)와 상기 투명 전도층(150)에 중첩하지 않도록 기판의 상면까지 제2 비아 홀을 형성할 수 있다.Referring to FIG. 4F, a first via hole is formed from the surface of the insulating layer 140 through the transparent conductive layer 150 to the surface of the substrate 110, and a semiconductor light emitting device 135 is formed on the surface of the insulating layer. A second via hole may be formed up to the top surface of the substrate so as not to overlap the transparent conductive layer 150.
상기 제1 비아 홀에는 개별전극(125)이 형성될 수 있다. 상기 개별전극(125)은 상기 투명 전도층(150)을 통해 반도체 발광 소자(135)와 전기적으로 연결될 수 있다. 또한, 상기 개별전극(125)은 상기 투명 전도층(150)의 하면에 배치된 광 변환층(160)을 통해 반도체 발광 소자(135)와 전기적으로 연결될 수 있다.An individual electrode 125 may be formed in the first via hole. The individual electrode 125 may be electrically connected to the semiconductor light emitting device 135 through the transparent conductive layer 150. Additionally, the individual electrode 125 may be electrically connected to the semiconductor light emitting device 135 through the light conversion layer 160 disposed on the lower surface of the transparent conductive layer 150.
상기 광 변환층(160)은 Ag의 나노 와이어의 형태로 형성될 수 있으나, 이에 한정하지 않는다. 이에 따라, 상기 광 변환층(160)은 상기 투명 전도층(150)보다 낮은 저항을 가질 수 있기 때문에, 상기 개별전극(125)에서 상기 반도체 발광 소자(135)로의 전기적 신호 전달의 속도가 향상될 수 있는 기술적 효과가 있다.The light conversion layer 160 may be formed in the form of an Ag nanowire, but is not limited to this. Accordingly, since the light conversion layer 160 may have a lower resistance than the transparent conductive layer 150, the speed of electrical signal transmission from the individual electrode 125 to the semiconductor light emitting device 135 will be improved. There are technical effects that can be achieved.
이어서, 상기 제2 비아 홀에는 공통 전극(120)이 형성될 수 있다. 상기 공통 전극(120)은 상기 반도체 발광 소자(135)와 제4 전극(121)을 통해서 전기적으로 연결될 수 있다. 상기 제4 전극은 상기 반도체 발광 소자(135)의 상면의 가장자리, 예컨대 고리형태의 형상으로 형성될 수 있으나, 이에 한정하지 않는다.Subsequently, a common electrode 120 may be formed in the second via hole. The common electrode 120 may be electrically connected to the semiconductor light emitting device 135 and the fourth electrode 121. The fourth electrode may be formed at the edge of the upper surface of the semiconductor light emitting device 135, for example, in a ring shape, but is not limited to this.
상기의 제조공정을 반복하여 도 4g의 적층형 구조의 반도체 발광소자를 제조할 수 있다.The above manufacturing process can be repeated to manufacture a semiconductor light emitting device with a stacked structure as shown in FIG. 4g.
도 4g를 참조하면, 제1 반도체 발광 소자(131) 상에 제2 반도체 발광 소자(132) 가 배치되며, 상기 제2 반도체 발광 소자(132) 상에 제3 반도체 발광 소자(133)가 배치될 수 있다.Referring to FIG. 4g, a second semiconductor light-emitting device 132 is disposed on the first semiconductor light-emitting device 131, and a third semiconductor light-emitting device 133 is disposed on the second semiconductor light-emitting device 132. You can.
상기 제1 반도체 발광 소자(131)는 제1 투명 전도층(150a)를 통해 제1 전극(125a)과 연결 될 수 있다. 또한, 상기 제1 투명 전도층(150a)의 하면에는 제1 광 변환층(161)이 배치될 수 있다.The first semiconductor light emitting device 131 may be connected to the first electrode 125a through the first transparent conductive layer 150a. Additionally, a first light conversion layer 161 may be disposed on the lower surface of the first transparent conductive layer 150a.
상기 제2 반도체 발광 소자(132)는 제2 투명 전도층(150b)를 통해 제2 전극(125b)과 연결 될 수 있다. 또한, 상기 제2 투명 전도층(150b)의 하면에는 제2 광 변환층(162)이 배치될 수 있다.The second semiconductor light emitting device 132 may be connected to the second electrode 125b through the second transparent conductive layer 150b. Additionally, a second light conversion layer 162 may be disposed on the lower surface of the second transparent conductive layer 150b.
상기 제3 반도체 발광 소자(133)는 제3 투명 전도층(150c)를 통해 제3 전극(125c)과 연결 될 수 있다. 또한, 상기 제3 투명 전도층(150c)의 하면에는 제3 광 변환층(163)이 배치될 수 있다.The third semiconductor light emitting device 133 may be connected to the third electrode 125c through the third transparent conductive layer 150c. Additionally, a third light conversion layer 163 may be disposed on the lower surface of the third transparent conductive layer 150c.
이 때, 상기 제2 광 변환층(162)과 제3 광 변환층(163)은 광 산란층으로 이용될 수 있다. 이에 따라, 상기 제2 광 변환층(162)은 제1 반도체 발광 소자(131)에서 출사된 광을 산란시키며, 상부로 빠져나가는 광량을 증가시킬 수 있다. 또한, 상기 제3 광 변환층(163)은 제1 및 제2 반도체 발광 소자(131, 132)에서 출사된 광을 산란시키며, 상부로 빠져나가는 광량을 증가시킬 수 있다.At this time, the second light conversion layer 162 and the third light conversion layer 163 may be used as a light scattering layer. Accordingly, the second light conversion layer 162 can scatter the light emitted from the first semiconductor light emitting device 131 and increase the amount of light exiting the top. Additionally, the third light conversion layer 163 may scatter light emitted from the first and second semiconductor light emitting devices 131 and 132 and increase the amount of light exiting the top.
따라서, 실시예는 투명 전도층 하면에 배치된 광 변환층이 광 산란층으로 이용됨에 따라 적층형 구조의 반도체 발광 소자에서 광 효율을 증가시킬 수 있는 기술적 효과가 있다.Therefore, the embodiment has the technical effect of increasing light efficiency in a semiconductor light emitting device with a stacked structure as the light conversion layer disposed on the bottom of the transparent conductive layer is used as a light scattering layer.
또한, 상기 제1 광 변환층(161)은 광 반사층으로 이용될 수 있다. 상기 제1 광 변환층(161)은 제1 반도체 발광 소자(131)에서 하부로 출사되는 광을 반사시켜서 상부로 빠져나가는 광량을 증가시킬 수 있다. 따라서, 실시예는 투명 전도층 하면에 배치된 광 변환층이 광 반사층으로 이용됨에 따라 적층형 구조의 반도체 발광 소자에서 광 효율을 증가시킬 수 있는 기술적 효과가 있다. 특히, 상기 제1 반도체 발광 소자(131)가 Red 컬러를 발광할 경우, 발광효율이 낮지만, 광 반사층을 통해서 Blue 또는 Green 컬러를 발광하는 반도체 발광소자에 대응되도록 광 효율이 향상될 수 있다.Additionally, the first light conversion layer 161 may be used as a light reflection layer. The first light conversion layer 161 may reflect light emitted downward from the first semiconductor light emitting device 131 to increase the amount of light exiting upward. Therefore, the embodiment has the technical effect of increasing light efficiency in a semiconductor light emitting device with a stacked structure as the light conversion layer disposed on the lower surface of the transparent conductive layer is used as a light reflection layer. In particular, when the first semiconductor light emitting device 131 emits red color, luminous efficiency is low, but luminous efficiency can be improved to correspond to a semiconductor light emitting device that emits blue or green color through the light reflection layer.
실시예에 따른 디스플레이 화소용 적층형 반도체 발광소자 및 이를 포함하는 디스플레이 장치에 의하면, 적층형 구조로 형성하여 고해상도 및 고ppi를 구현할 수 있는 기술적 효과가 있다.According to the stacked semiconductor light emitting device for display pixels according to the embodiment and the display device including the same, there is a technical effect of realizing high resolution and high ppi by forming it in a stacked structure.
또한, 실시예는 반도체 발광 소자의 발광 영역의 손실이 없이 전기적 연결이 가능하도록 하는 기술적 효과가 있다. Additionally, the embodiment has the technical effect of enabling electrical connection without loss of the light-emitting area of the semiconductor light-emitting device.
예를 들어, 반도체 발광 소자는 하면에 배치된 투명 전도층을 통해 전극과 연결되어 전기적 신호를 공급받을 수 있으며, 반도체 발광 소자에 전기적 연결을 위한 비아를 형성하지 않아도 되어 발광 영역의 손실이 없어 발광 효율을 높일 수 있는 기술적 효과가 있다.For example, a semiconductor light emitting device can receive an electrical signal by being connected to an electrode through a transparent conductive layer disposed on the bottom, and there is no need to form a via for electrical connection in the semiconductor light emitting device, so there is no loss of the light emitting area and the light is emitted. There is a technical effect that can increase efficiency.
또한 반도체 발광소자(130)와 중첩되는 영역은 투명 전도층(150)을 배치하여 적층형 반도체 발광소자에서 상측으로 출사되는 빛의 효율을 향상시킬 수 있다.In addition, the transparent conductive layer 150 is disposed in the area overlapping the semiconductor light emitting device 130 to improve the efficiency of light emitted upward from the stacked semiconductor light emitting device.
또한, 실시예는 광 산란을 통해서 광 효율이 향상되는 기술적 효과가 있다.Additionally, the embodiment has the technical effect of improving light efficiency through light scattering.
예를 들어, 투명 전도층 아래에 광 변환층을 배치하여, 광 효율을 향상시킬 수 있다.For example, light efficiency can be improved by placing a light conversion layer under the transparent conductive layer.
또한, 실시예는 전기적 신호 전달 속도가 향상될 수 있는 기술적 효과가 있다.Additionally, the embodiment has the technical effect of improving the speed of electrical signal transmission.
예를 들어, 투명 전도층 아래에 배치되는 광 변환층은 투명 전도층 보다 높은 전기 전도성을 가지므로, 전극으로부터 반도체 발광소자까지의 신호 전달 속도가 향상될 수 있다.For example, the light conversion layer disposed below the transparent conductive layer has higher electrical conductivity than the transparent conductive layer, so the signal transmission speed from the electrode to the semiconductor light emitting device can be improved.
또한, 실시예는 광 반사를 통해서 광 효율이 향상되는 기술적 효과가 있다.Additionally, the embodiment has the technical effect of improving light efficiency through light reflection.
예를 들어, 적층 구조에서 가장 밑에 배치되는 반도체 발광소자와 연결되는 투명 전도층 아래에는 광 반사층이 배치되어, 적층 구조에서 하부로 출사되는 빛을 상부로 반사시켜 광 효율을 향상시킬 수 있다.For example, a light reflection layer is disposed below the transparent conductive layer connected to the bottommost semiconductor light emitting device in the stacked structure, so that light emitted from the bottom of the stacked structure is reflected upward to improve light efficiency.
또한, 실시예는 반도체 에피층에 비아 홀을 형성하지 않아도 되어 공정의 난이도를 낮출 수 있는 기술적 효과가 있다.In addition, the embodiment has the technical effect of lowering the difficulty of the process by eliminating the need to form via holes in the semiconductor epitaxial layer.
또한, 실시예는 반도체 발광 소자와 연결되는 전극이 발광 영역 외측에 배치되어 광 출력이 향상되며, 기판 상에 반도체 발광 소자를 둘러싸도록 배치되어 발광 영역을 충분히 확보하여 휘도를 향상시킬 수 있는 기술적 효과가 있다.In addition, the embodiment provides a technical effect in which the electrode connected to the semiconductor light emitting device is disposed outside the light emitting area to improve light output, and the electrode is disposed to surround the semiconductor light emitting device on the substrate to sufficiently secure the light emitting area to improve luminance. There is.
또한 실시예에서는 반도체 발광소자(130)와 중첩되지 않는 영역에 배치되는 전극층도 투명 전도층(150)을 배치하여 적층형 반도체 발광소자에서 상측으로 출사되는 빛의 역 반사를 방지하여 휘도를 현저히 항샹시킬 수 있는 특별한 기술적 효과가 있다.In addition, in the embodiment, the electrode layer disposed in the area that does not overlap with the semiconductor light emitting device 130 also has a transparent conductive layer 150 to prevent reverse reflection of light emitted upward from the stacked semiconductor light emitting device, thereby significantly improving luminance. There are special technical effects that can be achieved.
상기의 상세한 설명은 모든 면에서 제한적으로 해석되어서는 아니되고 예시적인 것으로 고려되어야 한다. 실시예의 범위는 첨부된 청구항의 합리적 해석에 의해 결정되어야 하고, 실시예의 등가적 범위 내에서의 모든 변경은 실시예의 범위에 포함된다.The above detailed description should not be construed as restrictive in any respect and should be considered illustrative. The scope of the embodiments should be determined by reasonable interpretation of the appended claims, and all changes within the equivalent scope of the embodiments are included in the scope of the embodiments.
[부호의 설명][Explanation of symbols]
110: 기판110: substrate
115: 성장기판115: growth substrate
120: 공통전극120: common electrode
121: 제4 전극121: fourth electrode
121a: 제4-1 전극121a: 4-1 electrode
121b: 제4-2 전극121b: 4-2 electrode
121c: 제4-3 전극121c: 4-3 electrode
125a: 제1 전극125a: first electrode
125b: 제2 전극125b: second electrode
125c: 제3 전극125c: third electrode
130: 반도체 발광소자130: Semiconductor light emitting device
131: 제1 반도체 발광소자131: First semiconductor light emitting device
132: 제2 반도체 발광소자132: Second semiconductor light emitting device
133: 제3 반도체 발광소자133: Third semiconductor light emitting device
134: 제1 전극층134: first electrode layer
135: 에피층135: epi layer
136: 제1 도전형 반도체층136: First conductive semiconductor layer
137: 활성층137: active layer
138: 제2 도전형 반도체층138: Second conductive semiconductor layer
139: 제2 전극층139: second electrode layer
140: 패시베이션층(절연층)140: Passivation layer (insulating layer)
141a: 제1-1 절연층141a: 1-1 insulating layer
141b: 제1-2 절연층141b: 1-2 insulating layer
150: 투명 전도층150: transparent conductive layer
150a: 제1 투명 전도층150a: first transparent conductive layer
150b: 제2 투명 전도층150b: second transparent conductive layer
160: 광 변환층160: Light conversion layer
161: 제1 광 변환층161: first light conversion layer
162: 제2 광 변환층162: second light conversion layer
163: 제3 광 변환층163: Third light conversion layer

Claims (11)

  1. 기판;Board;
    상기 기판 상에 수직으로 배치되는 제1, 제2 및 제3 반도체 발광소자;first, second and third semiconductor light emitting devices arranged vertically on the substrate;
    상기 제1, 제2 및 제3 반도체 발광소자에 전기적으로 연결되는 공통전극,A common electrode electrically connected to the first, second and third semiconductor light emitting devices,
    상기 제1, 제2 및 제3 반도체 발광소자와 수직 방향으로 중첩되지 않도록 각각의 일측에 이격되어 배치되며, 각각에 전기적으로 연결되는 제1 전극, 제2 전극 및 제3 전극;a first electrode, a second electrode, and a third electrode arranged to be spaced apart from the first, second, and third semiconductor light emitting devices on one side so as not to overlap in the vertical direction, and electrically connected to each of the first, second, and third semiconductor light emitting devices;
    상기 제1, 제2 및 제3 반도체 발광소자의 일면에 각각 접하며 상기 제1 전극, 제2 전극 및 제3 전극에 각각 연결되는 제1, 제2 및 제3 투명 전도층;을 포함하며,It includes first, second and third transparent conductive layers respectively in contact with one surface of the first, second and third semiconductor light emitting devices and connected to the first electrode, second electrode and third electrode respectively,
    상기 제1, 제2 및 제3 투명 전도층은 상기 제1, 제2 및 제3 반도체 발광소자와 중첩되는 영역과 상기 제1, 제2 및 제3 반도체 발광소자과 중첩되지 않는 영역을 포함하고,The first, second and third transparent conductive layers include regions that overlap with the first, second and third semiconductor light emitting devices and regions that do not overlap with the first, second and third semiconductor light emitting devices,
    상기 제1, 제2 및 제3 투명 전도층의 하면에 각각 배치되는 제1, 제2 및 제3 광 변환층을 포함하는, 디스플레이 화소용 적층형 반도체 발광소자.A stacked semiconductor light emitting device for a display pixel, comprising first, second and third light conversion layers respectively disposed on lower surfaces of the first, second and third transparent conductive layers.
  2. 제1항에 있어서,According to paragraph 1,
    상기 제1 투명 전도층은 상기 제1 반도체 발광소자의 일면에서 수평방향으로 연장되어 상기 제1 전극과 연결되며,The first transparent conductive layer extends horizontally from one surface of the first semiconductor light emitting device and is connected to the first electrode,
    상기 제2 투명 전도층은 상기 제2 반도체 발광소자의 일면에서 수평방향으로 연장되어 상기 제2 전극과 연결되고,The second transparent conductive layer extends horizontally from one surface of the second semiconductor light emitting device and is connected to the second electrode,
    상기 제3 투명 전도층은 상기 제3 반도체 발광소자의 일면에서 수평방향으로 연장되어 상기 제3 전극과 연결되는 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.The third transparent conductive layer extends horizontally from one surface of the third semiconductor light emitting device and is connected to the third electrode.
  3. 제1항에 있어서,According to paragraph 1,
    상기 제1 투명 전도층은 상기 제1 반도체 발광소자 보다 큰 면적을 가지는 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.A stacked semiconductor light emitting device for a display pixel, wherein the first transparent conductive layer has a larger area than the first semiconductor light emitting device.
  4. 제1항에 있어서,According to paragraph 1,
    상기 공통전극과 상기 제1, 제2 및 제3 전극은 상기 반도체 발광소자를 둘러싸는 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.A stacked semiconductor light emitting device for a display pixel, wherein the common electrode and the first, second, and third electrodes surround the semiconductor light emitting device.
  5. 제1항에 있어서,According to paragraph 1,
    상기 제1 광 변환층은 광 반사층을 포함하는 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.A stacked semiconductor light emitting device for a display pixel, wherein the first light conversion layer includes a light reflection layer.
  6. 제1항에 있어서,According to paragraph 1,
    상기 제2 및 제3 광 변환층은 광 산란층을 포함하는 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.A stacked semiconductor light emitting device for a display pixel, wherein the second and third light conversion layers include a light scattering layer.
  7. 제1항에 있어서,According to paragraph 1,
    상기 제1, 제2 및 제3 광 변환층은 Ag를 포함하는 나노 와이어를 포함하는 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.A stacked semiconductor light emitting device for a display pixel, wherein the first, second and third light conversion layers include nanowires containing Ag.
  8. 제1항에 있어서,According to paragraph 1,
    상기 공통전극은 상기 제1, 제2 및 제3 반도체 발광소자와 연결되는 제4 전극을 포함하며,The common electrode includes a fourth electrode connected to the first, second and third semiconductor light emitting devices,
    상기 제4 전극은 상기 제1, 제2 및 제3 반도체 발광소자의 타면의 적어도 일부에 배치되는 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.The fourth electrode is a stacked semiconductor light emitting device for a display pixel, wherein the fourth electrode is disposed on at least a portion of the other surface of the first, second, and third semiconductor light emitting devices.
  9. 제1항에 있어서,According to paragraph 1,
    상기 제1, 제2 및 제3 전극 각각은 높이가 서로 다른 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.A stacked semiconductor light emitting device for display pixels, wherein the first, second and third electrodes each have different heights.
  10. 제1항에 있어서,According to paragraph 1,
    상기 기판 상에 배치되어 상기 제1, 제2 및 제3 반도체 발광소자와 상기 공통전극 및 상기 제1, 제2 및 제3 전극을 덮는 패시베이션층을 더 포함하는 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.A layered semiconductor for display pixels further comprising a passivation layer disposed on the substrate and covering the first, second, and third semiconductor light emitting elements, the common electrode, and the first, second, and third electrodes. Light emitting device.
  11. 제7항에 있어서,In clause 7,
    상기 제1 광 변환층은 상기 제2 및 제3 광 변환층보다 상기 Ag를 포함하는 나노 와이어의 함량이 높은 것을 특징으로 하는 디스플레이 화소용 적층형 반도체 발광소자.A stacked semiconductor light emitting device for a display pixel, wherein the first light conversion layer has a higher content of nanowires containing Ag than the second and third light conversion layers.
PCT/KR2022/019288 2022-11-30 2022-11-30 Laminated semiconductor light-emitting element for display pixel, and display device comprising same WO2024117311A1 (en)

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WO2018175338A1 (en) * 2017-03-20 2018-09-27 Hong Kong Beida Jade Bird Display Limited Making semiconductor devices by stacking strata of micro leds
KR20200098662A (en) * 2017-12-21 2020-08-20 루미레즈 엘엘씨 LED with structured layers and nanophosphors
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