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WO2024082224A1 - Iii-nitride-based semiconductor packaged structure and method for manufacturing the same - Google Patents

Iii-nitride-based semiconductor packaged structure and method for manufacturing the same Download PDF

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Publication number
WO2024082224A1
WO2024082224A1 PCT/CN2022/126502 CN2022126502W WO2024082224A1 WO 2024082224 A1 WO2024082224 A1 WO 2024082224A1 CN 2022126502 W CN2022126502 W CN 2022126502W WO 2024082224 A1 WO2024082224 A1 WO 2024082224A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductive trace
nitride
iii
die
based semiconductor
Prior art date
Application number
PCT/CN2022/126502
Other languages
French (fr)
Inventor
Weigang YAO
Original Assignee
Innoscience (Zhuhai) Technology Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Innoscience (Zhuhai) Technology Co., Ltd. filed Critical Innoscience (Zhuhai) Technology Co., Ltd.
Priority to CN202280004796.0A priority Critical patent/CN115956291A/en
Priority to PCT/CN2022/126502 priority patent/WO2024082224A1/en
Publication of WO2024082224A1 publication Critical patent/WO2024082224A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/49524Additional leads the additional leads being a tape carrier or flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49558Insulating layers on lead frames, e.g. bridging members

Definitions

  • the present invention generally relates to a semiconductor packaged structure. More specifically, the present invention relates to a III-nitride-based semiconductor packaged structure having a preformed conductive trace for electrical connection.
  • III-nitride-based HEMTs utilize a heterojunction interface between two materials with different bandgaps to form a quantum well-like structure, which accommodates a two-dimensional electron gas (2DEG) region, satisfying demands of high power/frequency devices.
  • devices having heterostructures further include heterojunction bipolar transistors (HBT) , heterojunction field effect transistor (HFET) , and modulation-doped FETs (MODFET) .
  • a III-nitride-based semiconductor packaged structure includes a lead frame, a first adhesive layer, a III-nitride-based die, a second adhesive layer, and a first conductive trace.
  • the lead frame includes a die paddle and a lead.
  • the first adhesive layer is disposed over the die paddle.
  • the III-nitride-based die is disposed over the first adhesive layer.
  • the second adhesive layer is disposed over the III-nitride-based die.
  • the first conductive trace electrically connects the III-nitride-based die to the lead, in which the first conductive trace extends from a position above the III-nitride-based die to a position above the lead and has an extending path turning twice.
  • a method for manufacturing a III-nitride-based semiconductor packaged structure includes steps as follows: forming a first conductive trace and a second conductive trace separated from each other; positioning first portions of the first conductive trace and the second conductive trace into recesses of a cover, respectively such that second portions of the first conductive trace and the second conductive trace are out of the recesses of the cover; bending the second portions of the first conductive trace and the second conductive trace such that each of the first conductive trace and the second conductive trace has two turned corners; and positioning the first conductive trace and the second conductive trace over a III-nitride-based die such that the first conductive trace and the second conductive trace are electrically connected to the III-nitride-based die.
  • a nitride-based semiconductor device includes a lead frame, a III-nitride-based die, a first conductive trace, a second conductive trace, and a cover.
  • the lead frame includes a die paddle and a lead.
  • the III-nitride-based die is disposed over the die paddle.
  • the first conductive trace electrically connects the III-nitride-based die to the lead.
  • the second conductive trace electrically connects the III-nitride-based die to the lead.
  • the cover is disposed over the III-nitride-based die, the first conductive trace, and the second conductive trace, in which the cover has recesses to accommodate the first conductive trace and the second conductive trace.
  • the conductive trace can have the structural strength enough to resist disturbances and thus the profile of the conductive trace can be fixed.
  • the fixed profile, shape, or outline of the conductive trace can make sure the electrical connection provided by the conductive trace keeps well.
  • FIG. 1A is a top view of a III-nitride-based semiconductor packaged structure according to some embodiments of the present disclosure
  • FIG. 1B is a cross-sectional view across a line I-I’ of the A III-nitride-based semiconductor device in FIG. 1A;
  • FIG. 2A, FIG. 2B, FIG. 2C, FIG. 2D, and FIG. 2E show different stages of a method for manufacturing a III-nitride-based semiconductor packaged structure according to some embodiments of the present disclosure.
  • FIG. 1A is a top view of a III-nitride-based semiconductor packaged structure 1A according to some embodiments of the present disclosure.
  • FIG. 1B is a cross-sectional view across a line I-I’ of the A III-nitride-based semiconductor device 1A in FIG. 1A.
  • a III-nitride-based semiconductor packaged structure 1A includes a lead frame 10, a III-nitride-based die 12, adhesive layers 14, 16, 32, conductive traces 20 and 22, a cover 30, an encapsulant 40.
  • the term “III-nitride” means GaN, AlN, InN and various mixtures thereof such as AlGaN, InAlGaN and InAlN with various ratios of metal elements in the nitrides.
  • the lead frame 10 includes a die paddle 102 and leads 104 and 106.
  • the leads 104 and 106 can be arranged at two opposite sides of the die paddle 102.
  • Each of the leads 104 and 106 can include a conductive pad to serve as an electrical connection, which can connect two locations electrically.
  • the die paddle 102 can be made of metal.
  • the die paddle 102 has a top surface configured to support a die or a chip.
  • the leads 104 and 106 can be made of metal
  • the adhesive layer 14 is disposed over the top surface of the die paddle 102.
  • the adhesive layer 14 is placed on the top surface of the die paddle 102.
  • the III-nitride-based die 12 is disposed over on the adhesive layer 14.
  • the III-nitride-based die 12 is placed on the adhesive layer 14 so the III-nitride-based die 12 can be fixed on the top surface of the die paddle 102.
  • the adhesive layer 16 is disposed over on the III-nitride-based die 12.
  • the adhesive layer 16 is conductive so an external electrical signal can be input into the III-nitride-based die 12 via the adhesive layer 16.
  • the adhesive layer 32 is disposed over the top surface of the leads 104 and 106.
  • the adhesive layer 32 is conductive so an external electrical signal can be input from the leads 104 and 106 into the adhesive layer 32.
  • the III-nitride-based die 12 may include at least one III-nitride-based transistor therein.
  • the III-nitride-based transistor can include two nitride-based semiconductor layers which can serve a channel layer and a barrier layer, two or more source or drain electrodes, and at least one gate electrode.
  • the exemplary materials of the nitride-based semiconductor layers can include, for example but are not limited to, nitrides or group III-nitrides, such as GaN, AlN, InN, In x Al y Ga (1–x–y) N where x+y ⁇ 1, Al y Ga (1–y) N where y ⁇ 1.
  • the exemplary materials of the nitride-based semiconductor layers are selected such that the upper nitride-based semiconductor layer has a bandgap (i.e., forbidden band width) greater than a bandgap of the lower nitride-based semiconductor layer, which causes electron affinities thereof different from each other and forms a heterojunction therebetween.
  • the upper nitride-based semiconductor layer can be selected as an AlGaN layer having bandgap of approximately 4.0 eV.
  • a triangular well potential is generated at a bonded interface between the channel and barrier layers, so that electrons accumulate in the triangular well potential, thereby generating a two-dimensional electron gas (2DEG) region adjacent to the heterojunction.
  • the source or drain electrodes and the gate electrode can be disposed above the 2DEG.
  • the III-nitride-based die 12 is available to include at least one GaN-based high-electron-mobility transistor (HEMT) .
  • HEMT high-electron-mobility transistor
  • the conductive trace 20 is disposed over the lead frame 10 and the III-nitride-based die 12.
  • the material of the conductive trace 20 may include metal or alloy.
  • the conductive trace 20 can electrically couple with the III-nitride-based die 12 via the adhesive layer 16.
  • the conductive trace 20 can electrically couple with the lead 104 via the adhesive layer 32. Accordingly, the conductive trace 20 can electrically connect the III-nitride-based die 12 to the lead 104 so the III-nitride-based die 12 can receive an external electrical signal from the lead 104.
  • the conductive trace 20 can extend from a position above the III-nitride-based die 12 to a position above the lead 104.
  • the conductive trace 20 can form an extending path turning twice.
  • the conductive trace 20 is a preformed conductor.
  • “the preformed conductor” means the profile, the shape, or the outline of the conductive trace 20 can be defined and fixed prior to the disposition.
  • the conductive trace 20 can have the structural strength enough to resist disturbances. This is advantageous to fix the profile, the shape, or the outline of the conductive trace 20 after the disposition.
  • the relative position of the conductive trace 20 to the III-nitride-based die 12 can be substantially secured.
  • the conductive trace 20 can horizontally extend above the III-nitride-based die 12.
  • the fixed profile, shape, or outline can make sure the electrical connection provided by the conductive trace 20 keeps well.
  • the conductive trace 20 has two rounded corners at the turning of the extending path.
  • the rounded corners can distribute stress well, which is better than right angle corner.
  • the turning of the extending path is formed by an angle in a range from 80 degrees to 90 degrees. Making the angle under 90 degrees can avoid broken at the corners.
  • the conductive trace 20 includes finger-shaped pads 202 directly above the III-nitride-based die 12.
  • the finger-shaped pads 202 of the conductive trace 20 can be electrically coupled to source of the III-nitride-based die 12.
  • the conductive trace 22 is disposed over the lead frame 10 and the III-nitride-based die 12.
  • the material of the conductive trace 22 may include metal or alloy, which may have the same material as that of the conductive trace 20.
  • the conductive trace 22 can electrically couple with the III-nitride-based die 12 via the adhesive layer 16.
  • the conductive trace 20 can electrically couple with the lead 106 via the adhesive layer 32. Accordingly, the conductive trace 22 can electrically connect the III-nitride-based die 12 to the lead 106 so the III-nitride-based die 12 can receive an external electrical signal from the lead 106.
  • the conductive trace 22 can extend from a position above the III-nitride-based die 12 to a position above the lead 106.
  • the conductive trace 22 can form an extending path turning twice.
  • the conductive trace 22 is a preformed conductor.
  • the conductive trace 22 can have the structural strength enough to resist disturbances.
  • the conductive trace 22 can horizontally extend above the III-nitride-based die 12. The fixed profile, shape, or outline can make sure the electrical connection provided by the conductive trace 22 keeps well.
  • the conductive trace 22 has two rounded corners at the turning of the extending path.
  • the rounded corners can distribute stress well, which is better than right angle corner.
  • the turning of the extending path is formed by an angle in a range from 80 degrees to 90 degrees. Making the angle under 90 degrees can avoid broken at the corners.
  • the conductive trace 22 includes finger-shaped pads 222 directly above the III-nitride-based die 12.
  • the finger-shaped pads 222 of the conductive trace 22 can be electrically coupled to drain of the III-nitride-based die 12.
  • the finger-shaped pads 202 of the conductive trace 20 and the finger-shaped pads 222 of the conductive trace 22 are isolated from each other.
  • the III-nitride-based semiconductor packaged structure 1A may further include a gate conductive trace 24.
  • the gate conductive trace 24 is electrically connected to the III-nitride-based die 12.
  • the material of the gate conductive trace 24 may include metal or alloy, which may have the same material as that of the conductive trace 20.
  • the gate conductive trace 24 can be electrically coupled to gate of the III-nitride-based die 12 and be isolated than the finger-shaped pads 202 of the conductive trace 20 and the finger-shaped pads 222 of the conductive trace 22.
  • the gate conductive trace 24 is a preformed conductor. Similarly, the gate conductive trace 24 can extend to form an extending path with turning twice.
  • the cover 30 covers the finger-shaped pads 202 and 222 of the conductive traces 20 and 22.
  • the encapsulant 40 encapsulate the lead frame 10, the III-nitride-based die 12, the conductive traces 20 and 22, and the cover 30.
  • the encapsulant 40 can include epoxy, fillers, particles, and combinations thereof. In practical cases, the encapsulant 40 may be selected from a molding compound.
  • the cover 30 can serve as an assistive tool during defining the profiles of the conductive traces 20 and 22.
  • the during defining the profiles of the conductive traces 20 and 22 can be achieved by bending them twice. More detailed stages are set as follows with FIG. 2A, FIG. 2B, FIG. 2C, FIG. 2D, and FIG. 2E, which show different stages of a method for manufacturing a III-nitride-based semiconductor packaged structure 1A according to some embodiments of the present disclosure.
  • a conductive plate 50 is provided.
  • the conductive plate 50 includes first portions 502, second portions 504, and gate portions 506.
  • the ends of the first portions 502 and second portions 504 adjacent to each other are finger-shaped.
  • the first portions 502 and second portions 504 have finger-shaped pads adjacent to each other.
  • the different portions of the conductive plate 50 can be formed by patterning the conductive plate 50.
  • the stage of patterning the conductive plate 50 includes etching the conductive plate 50. For example, after the patterning, the finger-shaped profile is formed.
  • parts of the first portions 502, the second portions 504, and the gate portions 506 of the conductive plate 50 are positioned into a cover 30. More specifically, the cover 30 has recesses 302 to accommodate or receive the finger-shaped pads of the first portions 502 and the second portions 504. Ends of the gate portions 506 are accommodated or received by the cover 30 as well.
  • the cover 30 further has a dividing wall 304.
  • the dividing wall 304 is located between the finger-shaped pads of the first portions 502 and the second portions 504, so as to isolate them.
  • the dividing wall 304 is zig-zag shaped. The ends of the gate portions 506 are isolated from the finger-shaped pads of the first portions 502 and the second portions 504 by the dividing wall 304.
  • parts of the first portions 502, the second portions 504, and the gate portions 506 which are out of the cover 30 and thus are exposed are bent.
  • the bending can be executed twice such that the exposed parts of the first portions 502, the second portions 504, and the gate portions 506 are bent to have two turned corners as afore described.
  • the cover 30 can protect the covered parts of the first portions 502, the second portions 504, and the gate portions 506 from bending so they can keep their “level quality” .
  • the level quality of the covered parts relates to the device reliability.
  • the covered parts are to be disposed to cover a surface of a die. Once these parts get curved, at least one gap is formed between the parts and the die, which lowers the device reliability.
  • the first and second portions of the conductive plate 50 can serve as conductive traces 20 and 22.
  • the conductive traces 20 and 22 are positioned over a III-nitride-based die 12. Prior to the positioning the conductive traces 20 and 22, an adhesive layer 16 is disposed on the III-nitride-based die 12. The positioned conductive traces 20 and 22 can be secured on the III-nitride-based die 12 and electrically connected to the III-nitride-based die 12 via the adhesive layer 16.
  • an encapsulant is formed to encapsulate the lead frame 10, the III-nitride-based die 12, the conductive traces 20 and 22, and the cover 30.
  • the encapsulant can be formed by driving an encapsulant compound, thereby causing it to flow and then curing (i.e., solidifying, hardening, or heating) the encapsulant compound.
  • the terms “substantially, “ “substantial, “ “approximately” and “about” are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can encompass instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation.
  • the terms when used in conjunction with a numerical value, can encompass a range of variation of less than or equal to ⁇ 10%of that numerical value, such as less than or equal to ⁇ 5%, less than or equal to ⁇ 4%, less than or equal to ⁇ 3%, less than or equal to ⁇ 2%, less than or equal to ⁇ 1%, less than or equal to ⁇ 0.5%, less than or equal to ⁇ 0.1%, or less than or equal to ⁇ 0.05%.
  • substantially coplanar can refer to two surfaces within micrometers of lying along a same plane, such as within 40 ⁇ m, within 30 ⁇ m, within 20 ⁇ m, within 10 ⁇ m, or within 1 ⁇ m of lying along the same plane.
  • a component provided “on” or “over” another component can encompass cases where the former component is directly on (e.g., in physical contact with) the latter component, as well as cases where one or more intervening components are located between the former component and the latter component.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

A III-nitride-based semiconductor packaged structure includes a lead frame, a first adhesive layer, a III-nitride-based die, a second adhesive layer, and a first conductive trace. The lead frame includes a die paddle and a lead. The first adhesive layer is disposed over the die paddle. The III-nitride-based die is disposed over the first adhesive layer. The second adhesive layer is disposed over the III-nitride-based die. The first conductive trace electrically connects the III-nitride-based die to the lead, in which the first conductive trace extends from a position above the III-nitride-based die to a position above the lead and has an extending path turning twice.

Description

III-NITRIDE-BASED SEMICONDUCTOR PACKAGED STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
Inventors: Weigang YAO
Field of the Invention:
The present invention generally relates to a semiconductor packaged structure. More specifically, the present invention relates to a III-nitride-based semiconductor packaged structure having a preformed conductive trace for electrical connection.
Background of the Invention:
In recent years, intense research on high-electron-mobility transistors (HEMTs) has been prevalent, particularly for high power switching and high frequency applications. III-nitride-based HEMTs utilize a heterojunction interface between two materials with different bandgaps to form a quantum well-like structure, which accommodates a two-dimensional electron gas (2DEG) region, satisfying demands of high power/frequency devices. In addition to HEMTs, examples of devices having heterostructures further include heterojunction bipolar transistors (HBT) , heterojunction field effect transistor (HFET) , and modulation-doped FETs (MODFET) .
Summary of the Invention:
In accordance with one aspect of the present disclosure, a nitride-based semiconductor device is provided. A III-nitride-based semiconductor packaged structure includes a lead frame, a first adhesive layer, a III-nitride-based die, a second adhesive layer, and a first conductive trace. The lead frame includes a die paddle and a lead. The first adhesive layer is disposed over the die paddle. The III-nitride-based die is disposed over the first adhesive layer. The second adhesive layer is disposed over the III-nitride-based die. The first conductive trace electrically connects the III-nitride-based die to the lead, in which the first conductive trace extends from a position above the III-nitride-based die to a position above the lead and has an extending path turning twice.
In accordance with one aspect of the present disclosure, a method for manufacturing a III-nitride-based semiconductor packaged structure is provided. The method includes steps as follows: forming a first conductive trace and a second conductive trace separated from each other; positioning first portions of the first conductive trace and the second conductive trace into recesses of a cover, respectively such that second portions of the first conductive trace and the second conductive trace are out of the recesses of the cover; bending the second portions of the first conductive trace and the second conductive trace such that each of the first conductive trace and the second conductive trace has two turned corners; and positioning the first conductive trace and  the second conductive trace over a III-nitride-based die such that the first conductive trace and the second conductive trace are electrically connected to the III-nitride-based die.
In accordance with one aspect of the present disclosure, a nitride-based semiconductor device is provided. The nitride-based semiconductor device includes a lead frame, a III-nitride-based die, a first conductive trace, a second conductive trace, and a cover. The lead frame includes a die paddle and a lead. The III-nitride-based die is disposed over the die paddle. The first conductive trace electrically connects the III-nitride-based die to the lead. The second conductive trace electrically connects the III-nitride-based die to the lead. The cover is disposed over the III-nitride-based die, the first conductive trace, and the second conductive trace, in which the cover has recesses to accommodate the first conductive trace and the second conductive trace.
By applying the above configuration, the conductive trace can have the structural strength enough to resist disturbances and thus the profile of the conductive trace can be fixed. The fixed profile, shape, or outline of the conductive trace can make sure the electrical connection provided by the conductive trace keeps well.
Brief Description of the Drawings:
Aspects of the present disclosure are readily understood from the following detailed description when read with the accompanying figures. It should be noted that various features may not be drawn to scale. That is, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. Embodiments of the present disclosure are described in more detail hereinafter with reference to the drawings, in which:
FIG. 1A is a top view of a III-nitride-based semiconductor packaged structure according to some embodiments of the present disclosure;
FIG. 1B is a cross-sectional view across a line I-I’ of the A III-nitride-based semiconductor device in FIG. 1A; and
FIG. 2A, FIG. 2B, FIG. 2C, FIG. 2D, and FIG. 2E show different stages of a method for manufacturing a III-nitride-based semiconductor packaged structure according to some embodiments of the present disclosure.
Detailed Description:
Common reference numerals are used throughout the drawings and the detailed description to indicate the same or similar components. Embodiments of the present disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.
Spatial descriptions, such as "above, " "below, " "up, " "left, " "right, " "down, " "top, " "bottom, " "vertical, " "horizontal, " "side, " "higher, " "lower, " "upper, " "over, " "under, " and so forth, are specified with respect to a certain component or group of components, or a certain plane of a component or group of components, for the orientation of the component (s) as shown in the associated figure. It should be understood that the spatial descriptions used herein are for purposes of illustration only, and that practical implementations of the structures described herein can be spatially arranged in any orientation or manner, provided that the merits of embodiments of this disclosure are not deviated from by such arrangement.
Further, it is noted that the actual shapes of the various structures depicted as approximately rectangular may, in actual device, be curved, have rounded edges, have somewhat uneven thicknesses, etc. due to device fabrication conditions. The straight lines and right angles are used solely for convenience of representation of layers and features.
In the following description, semiconductor devices/dies/packages, methods for manufacturing the same, and the likes are set forth as preferred examples. It will be apparent to those skilled in the art that modifications, including additions and/or substitutions may be made without departing from the scope and spirit of the present disclosure. Specific details may be omitted so as not to obscure the present disclosure; however, the disclosure is written to enable one skilled in the art to practice the teachings herein without undue experimentation.
FIG. 1A is a top view of a III-nitride-based semiconductor packaged structure 1A according to some embodiments of the present disclosure. FIG. 1B is a cross-sectional view across a line I-I’ of the A III-nitride-based semiconductor device 1A in FIG. 1A. A III-nitride-based semiconductor packaged structure 1A includes a lead frame 10, a III-nitride-based die 12,  adhesive layers  14, 16, 32,  conductive traces  20 and 22, a cover 30, an encapsulant 40. As used herein, the term “III-nitride” means GaN, AlN, InN and various mixtures thereof such as AlGaN, InAlGaN and InAlN with various ratios of metal elements in the nitrides.
The lead frame 10 includes a die paddle 102 and leads 104 and 106. The  leads  104 and 106 can be arranged at two opposite sides of the die paddle 102. Each of the  leads  104 and 106 can include a conductive pad to serve as an electrical connection, which can connect two locations electrically. The die paddle 102 can be made of metal. The die paddle 102 has a top surface configured to support a die or a chip. The leads 104 and 106 can be made of metal
The adhesive layer 14 is disposed over the top surface of the die paddle 102. The adhesive layer 14 is placed on the top surface of the die paddle 102. The III-nitride-based die 12 is disposed over on the adhesive layer 14. The III-nitride-based die 12 is placed on the adhesive layer 14 so the III-nitride-based die 12 can be fixed on the top surface of the die paddle 102. The adhesive layer 16 is disposed over on the III-nitride-based die 12. In some embodiments, the  adhesive layer 16 is conductive so an external electrical signal can be input into the III-nitride-based die 12 via the adhesive layer 16. The adhesive layer 32 is disposed over the top surface of the  leads  104 and 106. In some embodiments, the adhesive layer 32 is conductive so an external electrical signal can be input from the  leads  104 and 106 into the adhesive layer 32.
In some embodiments, the III-nitride-based die 12 may include at least one III-nitride-based transistor therein. Herein, the III-nitride-based transistor can include two nitride-based semiconductor layers which can serve a channel layer and a barrier layer, two or more source or drain electrodes, and at least one gate electrode. The exemplary materials of the nitride-based semiconductor layers can include, for example but are not limited to, nitrides or group III-nitrides, such as GaN, AlN, InN, In xAl yGa  (1–x–y) N where x+y ≤ 1, Al yGa  (1–y) N where y ≤ 1. The exemplary materials of the nitride-based semiconductor layers are selected such that the upper nitride-based semiconductor layer has a bandgap (i.e., forbidden band width) greater than a bandgap of the lower nitride-based semiconductor layer, which causes electron affinities thereof different from each other and forms a heterojunction therebetween. For example, when the lower nitride-based semiconductor layer is an undoped GaN layer having bandgap of approximately 3.4 eV, the upper nitride-based semiconductor layer can be selected as an AlGaN layer having bandgap of approximately 4.0 eV. A triangular well potential is generated at a bonded interface between the channel and barrier layers, so that electrons accumulate in the triangular well potential, thereby generating a two-dimensional electron gas (2DEG) region adjacent to the heterojunction. The source or drain electrodes and the gate electrode can be disposed above the 2DEG. Accordingly, the III-nitride-based die 12 is available to include at least one GaN-based high-electron-mobility transistor (HEMT) .
The conductive trace 20 is disposed over the lead frame 10 and the III-nitride-based die 12. The material of the conductive trace 20 may include metal or alloy. The conductive trace 20 can electrically couple with the III-nitride-based die 12 via the adhesive layer 16. The conductive trace 20 can electrically couple with the lead 104 via the adhesive layer 32. Accordingly, the conductive trace 20 can electrically connect the III-nitride-based die 12 to the lead 104 so the III-nitride-based die 12 can receive an external electrical signal from the lead 104.
The conductive trace 20 can extend from a position above the III-nitride-based die 12 to a position above the lead 104. The conductive trace 20 can form an extending path turning twice. In this regard, the conductive trace 20 is a preformed conductor. Herein, “the preformed conductor” means the profile, the shape, or the outline of the conductive trace 20 can be defined and fixed prior to the disposition. Moreover, the conductive trace 20 can have the structural strength enough to resist disturbances. This is advantageous to fix the profile, the shape, or the outline of the conductive trace 20 after the disposition. For example, after the disposition of the  conductive trace 20, the relative position of the conductive trace 20 to the III-nitride-based die 12 can be substantially secured. The conductive trace 20 can horizontally extend above the III-nitride-based die 12. The fixed profile, shape, or outline can make sure the electrical connection provided by the conductive trace 20 keeps well.
In some embodiments, the conductive trace 20 has two rounded corners at the turning of the extending path. The rounded corners can distribute stress well, which is better than right angle corner. In some embodiments, the turning of the extending path is formed by an angle in a range from 80 degrees to 90 degrees. Making the angle under 90 degrees can avoid broken at the corners.
As shown in the exemplary illustration of FIG. 1A, the conductive trace 20 includes finger-shaped pads 202 directly above the III-nitride-based die 12. The finger-shaped pads 202 of the conductive trace 20 can be electrically coupled to source of the III-nitride-based die 12.
The conductive trace 22 is disposed over the lead frame 10 and the III-nitride-based die 12. The material of the conductive trace 22 may include metal or alloy, which may have the same material as that of the conductive trace 20. The conductive trace 22 can electrically couple with the III-nitride-based die 12 via the adhesive layer 16. The conductive trace 20 can electrically couple with the lead 106 via the adhesive layer 32. Accordingly, the conductive trace 22 can electrically connect the III-nitride-based die 12 to the lead 106 so the III-nitride-based die 12 can receive an external electrical signal from the lead 106.
The conductive trace 22 can extend from a position above the III-nitride-based die 12 to a position above the lead 106. The conductive trace 22 can form an extending path turning twice. In this regard, the conductive trace 22 is a preformed conductor. The conductive trace 22 can have the structural strength enough to resist disturbances. The conductive trace 22 can horizontally extend above the III-nitride-based die 12. The fixed profile, shape, or outline can make sure the electrical connection provided by the conductive trace 22 keeps well.
In some embodiments, the conductive trace 22 has two rounded corners at the turning of the extending path. The rounded corners can distribute stress well, which is better than right angle corner. In some embodiments, the turning of the extending path is formed by an angle in a range from 80 degrees to 90 degrees. Making the angle under 90 degrees can avoid broken at the corners.
As shown in the exemplary illustration of FIG. 1A, the conductive trace 22 includes finger-shaped pads 222 directly above the III-nitride-based die 12. The finger-shaped pads 222 of the conductive trace 22 can be electrically coupled to drain of the III-nitride-based die 12. The finger-shaped pads 202 of the conductive trace 20 and the finger-shaped pads 222 of the conductive trace 22 are isolated from each other.
The III-nitride-based semiconductor packaged structure 1A may further include a gate conductive trace 24. The gate conductive trace 24 is electrically connected to the III-nitride-based die 12. The material of the gate conductive trace 24 may include metal or alloy, which may have the same material as that of the conductive trace 20. The gate conductive trace 24 can be electrically coupled to gate of the III-nitride-based die 12 and be isolated than the finger-shaped pads 202 of the conductive trace 20 and the finger-shaped pads 222 of the conductive trace 22. The gate conductive trace 24 is a preformed conductor. Similarly, the gate conductive trace 24 can extend to form an extending path with turning twice.
The cover 30 covers the finger-shaped  pads  202 and 222 of the conductive traces 20 and 22. The encapsulant 40 encapsulate the lead frame 10, the III-nitride-based die 12, the conductive traces 20 and 22, and the cover 30. In some embodiments, the encapsulant 40 can include epoxy, fillers, particles, and combinations thereof. In practical cases, the encapsulant 40 may be selected from a molding compound.
The cover 30 can serve as an assistive tool during defining the profiles of the conductive traces 20 and 22. The during defining the profiles of the conductive traces 20 and 22 can be achieved by bending them twice. More detailed stages are set as follows with FIG. 2A, FIG. 2B, FIG. 2C, FIG. 2D, and FIG. 2E, which show different stages of a method for manufacturing a III-nitride-based semiconductor packaged structure 1A according to some embodiments of the present disclosure.
Referring to FIG. 2A, a conductive plate 50 is provided. The conductive plate 50 includes first portions 502, second portions 504, and gate portions 506. The ends of the first portions 502 and second portions 504 adjacent to each other are finger-shaped. The first portions 502 and second portions 504 have finger-shaped pads adjacent to each other. The different portions of the conductive plate 50 can be formed by patterning the conductive plate 50. The stage of patterning the conductive plate 50 includes etching the conductive plate 50. For example, after the patterning, the finger-shaped profile is formed.
Referring to FIG. 2B and FIG. 2C, parts of the first portions 502, the second portions 504, and the gate portions 506 of the conductive plate 50 are positioned into a cover 30. More specifically, the cover 30 has recesses 302 to accommodate or receive the finger-shaped pads of the first portions 502 and the second portions 504. Ends of the gate portions 506 are accommodated or received by the cover 30 as well. The cover 30 further has a dividing wall 304. The dividing wall 304 is located between the finger-shaped pads of the first portions 502 and the second portions 504, so as to isolate them. The dividing wall 304 is zig-zag shaped. The ends of the gate portions 506 are isolated from the finger-shaped pads of the first portions 502 and the second portions 504 by the dividing wall 304.
Referring to FIG. 2D, parts of the first portions 502, the second portions 504, and the gate portions 506 which are out of the cover 30 and thus are exposed are bent. The bending can be executed twice such that the exposed parts of the first portions 502, the second portions 504, and the gate portions 506 are bent to have two turned corners as afore described. The cover 30 can protect the covered parts of the first portions 502, the second portions 504, and the gate portions 506 from bending so they can keep their “level quality” . The level quality of the covered parts relates to the device reliability. The covered parts are to be disposed to cover a surface of a die. Once these parts get curved, at least one gap is formed between the parts and the die, which lowers the device reliability.
Referring to FIG. 2E, the first and second portions of the conductive plate 50 can serve as  conductive traces  20 and 22. The conductive traces 20 and 22 are positioned over a III-nitride-based die 12. Prior to the positioning the conductive traces 20 and 22, an adhesive layer 16 is disposed on the III-nitride-based die 12. The positioned conductive traces 20 and 22 can be secured on the III-nitride-based die 12 and electrically connected to the III-nitride-based die 12 via the adhesive layer 16.
Thereafter, an encapsulant is formed to encapsulate the lead frame 10, the III-nitride-based die 12, the conductive traces 20 and 22, and the cover 30. In some embodiments, the encapsulant can be formed by driving an encapsulant compound, thereby causing it to flow and then curing (i.e., solidifying, hardening, or heating) the encapsulant compound.
The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, thereby enabling others skilled in the art to understand the invention for various embodiments and with various modifications that are suited to the particular use contemplated.
As used herein and not otherwise defined, the terms "substantially, " "substantial, " "approximately" and "about" are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can encompass instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation. For example, when used in conjunction with a numerical value, the terms can encompass a range of variation of less than or equal to ±10%of that numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term “substantially coplanar” can refer to two surfaces within micrometers of lying along a same plane, such as within 40 μm, within 30 μm, within 20 μm, within 10 μm, or within 1 μm of lying along the same plane.
As used herein, the singular terms “a, ” “an, ” and “the” may include plural referents unless the context clearly dictates otherwise. In the description of some embodiments, a component provided “on” or “over” another component can encompass cases where the former component is directly on (e.g., in physical contact with) the latter component, as well as cases where one or more intervening components are located between the former component and the latter component.
While the present disclosure has been described and illustrated with reference to specific embodiments thereof, these descriptions and illustrations are not limiting. It should be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the true spirit and scope of the present disclosure as defined by the appended claims. The illustrations may not necessarily be drawn to scale. There may be distinctions between the artistic renditions in the present disclosure and the actual apparatus due to manufacturing processes and tolerances. Further, it is understood that actual devices and layers may deviate from the rectangular layer depictions of the FIGS. and may include angles surfaces or edges, rounded corners, etc. due to manufacturing processes such as conformal deposition, etching, etc. There may be other embodiments of the present disclosure which are not specifically illustrated. The specification and the drawings are to be regarded as illustrative rather than restrictive. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the present disclosure. All such modifications are intended to be within the scope of the claims appended hereto. While the methods disclosed herein have been described with reference to particular operations performed in a particular order, it will be understood that these operations may be combined, sub-divided, or re-ordered to form an equivalent method without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated herein, the order and grouping of the operations are not limitations.

Claims (25)

  1. A III-nitride-based semiconductor packaged structure, comprising:
    a lead frame comprising a die paddle and a lead;
    a first adhesive layer disposed over the die paddle;
    a III-nitride-based die disposed over the first adhesive layer;
    a second adhesive layer disposed over the III-nitride-based die; and
    a first conductive trace electrically connecting the III-nitride-based die to the lead, wherein the first conductive trace extends from a position above the III-nitride-based die to a position above the lead and has an extending path turning twice.
  2. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the first conductive trace has two rounded corners at the turning of the extending path.
  3. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the turning of the extending path is formed by an angle in a range from 80 degrees to 90 degrees.
  4. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the first conductive trace comprises finger-shaped pads directly above the III-nitride-based die.
  5. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, further comprising:
    a cover covering the finger-shaped pads of the first conductive trace.
  6. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the cover has a recess to accommodate the finger-shaped pads of the first conductive trace.
  7. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, further comprising:
    an encapsulant encapsulating the lead frame, the III-nitride-based die, the first conductive trace, and the cover.
  8. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, further comprising:
    a second conductive trace electrically connecting the III-nitride-based die to the lead, wherein the second conductive trace extends from a position above the III-nitride-based die to a position above the lead and toward a direction away from the first conductive trace, and the second conductive trace has an extending path turning twice.
  9. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the second conductive trace comprises finger-shaped pads directly above the III-nitride-based die.
  10. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the finger-shaped pads of the first conductive trace and the finger-shaped pads of the second conductive trace are isolated from each other.
  11. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, further comprising:
    a cover covering the finger-shaped pads of the first conductive trace and the second conductive trace.
  12. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the cover comprises a dividing wall between the finger-shaped pads of the first conductive trace and the finger-shaped pads of the second conductive trace.
  13. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the dividing wall is zig-zag shaped.
  14. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the first conductive trace horizontally extends above the III-nitride-based die.
  15. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, further comprising:
    a gate conductive trace electrically connected to the III-nitride-based die, wherein the gate conductive trace extends to form an extending path with turning twice.
  16. A method for manufacturing a III-nitride-based semiconductor packaged structure, comprising:
    forming a first conductive trace and a second conductive trace separated from each other;
    positioning first portions of the first conductive trace and the second conductive trace into recesses of a cover, respectively such that second portions of the first conductive trace and the second conductive trace are out of the recesses of the cover;
    bending the second portions of the first conductive trace and the second conductive trace such that each of the first conductive trace and the second conductive trace has two turned corners; and
    positioning the first conductive trace and the second conductive trace over a III-nitride-based die such that the first conductive trace and the second conductive trace are electrically connected to the III-nitride-based die.
  17. The method of any one of the preceding claims, wherein forming the first conductive trace and the second conductive trace comprises etching a conductive plate for patterning the same.
  18. The method of any one of the preceding claims, further comprising:
    forming an encapsulant encapsulating the first conductive trace and the second conductive trace and the cover.
  19. The method of any one of the preceding claims, further comprising:
    disposing an adhesive layer on the III-nitride-based die prior to positioning the first conductive trace and the second conductive trace over the III-nitride-based die.
  20. The method of any one of the preceding claims, wherein the cover comprises a dividing wall between the first conductive trace and the second conductive trace to isolate them.
  21. A III-nitride-based semiconductor packaged structure, comprising:
    a lead frame comprising a die paddle and a lead;
    a III-nitride-based die disposed over the die paddle;
    a first conductive trace electrically connecting the III-nitride-based die to the lead;
    a second conductive trace electrically connecting the III-nitride-based die to the lead; and
    a cover disposed over the III-nitride-based die, the first conductive trace, and the second conductive trace, wherein the cover has recesses to accommodate the first conductive trace and the second conductive trace.
  22. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein each of the first conductive trace and the second conductive trace comprises finger-shaped pads received by the cover.
  23. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the cover comprises a dividing wall between the finger-shaped pads of the first conductive trace and the finger-shaped pads of the second conductive trace.
  24. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the dividing wall is zig-zag shaped.
  25. The III-nitride-based semiconductor packaged structure of any one of the preceding claims, wherein the finger-shaped pads of the first and second conductive trace horizontally extend above the III-nitride-based die.
PCT/CN2022/126502 2022-10-20 2022-10-20 Iii-nitride-based semiconductor packaged structure and method for manufacturing the same WO2024082224A1 (en)

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CN110611027A (en) * 2018-06-15 2019-12-24 英飞凌科技股份有限公司 Current sensor package with continuous insulation
CN111799233A (en) * 2019-04-09 2020-10-20 英飞凌科技股份有限公司 Four-sided package with conductive clip connected to terminal at upper surface of semiconductor die
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US20010048151A1 (en) * 1998-05-30 2001-12-06 Hyundai Electronics Industries Co., Inc. Stackable ball grid array semiconductor package and fabrication method thereof
CN103367271A (en) * 2012-03-27 2013-10-23 英飞凌科技股份有限公司 Semiconductor packages and methods of formation thereof
CN106910730A (en) * 2015-12-23 2017-06-30 梅莱克塞斯技术股份有限公司 Current sensor preparation method and current sensor
CN107492528A (en) * 2016-06-13 2017-12-19 恩智浦美国有限公司 Flexible semiconductor device with graphene band
CN110611027A (en) * 2018-06-15 2019-12-24 英飞凌科技股份有限公司 Current sensor package with continuous insulation
CN111799233A (en) * 2019-04-09 2020-10-20 英飞凌科技股份有限公司 Four-sided package with conductive clip connected to terminal at upper surface of semiconductor die
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