[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

WO2023157185A1 - Gate drive circuit and power conversion device - Google Patents

Gate drive circuit and power conversion device Download PDF

Info

Publication number
WO2023157185A1
WO2023157185A1 PCT/JP2022/006413 JP2022006413W WO2023157185A1 WO 2023157185 A1 WO2023157185 A1 WO 2023157185A1 JP 2022006413 W JP2022006413 W JP 2022006413W WO 2023157185 A1 WO2023157185 A1 WO 2023157185A1
Authority
WO
WIPO (PCT)
Prior art keywords
gate
semiconductor switching
switching element
drive circuit
source
Prior art date
Application number
PCT/JP2022/006413
Other languages
French (fr)
Japanese (ja)
Inventor
翔太 森崎
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to PCT/JP2022/006413 priority Critical patent/WO2023157185A1/en
Publication of WO2023157185A1 publication Critical patent/WO2023157185A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present disclosure relates to a gate drive circuit that drives semiconductor switching elements, and a power conversion device that includes the gate drive circuit.
  • a power conversion device such as an inverter device, a servo amplifier device, or a switching power supply device includes a power conversion main circuit having one or more semiconductor switching elements.
  • the semiconductor switching element In the semiconductor switching element, the conduction state between the drain main terminal and the source main terminal changes according to the electric signal applied between the gate terminal and the source main terminal.
  • the gate drive circuit receives a command signal from a higher-level controller and applies an electric signal between the gate terminal and the source main terminal of the semiconductor switching element to drive the semiconductor switching element.
  • Patent Document 1 describes detecting a voltage generated in an inductance that may exist between a source control terminal and a source main terminal of a semiconductor switching element, and varying a gate driving voltage or a gate driving resistance based on the detected value.
  • a gate drive circuit is disclosed that provides control to allow
  • Damage to the element can be dealt with by slowing the switching speed, but in that case the switching loss will increase. That is, there is a trade-off relationship between surge and noise and switching loss.
  • Patent Literature 1 By using the method of Patent Document 1, it is possible to drive semiconductor switching elements at high speed. However, the technique of Patent Literature 1 has a problem that the surge, noise, and switching loss, which are in a trade-off relationship, cannot be optimized.
  • the present disclosure has been made in view of the above, and aims to obtain a gate drive circuit capable of driving a semiconductor switching element by optimizing the surge and noise, which are in a trade-off relationship, and switching loss.
  • the gate drive circuit drives a semiconductor device module having a drain main terminal, a gate terminal, a source main terminal, and first and second source terminals. It is a gate drive circuit.
  • a semiconductor switching element has a gate electrode, a drain electrode and a source electrode.
  • the drain main terminal is connected to the drain electrode and the gate terminal is connected to the gate electrode.
  • the source main terminal and the first source terminal are connected to the source electrode, and the second source terminal is connected to the source main terminal.
  • the gate drive circuit includes a gate driver, a feedback section, and a feedback intensity adjustment section. The gate driver applies an electric signal between the gate terminal and the source main terminal to gate-drive the semiconductor switching element.
  • the feedback unit feeds back to the gate driver an electromotive force induced between the first source terminal and the second source terminal by a main circuit current flowing between the drain main terminal and the source main terminal.
  • the feedback strength adjustment section is configured to be able to individually adjust the feedback strength, which is the strength of the voltage fed back from the feedback section to the gate driver, when the semiconductor switching element is turned on and when it is turned off.
  • the semiconductor switching element can be driven by optimizing the surge, noise, and switching loss, which are in a trade-off relationship.
  • FIG. 1 is a diagram showing a configuration example of a power conversion device including a gate drive circuit according to Embodiment 1;
  • FIG. 2 shows a detailed configuration of the gate drive circuit of the first embodiment together with semiconductor switching elements to be driven;
  • FIG. 4 is a diagram for explaining the operation of the semiconductor switching element when the gate drive circuit according to the first embodiment is turned on;
  • FIG. 4 shows an example of operation waveforms when the semiconductor switching element is turned on by the gate drive circuit of the first embodiment;
  • FIG. 4 is a diagram for explaining the operation of the semiconductor switching element when the gate drive circuit according to the first embodiment is turned off;
  • FIG. 4 shows an example of operation waveforms when the semiconductor switching element is turned off by the gate drive circuit of the first embodiment;
  • FIG. 4 is a diagram for explaining the effect of using the feedback intensity adjustment unit of the first embodiment;
  • FIG. 10 is a diagram showing the detailed configuration of the gate drive circuit of the second embodiment together with semiconductor switching elements to be driven;
  • connection includes both cases in which components are directly connected to each other and cases in which components are indirectly connected to each other via other components.
  • FIG. 1 is a diagram showing a configuration example of a power conversion device 1 including a gate drive circuit 3 according to Embodiment 1.
  • FIG. 2 is a circuit diagram showing a configuration example of the inverter circuit 2 shown in FIG.
  • FIG. 3 is a diagram showing the detailed configuration of the gate drive circuit 3 of the first embodiment together with the semiconductor switching element 6a to be driven.
  • the power conversion device 1 includes an inverter circuit 2, a gate drive circuit 3, and a control section 4.
  • a DC power supply 50 is connected to an input terminal of the inverter circuit 2 .
  • the DC power supply 50 is a supply source of DC power for applying a DC voltage to the inverter circuit 2, and corresponds to a power supply device, a converter, a power capacitor, and the like.
  • the inverter circuit 2 is a power conversion circuit that converts the DC power supplied from the DC power supply 50 into AC power.
  • the inverter circuit 2 has at least one semiconductor switching element 6a.
  • An example of the semiconductor switching element 6a is a metal-oxide-semiconductor field effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor: MOSFET) as shown in FIG.
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • anti-parallel is a connection form in which the anode of the diode is connected to the source of the MOSFET and the cathode of the diode is connected to the drain of the MOSFET.
  • FIG. 1 exemplifies a MOSFET as the semiconductor switching element 6a, but the present invention is not limited to this.
  • An insulated gate bipolar transistor (IGBT) may be used instead of the MOSFET.
  • a motor 52 as a load is connected to the output terminal of the inverter circuit 2 .
  • the control unit 4 generates a control signal CS for controlling the semiconductor switching element 6a and outputs it to the gate drive circuit 3.
  • the gate drive circuit 3 generates a drive signal GS for driving the semiconductor switching element 6a based on the control signal CS and outputs the drive signal GS to the inverter circuit 2 .
  • the semiconductor switching element 6a performs a switching operation according to the drive signal GS, converts the DC power supplied from the DC power supply 50 into AC power, and drives the motor 52.
  • the inverter circuit 2 has legs 6A, 6B and 6C, as shown in FIG. Leg 6A, leg 6B, and leg 6C are connected in parallel with each other between DC bus 16 and DC bus 17 .
  • the leg 6A is a series circuit portion in which a U-phase upper arm semiconductor switching element 6UP and a U-phase lower arm semiconductor switching element 6UN are connected in series.
  • the leg 6B is a series circuit portion in which a V-phase upper arm semiconductor switching element 6VP and a V-phase lower arm semiconductor switching element 6VN are connected in series.
  • the leg 6C is a series circuit portion in which the W-phase upper arm semiconductor switching element 6WP and the W-phase lower arm semiconductor switching element 6WN are electrically connected in series. That is, the inverter circuit 2 is a bridge circuit including three legs that are series circuit portions.
  • motor 52 which is the load, is a three-phase motor in FIGS. 1 and 2, it is not limited to this.
  • Motor 52 may be a single-phase motor. If the motor 52 is a single phase motor, a single phase inverter circuit is used.
  • the single-phase inverter circuit has a configuration including a single-phase bridge circuit including two legs that are series circuit portions.
  • the load is a motor, but it is not limited to this.
  • the load may be a rechargeable battery.
  • a DCDC (Direct Current to Direct Current) converter is used instead of the inverter circuit 2 .
  • the minimum configuration of a DCDC converter is a half bridge circuit with one leg.
  • the semiconductor switching element 6a which is a MOSFET, has a drain electrode 61, a gate electrode 62 and a source electrode 63.
  • the semiconductor switching element 6a is housed in an electrically insulating case to form a semiconductor element module 6.
  • the semiconductor device module 6 has a drain main terminal 64 , a source main terminal 65 , a gate terminal 66 , a first source terminal 67 and a second source terminal 68 .
  • the drain main terminal 64 is connected to the drain electrode 61 of the semiconductor switching element 6a.
  • the gate terminal 66 is connected to the gate electrode 62 of the semiconductor switching element 6a.
  • the first source terminal 67 is connected to the source electrode 63 of the semiconductor switching element 6a.
  • a second source terminal 68 is connected to the source main terminal 65 of the semiconductor element module 6 .
  • An inductance 69 is shown between the source electrode 63 and the source main terminal 65 .
  • An inductance 69 is an inductance parasitic between the source electrode 63 and the source main terminal 65 .
  • the first source terminal 67 is connected to the source electrode 63 and the second source terminal 68 is connected to the source main terminal 65 . Therefore, the inductance 69 may be rephrased as "a parasitic inductance between the first source terminal 67 and the second source terminal 68".
  • the semiconductor switching element 6a may be an IGBT.
  • the semiconductor switching element 6a has a gate electrode, a collector electrode instead of a drain electrode, and an emitter electrode instead of a source electrode. If the type of the semiconductor switching element 6a is different, the names of some electrodes in the semiconductor switching element 6a and some terminals in the semiconductor element module 6 also change, but the effect obtained in the power converter 1 of the present disclosure does not change. . Therefore, in the following description, the description “drain electrode” may include the meaning of “collector electrode”, and the description “source electrode” may include the meaning of "emitter electrode”. Similarly, the description “drain main terminal” may include the meaning of "collector main terminal”, and the descriptions “source main terminal” and “source terminal” may include “emitter main terminal” and “emitter terminal”. ” may be included.
  • the drain main terminal 64 and the source main terminal 65 of the semiconductor element module 6 are connected to a load, a power capacitor, a reactor, or another module.
  • the semiconductor switching element 6a switches between an ON state and an OFF state according to the electric signal to perform switching operation.
  • the power converter 1 performs power conversion processing.
  • the gate drive circuit 3 includes a gate driver 32, a feedback section 34, and a feedback intensity adjustment section 36, as shown in FIG.
  • One gate drive circuit 3 is provided for one semiconductor element module 6 .
  • the gate driver 32 is a drive unit that applies an electric signal between the gate terminal 66 and the source main terminal 65 to gate-drive the semiconductor switching element 6a.
  • the feedback section 34 is a circuit section that feeds back the voltage induced in the inductance 69 to the gate driver 32 .
  • the voltage induced in inductance 69 is the induced electromotive force generated between first source terminal 67 and second source terminal 68 .
  • the feedback intensity adjustment unit 36 is a circuit unit that individually adjusts the feedback intensity when the semiconductor switching element 6a is turned on and when it is turned off.
  • the feedback strength is the strength of the voltage that the feedback section 34 feeds back to the gate driver 32 . Detailed functions and operations of the feedback section 34 and the feedback intensity adjustment section 36 will be described later.
  • the gate driver 32 has a positive bias power supply 321 and a negative bias power supply 322 .
  • the positive bias power supply 321 and the negative bias power supply 322 are connected in series, and a midpoint 329 that is a connection point of the series connection is connected to one end of the feedback section 34 and one end of the feedback strength adjustment section 36 .
  • the other end of the feedback section 34 is connected to the first source terminal 67 and the other end of the feedback strength adjustment section 36 is connected to the second source terminal 68 .
  • an on-drive switch 323 is connected to the positive terminal of a positive bias power supply 321
  • an on-drive gate resistor 325 is connected to the tip of the on-drive switch 323
  • An off-drive switch 324 is connected to the negative electrode of the negative bias power supply 322
  • an off-drive gate resistor 326 is connected to the tip of the off-drive switch 324 .
  • a connection point between the on-drive gate resistor 325 and the off-drive gate resistor 326 is connected to the gate terminal 66 of the semiconductor element module 6 .
  • the connection order of the on-drive switch 323 and the on-drive gate resistor 325 may be reversed, and the connection order of the off-drive switch 324 and the off-drive gate resistor 326 may be reversed. It may be.
  • the feedback section 34 is composed of a resistive element 341 .
  • One end of resistive element 341 is connected to midpoint 329 and the other end of resistive element 341 is connected to first source terminal 67 .
  • the feedback strength adjustment section 36 has a diode element 361 and a resistance element 363 .
  • the diode element 361 and the resistance element 363 are connected in series to form a series circuit.
  • this series circuit is appropriately called a "first series circuit”.
  • the feedback strength adjustment section 36 has a diode element 362 and a resistance element 364 .
  • the diode element 362 and the resistance element 364 are connected in series to form a series circuit.
  • this series circuit is appropriately called a "second series circuit”. These first and second series circuits are connected in parallel with each other.
  • the diode element 361 should be connected in a direction in which current flows through the diode element 361 when the potential of the middle point 329 is higher than the potential of the second source terminal 68 . Therefore, the connection order of the diode element 361 and the resistance element 363 may be reversed.
  • the diode element 362 may be connected in a direction in which current flows through the diode element 362 when the potential of the middle point 329 is lower than the potential of the second source terminal 68 . Therefore, the connection order of the diode element 362 and the resistance element 364 may be reversed.
  • the gate driver 32 has a processor 328 .
  • a processor 328 As the processor 328, a CPLD (Complex Programmable Logic Device), an ASIC (Application Specific Integrated Circuit), or a logic IC can be used.
  • the processor 328 controls the opening and closing of the ON drive switch 323 and the opening and closing of the OFF drive switch 324 .
  • the on-drive switch 323 When the on-drive switch 323 is closed and the off-drive switch 324 is open, the voltage from the positive bias power supply 321 is applied to the gate terminal 66 of the semiconductor element module 6 via the on-drive gate resistor 325 . As a result, the semiconductor switching element 6 a is turned on, and a drain current Id flows between the drain main terminal 64 and the source main terminal 65 . When the semiconductor switching element 6a is used in the power conversion main circuit, this drain current Id is also called main circuit current.
  • the negative bias power supply 322 is applied to the gate terminal 66 of the semiconductor element module 6 via the off-drive gate resistor 326 .
  • the semiconductor switching element 6a is turned off.
  • the feedback section 34 and the feedback intensity adjustment section 36 are components outside the gate driver 32, but the configuration is not limited to this.
  • the feedback section 34 and the feedback strength adjustment section 36 may be incorporated inside the gate driver 32 .
  • only the feedback section 34 may be incorporated inside the gate driver 32 .
  • FIG. 4 is a diagram for explaining the operation when the semiconductor switching element 6a is turned on by the gate drive circuit 3 of the first embodiment.
  • FIG. 5 is a diagram showing an example of operation waveforms when the semiconductor switching element 6a is turned on by the gate drive circuit 3 of the first embodiment.
  • a drain current Id flows through the semiconductor switching element 6a.
  • the drain current Id is indicated by a thick solid line.
  • an induced electromotive force ⁇ V is generated in the inductance 69 according to the current change rate (dId/dt) at turn-on.
  • the induced electromotive force ⁇ V can be expressed by the following equation (1).
  • Ls is the value of the inductance 69, that is, the inductance value of the inductance 69.
  • the induced electromotive force ⁇ V has a polarity that hinders the change in the drain current Id. Therefore, the potential of the first source terminal 67 is higher than the potential of the second source terminal 68 when turned on.
  • a gate current Ig flows immediately before the semiconductor switching element 6a turns on. Further, when the semiconductor switching element 6a is turned on, a return current Ia caused by the induced electromotive force ⁇ V flows.
  • the gate current Ig is indicated by a thick dashed line
  • the return current Ia is indicated by a thick dashed-dotted line. As shown, the gate current Ig starts from the positive bias power supply 321 and flows through the on-drive switch 323, the on-drive gate resistance 325, the semiconductor switching element 6a, and the resistance element 341.
  • the return current Ia starts from the inductance 69 and flows through the resistance element 341 of the feedback section 34 , the diode element 361 , and the resistance element 363 of the feedback strength adjustment section 36 . Since the polarity of the induced electromotive force ⁇ V at turn-on is positive, no current flows to the diode element 362 side.
  • V0 is the potential of the midpoint 329
  • Rfb is the resistance value of the resistance element 341
  • RaON is the resistance value of the resistance element 363.
  • the above formula (3) can also be expressed as the following formulas (4) and (5).
  • the voltage Vs of the first source terminal 67 at turn-on can be derived by transforming the equations in the following procedure.
  • FIG. 5 shows the waveforms of the gate-source voltage Vgs, the drain current Id, and the drain-source voltage Vds in order from the top.
  • the dashed line represents the operation waveform when only the feedback section 34 is provided and the feedback strength adjustment section 36 is not provided
  • the solid line indicates the operation when both the feedback section 34 and the feedback strength adjustment section 36 are provided.
  • the state of change in the portion surrounded by the dashed ellipse is schematically shown with respect to the operation waveform of the gate-source voltage Vgs.
  • the semiconductor switching element 6a when the semiconductor switching element 6a is turned on, an induced electromotive force ⁇ V is generated in the inductance 69 according to the current change rate (dId/dt) of the drain current Id. Due to this induced electromotive force ⁇ V, the source potential, which is the potential of the source main terminal 65, rises above the potential V0 of the midpoint 329, and as a result, the gate-source voltage Vgs decreases. That is, when the gate drive circuit 3 has the feedback strength adjustment section 36, the gate-source voltage Vgs is lower than when the feedback strength adjustment section 36 is not provided.
  • the current change rate (dId/dt) of the drain current Id immediately before recovery decreases, so that the ringing of the drain current Id decreases as shown in FIG.
  • "immediately before recovery” means immediately before the recovery current flows through the other arm of the same leg.
  • the arm to be driven is the semiconductor switching element 6UN of the lower arm
  • the other arm of the same leg is the semiconductor switching element 6UP of the upper arm.
  • FIG. 6 is a diagram for explaining the operation when the semiconductor switching element 6a is turned off by the gate drive circuit 3 of the first embodiment.
  • FIG. 7 is a diagram showing an example of operation waveforms when the semiconductor switching element 6a is turned off by the gate drive circuit 3 of the first embodiment.
  • the semiconductor switching element 6a When the semiconductor switching element 6a is turned off, the drain current Id flowing through the semiconductor switching element 6a stops flowing. At this time, the inductance 69 generates an induced electromotive force ⁇ V represented by the above equation (1). However, since the induced electromotive force ⁇ V has a polarity that hinders the change in the drain current Id, it is opposite to that at turn-on. Therefore, the potential of the first source terminal 67 at turn-off is lower than the potential of the second source terminal 68 .
  • the gate current Ig flows in the direction opposite to that in FIG. 4 in order to discharge the charge accumulated in the gate of the semiconductor switching element 6a.
  • the gate current Ig is indicated by a thick dashed line. As shown, the gate current Ig starts from the negative bias power supply 322 and flows along the path of the resistive element 341 , the semiconductor switching element 6 a , the off-drive gate resistor 326 , and the off-drive switch 324 .
  • a return current Ia caused by the induced electromotive force ⁇ V flows.
  • the return current Ia is indicated by a thick dashed-dotted line.
  • the direction in which return current Ia flows is opposite to that in FIG. Specifically, the return current Ia starts from the inductance 69 and flows along the path of the resistance element 364 of the feedback strength adjustment section 36 , the diode element 362 , and the resistance element 341 of the feedback section 34 . Since the polarity of the induced electromotive force ⁇ V at turn-off is negative, no current flows to the diode element 361 side.
  • the voltage Vs of the first source terminal 67 at the time of turn-off can be expressed by the following equation (7).
  • the procedure for formula derivation is the same as that at the time of turn-on, and detailed description thereof will be omitted.
  • Vs V0 ⁇ Ig ⁇ Rfb -( ⁇ V ⁇ Ig ⁇ Rfb) ⁇ Rfb/(RaOFF+Rfb) ⁇ (7)
  • FIG. 7 shows the waveforms of the gate-source voltage Vgs, the drain current Id, and the drain-source voltage Vds in order from the top.
  • the dashed line represents the operation waveform when only the feedback section 34 is provided and the feedback strength adjustment section 36 is not provided
  • the solid line indicates the operation when both the feedback section 34 and the feedback strength adjustment section 36 are provided.
  • the state of change in the portion surrounded by the dashed ellipse is schematically shown with respect to the operation waveform of the gate-source voltage Vgs.
  • the polarity of the induced electromotive force ⁇ V generated in the inductance 69 is negative when the semiconductor switching element 6a is turned off. Therefore, the source potential, which is the potential of the source main terminal 65, drops below the potential V0 of the midpoint 329, and as a result, the gate-source voltage Vgs rises. That is, when the gate drive circuit 3 has the feedback strength adjustment section 36, the gate-source voltage Vgs increases compared to the case where the feedback strength adjustment section 36 is not provided. As the gate-source voltage Vgs increases, the drain-source voltage Vds is clamped as shown in FIG. If the drain-source voltage Vds is clamped, the surge is also clamped. As a result, surge can be reduced as compared with the case where the feedback strength adjusting section 36 is not provided.
  • FIG. 8 is a diagram for explaining the effect of using the feedback strength adjusting section 36 of the first embodiment.
  • the upper part of FIG. 8 shows the relationship between the feedback strength and the degree of effect during the turn-on operation
  • the lower part of FIG. 8 shows the relationship between the feedback strength and the degree of effect during the turn-off operation.
  • the resistance value RaON of the resistance element 363 and the resistance value RaOFF of the resistance element 364 can be adjusted individually. As a result, it is possible to achieve a trade-off between the respective losses without being mutually dependent on the turn-on loss and the turn-off loss of the semiconductor switching element 6a.
  • a typical example of the semiconductor switching element 6a is a semiconductor switching element made of silicon (Si), but the present invention is not limited to this.
  • a wide bandgap element which is a semiconductor switching element formed of a wide bandgap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga 2 O 3 ), or diamond, can be used.
  • the semiconductor switching element 6a is a wide bandgap element
  • high-speed switching control is possible.
  • High-speed switching using a wide bandgap element can reduce switching loss.
  • surge and noise increase, so it is effective when used in the gate drive circuit 3 of the first embodiment.
  • the voltage resistance is high and the allowable current density is also high, so that the semiconductor element module 6 can be miniaturized.
  • the value of the induced electromotive force ⁇ V increases. Therefore, even if the inductance value of the inductance 69 is small, the necessary induced electromotive force ⁇ V can be obtained. As a result, the distance between the first source terminal 67 and the second source terminal 68 can be reduced, so that the semiconductor element module 6 can be further miniaturized.
  • the feedback strength which is the strength of the voltage fed back from the feedback section to the gate driver, is set independently when the semiconductor switching element is turned on and when it is turned off.
  • a feedback intensity adjustment unit configured to be adjustable to .
  • the feedback section can be configured by a resistive element. By using a resistance element, the feedback section can be configured simply and at low cost. Further, the feedback strength adjusting section can be configured by a series circuit of a resistance element and a diode element. By using a resistance element and a diode element, the feedback strength adjustment section can be configured simply and at low cost.
  • the series circuit of the feedback strength adjustment unit includes a first series circuit that adjusts the first feedback strength when the semiconductor switching element is turned on, and a second feedback strength when the semiconductor switching element is turned on. and a second series circuit. If the first and second series circuits are configured to be connected in parallel with each other, the first and second feedback strengths can be individually and independently adjusted. In addition, since the first series circuit and the second series circuit can be configured by connecting the diode elements of both in opposite directions to each other, parts can be shared, and the configuration can be simple and low cost. .
  • the resistance element of the feedback intensity adjustment section may be a variable resistance element whose resistance value can be adjusted.
  • each semiconductor switching element can be individually adjusted according to the state of deterioration of the semiconductor switching element. As a result, it is possible to optimize the surge, noise, and switching loss even during the operation of the power converter.
  • FIG. 9 is a diagram showing the detailed configuration of the gate drive circuit 3A of the second embodiment together with the semiconductor switching element 6a to be driven. Comparing the gate drive circuit 3A with the gate drive circuit 3 shown in FIG. 3, in FIG. 9, the feedback strength adjustment section 36 is replaced with a feedback strength adjustment section 36A. In the feedback strength adjusting section 36A, the resistive element 363 is replaced with a capacitive element 365, and the resistive element 364 is replaced with a capacitive element 366.
  • FIG. Other configurations are the same as or equivalent to those of the gate drive circuit 3 of FIG. 3, and the same or equivalent components are denoted by the same reference numerals, and overlapping descriptions are omitted.
  • the gate drive circuit 3 of Embodiment 1 since the gate current Ig flows through the feedback strength adjustment section 36 even during the mirror period, it also affects the change in the drain-source voltage Vds, which is the main voltage.
  • the mirror period is a period during which the gate-source voltage Vgs becomes flat during charging and discharging of the gate capacitance of the semiconductor switching element 6a.
  • the element for adjusting the feedback intensity is changed from the resistance element to the capacitive element.
  • This configuration prevents the gate current Ig from flowing to the feedback intensity adjusting section 36A during the mirror period.
  • the change of the circuit constant in the feedback strength adjusting section 36A does not affect the change of the drain-source voltage Vds.
  • the gate drive circuit 3A of the second embodiment in addition to the effects of the first embodiment, it is possible to obtain the effect of facilitating the change of the circuit constant in the feedback strength adjusting section 36A.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Power Conversion In General (AREA)

Abstract

This gate drive circuit (3) comprises: a gate driver (32) that applies an electric signal between a gate terminal (66) and a source main terminal (65) and gate drives a semiconductor switching element (6a); a feedback unit (34) that feeds back, to the gate driver (32), induced electromotive force generated between a first source terminal (67) and a second source terminal (68) by main circuit current flowing between a drain main terminal (64) and the source main terminal (65); and a feedback intensity adjustment unit (36) that is configured to be capable of adjusting feedback intensity, which is the intensity of the voltage fed back to the gate driver (32) from the feedback unit (34), separately when the semiconductor switching element (6a) is turned on and when the same is turned off.

Description

ゲート駆動回路及び電力変換装置Gate drive circuit and power converter
　本開示は、半導体スイッチング素子を駆動するゲート駆動回路、及びゲート駆動回路を備えた電力変換装置に関する。 The present disclosure relates to a gate drive circuit that drives semiconductor switching elements, and a power conversion device that includes the gate drive circuit.
　インバータ装置、サーボアンプ装置、スイッチング電源装置といった電力変換装置は、１個又は複数個の半導体スイッチング素子を有する電力変換主回路を備える。半導体スイッチング素子は、ゲート端子とソース主端子との間に印加される電気信号に応じて、ドレイン主端子とソース主端子との間の導通状態が変化する。ゲート駆動回路は、上位の制御器から指令信号を受け、半導体スイッチング素子のゲート端子とソース主端子との間に電気信号を印加して半導体スイッチング素子を駆動する。 A power conversion device such as an inverter device, a servo amplifier device, or a switching power supply device includes a power conversion main circuit having one or more semiconductor switching elements. In the semiconductor switching element, the conduction state between the drain main terminal and the source main terminal changes according to the electric signal applied between the gate terminal and the source main terminal. The gate drive circuit receives a command signal from a higher-level controller and applies an electric signal between the gate terminal and the source main terminal of the semiconductor switching element to drive the semiconductor switching element.
　下記特許文献１には、半導体スイッチング素子のソース制御端子とソース主端子との間に存在し得るインダクタンスに発生する電圧を検出し、その検出値に基づいて、ゲート駆動電圧又はゲート駆動抵抗を可変させる制御を行うゲート駆動回路が開示されている。 Patent Document 1 below describes detecting a voltage generated in an inductance that may exist between a source control terminal and a source main terminal of a semiconductor switching element, and varying a gate driving voltage or a gate driving resistance based on the detected value. A gate drive circuit is disclosed that provides control to allow
特開２００７－２２８７６９号公報JP 2007-228769 A
　近年、特に電力用の半導体素子モジュールの分野では、半導体スイッチング素子の高速スイッチングに関する要求が高まっている。一方、半導体スイッチング素子のスイッチング速度を高速化すると様々な問題が生じる。 In recent years, especially in the field of semiconductor element modules for electric power, the demand for high-speed switching of semiconductor switching elements has increased. On the other hand, increasing the switching speed of semiconductor switching elements causes various problems.
　例えば、ターンオン時のスイッチング速度を高速化すると大きなリンギングが生じ、そのリンギングがノイズ発生の要因となる。また、このリンギングにより、同一レグの他方のアームに流れるリカバリ電流に起因するリカバリサージが発生し、リカバリサージが素子耐圧を超えると素子が損傷するおそれがある。また、ターンオフ時のスイッチング速度を高速化すると、自身のアームにサージが発生し、サージが素子耐圧を超えると素子が損傷するおそれがある。 For example, increasing the switching speed at turn-on causes large ringing, which causes noise. Moreover, due to this ringing, a recovery surge is generated due to a recovery current flowing in the other arm of the same leg, and if the recovery surge exceeds the withstand voltage of the device, the device may be damaged. Moreover, if the switching speed at turn-off is increased, a surge occurs in the arm itself, and if the surge exceeds the withstand voltage of the device, the device may be damaged.
　素子の損傷は、スイッチング速度を遅くすることで対策可能であるが、その場合、スイッチング損失が大きくなる。即ち、サージ及びノイズとスイッチング損失とは、トレードオフの関係にある。 Damage to the element can be dealt with by slowing the switching speed, but in that case the switching loss will increase. That is, there is a trade-off relationship between surge and noise and switching loss.
　特許文献１の手法を用いれば、半導体スイッチング素子の高速駆動は可能になる。しかしながら、特許文献１の手法では、トレードオフの関係にあるサージ及びノイズとスイッチング損失とを適正化できないという課題がある。 By using the method of Patent Document 1, it is possible to drive semiconductor switching elements at high speed. However, the technique of Patent Literature 1 has a problem that the surge, noise, and switching loss, which are in a trade-off relationship, cannot be optimized.
　本開示は、上記に鑑みてなされたものであって、トレードオフの関係にあるサージ及びノイズとスイッチング損失とを適正化して、半導体スイッチング素子を駆動できるゲート駆動回路を得ることを目的とする。 The present disclosure has been made in view of the above, and aims to obtain a gate drive circuit capable of driving a semiconductor switching element by optimizing the surge and noise, which are in a trade-off relationship, and switching loss.
　上述した課題を解決し、目的を達成するため、本開示に係るゲート駆動回路は、ドレイン主端子、ゲート端子、ソース主端子、第１及び第２のソース端子を備えた半導体素子モジュールを駆動するゲート駆動回路である。半導体スイッチング素子は、ゲート電極、ドレイン電極及びソース電極を有する。ドレイン主端子はドレイン電極に接続され、ゲート端子はゲート電極に接続される。ソース主端子及び第１のソース端子はソース電極に接続され、第２のソース端子はソース主端子に接続される。ゲート駆動回路は、ゲートドライバと、帰還部と、帰還強度調整部とを備える。ゲートドライバは、ゲート端子とソース主端子との間に電気信号を印加して半導体スイッチング素子をゲート駆動する。帰還部は、ドレイン主端子とソース主端子との間に流れる主回路電流によって第１のソース端子と第２のソース端子との間に発生する誘導起電力をゲートドライバにフィードバックする。帰還強度調整部は、帰還部からゲートドライバにフィードバックする電圧の強度であるフィードバック強度を半導体スイッチング素子がオンするときと、オフするときとで個別に調整可能に構成される。 To solve the above-described problems and achieve the object, the gate drive circuit according to the present disclosure drives a semiconductor device module having a drain main terminal, a gate terminal, a source main terminal, and first and second source terminals. It is a gate drive circuit. A semiconductor switching element has a gate electrode, a drain electrode and a source electrode. The drain main terminal is connected to the drain electrode and the gate terminal is connected to the gate electrode. The source main terminal and the first source terminal are connected to the source electrode, and the second source terminal is connected to the source main terminal. The gate drive circuit includes a gate driver, a feedback section, and a feedback intensity adjustment section. The gate driver applies an electric signal between the gate terminal and the source main terminal to gate-drive the semiconductor switching element. The feedback unit feeds back to the gate driver an electromotive force induced between the first source terminal and the second source terminal by a main circuit current flowing between the drain main terminal and the source main terminal. The feedback strength adjustment section is configured to be able to individually adjust the feedback strength, which is the strength of the voltage fed back from the feedback section to the gate driver, when the semiconductor switching element is turned on and when it is turned off.
　本開示に係るゲート駆動回路によれば、トレードオフの関係にあるサージ及びノイズとスイッチング損失とを適正化して、半導体スイッチング素子を駆動できるという効果を奏する。 According to the gate drive circuit according to the present disclosure, there is an effect that the semiconductor switching element can be driven by optimizing the surge, noise, and switching loss, which are in a trade-off relationship.
実施の形態１のゲート駆動回路を含む電力変換装置の構成例を示す図1 is a diagram showing a configuration example of a power conversion device including a gate drive circuit according to Embodiment 1; FIG. 図１に示すインバータ回路の構成例を示す回路図A circuit diagram showing a configuration example of the inverter circuit shown in FIG. 実施の形態１のゲート駆動回路の詳細構成を駆動対象である半導体スイッチング素子と共に示す図FIG. 2 shows a detailed configuration of the gate drive circuit of the first embodiment together with semiconductor switching elements to be driven; 実施の形態１のゲート駆動回路による半導体スイッチング素子のターオン時の動作説明に供する図FIG. 4 is a diagram for explaining the operation of the semiconductor switching element when the gate drive circuit according to the first embodiment is turned on; 実施の形態１のゲート駆動回路による半導体スイッチング素子のターオン時の動作波形の例を示す図FIG. 4 shows an example of operation waveforms when the semiconductor switching element is turned on by the gate drive circuit of the first embodiment; 実施の形態１のゲート駆動回路による半導体スイッチング素子のターオフ時の動作説明に供する図FIG. 4 is a diagram for explaining the operation of the semiconductor switching element when the gate drive circuit according to the first embodiment is turned off; 実施の形態１のゲート駆動回路による半導体スイッチング素子のターオフ時の動作波形の例を示す図FIG. 4 shows an example of operation waveforms when the semiconductor switching element is turned off by the gate drive circuit of the first embodiment; 実施の形態１の帰還強度調整部を用いた場合の効果の説明に供する図FIG. 4 is a diagram for explaining the effect of using the feedback intensity adjustment unit of the first embodiment; 実施の形態２のゲート駆動回路の詳細構成を駆動対象である半導体スイッチング素子と共に示す図FIG. 10 is a diagram showing the detailed configuration of the gate drive circuit of the second embodiment together with semiconductor switching elements to be driven;
　以下に添付図面を参照し、本開示の実施の形態によるゲート駆動回路及び電力変換装置について詳細に説明する。なお、以下の実施の形態では、電力変換装置における電力変換主回路がインバータ回路である場合を例示して説明するが、他の種類又は用途の回路への適用を除外する趣旨ではない。電力変換主回路は、サーボアンプ回路、スイッチング電源回路又はコンバータ回路であってもよい。また、以下では、物理的な接続と電気的な接続とを区別せずに、単に「接続」と称して説明する。即ち、「接続」という文言は、構成要素同士が直接的に接続される場合と、構成要素同士が他の構成要素を介して間接的に接続される場合との双方を含んでいる。 A gate drive circuit and a power converter according to an embodiment of the present disclosure will be described below in detail with reference to the accompanying drawings. In the following embodiments, the case where the power conversion main circuit in the power converter is an inverter circuit will be described as an example, but it is not meant to exclude application to circuits of other types or uses. The power conversion main circuit may be a servo amplifier circuit, a switching power supply circuit, or a converter circuit. Also, hereinafter, physical connections and electrical connections are simply referred to as “connections” without distinguishing between them. That is, the term "connection" includes both cases in which components are directly connected to each other and cases in which components are indirectly connected to each other via other components.
実施の形態１．
　図１は、実施の形態１のゲート駆動回路３を含む電力変換装置１の構成例を示す図である。図２は、図１に示すインバータ回路２の構成例を示す回路図である。図３は、実施の形態１のゲート駆動回路３の詳細構成を駆動対象である半導体スイッチング素子６ａと共に示す図である。 Embodiment 1.
FIG. 1 is a diagram showing a configuration example of a power conversion device 1 including a gate drive circuit 3 according to Embodiment 1. As shown in FIG. FIG. 2 is a circuit diagram showing a configuration example of the inverter circuit 2 shown in FIG. FIG. 3 is a diagram showing the detailed configuration of the gate drive circuit 3 of the first embodiment together with the semiconductor switching element 6a to be driven.
　図１において、実施の形態による電力変換装置１は、インバータ回路２と、ゲート駆動回路３と、制御部４とを備える。インバータ回路２の入力端子には、直流電源５０が接続される。直流電源５０は、インバータ回路２に直流電圧を印加する直流電力の供給源であり、電源装置、コンバータ、電力用コンデンサなどが該当する。 In FIG. 1, the power conversion device 1 according to the embodiment includes an inverter circuit 2, a gate drive circuit 3, and a control section 4. A DC power supply 50 is connected to an input terminal of the inverter circuit 2 . The DC power supply 50 is a supply source of DC power for applying a DC voltage to the inverter circuit 2, and corresponds to a power supply device, a converter, a power capacitor, and the like.
　インバータ回路２は、直流電源５０から供給される直流電力を交流電力に変換する電力変換回路である。インバータ回路２は、少なくとも１つの半導体スイッチング素子６ａを有する。半導体スイッチング素子６ａの一例は、図１に示されるような、金属酸化膜半導体電界効果型トランジスタ（Ｍｅｔａｌ－Ｏｘｉｄｅ－Ｓｅｍｉｃｏｎｄｕｃｔｏｒ　Ｆｉｅｌｄ－Ｅｆｆｅｃｔ　Ｔｒａｎｓｉｓｔｏｒ：ＭＯＳＦＥＴ）である。ＭＯＳＦＥＴのソースとドレインとの間には、逆並列に接続されるダイオードが接続されている。ここで、逆並列とは、ダイオードのアノードがＭＯＳＦＥＴのソースに接続され、ダイオードのカソードがＭＯＳＦＥＴのドレインに接続される接続形態である。なお、図１では、半導体スイッチング素子６ａとして、ＭＯＳＦＥＴを例示しているが、これに限定されない。ＭＯＳＦＥＴに代えて、絶縁ゲートバイポーラトランジスタ（Ｉｎｓｕｌａｔｅｄ　Ｇａｔｅ　Ｂｉｐｏｌａｒ　Ｔｒａｎｓｉｓｔｏｒ：ＩＧＢＴ）を用いてもよい。 The inverter circuit 2 is a power conversion circuit that converts the DC power supplied from the DC power supply 50 into AC power. The inverter circuit 2 has at least one semiconductor switching element 6a. An example of the semiconductor switching element 6a is a metal-oxide-semiconductor field effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor: MOSFET) as shown in FIG. A diode connected in anti-parallel is connected between the source and the drain of the MOSFET. Here, anti-parallel is a connection form in which the anode of the diode is connected to the source of the MOSFET and the cathode of the diode is connected to the drain of the MOSFET. Note that FIG. 1 exemplifies a MOSFET as the semiconductor switching element 6a, but the present invention is not limited to this. An insulated gate bipolar transistor (IGBT) may be used instead of the MOSFET.
　インバータ回路２の出力端子には、負荷であるモータ５２が接続される。制御部４は、半導体スイッチング素子６ａを制御するための制御信号ＣＳを生成してゲート駆動回路３に出力する。ゲート駆動回路３は、制御信号ＣＳに基づいて、半導体スイッチング素子６ａを駆動するための駆動信号ＧＳを生成してインバータ回路２に出力する。インバータ回路２において、半導体スイッチング素子６ａは駆動信号ＧＳに従ってスイッチング動作し、直流電源５０から供給される直流電力を交流電力に変換してモータ５２を駆動する。 A motor 52 as a load is connected to the output terminal of the inverter circuit 2 . The control unit 4 generates a control signal CS for controlling the semiconductor switching element 6a and outputs it to the gate drive circuit 3. FIG. The gate drive circuit 3 generates a drive signal GS for driving the semiconductor switching element 6a based on the control signal CS and outputs the drive signal GS to the inverter circuit 2 . In the inverter circuit 2, the semiconductor switching element 6a performs a switching operation according to the drive signal GS, converts the DC power supplied from the DC power supply 50 into AC power, and drives the motor 52. FIG.
　インバータ回路２は、図２に示されるように、レグ６Ａ、レグ６Ｂ及びレグ６Ｃを有する。レグ６Ａ、レグ６Ｂ及びレグ６Ｃは、直流母線１６と直流母線１７との間において、互いに並列に接続されている。レグ６Ａは、Ｕ相の上アームの半導体スイッチング素子６ＵＰと下アームの半導体スイッチング素子６ＵＮとが直列に接続された直列回路部である。レグ６Ｂは、Ｖ相の上アームの半導体スイッチング素子６ＶＰと下アームの半導体スイッチング素子６ＶＮとが直列に接続された直列回路部である。レグ６Ｃは、Ｗ相の上アームの半導体スイッチング素子６ＷＰと下アームの半導体スイッチング素子６ＷＮとが電気的に直列に接続された直列回路部である。即ち、インバータ回路２は、直列回路部であるレグを３つ含むブリッジ回路である。 The inverter circuit 2 has legs 6A, 6B and 6C, as shown in FIG. Leg 6A, leg 6B, and leg 6C are connected in parallel with each other between DC bus 16 and DC bus 17 . The leg 6A is a series circuit portion in which a U-phase upper arm semiconductor switching element 6UP and a U-phase lower arm semiconductor switching element 6UN are connected in series. The leg 6B is a series circuit portion in which a V-phase upper arm semiconductor switching element 6VP and a V-phase lower arm semiconductor switching element 6VN are connected in series. The leg 6C is a series circuit portion in which the W-phase upper arm semiconductor switching element 6WP and the W-phase lower arm semiconductor switching element 6WN are electrically connected in series. That is, the inverter circuit 2 is a bridge circuit including three legs that are series circuit portions.
　なお、図１及び図２では、負荷であるモータ５２を三相モータとしているが、これに限定されない。モータ５２は、単相モータでもよい。モータ５２が単相モータである場合、単相インバータ回路が使用される。単相インバータ回路は、直列回路部であるレグを２つ含む単相ブリッジ回路を備える構成となる。 　In addition, although the motor 52, which is the load, is a three-phase motor in FIGS. 1 and 2, it is not limited to this. Motor 52 may be a single-phase motor. If the motor 52 is a single phase motor, a single phase inverter circuit is used. The single-phase inverter circuit has a configuration including a single-phase bridge circuit including two legs that are series circuit portions.
　また、図１及び図２では、負荷をモータとしているが、これに限定されない。負荷は充電可能な蓄電池であってもよい。負荷が蓄電池である場合、インバータ回路２に代えてＤＣＤＣ（Ｄｉｒｅｃｔ　Ｃｕｒｒｅｎｔ　ｔｏ　Ｄｉｒｅｃｔ　Ｃｕｒｒｅｎｔ）コンバータが用いられる。ＤＣＤＣコンバータの最小構成は、１つのレグを備えたハーフブリッジ回路である。 Also, in FIGS. 1 and 2, the load is a motor, but it is not limited to this. The load may be a rechargeable battery. When the load is a storage battery, a DCDC (Direct Current to Direct Current) converter is used instead of the inverter circuit 2 . The minimum configuration of a DCDC converter is a half bridge circuit with one leg.
　図３において、ＭＯＳＦＥＴである半導体スイッチング素子６ａは、ドレイン電極６１、ゲート電極６２及びソース電極６３を有する。半導体スイッチング素子６ａは電気的に絶縁性のあるケースに納められて、半導体素子モジュール６として構成されている。半導体素子モジュール６は、ドレイン主端子６４、ソース主端子６５、ゲート端子６６、第１のソース端子６７及び第２のソース端子６８を有する。 In FIG. 3, the semiconductor switching element 6a, which is a MOSFET, has a drain electrode 61, a gate electrode 62 and a source electrode 63. The semiconductor switching element 6a is housed in an electrically insulating case to form a semiconductor element module 6. As shown in FIG. The semiconductor device module 6 has a drain main terminal 64 , a source main terminal 65 , a gate terminal 66 , a first source terminal 67 and a second source terminal 68 .
　ドレイン主端子６４は、半導体スイッチング素子６ａのドレイン電極６１に接続されている。ゲート端子６６は、半導体スイッチング素子６ａのゲート電極６２に接続されている。第１のソース端子６７は、半導体スイッチング素子６ａのソース電極６３に接続されている。第２のソース端子６８は、半導体素子モジュール６のソース主端子６５に接続されている。 The drain main terminal 64 is connected to the drain electrode 61 of the semiconductor switching element 6a. The gate terminal 66 is connected to the gate electrode 62 of the semiconductor switching element 6a. The first source terminal 67 is connected to the source electrode 63 of the semiconductor switching element 6a. A second source terminal 68 is connected to the source main terminal 65 of the semiconductor element module 6 .
　ソース電極６３とソース主端子６５との間には、インダクタンス６９が示されている。インダクタンス６９は、ソース電極６３とソース主端子６５との間に寄生するインダクタンスである。なお、前述の通り、第１のソース端子６７はソース電極６３に接続され、第２のソース端子６８はソース主端子６５に接続されている。このため、インダクタンス６９は、「第１のソース端子６７と第２のソース端子６８との間に寄生するインダクタンス」と言い替えてもよい。 An inductance 69 is shown between the source electrode 63 and the source main terminal 65 . An inductance 69 is an inductance parasitic between the source electrode 63 and the source main terminal 65 . As described above, the first source terminal 67 is connected to the source electrode 63 and the second source terminal 68 is connected to the source main terminal 65 . Therefore, the inductance 69 may be rephrased as "a parasitic inductance between the first source terminal 67 and the second source terminal 68".
　前述の通り、半導体スイッチング素子６ａはＩＧＢＴであってもよい。この場合、半導体スイッチング素子６ａは、ゲート電極を有する一方で、ドレイン電極の代わりにコレクタ電極を有し、ソース電極の代わりにエミッタ電極を有する。半導体スイッチング素子６ａの種類が異なれば、半導体スイッチング素子６ａにおける一部の電極及び半導体素子モジュール６における一部の端子の名称も変化するが、本開示の電力変換装置１において得られる効果は変わらない。このため、以下の説明において、「ドレイン電極」との記載には「コレクタ電極」の意味を含む場合があり、「ソース電極」との記載には「エミッタ電極」の意味を含む場合がある。同様に、「ドレイン主端子」との記載には「コレクタ主端子」の意味を含む場合があり、「ソース主端子」及び「ソース端子」との記載には「エミッタ主端子」及び「エミッタ端子」の意味を含む場合がある。 As described above, the semiconductor switching element 6a may be an IGBT. In this case, the semiconductor switching element 6a has a gate electrode, a collector electrode instead of a drain electrode, and an emitter electrode instead of a source electrode. If the type of the semiconductor switching element 6a is different, the names of some electrodes in the semiconductor switching element 6a and some terminals in the semiconductor element module 6 also change, but the effect obtained in the power converter 1 of the present disclosure does not change. . Therefore, in the following description, the description "drain electrode" may include the meaning of "collector electrode", and the description "source electrode" may include the meaning of "emitter electrode". Similarly, the description "drain main terminal" may include the meaning of "collector main terminal", and the descriptions "source main terminal" and "source terminal" may include "emitter main terminal" and "emitter terminal". ” may be included.
　なお、図３では図示を省略しているが、半導体素子モジュール６のドレイン主端子６４及びソース主端子６５の先には、負荷、電力用コンデンサ、リアクトル、又は別のモジュールが接続される。半導体素子モジュール６のゲート端子６６とソース主端子６５との間に電気信号を印加すると、この電気信号に応じて、半導体スイッチング素子６ａは、オン状態とオフ状態とが切り替わり、スイッチング動作する。半導体スイッチング素子６ａのスイッチング動作により、電力変換装置１は電力の変換処理を行う。 Although not shown in FIG. 3, the drain main terminal 64 and the source main terminal 65 of the semiconductor element module 6 are connected to a load, a power capacitor, a reactor, or another module. When an electric signal is applied between the gate terminal 66 and the source main terminal 65 of the semiconductor element module 6, the semiconductor switching element 6a switches between an ON state and an OFF state according to the electric signal to perform switching operation. By the switching operation of the semiconductor switching element 6a, the power converter 1 performs power conversion processing.
　ゲート駆動回路３は、図３に示すように、ゲートドライバ３２と、帰還部３４と、帰還強度調整部３６とを備える。ゲート駆動回路３は、１つの半導体素子モジュール６に対して１つ設けられる。ゲートドライバ３２は、ゲート端子６６とソース主端子６５との間に電気信号を印加して半導体スイッチング素子６ａをゲート駆動する駆動部である。帰還部３４は、インダクタンス６９に誘起された電圧をゲートドライバ３２にフィードバックする回路部である。インダクタンス６９に誘起された電圧は、第１のソース端子６７と第２のソース端子６８との間に発生する誘導起電力である。帰還強度調整部３６は、フィードバック強度を半導体スイッチング素子６ａがオンするときと、オフするときとで個別に調整する回路部である。フィードバック強度は、帰還部３４がゲートドライバ３２にフィードバックする電圧の強度である。帰還部３４及び帰還強度調整部３６の詳細な機能及び動作については、後述する。 The gate drive circuit 3 includes a gate driver 32, a feedback section 34, and a feedback intensity adjustment section 36, as shown in FIG. One gate drive circuit 3 is provided for one semiconductor element module 6 . The gate driver 32 is a drive unit that applies an electric signal between the gate terminal 66 and the source main terminal 65 to gate-drive the semiconductor switching element 6a. The feedback section 34 is a circuit section that feeds back the voltage induced in the inductance 69 to the gate driver 32 . The voltage induced in inductance 69 is the induced electromotive force generated between first source terminal 67 and second source terminal 68 . The feedback intensity adjustment unit 36 is a circuit unit that individually adjusts the feedback intensity when the semiconductor switching element 6a is turned on and when it is turned off. The feedback strength is the strength of the voltage that the feedback section 34 feeds back to the gate driver 32 . Detailed functions and operations of the feedback section 34 and the feedback intensity adjustment section 36 will be described later.
　ゲートドライバ３２は、正バイアス電源３２１と、負バイアス電源３２２とを有する。正バイアス電源３２１と負バイアス電源３２２とは直列に接続され、直列接続の接続点である中点３２９は帰還部３４の一端と、帰還強度調整部３６の一端とに接続される。帰還部３４の他端は第１のソース端子６７に接続され、帰還強度調整部３６の他端は第２のソース端子６８に接続される。 The gate driver 32 has a positive bias power supply 321 and a negative bias power supply 322 . The positive bias power supply 321 and the negative bias power supply 322 are connected in series, and a midpoint 329 that is a connection point of the series connection is connected to one end of the feedback section 34 and one end of the feedback strength adjustment section 36 . The other end of the feedback section 34 is connected to the first source terminal 67 and the other end of the feedback strength adjustment section 36 is connected to the second source terminal 68 .
　ゲートドライバ３２において、正バイアス電源３２１の正極にはオン駆動用スイッチ３２３が接続され、オン駆動用スイッチ３２３の先にはオン駆動用ゲート抵抗３２５が接続される。負バイアス電源３２２の負極にはオフ駆動用スイッチ３２４が接続され、オフ駆動用スイッチ３２４の先にはオフ駆動用ゲート抵抗３２６が接続される。オン駆動用ゲート抵抗３２５とオフ駆動用ゲート抵抗３２６との接続点は、半導体素子モジュール６のゲート端子６６に接続される。なお、図３において、オン駆動用スイッチ３２３とオン駆動用ゲート抵抗３２５との接続順序は逆になっていてもよく、オフ駆動用スイッチ３２４とオフ駆動用ゲート抵抗３２６との接続順序は逆になっていてもよい。 In the gate driver 32 , an on-drive switch 323 is connected to the positive terminal of a positive bias power supply 321 , and an on-drive gate resistor 325 is connected to the tip of the on-drive switch 323 . An off-drive switch 324 is connected to the negative electrode of the negative bias power supply 322 , and an off-drive gate resistor 326 is connected to the tip of the off-drive switch 324 . A connection point between the on-drive gate resistor 325 and the off-drive gate resistor 326 is connected to the gate terminal 66 of the semiconductor element module 6 . In FIG. 3, the connection order of the on-drive switch 323 and the on-drive gate resistor 325 may be reversed, and the connection order of the off-drive switch 324 and the off-drive gate resistor 326 may be reversed. It may be.
　帰還部３４は、抵抗素子３４１により構成される。抵抗素子３４１の一端は中点３２９に接続され、抵抗素子３４１の他端は第１のソース端子６７に接続される。 The feedback section 34 is composed of a resistive element 341 . One end of resistive element 341 is connected to midpoint 329 and the other end of resistive element 341 is connected to first source terminal 67 .
　帰還強度調整部３６は、ダイオード素子３６１及び抵抗素子３６３を有する。ダイオード素子３６１と抵抗素子３６３とは直列に接続されて直列回路を構成する。本稿では、この直列回路を適宜「第１の直列回路」と呼ぶ。また、帰還強度調整部３６は、ダイオード素子３６２及び抵抗素子３６４を有する。ダイオード素子３６２と抵抗素子３６４とは直列に接続されて直列回路を構成する。本稿では、この直列回路を適宜「第２の直列回路」と呼ぶ。これらの第１及び第２の直列回路は、互いに並列に接続される。 The feedback strength adjustment section 36 has a diode element 361 and a resistance element 363 . The diode element 361 and the resistance element 363 are connected in series to form a series circuit. In this paper, this series circuit is appropriately called a "first series circuit". Also, the feedback strength adjustment section 36 has a diode element 362 and a resistance element 364 . The diode element 362 and the resistance element 364 are connected in series to form a series circuit. In this paper, this series circuit is appropriately called a "second series circuit". These first and second series circuits are connected in parallel with each other.
　第１の直列回路において、ダイオード素子３６１は、中点３２９の電位が第２のソース端子６８の電位よりも高いときに、ダイオード素子３６１に電流が流れる向きに接続されていればよい。従って、ダイオード素子３６１と抵抗素子３６３との接続順序は逆でもよい。 In the first series circuit, the diode element 361 should be connected in a direction in which current flows through the diode element 361 when the potential of the middle point 329 is higher than the potential of the second source terminal 68 . Therefore, the connection order of the diode element 361 and the resistance element 363 may be reversed.
　また、第２の直列回路において、ダイオード素子３６２は、中点３２９の電位が第２のソース端子６８の電位よりも低いときに、ダイオード素子３６２に電流が流れる向きに接続されていればよい。従って、ダイオード素子３６２と抵抗素子３６４との接続順序は逆でもよい。 Also, in the second series circuit, the diode element 362 may be connected in a direction in which current flows through the diode element 362 when the potential of the middle point 329 is lower than the potential of the second source terminal 68 . Therefore, the connection order of the diode element 362 and the resistance element 364 may be reversed.
　ゲートドライバ３２は、プロセッサ３２８を有する。プロセッサ３２８としては、ＣＰＬＤ（Ｃｏｍｐｌｅｘ　Ｐｒｏｇｒａｍｍａｂｌｅ　Ｌｏｇｉｃ　Ｄｅｖｉｃｅ）、ＡＳＩＣ（Ａｐｐｌｉｃａｔｉｏｎ　Ｓｐｅｃｉｆｉｃ　Ｉｎｔｅｇｒａｔｅｄ　Ｃｉｒｃｕｉｔ）又はロジックＩＣを用いることができる。プロセッサ３２８は、オン駆動用スイッチ３２３のオープン及びクローズ、並びにオフ駆動用スイッチ３２４のオープン及びクローズを制御する。 The gate driver 32 has a processor 328 . As the processor 328, a CPLD (Complex Programmable Logic Device), an ASIC (Application Specific Integrated Circuit), or a logic IC can be used. The processor 328 controls the opening and closing of the ON drive switch 323 and the opening and closing of the OFF drive switch 324 .
　オン駆動用スイッチ３２３がクローズし、オフ駆動用スイッチ３２４がオープンである場合、正バイアス電源３２１からの電圧がオン駆動用ゲート抵抗３２５を介して半導体素子モジュール６のゲート端子６６に印加される。これにより、半導体スイッチング素子６ａはオン状態となり、ドレイン主端子６４とソース主端子６５との間には、ドレイン電流Ｉｄが流れる。半導体スイッチング素子６ａが電力変換主回路に用いられる場合、このドレイン電流Ｉｄは、主回路電流とも呼ばれる。 When the on-drive switch 323 is closed and the off-drive switch 324 is open, the voltage from the positive bias power supply 321 is applied to the gate terminal 66 of the semiconductor element module 6 via the on-drive gate resistor 325 . As a result, the semiconductor switching element 6 a is turned on, and a drain current Id flows between the drain main terminal 64 and the source main terminal 65 . When the semiconductor switching element 6a is used in the power conversion main circuit, this drain current Id is also called main circuit current.
　また、オフ駆動用スイッチ３２４がクローズし、オン駆動用スイッチ３２３がオープンである場合、負バイアス電源３２２がオフ駆動用ゲート抵抗３２６を介して半導体素子モジュール６のゲート端子６６に印加される。これにより、半導体スイッチング素子６ａはオフ状態となる。 When the off-drive switch 324 is closed and the on-drive switch 323 is open, the negative bias power supply 322 is applied to the gate terminal 66 of the semiconductor element module 6 via the off-drive gate resistor 326 . As a result, the semiconductor switching element 6a is turned off.
　なお、図３では、帰還部３４及び帰還強度調整部３６をゲートドライバ３２の外部の構成要素としているが、この構成に限定されない。帰還部３４及び帰還強度調整部３６をゲートドライバ３２の内部に組み込んでもよい。また、帰還部３４のみをゲートドライバ３２の内部に組み込んでもよい。 In FIG. 3, the feedback section 34 and the feedback intensity adjustment section 36 are components outside the gate driver 32, but the configuration is not limited to this. The feedback section 34 and the feedback strength adjustment section 36 may be incorporated inside the gate driver 32 . Alternatively, only the feedback section 34 may be incorporated inside the gate driver 32 .
　次に、実施の形態１のゲート駆動回路３の動作について説明する。ここではまず、半導体スイッチング素子６ａがターンオンするときの動作について、図４及び図５を参照して説明する。図４は、実施の形態１のゲート駆動回路３による半導体スイッチング素子６ａのターオン時の動作説明に供する図である。図５は、実施の形態１のゲート駆動回路３による半導体スイッチング素子６ａのターオン時の動作波形の例を示す図である。 Next, the operation of the gate drive circuit 3 of Embodiment 1 will be described. First, the operation when the semiconductor switching element 6a is turned on will be described with reference to FIGS. 4 and 5. FIG. FIG. 4 is a diagram for explaining the operation when the semiconductor switching element 6a is turned on by the gate drive circuit 3 of the first embodiment. FIG. 5 is a diagram showing an example of operation waveforms when the semiconductor switching element 6a is turned on by the gate drive circuit 3 of the first embodiment.
　半導体スイッチング素子６ａがターンオンすると、半導体スイッチング素子６ａには、ドレイン電流Ｉｄが流れる。図４では、ドレイン電流Ｉｄを太実線で示している。ターンオンによってドレイン電流Ｉｄが流れ始めるとき、インダクタンス６９には、ターンオン時の電流変化率（ｄＩｄ／ｄｔ）に応じた誘導起電力ΔＶが生じる。誘導起電力ΔＶは、以下の（１）式で表せる。 When the semiconductor switching element 6a is turned on, a drain current Id flows through the semiconductor switching element 6a. In FIG. 4, the drain current Id is indicated by a thick solid line. When the drain current Id begins to flow due to turn-on, an induced electromotive force ΔV is generated in the inductance 69 according to the current change rate (dId/dt) at turn-on. The induced electromotive force ΔV can be expressed by the following equation (1).
　ΔＶ＝｜Ｌｓ×(ｄＩｄ／ｄｔ)｜…（１） ΔV=|Ls×(dId/dt)|...(1)
　上記（１）式において、Ｌｓはインダクタンス６９の値、即ちインダクタンス６９のインダクタンス値である。誘導起電力ΔＶは、ドレイン電流Ｉｄの変化を妨げる向きの極性となる。このため、ターンオン時における第１のソース端子６７の電位は、第２のソース端子６８の電位に対して高電位となる。 In the above equation (1), Ls is the value of the inductance 69, that is, the inductance value of the inductance 69. The induced electromotive force ΔV has a polarity that hinders the change in the drain current Id. Therefore, the potential of the first source terminal 67 is higher than the potential of the second source terminal 68 when turned on.
　半導体スイッチング素子６ａがターンオンする直前では、ゲート電流Ｉｇが流れる。また、半導体スイッチング素子６ａのターンオン時には、誘導起電力ΔＶに起因する還流電流Ｉａが流れる。図４では、ゲート電流Ｉｇを太破線で示し、還流電流Ｉａを太い一点鎖線で示している。ゲート電流Ｉｇは、図示のように、正バイアス電源３２１を起点に、オン駆動用スイッチ３２３、オン駆動用ゲート抵抗３２５、半導体スイッチング素子６ａ、抵抗素子３４１の経路で流れる。また、還流電流Ｉａは、インダクタンス６９を起点に、帰還部３４の抵抗素子３４１、ダイオード素子３６１、帰還強度調整部３６の抵抗素子３６３の経路で流れる。なお、ターンオン時における誘導起電力ΔＶの極性は正極性であるため、ダイオード素子３６２側には電流が流れない。 A gate current Ig flows immediately before the semiconductor switching element 6a turns on. Further, when the semiconductor switching element 6a is turned on, a return current Ia caused by the induced electromotive force ΔV flows. In FIG. 4, the gate current Ig is indicated by a thick dashed line, and the return current Ia is indicated by a thick dashed-dotted line. As shown, the gate current Ig starts from the positive bias power supply 321 and flows through the on-drive switch 323, the on-drive gate resistance 325, the semiconductor switching element 6a, and the resistance element 341. FIG. Also, the return current Ia starts from the inductance 69 and flows through the resistance element 341 of the feedback section 34 , the diode element 361 , and the resistance element 363 of the feedback strength adjustment section 36 . Since the polarity of the induced electromotive force ΔV at turn-on is positive, no current flows to the diode element 362 side.
　次に、ターンオン時における第１のソース端子６７の電圧Ｖｓを表す式について導出する。まず、電圧Ｖｓ及び誘導起電力ΔＶは、以下の（２）、（３）式で表すことができる。 Next, an equation representing the voltage Vs of the first source terminal 67 at turn-on will be derived. First, the voltage Vs and the induced electromotive force ΔV can be expressed by the following equations (2) and (3).
　Ｖｓ＝Ｖ０＋(Ｉｇ＋Ｉａ)・Ｒｆｂ…（２）
　ΔＶ＝(Ｉｇ＋Ｉａ)・Ｒｆｂ＋Ｉａ・ＲａＯＮ…（３） Vs=V0+(Ig+Ia)·Rfb (2)
ΔV=(Ig+Ia)·Rfb+Ia·RaON (3)
　上記（２）、（３）式において、Ｖ０は中点３２９の電位であり、Ｒｆｂは抵抗素子３４１の抵抗値であり、ＲａＯＮは抵抗素子３６３の抵抗値である。また、上記（３）式は、以下の（４）、（５）式のように表すこともできる。 In the above equations (2) and (3), V0 is the potential of the midpoint 329, Rfb is the resistance value of the resistance element 341, and RaON is the resistance value of the resistance element 363. The above formula (3) can also be expressed as the following formulas (4) and (5).
　(Ｉｇ＋Ｉａ)・Ｒｆｂ＝ΔＶ－Ｉａ・ＲａＯＮ…（４）
　Ｉａ＝(ΔＶ－Ｉｇ・Ｒｆｂ)／(ＲａＯＮ＋Ｒｆｂ)…（５） (Ig+Ia)・Rfb=ΔV−Ia・RaON (4)
Ia=(ΔV−Ig·Rfb)/(RaON+Rfb) (5)
　上記（２）、（４）、（５）式により、ターンオン時における第１のソース端子６７の電圧Ｖｓは、以下の手順の式変形で導出することができる。 From the above equations (2), (4), and (5), the voltage Vs of the first source terminal 67 at turn-on can be derived by transforming the equations in the following procedure.
　Ｖｓ＝Ｖ０＋ΔＶ－Ｉａ・ＲａＯＮ
　　　＝Ｖ０＋ΔＶ
　　　　－｛(ΔＶ－Ｉｇ・Ｒｆｂ)／(ＲａＯＮ＋Ｒｆｂ)｝・ＲａＯＮ
　　　＝Ｖ０＋ΔＶ
　　　　－｛ＲａＯＮ／(ＲａＯＮ＋Ｒｆｂ)｝・(ΔＶ－Ｉｇ・Ｒｆｂ)
　　　＝Ｖ０＋Ｉｇ・Ｒｆｂ＋ΔＶ－Ｉｇ・Ｒｆｂ
　　　　－｛ＲａＯＮ／(ＲａＯＮ＋Ｒｆｂ)｝・(ΔＶ－Ｉｇ・Ｒｆｂ)
　　　＝Ｖ０＋Ｉｇ・Ｒｆｂ
　　　　＋(ΔＶ－Ｉｇ・Ｒｆｂ)・｛１－ＲａＯＮ／(ＲａＯＮ＋Ｒｆｂ)｝
　　　＝Ｖ０＋Ｉｇ・Ｒｆｂ
　　　　＋(ΔＶ－Ｉｇ・Ｒｆｂ)・｛Ｒｆｂ／(ＲａＯＮ＋Ｒｆｂ)｝…（６） Vs=V0+ΔV−Ia·RaON
= V0 + ΔV
- {(ΔV-Ig Rfb)/(RaON+Rfb)} RaON
= V0 + ΔV
-{RaON/(RaON+Rfb)}・(ΔV−Ig・Rfb)
=V0+Ig.Rfb+.DELTA.V-Ig.Rfb
-{RaON/(RaON+Rfb)}・(ΔV−Ig・Rfb)
=V0+Ig.Rfb
+(ΔV−Ig・Rfb)・{1−RaON/(RaON+Rfb)}
=V0+Ig.Rfb
+(ΔV−Ig·Rfb)·{Rfb/(RaON+Rfb)} (6)
　図５には、上側から順に、ゲートソース間電圧Ｖｇｓ、ドレイン電流Ｉｄ及びドレインソース間電圧Ｖｄｓの波形が示されている。これらの各図において、破線は帰還部３４のみを有し、帰還強度調整部３６を有さない場合の動作波形を表し、実線は帰還部３４及び帰還強度調整部３６の双方を有する場合の動作波形を表している。また、図の右側には、ゲートソース間電圧Ｖｇｓの動作波形に関し、破線の楕円で囲んだ部分の変化の様子が模式的に示されている。 FIG. 5 shows the waveforms of the gate-source voltage Vgs, the drain current Id, and the drain-source voltage Vds in order from the top. In each of these figures, the dashed line represents the operation waveform when only the feedback section 34 is provided and the feedback strength adjustment section 36 is not provided, and the solid line indicates the operation when both the feedback section 34 and the feedback strength adjustment section 36 are provided. represents a waveform. Further, on the right side of the figure, the state of change in the portion surrounded by the dashed ellipse is schematically shown with respect to the operation waveform of the gate-source voltage Vgs.
　前述したように、半導体スイッチング素子６ａのターンオン時においては、ドレイン電流Ｉｄの電流変化率（ｄＩｄ／ｄｔ）に応じてインダクタンス６９に誘導起電力ΔＶが生じる。この誘導起電力ΔＶにより、ソース主端子６５の電位であるソース電位が中点３２９の電位Ｖ０よりも上昇し、その結果としてゲートソース間電圧Ｖｇｓが低下する。即ち、ゲート駆動回路３が帰還強度調整部３６を有する場合には、帰還強度調整部３６を有さない場合と比べて、ゲートソース間電圧Ｖｇｓが低下する。ゲートソース間電圧Ｖｇｓが低下することで、リカバリ直前のドレイン電流Ｉｄの電流変化率（ｄＩｄ／ｄｔ）が低下するため、図５に示すようにドレイン電流Ｉｄのリンギングが小さくなる。ここで言う「リカバリ直前」とは、同一レグの他方のアームにリカバリ電流が流れる直前という意味である。例えば図２において、駆動対象のアームが下アームの半導体スイッチング素子６ＵＮであるとすると、同一レグの他方のアームは、上アームの半導体スイッチング素子６ＵＰである。下アームの半導体スイッチング素子６ＵＮのリンギングが小さくなることで、このリンギングによるノイズを小さくすることができる。また、下アームの半導体スイッチング素子６ＵＮのリンギングが小さくなることで、同一レグの他方のアームである上アームの半導体スイッチング素子６ＵＰに流れるリカバリ電流によるリカバリサージを低減することができる。 As described above, when the semiconductor switching element 6a is turned on, an induced electromotive force ΔV is generated in the inductance 69 according to the current change rate (dId/dt) of the drain current Id. Due to this induced electromotive force ΔV, the source potential, which is the potential of the source main terminal 65, rises above the potential V0 of the midpoint 329, and as a result, the gate-source voltage Vgs decreases. That is, when the gate drive circuit 3 has the feedback strength adjustment section 36, the gate-source voltage Vgs is lower than when the feedback strength adjustment section 36 is not provided. As the gate-source voltage Vgs decreases, the current change rate (dId/dt) of the drain current Id immediately before recovery decreases, so that the ringing of the drain current Id decreases as shown in FIG. Here, "immediately before recovery" means immediately before the recovery current flows through the other arm of the same leg. For example, in FIG. 2, if the arm to be driven is the semiconductor switching element 6UN of the lower arm, the other arm of the same leg is the semiconductor switching element 6UP of the upper arm. By reducing the ringing of the semiconductor switching element 6UN of the lower arm, the noise caused by this ringing can be reduced. In addition, by reducing the ringing of the semiconductor switching element 6UN of the lower arm, it is possible to reduce the recovery surge due to the recovery current flowing through the semiconductor switching element 6UP of the upper arm, which is the other arm of the same leg.
　次に、半導体スイッチング素子６ａのターンオフ時における動作について、図６及び図７を参照して説明する。図６は、実施の形態１のゲート駆動回路３による半導体スイッチング素子６ａのターオフ時の動作説明に供する図である。図７は、実施の形態１のゲート駆動回路３による半導体スイッチング素子６ａのターオフ時の動作波形の例を示す図である。 Next, the operation when the semiconductor switching element 6a is turned off will be described with reference to FIGS. 6 and 7. FIG. FIG. 6 is a diagram for explaining the operation when the semiconductor switching element 6a is turned off by the gate drive circuit 3 of the first embodiment. FIG. 7 is a diagram showing an example of operation waveforms when the semiconductor switching element 6a is turned off by the gate drive circuit 3 of the first embodiment.
　半導体スイッチング素子６ａがターンオフすると、半導体スイッチング素子６ａに流れていたドレイン電流Ｉｄは、流れなくなる。このとき、インダクタンス６９には、上記（１）式で示される誘導起電力ΔＶが生じる。但し、誘導起電力ΔＶは、ドレイン電流Ｉｄの変化を妨げる向きの極性であるため、ターンオン時とは逆になる。従って、ターンオフ時における第１のソース端子６７の電位は、第２のソース端子６８の電位に対して低電位となる。 When the semiconductor switching element 6a is turned off, the drain current Id flowing through the semiconductor switching element 6a stops flowing. At this time, the inductance 69 generates an induced electromotive force ΔV represented by the above equation (1). However, since the induced electromotive force ΔV has a polarity that hinders the change in the drain current Id, it is opposite to that at turn-on. Therefore, the potential of the first source terminal 67 at turn-off is lower than the potential of the second source terminal 68 .
　半導体スイッチング素子６ａがターンオフする直前では、半導体スイッチング素子６ａのゲートに蓄積された電荷を放電させるため、図４とは逆向きのゲート電流Ｉｇが流れる。図６では、ゲート電流Ｉｇを太破線で示している。ゲート電流Ｉｇは、図示のように、負バイアス電源３２２を起点に、抵抗素子３４１、半導体スイッチング素子６ａ、オフ駆動用ゲート抵抗３２６、オフ駆動用スイッチ３２４の経路で流れる。 Immediately before the semiconductor switching element 6a turns off, the gate current Ig flows in the direction opposite to that in FIG. 4 in order to discharge the charge accumulated in the gate of the semiconductor switching element 6a. In FIG. 6, the gate current Ig is indicated by a thick dashed line. As shown, the gate current Ig starts from the negative bias power supply 322 and flows along the path of the resistive element 341 , the semiconductor switching element 6 a , the off-drive gate resistor 326 , and the off-drive switch 324 .
　また、半導体スイッチング素子６ａのターンオフ時には、誘導起電力ΔＶに起因する還流電流Ｉａが流れる。図６では、還流電流Ｉａを太い一点鎖線で示している。還流電流Ｉａの流れる向きは、図４とは逆である。具体的に還流電流Ｉａは、インダクタンス６９を起点に、帰還強度調整部３６の抵抗素子３６４、ダイオード素子３６２、帰還部３４の抵抗素子３４１の経路で流れる。なお、ターンオフ時における誘導起電力ΔＶの極性は負極性であるため、ダイオード素子３６１側には電流が流れない。 Also, when the semiconductor switching element 6a is turned off, a return current Ia caused by the induced electromotive force ΔV flows. In FIG. 6, the return current Ia is indicated by a thick dashed-dotted line. The direction in which return current Ia flows is opposite to that in FIG. Specifically, the return current Ia starts from the inductance 69 and flows along the path of the resistance element 364 of the feedback strength adjustment section 36 , the diode element 362 , and the resistance element 341 of the feedback section 34 . Since the polarity of the induced electromotive force ΔV at turn-off is negative, no current flows to the diode element 361 side.
　また、ターンオフ時における第１のソース端子６７の電圧Ｖｓは、以下の（７）式で表すことができる。なお、式導出の手順は、ターンオン時のときと同様であり、詳細な説明は省略する。 Also, the voltage Vs of the first source terminal 67 at the time of turn-off can be expressed by the following equation (7). The procedure for formula derivation is the same as that at the time of turn-on, and detailed description thereof will be omitted.
　Ｖｓ＝Ｖ０－Ｉｇ・Ｒｆｂ
　　　　－(ΔＶ－Ｉｇ・Ｒｆｂ)・｛Ｒｆｂ／(ＲａＯＦＦ＋Ｒｆｂ)｝…（７） Vs=V0−Ig·Rfb
-(ΔV−Ig·Rfb)·{Rfb/(RaOFF+Rfb)} (7)
　図７には、上側から順に、ゲートソース間電圧Ｖｇｓ、ドレイン電流Ｉｄ及びドレインソース間電圧Ｖｄｓの波形が示されている。これらの各図において、破線は帰還部３４のみを有し、帰還強度調整部３６を有さない場合の動作波形を表し、実線は帰還部３４及び帰還強度調整部３６の双方を有する場合の動作波形を表している。また、図の右側には、ゲートソース間電圧Ｖｇｓの動作波形に関し、破線の楕円で囲んだ部分の変化の様子が模式的に示されている。 FIG. 7 shows the waveforms of the gate-source voltage Vgs, the drain current Id, and the drain-source voltage Vds in order from the top. In each of these figures, the dashed line represents the operation waveform when only the feedback section 34 is provided and the feedback strength adjustment section 36 is not provided, and the solid line indicates the operation when both the feedback section 34 and the feedback strength adjustment section 36 are provided. represents a waveform. Further, on the right side of the figure, the state of change in the portion surrounded by the dashed ellipse is schematically shown with respect to the operation waveform of the gate-source voltage Vgs.
　前述したように、半導体スイッチング素子６ａのターンオフ時において、インダクタンス６９に生じる誘導起電力ΔＶの極性は負極性である。このため、ソース主端子６５の電位であるソース電位は、中点３２９の電位Ｖ０よりも下降し、その結果としてゲートソース間電圧Ｖｇｓが上昇する。即ち、ゲート駆動回路３が帰還強度調整部３６を有する場合には、帰還強度調整部３６を有さない場合と比べて、ゲートソース間電圧Ｖｇｓが増加する。ゲートソース間電圧Ｖｇｓが増加することで、図７に示すようにドレインソース間電圧Ｖｄｓがクランプされる。ドレインソース間電圧Ｖｄｓがクランプされれば、サージもクランプされる。これにより、帰還強度調整部３６を有さない場合と比べて、サージを低減することができる。 As described above, the polarity of the induced electromotive force ΔV generated in the inductance 69 is negative when the semiconductor switching element 6a is turned off. Therefore, the source potential, which is the potential of the source main terminal 65, drops below the potential V0 of the midpoint 329, and as a result, the gate-source voltage Vgs rises. That is, when the gate drive circuit 3 has the feedback strength adjustment section 36, the gate-source voltage Vgs increases compared to the case where the feedback strength adjustment section 36 is not provided. As the gate-source voltage Vgs increases, the drain-source voltage Vds is clamped as shown in FIG. If the drain-source voltage Vds is clamped, the surge is also clamped. As a result, surge can be reduced as compared with the case where the feedback strength adjusting section 36 is not provided.
　次に、帰還強度調整部３６によるフィードバック強度と、損失、ノイズ及びサージとの関係性について説明する。図８は、実施の形態１の帰還強度調整部３６を用いた場合の効果の説明に供する図である。図８の上段部には、ターンオン動作時のフィードバック強度と効果度合との関係が示され、図８の下段部には、ターンオフ動作時のフィードバック強度と効果度合との関係が示されている。 Next, the relationship between the feedback strength by the feedback strength adjusting section 36 and loss, noise, and surge will be described. FIG. 8 is a diagram for explaining the effect of using the feedback strength adjusting section 36 of the first embodiment. The upper part of FIG. 8 shows the relationship between the feedback strength and the degree of effect during the turn-on operation, and the lower part of FIG. 8 shows the relationship between the feedback strength and the degree of effect during the turn-off operation.
　図８の上段部に示すように、抵抗素子３６３の抵抗値ＲａＯＮを大きくすると、ターンオン損失は小さくなるが、ノイズ及びリカバリサージは大きくなる。逆に、抵抗素子３６３の抵抗値ＲａＯＮを小さくすると、ターンオン損失は大きくなるが、ノイズ及びリカバリサージは小さくなる。従って、抵抗素子３６３の抵抗値ＲａＯＮを適正な値に設定すれば、ターンオン損失とノイズ及びリカバリサージとの間のトレードオフを図ることが可能となる。 As shown in the upper part of FIG. 8, increasing the resistance value RaON of the resistance element 363 reduces turn-on loss, but increases noise and recovery surge. Conversely, when the resistance value RaON of the resistance element 363 is decreased, the turn-on loss increases, but noise and recovery surge decrease. Therefore, by setting the resistance value RaON of the resistance element 363 to an appropriate value, it is possible to achieve a trade-off between the turn-on loss and the noise and recovery surge.
　また、図８の下段部に示すように、抵抗素子３６４の抵抗値ＲａＯＦＦを大きくすると、ターンオフ損失は小さくなるが、サージは大きくなる。逆に、抵抗素子３６４の抵抗値ＲａＯＦＦを小さくすると、ターンオフ損失は大きくなるが、サージは小さくなる。従って、抵抗素子３６４の抵抗値ＲａＯＦＦを適正な値に設定すれば、ターンオフ損失とサージとの間のトレードオフを図ることが可能となる。 Also, as shown in the lower part of FIG. 8, when the resistance value RaOFF of the resistance element 364 is increased, the turn-off loss decreases, but the surge increases. Conversely, when the resistance value RaOFF of the resistance element 364 is decreased, the turn-off loss increases, but the surge decreases. Therefore, by setting the resistance value RaOFF of the resistance element 364 to an appropriate value, it is possible to achieve a trade-off between the turn-off loss and the surge.
　また、抵抗素子３６３の抵抗値ＲａＯＮと、抵抗素子３６４の抵抗値ＲａＯＦＦとは個別に調整することができる。これにより、半導体スイッチング素子６ａのターンオン損失とターンオフ損失とに相互に依存することなく、それぞれの損失間のトレードオフを図ることも可能となる。 Also, the resistance value RaON of the resistance element 363 and the resistance value RaOFF of the resistance element 364 can be adjusted individually. As a result, it is possible to achieve a trade-off between the respective losses without being mutually dependent on the turn-on loss and the turn-off loss of the semiconductor switching element 6a.
　なお、半導体スイッチング素子６ａの典型的な例は、珪素（Ｓｉ）を素材として形成される半導体スイッチング素子であるが、これに限定されない。炭化珪素（ＳｉＣ）、窒化ガリウム（ＧａＮ）、酸化ガリウム（Ｇａ２Ｏ３）、ダイヤモンドなどのワイドバンドギャップ半導体により形成される半導体スイッチング素子であるワイドバンドギャップ素子を用いることができる。 A typical example of the semiconductor switching element 6a is a semiconductor switching element made of silicon (Si), but the present invention is not limited to this. A wide bandgap element, which is a semiconductor switching element formed of a wide bandgap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga 2 O 3 ), or diamond, can be used.
　半導体スイッチング素子６ａがワイドバンドギャップ素子である場合、高速にスイッチング制御できる。ワイドバンドギャップ素子を用いて高速にスイッチングした場合、スイッチング損失を低減することができる。また、ワイドバンドギャップ素子を用いて高速にスイッチングした場合、サージ及びノイズが大きくなるので、実施の形態１のゲート駆動回路３に用いた場合に効果的である。更に、ワイドバンドギャップ素子を用いることで耐電圧性が高く、許容電流密度も高くなるため、半導体素子モジュール６の小型化が可能となる。 When the semiconductor switching element 6a is a wide bandgap element, high-speed switching control is possible. High-speed switching using a wide bandgap element can reduce switching loss. Also, when a wide bandgap element is used for high-speed switching, surge and noise increase, so it is effective when used in the gate drive circuit 3 of the first embodiment. Furthermore, by using a wide bandgap element, the voltage resistance is high and the allowable current density is also high, so that the semiconductor element module 6 can be miniaturized.
　また、ワイドバンドギャップ素子を用いて高速にスイッチングした場合、誘導起電力ΔＶの値が大きくなる。このため、インダクタンス６９のインダクタンス値を小さくしても、必要な誘導起電力ΔＶを得ることができる。これにより、第１のソース端子６７と第２のソース端子６８との間隔を小さくできるので、半導体素子モジュール６の更なる小型化が可能となる。 Also, when a wide bandgap element is used for high-speed switching, the value of the induced electromotive force ΔV increases. Therefore, even if the inductance value of the inductance 69 is small, the necessary induced electromotive force ΔV can be obtained. As a result, the distance between the first source terminal 67 and the second source terminal 68 can be reduced, so that the semiconductor element module 6 can be further miniaturized.
　以上説明したように、実施の形態１に係るゲート駆動回路によれば、帰還部からゲートドライバにフィードバックする電圧の強度であるフィードバック強度を半導体スイッチング素子がオンするときと、オフするときとで個別に調整可能に構成される帰還強度調整部を備える。この構成により、トレードオフの関係にあるサージ及びノイズとスイッチング損失とを適正化して、半導体スイッチング素子を駆動することが可能となる。 As described above, according to the gate drive circuit according to the first embodiment, the feedback strength, which is the strength of the voltage fed back from the feedback section to the gate driver, is set independently when the semiconductor switching element is turned on and when it is turned off. and a feedback intensity adjustment unit configured to be adjustable to . With this configuration, it is possible to drive the semiconductor switching element by optimizing the surge, noise, and switching loss, which are in a trade-off relationship.
　実施の形態１に係るゲート駆動回路において、帰還部は抵抗素子により構成することができる。抵抗素子を用いれば、帰還部を簡易且つ低コストで構成することができる。また、帰還強度調整部は、抵抗素子とダイオード素子との直列回路により構成することができる。抵抗素子及びダイオード素子を用いれば、帰還強度調整部を簡易且つ低コストで構成することができる。 In the gate drive circuit according to Embodiment 1, the feedback section can be configured by a resistive element. By using a resistance element, the feedback section can be configured simply and at low cost. Further, the feedback strength adjusting section can be configured by a series circuit of a resistance element and a diode element. By using a resistance element and a diode element, the feedback strength adjustment section can be configured simply and at low cost.
　また、帰還強度調整部の直列回路は、半導体スイッチング素子がオンするときの第１のフィードバック強度を調整する第１の直列回路と、半導体スイッチング素子がオンするときの第２のフィードバック強度を調整する第２の直列回路とを備えるように構成できる。第１及び第２の直列回路が互いに並列に接続されるように構成されていれば、第１及び第２のフィードバック強度を個別且つ独立に調整することができる。また、第１の直列回路と第２の直列回路とでは、両者のダイオード素子を互いに逆向きに接続することで構成できるので、部品の共通化が図れ、簡易且つ低コストで構成することができる。 Further, the series circuit of the feedback strength adjustment unit includes a first series circuit that adjusts the first feedback strength when the semiconductor switching element is turned on, and a second feedback strength when the semiconductor switching element is turned on. and a second series circuit. If the first and second series circuits are configured to be connected in parallel with each other, the first and second feedback strengths can be individually and independently adjusted. In addition, since the first series circuit and the second series circuit can be configured by connecting the diode elements of both in opposite directions to each other, parts can be shared, and the configuration can be simple and low cost. .
　なお、帰還強度調整部の抵抗素子は、抵抗値の調整が可能な可変抵抗素子であってもよい。帰還強度調整部の抵抗素子が可変抵抗素子である場合、半導体スイッチング素子の劣化状況に応じて、半導体スイッチング素子ごとに個別に調整することができる。これにより、サージ及びノイズとスイッチング損失との適正化を電力変換装置の運用中でも実施できるという効果が得られる。 It should be noted that the resistance element of the feedback intensity adjustment section may be a variable resistance element whose resistance value can be adjusted. When the resistance element of the feedback intensity adjustment section is a variable resistance element, each semiconductor switching element can be individually adjusted according to the state of deterioration of the semiconductor switching element. As a result, it is possible to optimize the surge, noise, and switching loss even during the operation of the power converter.
実施の形態２．
　図９は、実施の形態２のゲート駆動回路３Ａの詳細構成を駆動対象である半導体スイッチング素子６ａと共に示す図である。ゲート駆動回路３Ａを、図３に示すゲート駆動回路３と比較すると、図９では、帰還強度調整部３６が帰還強度調整部３６Ａに置き替えられている。帰還強度調整部３６Ａでは、抵抗素子３６３が容量素子３６５に置き替えられ、抵抗素子３６４が容量素子３６６に置き替えられている。その他の構成は、図３のゲート駆動回路３と同一又は同等であり、同一又は同等の構成部には同一の符号を付し、重複する説明は割愛する。 Embodiment 2.
FIG. 9 is a diagram showing the detailed configuration of the gate drive circuit 3A of the second embodiment together with the semiconductor switching element 6a to be driven. Comparing the gate drive circuit 3A with the gate drive circuit 3 shown in FIG. 3, in FIG. 9, the feedback strength adjustment section 36 is replaced with a feedback strength adjustment section 36A. In the feedback strength adjusting section 36A, the resistive element 363 is replaced with a capacitive element 365, and the resistive element 364 is replaced with a capacitive element 366. FIG. Other configurations are the same as or equivalent to those of the gate drive circuit 3 of FIG. 3, and the same or equivalent components are denoted by the same reference numerals, and overlapping descriptions are omitted.
　実施の形態１のゲート駆動回路３では、ミラー期間中もゲート電流Ｉｇが帰還強度調整部３６を通流するため、主電圧であるドレインソース間電圧Ｖｄｓの変化にも影響を与えていた。ここで、ミラー期間とは、半導体スイッチング素子６ａのゲート容量に対する充放電時にゲートソース間電圧Ｖｇｓがフラットになる期間である。 In the gate drive circuit 3 of Embodiment 1, since the gate current Ig flows through the feedback strength adjustment section 36 even during the mirror period, it also affects the change in the drain-source voltage Vds, which is the main voltage. Here, the mirror period is a period during which the gate-source voltage Vgs becomes flat during charging and discharging of the gate capacitance of the semiconductor switching element 6a.
　これに対し、実施の形態２のゲート駆動回路３Ａでは、フィードバック強度を調整する素子が抵抗素子から容量素子に変更されている。この構成により、ミラー期間中のゲート電流Ｉｇが帰還強度調整部３６Ａに流れるのが阻止される。その結果、帰還強度調整部３６Ａにおける回路定数の変更が、ドレインソース間電圧Ｖｄｓの変化に影響しないようになる。これにより、実施の形態２のゲート駆動回路３Ａによれば、実施の形態１の効果に加えて、帰還強度調整部３６Ａにおける回路定数の変更が容易になるという効果が得られる。 On the other hand, in the gate drive circuit 3A of Embodiment 2, the element for adjusting the feedback intensity is changed from the resistance element to the capacitive element. This configuration prevents the gate current Ig from flowing to the feedback intensity adjusting section 36A during the mirror period. As a result, the change of the circuit constant in the feedback strength adjusting section 36A does not affect the change of the drain-source voltage Vds. As a result, according to the gate drive circuit 3A of the second embodiment, in addition to the effects of the first embodiment, it is possible to obtain the effect of facilitating the change of the circuit constant in the feedback strength adjusting section 36A.
　なお、以上の実施の形態に示した構成は、一例を示すものであり、別の公知の技術と組み合わせることも可能であるし、実施の形態同士を組み合わせることも可能であるし、要旨を逸脱しない範囲で、構成の一部を省略、変更することも可能である。 It should be noted that the configurations shown in the above embodiments are merely examples, and can be combined with another known technique, or can be combined with other embodiments, or deviate from the gist of the invention. It is also possible to omit or change part of the configuration as long as it is not necessary.
　１　電力変換装置、２　インバータ回路、３，３Ａ　ゲート駆動回路、４　制御部、６　半導体素子モジュール、６ａ，６ＵＰ，６ＵＮ，６ＶＰ，６ＶＮ，６ＷＰ，６ＷＮ　半導体スイッチング素子、６Ａ，６Ｂ，６Ｃ　レグ、１６，１７　直流母線、３２　ゲートドライバ、３４　帰還部、３６，３６Ａ　帰還強度調整部、５０　直流電源、５２　モータ、６１　ドレイン電極、６２　ゲート電極、６３　ソース電極、６４　ドレイン主端子、６５　ソース主端子、６６　ゲート端子、６７　第１のソース端子、６８　第２のソース端子、６９　インダクタンス、３２１　正バイアス電源、３２２　負バイアス電源、３２３　オン駆動用スイッチ、３２４　オフ駆動用スイッチ、３２５　オン駆動用ゲート抵抗、３２６　オフ駆動用ゲート抵抗、３２８　プロセッサ、３２９　中点、３４１，３６３，３６４　抵抗素子、３６１，３６２　ダイオード素子、３６５，３６６　容量素子。 1 power converter, 2 inverter circuit, 3, 3A gate drive circuit, 4 control unit, 6 semiconductor element module, 6a, 6UP, 6UN, 6VP, 6VN, 6WP, 6WN semiconductor switching element, 6A, 6B, 6C leg, 16 , 17 DC bus, 32 gate driver, 34 feedback section, 36, 36A feedback strength adjustment section, 50 DC power supply, 52 motor, 61 drain electrode, 62 gate electrode, 63 source electrode, 64 drain main terminal, 65 source main terminal, 66 gate terminal, 67 first source terminal, 68 second source terminal, 69 inductance, 321 positive bias power supply, 322 negative bias power supply, 323 ON drive switch, 324 OFF drive switch, 325 ON drive gate resistor, 326 off-drive gate resistor, 328 processor, 329 middle point, 341, 363, 364 resistive elements, 361, 362 diode elements, 365, 366 capacitive elements.

Claims (9)

  1. 　ゲート電極、ドレイン電極及びソース電極を有する半導体スイッチング素子を備え、前記ドレイン電極に接続されるドレイン主端子、前記ゲート電極に接続されるゲート端子、前記ソース電極に接続されるソース主端子及び第１のソース端子、前記ソース主端子に接続される第２のソース端子を備えた半導体素子モジュールを駆動するゲート駆動回路であって、
    　前記ゲート端子と前記ソース主端子との間に電気信号を印加して前記半導体スイッチング素子をゲート駆動するゲートドライバと、
    　前記ドレイン主端子と前記ソース主端子との間に流れる主回路電流によって前記第１のソース端子と前記第２のソース端子との間に発生する誘導起電力を前記ゲートドライバにフィードバックする帰還部と、
    　前記帰還部から前記ゲートドライバにフィードバックする電圧の強度であるフィードバック強度を前記半導体スイッチング素子がオンするときと、オフするときとで個別に調整可能に構成される帰還強度調整部と、
    　を備えたことを特徴とするゲート駆動回路。     A semiconductor switching element having a gate electrode, a drain electrode and a source electrode, wherein a drain main terminal connected to the drain electrode, a gate terminal connected to the gate electrode, a source main terminal connected to the source electrode and a first and a second source terminal connected to the source main terminal, the gate drive circuit driving a semiconductor element module,
    a gate driver that gate-drives the semiconductor switching element by applying an electric signal between the gate terminal and the source main terminal;
    a feedback unit feeding back to the gate driver an electromotive force induced between the first source terminal and the second source terminal by a main circuit current flowing between the drain main terminal and the source main terminal; ,
    a feedback intensity adjustment unit configured to be able to individually adjust the feedback intensity, which is the intensity of the voltage fed back from the feedback unit to the gate driver, when the semiconductor switching element is turned on and when the semiconductor switching element is turned off;
    A gate drive circuit comprising:
  2. 　前記帰還部は、抵抗素子により構成される
    　ことを特徴とする請求項１に記載のゲート駆動回路。     2. The gate drive circuit according to claim 1, wherein the feedback section is composed of a resistive element.
  3. 　前記帰還強度調整部は、抵抗素子とダイオード素子との直列回路により構成される
    　ことを特徴とする請求項１又は２に記載のゲート駆動回路。     3. The gate drive circuit according to claim 1, wherein the feedback intensity adjustment section is configured by a series circuit of a resistance element and a diode element.
  4. 　前記帰還強度調整部における前記抵抗素子は、抵抗値の調整が可能な可変抵抗素子である
    　ことを特徴とする請求項３に記載のゲート駆動回路。     4. The gate drive circuit according to claim 3, wherein the resistance element in the feedback strength adjustment section is a variable resistance element whose resistance value can be adjusted.
  5. 　前記帰還強度調整部は、容量素子とダイオード素子との直列回路により構成される
    　ことを特徴とする請求項１又は２に記載のゲート駆動回路。     3. The gate drive circuit according to claim 1, wherein the feedback intensity adjustment section is configured by a series circuit of a capacitive element and a diode element.
  6. 　前記半導体スイッチング素子がオンするときの前記フィードバック強度を調整する前記直列回路である第１の直列回路と、
    　前記半導体スイッチング素子がオフするときの前記フィードバック強度を調整する前記直列回路である第２の直列回路と、
    　を備え、
    　前記第１及び第２の直列回路は互いに並列に接続され、前記第１の直列回路と前記第２の直列回路とでは、前記ダイオード素子が互いに逆向きに接続されている
    　ことを特徴とする請求項３から５の何れか１項に記載のゲート駆動回路。     a first series circuit which is the series circuit for adjusting the feedback intensity when the semiconductor switching element is turned on;
    a second series circuit which is the series circuit for adjusting the feedback intensity when the semiconductor switching element is turned off;
    with
    The first and second series circuits are connected in parallel with each other, and the diode elements of the first series circuit and the second series circuit are connected in opposite directions to each other. 6. The gate drive circuit according to any one of items 3 to 5.
  7. 　前記半導体スイッチング素子は、ワイドバンドギャップ半導体により形成されている
    　ことを特徴とする請求項１から６の何れか１項に記載のゲート駆動回路。     The gate drive circuit according to any one of claims 1 to 6, wherein the semiconductor switching element is made of a wide bandgap semiconductor.
  8. 　前記ワイドバンドギャップ半導体は、炭化珪素、窒化ガリウム、酸化ガリウム又はダイヤモンドである
    　ことを特徴とする請求項７に記載のゲート駆動回路。     8. The gate drive circuit according to claim 7, wherein the wide bandgap semiconductor is silicon carbide, gallium nitride, gallium oxide, or diamond.
  9. 　請求項１から８の何れか１項に記載のゲート駆動回路と、
    　前記ゲート駆動回路によって駆動される少なくとも１つの半導体スイッチング素子を有する電力変換主回路と、
    　を備えることを特徴とする電力変換装置。     A gate drive circuit according to any one of claims 1 to 8;
    a power conversion main circuit having at least one semiconductor switching element driven by the gate drive circuit;
    A power conversion device comprising:
PCT/JP2022/006413 2022-02-17 2022-02-17 Gate drive circuit and power conversion device WO2023157185A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2022/006413 WO2023157185A1 (en) 2022-02-17 2022-02-17 Gate drive circuit and power conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2022/006413 WO2023157185A1 (en) 2022-02-17 2022-02-17 Gate drive circuit and power conversion device

Publications (1)

Publication Number Publication Date
WO2023157185A1 true WO2023157185A1 (en) 2023-08-24

Family

ID=87577850

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2022/006413 WO2023157185A1 (en) 2022-02-17 2022-02-17 Gate drive circuit and power conversion device

Country Status (1)

Country Link
WO (1) WO2023157185A1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000089838A (en) * 1998-08-12 2000-03-31 Abb Ind Oy Control circuit
JP2012039460A (en) * 2010-08-09 2012-02-23 Honda Motor Co Ltd Device and method of driving semiconductor element
US20160301308A1 (en) * 2013-11-14 2016-10-13 Tm4 Inc. Compensation circuit, commutation cell and power converter controlling turn-on and turn-off of a power electronic switch
WO2016189585A1 (en) * 2015-05-22 2016-12-01 日産自動車株式会社 Power conversion device
JP2021150977A (en) * 2020-03-16 2021-09-27 株式会社豊田自動織機 Driver circuit and power conversion device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000089838A (en) * 1998-08-12 2000-03-31 Abb Ind Oy Control circuit
JP2012039460A (en) * 2010-08-09 2012-02-23 Honda Motor Co Ltd Device and method of driving semiconductor element
US20160301308A1 (en) * 2013-11-14 2016-10-13 Tm4 Inc. Compensation circuit, commutation cell and power converter controlling turn-on and turn-off of a power electronic switch
WO2016189585A1 (en) * 2015-05-22 2016-12-01 日産自動車株式会社 Power conversion device
JP2021150977A (en) * 2020-03-16 2021-09-27 株式会社豊田自動織機 Driver circuit and power conversion device

Similar Documents

Publication Publication Date Title
WO2012153836A1 (en) Switching circuit and semiconductor module
KR101050696B1 (en) Driving device for driving voltage driven element
US8363440B2 (en) Power conversion circuit having off-voltage control circuit
CN108809060B (en) Driving device and switching device
US9882465B2 (en) Commutation cell, power converter and compensation circuit having dynamically controlled voltage gains
KR20150140304A (en) Commutation cell and compensation circuit therefor
CN110401335B (en) Drive circuit, power module, and power conversion system
WO2019207977A1 (en) Gate drive circuit and gate drive method
JP2009011013A (en) Power conversion equipment
US20190181854A1 (en) Drive device
JP5619673B2 (en) Switching circuit and semiconductor module
CN113056864B (en) power conversion device
US12021517B2 (en) Gate driver with feed forward control of gate current
US11146163B2 (en) Switching device and method for controlling switching device
CN118077128A (en) Driving circuit for power semiconductor element, power semiconductor module, and power conversion device
WO2023157185A1 (en) Gate drive circuit and power conversion device
US11496041B2 (en) Gate drive device, gate drive method, power semiconductor module, and electric power conversion device
JP2001309670A (en) Driving circuit for inverter
WO2016030998A1 (en) Power conversion device, motor device, and inverter module
JP2009273244A (en) Switching circuit
US11271547B2 (en) Gate drive circuit, drive device, semiconductor device, and gate drive method
JP7508912B2 (en) Switching Circuit
JP7259570B2 (en) Drives and switching devices
JP6679967B2 (en) Driving device for semiconductor element
US20170141673A1 (en) Power semiconductor element driving circuit

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22927087

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE