WO2021197500A1

WO2021197500A1 - Semiconductor device and method for manufacturing same, and electronic device with semiconductor device

Info

Publication number: WO2021197500A1
Application number: PCT/CN2021/085753
Authority: WO
Inventors: 庞慰; 杨清瑞; 张孟伦
Original assignee: 诺思(天津)微系统有限责任公司
Priority date: 2020-04-03
Filing date: 2021-04-06
Publication date: 2021-10-07
Also published as: CN111564550B; CN111564550A; CN115498096A

Abstract

The present disclosure relates to a semiconductor device, comprising: a substrate, which is provided with a first side and a second side opposite each other in the thickness direction of the substrate; a first group of resonator units, which are provided on the first side of the substrate; and a second group of resonator units, which are provided on the second side of the substrate, wherein each group of resonator units comprises at least one resonator unit, and at least one of the first group of resonator units and the second group of resonator units is a group of bulk acoustic wave resonator units; and at least one of the first group of resonator units and the second group of resonator units comprises monocrystalline piezoelectric layers, and the monocrystalline piezoelectric layers are monocrystalline piezoelectric thin film layers. The present disclosure further relates to a method for manufacturing the semiconductor device, and an electronic device with the semiconductor device.

Description

Semiconductor device and manufacturing method thereof, and electronic equipment with semiconductor device

Technical field

The embodiments of the present disclosure relate to the field of semiconductors, and in particular to a semiconductor device and a manufacturing method thereof, and an electronic device having the semiconductor device.

Background technique

Bulk acoustic wave resonators and surface acoustic wave resonators are widely used in electronic devices such as filters. In the existing bulk acoustic wave or surface acoustic wave filter designs or products, only one side of the substrate is provided with a corresponding resonator unit (including electrical structures such as piezoelectric layers and electrodes). As the miniaturization trend of the radio frequency front end becomes more and more severe, the filter structure with a single-sided arrangement of resonators is not conducive to further reduction of the filter size.

On the other hand, the bulk acoustic wave filter and the surface acoustic wave filter have their own advantages. For example, the bulk acoustic wave filter performs better at high frequencies, while the surface acoustic wave filter performs better at low frequencies. Therefore, in In the radio frequency front-end system, two filters are often required to cooperate with each other to realize a multi-band filter bank (ie, a multiplexer). However, traditional bulk acoustic wave filters based on polycrystalline aluminum nitride piezoelectric materials and surface acoustic wave filters based on single crystal lithium niobate piezoelectric materials use different piezoelectric materials, structures and corresponding manufacturing processes, so , It is impossible to process two kinds of filters on one chip at the same time, which hinders the development of further miniaturization of the RF front-end.

Summary of the invention

In order to further reduce the lateral occupation area of electronic devices such as bulk acoustic wave filters and multiplexers, and facilitate the realization of a high degree of integration of the bulk acoustic wave filter and the surface acoustic wave filter, the present disclosure is proposed.

According to an aspect of the embodiments of the present disclosure, a semiconductor device is provided, including:

The substrate has a first side and a second side opposite in the thickness direction of the substrate;

The first set of resonator units are arranged on the first side of the substrate; and

The second group of resonator units are arranged on the second side of the substrate,

Wherein: each group of resonator units has at least one resonator unit, and the first group of resonator units and/or the second group of resonator units are bulk acoustic wave resonator units.

According to another aspect of the embodiments of the present disclosure, a method for manufacturing the above-mentioned semiconductor device is provided, which includes the steps:

A group of resonator units are respectively formed on both sides of the substrate, and each group of resonator units has at least one resonator unit.

According to another aspect of the embodiments of the present disclosure, there is provided an electronic device including the above-mentioned semiconductor device.

Description of the drawings

The following description and the accompanying drawings can better help understand these and other features and advantages in the various embodiments disclosed in the present disclosure. The same reference numerals in the figures always denote the same components, in which:

1A-1C are respectively a schematic cross-sectional view, a schematic top view, and a schematic bottom view of a semiconductor device according to an exemplary embodiment of the present disclosure, wherein the section can be taken along the line A1A2 in Figure 1B or along the line B1B2 in Figure 1C. Take the cross-sectional view of FIG. 1A. In FIG. 1A, the base of the upper single crystal acoustic resonator unit and the base of the lower single crystal acoustic resonator are respectively connected to the upper and lower sides of the middle base;

FIGS. 2-1 to 2-14 are schematic diagrams of a process flow of manufacturing the semiconductor device shown in FIG. 1A according to an exemplary embodiment of the present disclosure;

3 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, in which the substrate of the single crystal acoustic wave resonator is bonded to the other side of the substrate of the conventional bulk acoustic wave resonator (or polycrystalline acoustic wave resonator), Thus forming a double-sided bulk acoustic wave resonator structure;

FIGS. 3-1 to 3-6 are schematic diagrams of a process flow of manufacturing the semiconductor device shown in FIG. 3 according to an exemplary embodiment of the present disclosure;

4 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, in which a substrate of a single crystal acoustic wave resonator and a substrate of a conventional surface acoustic wave resonator are connected to each other through a bonding process;

5 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, wherein the upper side of the intermediate substrate is provided with a piezoelectric thin film surface acoustic wave resonator unit, and the lower side of the intermediate substrate is provided with a single crystal acoustic wave resonator unit ；

6 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, wherein the upper side of the intermediate substrate is provided with a piezoelectric thin film surface acoustic wave resonator unit, and the lower side of the intermediate substrate is provided with a single crystal acoustic wave resonator unit , And the piezoelectric film surface acoustic wave resonator unit is provided with a Bragg reflection layer;

7 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, in which a piezoelectric thin-film surface acoustic wave resonator unit is provided on the upper side of the substrate of the polycrystalline acoustic wave resonator unit;

8 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, wherein the upper side of the base of the polycrystalline acoustic wave resonator unit is provided with a piezoelectric thin film surface acoustic wave resonator unit, and the piezoelectric thin film acoustic surface The wave resonator unit is provided with a Bragg reflection layer.

Detailed ways

In the following, the technical solutions of the present disclosure will be further described in detail through the embodiments and in conjunction with the drawings. The following description of the embodiments of the present disclosure with reference to the accompanying drawings is intended to explain the general inventive concept of the present disclosure, and should not be construed as a limitation to the present disclosure.

In this disclosure, the piezoelectric layer material, based on different resonators, can be aluminum nitride (AlN), doped aluminum nitride (doped ALN), zinc oxide (ZnO), lead zirconate titanate (PZT), niobium Lithium oxide (LiNbO ₃ ), quartz (Quartz), potassium niobate (KNbO ₃ ) or lithium tantalate (LiTaO ₃ ) and other materials, where the doped ALN contains at least one rare earth element, such as scandium (Sc), yttrium (Y ), magnesium (Mg), titanium (Ti), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd) ), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), etc.

1A-1C are respectively a schematic cross-sectional view, a schematic top view, and a schematic bottom view of a semiconductor device according to an exemplary embodiment of the present disclosure, wherein the section can be taken along the line A1A2 in Figure 1B or along the line B1B2 in Figure 1C. The cross-sectional view of FIG. 1A is obtained. In FIG. 1A, the base of the upper single crystal acoustic resonator unit and the base of the lower single crystal acoustic resonator are respectively connected to the upper and lower sides of the middle base. Among them, the thickness of the intermediate substrate 10 needs to be greater than the thickness of the first substrate 20 and the second substrate 21, and at least greater than 5 times the thickness of the first substrate or the second substrate, so that the entire chip maintains high mechanical strength and stability. Further, the thickness of the intermediate substrate 10 is greater than 10 times the thickness of the first substrate or the second substrate.

In the example shown in FIG. 1A, the semiconductor device includes four single-crystal FBARs (single-crystal FBARs, sFBARs for short). The difference from conventional polycrystalline FBARs based on polycrystalline piezoelectric materials is that the piezoelectric layer material is single-crystal FBAR. Crystal materials (such as lithium niobate, lithium tantalate, single crystal aluminum nitride, etc.).

The reference signs in Figures 1A-1C are explained as follows:

10: Intermediate substrate, used to bond and connect the first substrate 20 and the second substrate 21 on both sides thereof. Optional materials are single crystal Si, quartz, SiC, GaN, GaAs, sapphire, diamond, etc.

20: The first substrate.

21: The second base. The materials of the first substrate and the second substrate may be materials such as silicon dioxide, silicon nitride, polysilicon, and amorphous silicon.

31, 32 and 33, 34: Acoustic mirrors embedded in the

substrates

20 and 21. In this embodiment, they have an air cavity structure, and may also be a Bragg reflection layer or other equivalent acoustic reflection structures.

41, 42: The lower electrode of the resonator located on the substrate 20, where 41 and 42 are electrically connected to each other (in the present disclosure, the "upper and lower" electrodes are defined by the distance from the acoustic mirror, regardless of the upper and lower positions in the figure, which are close to the acoustics The mirror is "down", and the far away is "up", which will not be explained later). In the present disclosure, the electrode material may be: gold (Au), tungsten (W), molybdenum (Mo), platinum (Pt), ruthenium (Ru), iridium (Ir), titanium tungsten (TiW), aluminum (Al) , Titanium (Ti), osmium (Os), magnesium (Mg), gold (Au), tungsten (W), molybdenum (Mo), platinum (Pt), ruthenium (Ru), iridium (Ir), germanium (Ge) , Copper (Cu), aluminum (Al), chromium (Cr), arsenic doped gold and other similar metals.

51: The piezoelectric film layer or piezoelectric layer on the side of the substrate 20. In this embodiment, the material of the piezoelectric layer 51 is a single crystal material (such as lithium niobate, lithium tantalate, quartz, single crystal aluminum nitride, etc.) ).

61, 62: The process hole structure through the piezoelectric layer 51, used to release the sacrificial material.

71, 72: The upper electrode of the resonator on the side of the substrate 20.

43, 44: The lower electrode of the resonator on the substrate 21.

52: The piezoelectric film layer or piezoelectric layer on the side of the substrate 21. In this embodiment, the material of the piezoelectric layer 52 is a single crystal material (such as lithium niobate, lithium tantalate, quartz, single crystal aluminum nitride, etc.) ), the material may be the same as or different from the piezoelectric layer 51.

63, 64: The process hole structure through the piezoelectric layer 52, used to release the sacrificial material.

73, 74: The upper electrode of the resonator on the side of the substrate 21, and the

upper electrodes

73 and 74 are electrically connected to each other.

The above electrodes can constitute the FBAR electrical structure of the corresponding bulk acoustic wave resonator.

FIGS. 2-1 to 2-14 are schematic diagrams of the process flow of manufacturing the semiconductor device shown in FIG. 1A according to an exemplary embodiment of the present disclosure. The following is an exemplary description of FIG. 1A with reference to FIGS. 2-1 to 2-14. The manufacturing process or manufacturing steps of the semiconductor device shown.

Step 1: As shown in Figure 2-1, a single crystal piezoelectric thin film layer 51, such as single crystal aluminum nitride (AlN), gallium nitride (GaN), is deposited on the surface of the auxiliary substrate Aux1 (such as silicon, silicon carbide) ; Or by forming a boundary layer on the surface of the auxiliary substrate Aux1 (such as lithium niobate, lithium tantalate substrate) by ion implantation, and forming a piezoelectric film layer 51 above the boundary layer. At this time, the material of the piezoelectric film layer 51 and the auxiliary The material of the substrate Aux1 is the same.

Step 2: As shown in Figure 2-2, deposit a metal layer on the surface of 51 and pattern the metal layer into electrodes 41 and 42 (and the connection between them).

Step 3: As shown in Figure 2-3, a layer of sacrificial material S2 is deposited on the surface of the piezoelectric layer 51 and the

electrodes

41 and 42 of the structure obtained in Figure 2-2, and patterned to form an air cavity as an acoustic mirror The shape of 31 and 32, the sacrificial layer can be polysilicon, amorphous silicon, silicon dioxide, doped silicon dioxide and other materials.

Step 4: As shown in Figs. 2-4, a layer of base material 20 is deposited on the surface of the piezoelectric layer 51, the air cavity sacrificial material S2 and the connection part of the

electrodes

41 and 42 of the structure obtained in Figs. 2-3. The material can be Silicon dioxide, silicon nitride, polysilicon, amorphous silicon, etc., but different from the material of the sacrificial layer.

Step 5: As shown in Figs. 2-5, the base material 20 is ground flat by the CMP (Chemical Mechanical Polishing) method.

Step 5a: Through a process similar to steps 1-5, the structure corresponding to Fig. 2-5 on the side of the substrate 21 as shown in Fig. 2-5a can be obtained (the entire process will not be repeated here, but only result).

Step 6: As shown in Figures 2-6, the surface of the substrate 20 of the structure obtained in step 5 is bonded to a surface of another substrate 10 that has been prepared. Note that the bonding surface of the substrate 10 can also be It has an auxiliary bonding layer (not shown in the figure), such as silicon dioxide, silicon nitride and other materials.

Step 7: As shown in Figures 2-7, the structure obtained in step 6 is turned over, and the auxiliary substrate Aux1 is removed by CMP and/or etching or ion implantation layer separation methods, so that the surface of the piezoelectric layer 51 is exposed, and Carry out CMP treatment on the separation interface to make the surface smooth and have a lower roughness.

Step 8: As shown in Figures 2-8, an electrode metal material layer is deposited on the exposed surface of the piezoelectric layer 51, and the

upper electrodes

71 and 72 are patterned, and then a sacrificial layer is etched on the surface of the piezoelectric layer 51 to release The

holes

61 and 62 are connected to the

sacrificial layers

31 and 32.

Step 9: As shown in Figures 2-9, in the piezoelectric layer 51 of the structure obtained in step 8, the sacrificial layer release hole and the surface of the

upper electrodes

71 and 72 are deposited process protection layer Aux3, such as silicon dioxide, doped two Materials such as silicon oxide, polysilicon, silicon nitride, etc., can be the same or different from the material of the sacrificial layer.

Step 10: As shown in Figure 2-10, the structure obtained in step 9 is turned over again, and the previously bonded substrate 10 is abraded to a certain thickness by the CMP method. In this process, the protective layer Aux3 can prevent or significantly reduce the underlying structure Mechanical damage suffered. Not shown, an auxiliary bonding layer, such as silicon dioxide, silicon nitride, etc., can be selectively deposited on the surface of the polished substrate 10.

Step 11: As shown in Figs. 2-11, the structure obtained in step 5a is also bonded to the other surface of the substrate 10 after the thickness is reduced.

Step 12: As shown in Figure 2-12, the auxiliary substrate Aux2 is removed by CMP and/or etching or ion implantation layer separation method to expose the surface of the piezoelectric layer 52, and the separation interface is CMP processed to make Its surface is smooth and has low roughness. In this process, the protective layer Aux3 can prevent or significantly reduce possible mechanical damage to the underlying structure.

Step 13: As shown in Figs. 2-13, an electrode metal material layer is deposited on the surface of the exposed piezoelectric layer 52, and the upper electrodes 73 and 74 (and the connection between them) are patterned, and then the sacrificial layer is etched Release holes 63 and 64.

Step 14: As shown in Figure 2-14, finally use wet or dry etching to remove the protective layer Aux3 and all the sacrificial layer materials in the acoustic cavities 31-34 to obtain the structure shown in Figure 1A (Figure 1A It is the flip of Figure 2-14).

In the example shown in FIG. 1A, single crystal acoustic wave resonator units are provided on the upper and lower sides of the overall substrate, but the present disclosure is not limited to this. For example, single crystal acoustic wave resonator units and conventional bulk acoustic wave resonator units or polycrystals can be provided. Acoustic wave resonator unit.

3 is a schematic cross-sectional view of a semiconductor device according to another exemplary embodiment of the present disclosure, in which the substrate of the single crystal acoustic wave resonator is bonded to the other side of the substrate of the conventional bulk acoustic wave resonator, thereby forming a double-sided bulk acoustic wave resonance器结构。 Structure. In the embodiment shown in FIG. 3, the semiconductor device includes two sFBARs and two conventional FBARs, where the sFBARs are processed using the steps shown in FIGS. 2-1 to 2-5. The substrate 20 of the sFABR is formed by a deposition process, and its material can be silicon dioxide, silicon nitride, polysilicon, amorphous silicon, and the like. In FIG. 3, the substrate 21 is a hard substrate, and the material can be single crystal Si, quartz, SiC, GaN, GaAs, sapphire, diamond, etc., and its thickness is greater than the thickness of the sFBAR substrate 20, and at least 5 times the thickness of the substrate 20. Therefore, the entire chip maintains high mechanical strength and stability, and further, its thickness is greater than 10 times the thickness of the substrate 20.

The manufacturing process or manufacturing steps of the semiconductor device shown in FIG. 3 will be described below with reference to FIGS. 3-1 to 3-6. In the process shown in Figure 3-1 to Figure 3-6, some steps that are well-known in the industry are omitted.

Step 1: As shown in FIG. 3-1, the

bottom electrodes

43 and 44 of the conventional FBAR are deposited and patterned on the surfaces of the substrate 21 and the

acoustic mirrors

33 and 34 filled with the sacrificial material S3.

Step 2: As shown in FIG. 3-2, a piezoelectric film 52 of a certain thickness is deposited on the surface of the substrate 21, the lower electrode 43/44 and part of the sacrificial layer S3. The material can be aluminum nitride (AlN), doped aluminum nitride (ALN), zinc oxide (ZnO), lead zirconate titanate (PZT), etc. The doped ALN contains at least one rare earth element, such as scandium. (Sc), yttrium (Y), magnesium (Mg), titanium (Ti), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), etc.

Step 3: As shown in FIG. 3-3, the upper electrodes 73 and 74 (and the connection between the two electrodes) are deposited and patterned on the upper surface of the piezoelectric film 52.

Step 4: As shown in Figs. 3-4, a release process hole 63/64 is etched on the piezoelectric film 52.

Step 5: As shown in Figures 3-5, cover the piezoelectric film 52 and the upper electrodes 73 and 74 (and the connection between the two electrodes) with a protective layer Aux4 of a certain thickness, such as silicon dioxide, doped dioxide Materials such as silicon, polysilicon, silicon nitride, etc., can be the same or different from the material of the sacrificial layer.

Step 6, as shown in Figs. 3-6, the conventional FBAR shown in Figs. 3-5 is partially turned over, and the substrate 21 is abraded to a certain thickness by the CMP method. Not shown, an auxiliary bonding layer, such as silicon dioxide, silicon nitride, etc., can be selectively deposited on the surface of the ground substrate 21. And the single crystal FBAR parts completed by another process are bonded together in a substrate-to-substrate manner. During this process, the Aux4 protective layer can play a role in reducing the mechanical damage of the ordinary FBAR device on the other side of the substrate 21.

4 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, in which a substrate of a single crystal acoustic wave resonator and a substrate of a conventional surface acoustic wave resonator are connected to each other through a bonding process.

The resonator structure or semiconductor device shown in FIG. 4 contains 2 sFBARs and 1 conventional surface acoustic wave resonator (SAW). In the present disclosure, the conventional surface acoustic wave resonator uses piezoelectric materials as both a substrate and a piezoelectric material. The surface acoustic wave resonator of the functional layer, that is, the surface acoustic wave resonator that does not use the piezoelectric film, is opposite to the piezoelectric film surface acoustic wave resonator that uses the piezoelectric film, in which:

The sFABR is processed using the steps shown in Figures 2-1 to 2-5. The substrate 21 is formed by a deposition process, and the material can be silicon dioxide, silicon nitride, polysilicon, amorphous silicon, and the like.

Reference numeral 51 is a conventional SAW piezoelectric layer (SAW piezoelectric layer), and its material is a single crystal piezoelectric material such as lithium niobate and lithium tantalate, which plays a supporting role and also serves as a base of SAW.

Reference numeral 40 denotes an interdigital structure electrode and a reflection grid structure covering the surface of the piezoelectric layer 51.

Reference numerals

41 and 42 are electrical connection pins of SAW.

The structure corresponding to the reference numerals 40-42 forms the electrical structure of the SAW. The structures (lower electrode, upper electrode) corresponding to reference

numerals

43, 44, and 73 and 74 form the electrical structure of the FBAR.

As shown in FIG. 4, one side of the SAW piezoelectric layer 51 (the lower side in the figure) and the first side (the upper side in the figure) of the FBAR substrate 21 are connected by a bonding process, and the other side of the SAW piezoelectric layer 51 SAW electrical structures 40-42 are provided on one side, and the FBAR piezoelectric layer 52 and FBAR electrical structures 43-44 and 73-74 are provided on the other side of the FBAR substrate 21.

In an optional embodiment, the thickness of the SAW piezoelectric layer 51 is at least 5 times the thickness of the FBAR substrate 21, so that the entire chip maintains high mechanical strength and stability. Optionally, the The thickness of the SAW piezoelectric layer 51 is greater than 10 times the thickness of the FBAR substrate 21.

5 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, wherein the upper side of the intermediate substrate is provided with a piezoelectric thin film surface acoustic wave resonator unit, and the lower side of the intermediate substrate is provided with a single crystal acoustic wave resonator unit . The difference between the structure shown in FIG. 5 and FIG. 4 is that the surface acoustic wave resonator in FIG. 5 adopts a thin film piezoelectric layer 51, and the thin film piezoelectric layer 51 is connected to one side of the intermediate substrate 10 through a bonding process. The intermediate substrate 10 is a hard substrate, and the material can be single crystal Si, quartz, SiC, GaN, GaAs, sapphire, diamond, etc. The material of the thin film piezoelectric layer 51 can be single crystal piezoelectric materials such as lithium niobate and lithium tantalate. In an alternative embodiment, the thickness of the intermediate substrate 10 is greater than the thickness of the substrate 21 and the thin film piezoelectric layer 51 on the sFBAR side, for example, the thickness of the substrate 21 or the thickness of the thin film piezoelectric layer 51 at least 5 times, so that The entire chip maintains high mechanical strength and stability. Optionally, the thickness of the intermediate substrate 10 is greater than 10 times the thickness of the FBAR substrate 21 or the thin film piezoelectric layer 51.

As shown in FIG. 5, one side (the lower side in the figure) of the thin film piezoelectric layer 51 is connected to the first side (the upper side in the figure) of the intermediate substrate 10, and the other side of the thin film piezoelectric layer (the lower side in the figure) The lower side) is provided with a SAW electrical structure, corresponding to reference numerals 40-42. One side (upper side in the figure) of the FBAR substrate 21 is connected to the second side (lower side in the figure) of the intermediate substrate 10, and the other side (lower side in the figure) of the FBAR substrate 21 is provided with an FBAR piezoelectric layer 52 and FBAR electrical structure, corresponding to reference numerals 43-44 and 73-74.

6 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, wherein the upper side of the intermediate substrate is provided with a piezoelectric thin film surface acoustic wave resonator unit, and the lower side of the intermediate substrate is provided with a single crystal acoustic wave resonator unit And the piezoelectric film surface acoustic wave resonator unit is provided with a Bragg reflection layer.

The resonator structure shown in Figure 6 contains two sFBARs and one piezoelectric thin-film surface acoustic wave resonator with a Bragg reflection layer, where:

Reference numeral 10 is an intermediate substrate, and the material can be single crystal Si, quartz, SiC, GaN, GaAs, sapphire, diamond, etc. The structural stability can be enhanced with the aid of the intermediate substrate.

Reference numeral 21 is a substrate of a single crystal FBAR, and its material may be silicon dioxide, silicon nitride, polysilicon, amorphous silicon, or the like.

Reference numeral 51 is the thin film piezoelectric layer of SAW, and the material can be single crystal piezoelectric materials such as lithium niobate and lithium tantalate.

Reference numeral 61 is an oxide dielectric layer located under the thin film piezoelectric layer 51. Reference numerals 62-64 are alternating layers of high and low acoustic resistance (Bragg reflective layers), and the specific number of layers may be different from that shown in FIG. 6.

As shown in Figure 6, the Bragg reflective layer is disposed between the intermediate substrate 10 and the thin film piezoelectric layer 51; one side of the thin film piezoelectric layer 51 (the lower side in the figure) and the first side of the Bragg reflective layer (the figure is The upper side) is connected, the other side of the thin film piezoelectric layer 51 (the upper side in the figure) is provided with a SAW electrical structure, such as reference numerals 40-42; the second side of the Bragg reflector layer (the lower side in the figure) is connected to The first side (upper side in the figure) of the intermediate substrate 10 is connected; one side (upper side in the figure) of the FBAR substrate 21 is connected to the second side (lower side in the figure) of the intermediate substrate 10, and the The FBAR piezoelectric layer 51 and the FBAR electrical structure are provided on the other side.

In the example shown in FIG. 6, the hardness of the intermediate substrate 10 is greater than the hardness of the FBAR substrate 21, and the intermediate substrate and the FBAR substrate are connected by bonding. In the embodiment shown in FIG. 6, optionally, the thickness of the intermediate substrate 10 is greater than the thickness of the FBAR substrate 21, and the thickness of the intermediate substrate 10 is at least 5 times the thickness of the FBAR substrate 21 or the thickness of the thin film piezoelectric layer 51 Therefore, the entire chip maintains high mechanical strength and stability. Optionally, the thickness of the intermediate substrate 10 is greater than 10 times the thickness of the FBAR substrate 21 or the thin film piezoelectric layer 51.

FIG. 7 is a schematic cross-sectional view of a semiconductor device according to an exemplary embodiment of the present disclosure, in which a piezoelectric thin-film surface acoustic wave resonator unit is provided on the upper side of the substrate of the polycrystalline acoustic wave resonator unit.

The resonator structure or semiconductor device shown in Fig. 7 includes two FBARs and one surface acoustic wave resonator without a Bragg reflection layer, in which:

In the embodiment shown in FIG. 7, the material of the FBAR substrate 21 may be single crystal Si, quartz, SiC, GaN, GaAs, sapphire, diamond, etc. In an embodiment of the present disclosure, the thickness of the FBAR substrate 21 is at least 5 times the thickness of the thin film piezoelectric layer 51, so that the entire chip maintains high mechanical strength and stability. Optionally, the thickness of the FBAR substrate 21 It is greater than 10 times the thickness of the thin film piezoelectric layer 51. The lower side of the thin film piezoelectric layer 51 is connected to the first side (upper side in the figure) of the FBAR substrate 21, and the upper side of the thin film piezoelectric layer 51 is provided with a SAW electrical structure, such as the structure corresponding to reference numerals 40-42; The second side (the lower side in the figure) of the FBAR substrate 21 is provided with an FBAR piezoelectric layer 52 and an FBAR electrical structure, such as 43/44, 73/74 and other corresponding structures.

In the embodiment shown in FIG. 8, the piezoelectric thin-film SAW unit on the upper side of the FBAR substrate 21 of the polycrystalline acoustic wave resonator unit includes a Bragg reflective layer and a thin-film piezoelectric layer 51. The Bragg reflective layer is disposed on the FBAR substrate 21 and Between the thin film piezoelectric layers 51. The material of the FBAR substrate 21 can be single crystal Si, quartz, SiC, GaN, GaAs, sapphire, diamond, etc. Optionally, the thickness of the FBAR substrate 21 is at least 5 times the thickness of the thin film piezoelectric layer 51, so that the entire chip maintains high mechanical strength and stability. Optionally, the thickness of the FBAR substrate 21 is greater than the thickness of the thin film piezoelectric layer 51. 51 is 10 times the thickness.

In FIG. 8, the lower side of the thin film piezoelectric layer 51 is connected to the first side (upper side in the figure) of the Bragg reflective layer, and the upper side of the thin film piezoelectric layer 51 is provided with a SAW electrical structure, as shown in the reference number The structure shown in 40-42.

In FIG. 8, the second side (the lower side in the figure) of the Bragg reflective layer is connected to the upper side of the FBAR substrate 21, and the lower side of the FBAR substrate 21 is provided with an FBAR piezoelectric layer 52 and an FBAR electrical structure, such as 43/44, 73/74 and other corresponding structures.

Based on the technical solution of the present disclosure, since resonators can be provided on both sides of the substrate, the lateral occupation area of electronic devices such as bulk acoustic wave filters and multiplexers can be reduced, and the volume of these electronic devices can be reduced. Specifically, in the present disclosure, the upper and lower sides of the substrate are provided with resonator units. When the resonator units are all thin-film structures, the lateral area occupied by the double-sided resonator structure is significantly reduced (for example, for the arrangement For the same number of BAW resonators, the horizontal occupation space can be reduced by 50% or more) and the increase in the vertical occupation space can be ignored.

At the same time, since the stacking thickness of the bulk acoustic wave resonator on the upper and lower sides can be completely different, it is convenient to monolithically integrate the bulk acoustic wave resonator with different structures. For example, it can be used in a duplexer to fabricate two filters on the upper and lower sides respectively, or in a single filter, the series resonator unit and the parallel resonator unit can be fabricated on the upper and lower sides respectively.

The present disclosure can also realize the monolithic integration of the bulk acoustic wave filter and the surface acoustic wave filter, with complementary advantages, thereby further reducing the volume of the radio frequency front-end system. Specifically, based on the technical solution of the present disclosure, in the case where the surface acoustic wave resonator and the bulk acoustic wave resonator are respectively provided on the upper and lower sides of the substrate in the semiconductor device, the surface acoustic wave filter and the bulk acoustic wave filter can be combined in the radio frequency front-end system. The two filters of the acoustic wave filter cooperate with each other to realize a multi-band filter bank (ie, a multiplexer), and at the same time, the RF front-end can be further miniaturized.

Based on the above embodiments and drawings, the present disclosure proposes the following technical solutions:

1. A semiconductor device comprising:

in:

Each group of resonator units has at least one resonator unit, and the first group of resonator units and/or the second group of resonator units are bulk acoustic wave resonator units; and

At least one set of resonator units in the first group of resonator units and the second group of resonator units includes a single crystal piezoelectric layer, and the single crystal piezoelectric layer is a single crystal piezoelectric film layer.

2. The semiconductor device according to 1, wherein:

The first group of resonator units includes a first group of bulk acoustic wave resonator units, and the second group of resonator units includes a second group of bulk acoustic wave resonator units.

3. The semiconductor device according to 2, wherein:

Both the first group of resonator units and the second group of resonator units are single crystal FBAR units, and the single crystal FBAR units include a single crystal piezoelectric layer;

The substrate includes a first substrate, a second substrate, and an intermediate substrate disposed between the first substrate and the second substrate in the thickness direction of the substrate, the first substrate has the first side, and the second substrate has the The second side;

The first substrate and the second substrate are respectively connected to the intermediate substrate, the thickness of the intermediate substrate is greater than the thickness of the first substrate and the second substrate, and the thickness of the intermediate substrate is at least 5 times the thickness of the first substrate or the second substrate;

4. The semiconductor device according to 3, wherein:

The material of the first substrate and the second substrate is selected from at least one of silicon dioxide, silicon nitride, polysilicon, and amorphous silicon, and the material of the intermediate substrate is selected from single crystal silicon, silicon carbide, quartz, gallium nitride, and arsenic At least one of gallium, sapphire, and diamond.

5. The semiconductor device according to 3, wherein:

The thickness of the intermediate substrate is at least 10 times the thickness of the first substrate or the second substrate.

6. The semiconductor device according to 2, wherein:

The first group of resonator units are single crystal FBAR units, the second group of resonator units are polycrystalline FBAR units, and the single crystal FBAR units include a single crystal piezoelectric layer;

The substrate includes a first substrate and a second substrate connected to each other, the first substrate has the first side, and the second substrate has the second side;

The first substrate and the second substrate are bonded and connected to each other;

The thickness of the second substrate is at least 5 times the thickness of the first substrate.

7. The semiconductor device according to 6, wherein:

The thickness of the second substrate is at least 10 times the thickness of the first substrate.

8. The semiconductor device according to 6, wherein:

The material of the first substrate is selected from at least one of silicon dioxide, silicon nitride, polysilicon, and amorphous silicon;

The material of the second substrate is selected from at least one of single crystal silicon, silicon carbide, quartz, sapphire, gallium nitride, gallium arsenide, and diamond.

9. The semiconductor device according to 1, wherein:

The first group of resonator units includes SAW units, the second group of resonator units includes single crystal FBAR units, the single crystal FBAR units include single crystal piezoelectric layers, and the SAW units include single crystal SAW piezoelectric layers.

10. The semiconductor device according to 9, wherein:

The substrate includes a first substrate and a second substrate, the first substrate has the first side, and the second substrate has the second side;

The SAW unit is a conventional SAW unit and the single crystal SAW piezoelectric layer is a conventional SAW piezoelectric layer, and the conventional SAW piezoelectric layer serves as the first substrate at the same time;

The substrate of the single crystal FBAR unit is a second substrate;

One side of the first substrate is connected to one side of the second substrate, the other side of the first substrate constitutes the first side and is provided with a SAW electrical structure, and the other side of the second substrate Constituting the second side and provided with an FBAR piezoelectric layer and an FBAR electrical structure; and

The thickness of the first substrate is at least 5 times the thickness of the second substrate.

11. The semiconductor device according to 10, wherein:

The material of the second substrate is selected from at least one of silicon dioxide, silicon nitride, polysilicon, and amorphous silicon;

The material of the first substrate is a single crystal piezoelectric material;

The material of the first substrate is selected from at least one of lithium niobate, lithium tantalate, and potassium niobate.

12. The semiconductor device according to 10, wherein:

The thickness of the first substrate is at least 10 times the thickness of the second substrate.

13. The semiconductor device according to 9, wherein:

The single crystal SAW unit includes a piezoelectric thin film SAW unit, and the single crystal SAW piezoelectric layer includes a piezoelectric thin film SAW piezoelectric layer;

The substrate includes an FBAR substrate and an intermediate substrate, the thickness of the intermediate substrate is greater than the thickness of the FBAR substrate and the piezoelectric film SAW piezoelectric layer, and the thickness of the intermediate substrate is at least the thickness of the FBAR substrate or the thickness of the piezoelectric film SAW piezoelectric layer 5 times;

One side of the SAW piezoelectric layer is connected to the first side of the intermediate substrate, and the other side of the piezoelectric film SAW piezoelectric layer is provided with a SAW electrical structure;

One side of the FBAR substrate is connected to the second side of the intermediate substrate, and the other side of the FBAR substrate is provided with an FBAR piezoelectric layer and an FBAR electrical structure.

14. The semiconductor device according to 9, wherein:

The single crystal SAW unit includes a piezoelectric thin film SAW unit;

The substrate includes an FBAR substrate and an intermediate substrate;

The single crystal SAW unit includes a Bragg reflective layer and a piezoelectric thin film SAW piezoelectric layer, and the Bragg reflective layer is disposed between the intermediate substrate and the piezoelectric thin film SAW piezoelectric layer;

The thickness of the intermediate substrate is greater than the thickness of the FBAR substrate and the piezoelectric film SAW piezoelectric layer, and the thickness of the intermediate substrate is at least 5 times the thickness of the piezoelectric film SAW piezoelectric layer or the thickness of the FBAR substrate;

One side of the SAW piezoelectric layer of the piezoelectric film is connected to the first side of the Bragg reflective layer, and the other side of the SAW piezoelectric layer is provided with a SAW electrical structure;

The second side of the Bragg reflective layer is connected to the first side of the intermediate substrate;

15. The semiconductor device according to 13 or 14, wherein:

The thickness of the intermediate substrate is at least 10 times the thickness of the piezoelectric film SAW piezoelectric layer or the thickness of the FBAR substrate.

16. The semiconductor device according to 13 or 14, wherein:

The material of the FBAR substrate is selected from at least one of silicon dioxide, silicon nitride, polysilicon, and amorphous silicon;

The material of the intermediate substrate is selected from at least one of single crystal silicon, silicon carbide, quartz, sapphire, gallium nitride, gallium arsenide, and diamond.

17. The semiconductor device according to 1, wherein:

The first group of resonator units includes a single crystal piezoelectric thin film SAW unit, the second group of resonator units includes a polycrystalline FBAR unit, and the piezoelectric thin film SAW unit includes a single crystal piezoelectric thin film SAW piezoelectric layer;

The substrate includes a first substrate composed of a polycrystalline FBAR unit substrate and a second substrate composed of a single crystal piezoelectric thin film SAW piezoelectric layer of the piezoelectric thin film SAW unit, and the thickness of the first substrate is at least the second 5 times the thickness of the substrate -;

One side of the second substrate is connected to the first side of the first substrate, and the other side of the second substrate is provided with a SAW electrical structure;

The second side of the first substrate is provided with an FBAR piezoelectric layer and an FBAR electrical structure.

18. The semiconductor device according to 1, wherein:

The first group of resonator units includes a single crystal piezoelectric film SAW unit, the second group of resonator units includes a polycrystalline FBAR unit, and the piezoelectric film SAW unit includes a single crystal piezoelectric film SAW piezoelectric layer;

The piezoelectric thin film SAW unit includes a Bragg reflective layer and the single crystal piezoelectric thin film SAW piezoelectric layer, and the substrate includes a first substrate composed of the base of a polycrystalline FBAR unit and the piezoelectric thin film SAW piezoelectric layer. A second substrate composed of layers, the thickness of the first substrate is at least 5 times the thickness of the second substrate;

The Bragg reflection layer is disposed between the first substrate and the second substrate;

One side of the second substrate is connected to the first side of the Bragg reflective layer, and the other side of the second substrate is provided with a SAW electrical structure;

The second side of the Bragg reflective layer is connected to the first side of the first substrate;

19. The semiconductor device according to 17 or 18, wherein:

20. The semiconductor device according to 1, wherein:

The first group of resonator units includes a first piezoelectric layer, the second group of resonator units is a single crystal FBAR unit and includes a second piezoelectric layer, the substrate includes an FBAR substrate of a single crystal FBAR unit, and the The FBAR substrate is provided with a first piezoelectric layer and a second piezoelectric layer on both sides in the thickness direction of the FBAR substrate, and the second piezoelectric layer is a single crystal piezoelectric layer.

21. The semiconductor device according to 20, wherein:

The first group of resonator units are conventional single crystal SAW units, the second group of resonator units are single crystal FBAR units, the first piezoelectric layer is a conventional single crystal SAW piezoelectric layer, and the substrate includes A first substrate composed of a conventional single crystal SAW piezoelectric layer and a second substrate composed of the FBAR substrate of the single crystal FBAR unit, the thickness of the first substrate is at least 5 times the thickness of the second substrate; or The first group of resonator units are single crystal piezoelectric thin-film SAW units, the second group of resonator units are polycrystalline FBAR units, and the substrate includes single crystal piezoelectric thin-film SAW units. A second substrate composed of a thin-film SAW piezoelectric layer and a first substrate composed of the FBAR substrate of the polycrystalline FBAR unit, the thickness of the first substrate is at least 5 times the thickness of the second substrate.

22. The semiconductor device according to 1, wherein:

The substrate includes a first substrate and a second substrate that directly contact each other in a thickness direction of the substrate, the first substrate corresponds to a first group of resonator units, and the second substrate corresponds to a second group of resonator units .

23. The semiconductor device according to 22, wherein:

The first group of resonator units are single crystal FBAR units, and the second group of resonator units are polycrystalline FBAR units; or

The first group of resonator units are piezoelectric thin-film SAW units, and the second group of resonator units are single crystal FBAR units.

24. The semiconductor device according to 1, wherein:

The substrate includes a first substrate, an intermediate substrate, and a second substrate that are sequentially connected to each other in a thickness direction of the substrate, the first substrate corresponds to a first group of resonator units, and the second substrate corresponds to a second group Resonator unit

The first substrate and the second substrate are respectively connected to the intermediate substrate, the thickness of the intermediate substrate is greater than the thickness of the first substrate and the second substrate, and the thickness of the intermediate substrate is at least 5 times the thickness of the first substrate or the second substrate.

25. The semiconductor device according to 24, wherein:

Both the first group of resonator units and the second group of resonator units are single crystal FBAR units.

26. The semiconductor device according to 1, wherein:

The semiconductor device includes one of a filter, a duplexer, and a multiplexer.

27. A method of manufacturing a semiconductor device according to 1, comprising the steps:

28. The method according to 27, wherein:

The first group of resonator units includes single crystal FBAR units, and the second group of resonator units includes single crystal FBAR units;

The method includes the step of forming a first substrate and a second substrate on an intermediate substrate in a bonding manner.

29. The method according to 27, wherein:

The substrate includes a first substrate and a second substrate that directly contact each other in a thickness direction of the substrate, the first substrate corresponds to a first group of resonator units, and the second substrate corresponds to a second group of resonator units ；

The first group of resonator units includes single crystal FBAR units, and the second group of resonator units includes polycrystalline FBAR units;

The method includes the step of connecting the first substrate and the second substrate in a bonding manner.

30. The method according to 27, wherein:

The first group of resonator units includes a first piezoelectric layer, the second group of resonator units are single crystal FBAR units and includes a second piezoelectric layer, and the second piezoelectric layer is a single crystal piezoelectric layer;

The first group of resonator units are conventional single crystal SAW units, the second group of resonator units are single crystal FBAR units, and the substrate includes a first group composed of a conventional single crystal SAW piezoelectric layer of the conventional SAW unit. A substrate and a second substrate composed of the FBAR substrate of the single crystal FBAR unit;

The method includes the step of connecting the FBAR substrate and the conventional SAW unit in a bonding manner.

31. The method according to 27, wherein:

The first group of resonator units includes piezoelectric thin film single crystal SAW units, and the second group of resonator units includes single crystal FBAR units;

32. The method according to 27, wherein:

The first group of resonator units are single crystal piezoelectric thin film SAW units, the second group of resonator units are polycrystalline FBAR units, and the substrate includes a single crystal piezoelectric thin film SAW composed of the piezoelectric thin film SAW units. A second substrate composed of a piezoelectric layer and a first substrate composed of the FBAR substrate of the polycrystalline FBAR unit;

The method includes the steps of connecting the FBAR substrate and the single crystal piezoelectric thin film SAW unit in a bonding manner.

33. An electronic device comprising the semiconductor device according to any one of 1-26 or a semiconductor device manufactured according to any one of the method 27-32.

It should be pointed out that the electronic equipment here includes, but is not limited to, intermediate products such as radio frequency front-ends, filter amplification modules, and terminal products such as mobile phones, WIFI, and drones.

Although the embodiments of the present disclosure have been shown and described, for those of ordinary skill in the art, it will be understood that changes can be made to these embodiments without departing from the principle and spirit of the present disclosure, and the scope of the present disclosure is determined by The appended claims and their equivalents are defined.

.

Claims

A semiconductor device including:

The substrate has a first side and a second side opposite in the thickness direction of the substrate;

The first set of resonator units are arranged on the first side of the substrate; and

The second group of resonator units are arranged on the second side of the substrate,

in:

Each group of resonator units has at least one resonator unit, and the first group of resonator units and/or the second group of resonator units are bulk acoustic wave resonator units; and

At least one set of resonator units in the first group of resonator units and the second group of resonator units includes a single crystal piezoelectric layer, and the single crystal piezoelectric layer is a single crystal piezoelectric film layer.
The semiconductor device according to claim 1, wherein:

The first group of resonator units includes a first group of bulk acoustic wave resonator units, and the second group of resonator units includes a second group of bulk acoustic wave resonator units.
The semiconductor device according to claim 2, wherein:

Both the first group of resonator units and the second group of resonator units are single crystal FBAR units, and the single crystal FBAR units include a single crystal piezoelectric layer;

The substrate includes a first substrate, a second substrate, and an intermediate substrate disposed between the first substrate and the second substrate in the thickness direction of the substrate, the first substrate has the first side, and the second substrate has the The second side;

The first substrate and the second substrate are respectively connected to the intermediate substrate, the thickness of the intermediate substrate is greater than the thickness of the first substrate and the second substrate, and the thickness of the intermediate substrate is at least 5 times the thickness of the first substrate or the second substrate;
The semiconductor device according to claim 3, wherein:

The material of the first substrate and the second substrate is selected from at least one of silicon dioxide, silicon nitride, polysilicon, and amorphous silicon, and the material of the intermediate substrate is selected from single crystal silicon, silicon carbide, quartz, gallium nitride, and arsenic At least one of gallium, sapphire, and diamond.
The semiconductor device according to claim 3, wherein:

The thickness of the intermediate substrate is at least 10 times the thickness of the first substrate or the second substrate.
The semiconductor device according to claim 2, wherein:

The first group of resonator units are single crystal FBAR units, the second group of resonator units are polycrystalline FBAR units, and the single crystal FBAR units include a single crystal piezoelectric layer;

The substrate includes a first substrate and a second substrate connected to each other, the first substrate has the first side, and the second substrate has the second side;

The first substrate and the second substrate are bonded and connected to each other;

The thickness of the second substrate is at least 5 times the thickness of the first substrate.
The semiconductor device according to claim 6, wherein:

The thickness of the second substrate is at least 10 times the thickness of the first substrate.
The semiconductor device according to claim 6, wherein:

The material of the first substrate is selected from at least one of silicon dioxide, silicon nitride, polysilicon, and amorphous silicon;

The material of the second substrate is selected from at least one of single crystal silicon, silicon carbide, quartz, sapphire, gallium nitride, gallium arsenide, and diamond.
The semiconductor device according to claim 1, wherein:

The first group of resonator units includes SAW units, the second group of resonator units includes single crystal FBAR units, the single crystal FBAR units include single crystal piezoelectric layers, and the SAW units include single crystal SAW piezoelectric layers.
The semiconductor device according to claim 9, wherein:

The substrate includes a first substrate and a second substrate, the first substrate has the first side, and the second substrate has the second side;

The SAW unit is a conventional SAW unit and the single crystal SAW piezoelectric layer is a conventional SAW piezoelectric layer, and the conventional SAW piezoelectric layer serves as the first substrate at the same time;

The substrate of the single crystal FBAR unit is a second substrate;

One side of the first substrate is connected to one side of the second substrate, the other side of the first substrate constitutes the first side and is provided with a SAW electrical structure, and the other side of the second substrate Constituting the second side and provided with an FBAR piezoelectric layer and an FBAR electrical structure; and

The thickness of the first substrate is at least 5 times the thickness of the second substrate.
The semiconductor device according to claim 10, wherein:

The material of the second substrate is selected from at least one of silicon dioxide, silicon nitride, polysilicon, and amorphous silicon;

The material of the first substrate is a single crystal piezoelectric material;

The material of the first substrate is selected from at least one of lithium niobate, lithium tantalate, and potassium niobate.
The semiconductor device according to claim 10, wherein:

The thickness of the first substrate is at least 10 times the thickness of the second substrate.
The semiconductor device according to claim 9, wherein:

The single crystal SAW unit includes a piezoelectric thin film SAW unit, and the single crystal SAW piezoelectric layer includes a piezoelectric thin film SAW piezoelectric layer;

The substrate includes an FBAR substrate and an intermediate substrate, the thickness of the intermediate substrate is greater than the thickness of the FBAR substrate and the piezoelectric film SAW piezoelectric layer, and the thickness of the intermediate substrate is at least the thickness of the FBAR substrate or the thickness of the piezoelectric film SAW piezoelectric layer 5 times;

One side of the SAW piezoelectric layer is connected to the first side of the intermediate substrate, and the other side of the piezoelectric film SAW piezoelectric layer is provided with a SAW electrical structure;

One side of the FBAR substrate is connected to the second side of the intermediate substrate, and the other side of the FBAR substrate is provided with an FBAR piezoelectric layer and an FBAR electrical structure.
The semiconductor device according to claim 9, wherein:

The single crystal SAW unit includes a piezoelectric thin film SAW unit;

The substrate includes an FBAR substrate and an intermediate substrate;

The single crystal SAW unit includes a Bragg reflective layer and a piezoelectric thin film SAW piezoelectric layer, and the Bragg reflective layer is disposed between the intermediate substrate and the piezoelectric thin film SAW piezoelectric layer;

The thickness of the intermediate substrate is greater than the thickness of the FBAR substrate and the piezoelectric film SAW piezoelectric layer, and the thickness of the intermediate substrate is at least 5 times the thickness of the piezoelectric film SAW piezoelectric layer or the thickness of the FBAR substrate;

One side of the SAW piezoelectric layer of the piezoelectric film is connected to the first side of the Bragg reflective layer, and the other side of the SAW piezoelectric layer is provided with a SAW electrical structure;

The second side of the Bragg reflective layer is connected to the first side of the intermediate substrate;

One side of the FBAR substrate is connected to the second side of the intermediate substrate, and the other side of the FBAR substrate is provided with an FBAR piezoelectric layer and an FBAR electrical structure.
The semiconductor device according to claim 13 or 14, wherein:

The thickness of the intermediate substrate is at least 10 times the thickness of the piezoelectric film SAW piezoelectric layer or the thickness of the FBAR substrate.
The semiconductor device according to claim 13 or 14, wherein:

The material of the FBAR substrate is selected from at least one of silicon dioxide, silicon nitride, polysilicon, and amorphous silicon;

The material of the intermediate substrate is selected from at least one of single crystal silicon, silicon carbide, quartz, sapphire, gallium nitride, gallium arsenide, and diamond.
The semiconductor device according to claim 1, wherein:

The first group of resonator units includes a single crystal piezoelectric thin film SAW unit, the second group of resonator units includes a polycrystalline FBAR unit, and the piezoelectric thin film SAW unit includes a single crystal piezoelectric thin film SAW piezoelectric layer;

The substrate includes a first substrate composed of a polycrystalline FBAR unit substrate and a second substrate composed of a single crystal piezoelectric thin film SAW piezoelectric layer of the piezoelectric thin film SAW unit, and the thickness of the first substrate is at least the second 5 times the thickness of the substrate -;

One side of the second substrate is connected to the first side of the first substrate, and the other side of the second substrate is provided with a SAW electrical structure;

The second side of the first substrate is provided with an FBAR piezoelectric layer and an FBAR electrical structure.
The semiconductor device according to claim 1, wherein:

The first group of resonator units includes a single crystal piezoelectric thin film SAW unit, the second group of resonator units includes a polycrystalline FBAR unit, and the piezoelectric thin film SAW unit includes a single crystal piezoelectric thin film SAW piezoelectric layer;

The piezoelectric thin film SAW unit includes a Bragg reflective layer and the single crystal piezoelectric thin film SAW piezoelectric layer, and the substrate includes a first substrate composed of the base of a polycrystalline FBAR unit and the piezoelectric thin film SAW piezoelectric layer. A second substrate composed of layers, the thickness of the first substrate is at least 5 times the thickness of the second substrate;

The Bragg reflection layer is disposed between the first substrate and the second substrate;

One side of the second substrate is connected to the first side of the Bragg reflective layer, and the other side of the second substrate is provided with a SAW electrical structure;

The second side of the Bragg reflective layer is connected to the first side of the first substrate;

The second side of the first substrate is provided with an FBAR piezoelectric layer and an FBAR electrical structure.
The semiconductor device according to claim 17 or 18, wherein:

The thickness of the first substrate is at least 10 times the thickness of the second substrate.
The semiconductor device according to claim 1, wherein:

The first group of resonator units includes a first piezoelectric layer, the second group of resonator units is a single crystal FBAR unit and includes a second piezoelectric layer, the substrate includes an FBAR substrate of a single crystal FBAR unit, and the The FBAR substrate is provided with a first piezoelectric layer and a second piezoelectric layer on both sides in the thickness direction of the FBAR substrate, and the second piezoelectric layer is a single crystal piezoelectric layer.
The semiconductor device according to claim 20, wherein:

The first group of resonator units are conventional single crystal SAW units, the second group of resonator units are single crystal FBAR units, the first piezoelectric layer is a conventional single crystal SAW piezoelectric layer, and the substrate includes A first substrate composed of a conventional single crystal SAW piezoelectric layer and a second substrate composed of the FBAR substrate of the single crystal FBAR unit, the thickness of the first substrate is at least 5 times the thickness of the second substrate; or The first group of resonator units are single crystal piezoelectric thin-film SAW units, the second group of resonator units are polycrystalline FBAR units, and the substrate includes single crystal piezoelectric thin-film SAW units. A second substrate composed of a thin-film SAW piezoelectric layer and a first substrate composed of the FBAR substrate of the polycrystalline FBAR unit, the thickness of the first substrate is at least 5 times the thickness of the second substrate.
The semiconductor device according to claim 1, wherein:

The substrate includes a first substrate and a second substrate that directly contact each other in a thickness direction of the substrate, the first substrate corresponds to a first group of resonator units, and the second substrate corresponds to a second group of resonator units .
The semiconductor device according to claim 22, wherein:

The first group of resonator units are single crystal FBAR units, and the second group of resonator units are polycrystalline FBAR units; or

The first group of resonator units are piezoelectric thin-film SAW units, and the second group of resonator units are single crystal FBAR units.
The semiconductor device according to claim 1, wherein:

The substrate includes a first substrate, an intermediate substrate, and a second substrate that are sequentially connected to each other in a thickness direction of the substrate, the first substrate corresponds to a first group of resonator units, and the second substrate corresponds to a second group Resonator unit

The first substrate and the second substrate are respectively connected to the intermediate substrate, the thickness of the intermediate substrate is greater than the thickness of the first substrate and the second substrate, and the thickness of the intermediate substrate is at least 5 times the thickness of the first substrate or the second substrate.
The semiconductor device according to claim 24, wherein:

Both the first group of resonator units and the second group of resonator units are single crystal FBAR units.
The semiconductor device according to claim 1, wherein:

The semiconductor device includes one of a filter, a duplexer, and a multiplexer.
A method of manufacturing a semiconductor device according to claim 1, comprising the steps:

A group of resonator units are respectively formed on both sides of the substrate, and each group of resonator units has at least one resonator unit.
The method of claim 27, wherein:

The substrate includes a first substrate, an intermediate substrate, and a second substrate that are sequentially connected to each other in a thickness direction of the substrate, the first substrate corresponds to a first group of resonator units, and the second substrate corresponds to a second group Resonator unit

The first group of resonator units includes single crystal FBAR units, and the second group of resonator units includes single crystal FBAR units;

The method includes the step of forming a first substrate and a second substrate on an intermediate substrate in a bonding manner.
The method of claim 27, wherein:

The substrate includes a first substrate and a second substrate that directly contact each other in a thickness direction of the substrate, the first substrate corresponds to a first group of resonator units, and the second substrate corresponds to a second group of resonator units ；

The first group of resonator units includes single crystal FBAR units, and the second group of resonator units includes polycrystalline FBAR units;

The method includes the step of connecting the first substrate and the second substrate in a bonding manner.
The method of claim 27, wherein:

The first group of resonator units includes a first piezoelectric layer, the second group of resonator units are single crystal FBAR units and includes a second piezoelectric layer, and the second piezoelectric layer is a single crystal piezoelectric layer;

The first group of resonator units are conventional single crystal SAW units, the second group of resonator units are single crystal FBAR units, and the substrate includes a first group composed of a conventional single crystal SAW piezoelectric layer of the conventional SAW unit. A substrate and a second substrate composed of the FBAR substrate of the single crystal FBAR unit;

The method includes the step of connecting the FBAR substrate and the conventional SAW unit in a bonding manner.
The method of claim 27, wherein:

The substrate includes a first substrate and a second substrate that directly contact each other in a thickness direction of the substrate, the first substrate corresponds to a first group of resonator units, and the second substrate corresponds to a second group of resonator units ；

The first group of resonator units includes piezoelectric thin film single crystal SAW units, and the second group of resonator units includes single crystal FBAR units;

The method includes the step of connecting the first substrate and the second substrate in a bonding manner.
The method of claim 27, wherein:

The first group of resonator units are single crystal piezoelectric thin film SAW units, the second group of resonator units are polycrystalline FBAR units, and the substrate includes a single crystal piezoelectric thin film SAW composed of the piezoelectric thin film SAW units. A second substrate composed of a piezoelectric layer and a first substrate composed of the FBAR substrate of the polycrystalline FBAR unit;

The method includes the steps of connecting the FBAR substrate and the single crystal piezoelectric thin film SAW unit in a bonding manner.
An electronic device, comprising the semiconductor device according to any one of claims 1-26 or the semiconductor device manufactured according to any one of claims 27-32.