WO2021005683A1 - Circuit pattern creating system, and method for creating circuit pattern - Google Patents
Circuit pattern creating system, and method for creating circuit pattern Download PDFInfo
- Publication number
- WO2021005683A1 WO2021005683A1 PCT/JP2019/026997 JP2019026997W WO2021005683A1 WO 2021005683 A1 WO2021005683 A1 WO 2021005683A1 JP 2019026997 W JP2019026997 W JP 2019026997W WO 2021005683 A1 WO2021005683 A1 WO 2021005683A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wiring
- circuit pattern
- design information
- wirings
- dimension
- Prior art date
Links
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
- B41J2/01—Ink jet
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
Definitions
- This specification relates to a system and a method of creating a circuit pattern of an electronic circuit using a drawing device.
- Patent Document 1 discloses a method for manufacturing a wiring board in which at least one layer of a conductive pattern (circuit pattern) and an insulating pattern is formed on an insulating base material along a wiring pattern. In this manufacturing method, at least one of the insulating base material and the insulating pattern is in a semi-cured state, a conductive pattern is formed on the upper portion thereof, and at least one of them is completely cured by heat treatment, and the conductive pattern is fired.
- Patent Document 1 further discloses an embodiment in which a conductive pattern and an insulating pattern are formed by an inkjet method. According to this, it is said that the adhesive force between the insulating layer (insulating base material, insulating pattern) and the conductive pattern can be improved.
- Patent Document 1 when a circuit pattern composed of a plurality of wirings is created by using an inkjet drawing device, it is possible to overdraw a plurality of times, and there is a degree of freedom in the thickness dimension of the wiring.
- the thickness dimension of the wiring is not set appropriately, for example, the resistance value per unit length of the plurality of wirings may become non-uniform and the characteristics of the electronic circuit may deteriorate. Further, for example, when there is a difference in the magnitude of the current flowing through the plurality of wirings, an appropriate cross-sectional area of each wiring cannot be obtained.
- the present specification provides a circuit pattern creation system and a circuit pattern creation method that optimize by individually setting the thickness dimension of each wiring when creating a circuit pattern using a drawing apparatus. It is an issue to be solved.
- the present specification is a system for creating a circuit pattern composed of a plurality of the wirings by using a drawing device for drawing a plurality of wirings on an insulating material using conductive ink, and provides design information regarding the circuit patterns. Individually based on the design information acquisition unit to be acquired, the cross-sectional area of the wiring included in the design information or the cross-sectional area of the wiring obtained from the design information, and the width dimension of the wiring included in the design information. A wiring thickness setting unit that individually sets the thickness dimension of the wiring, and a drawing control unit that controls the drawing operation of the drawing device so as to satisfy the thickness dimension individually set for each wiring.
- the circuit pattern creation system provided is disclosed.
- the present specification is a method of creating a circuit pattern composed of a plurality of the wirings by using a drawing device for drawing a plurality of wirings on an insulating material using conductive ink, and is a design relating to the circuit pattern.
- a design information acquisition process for acquiring information, the cross-sectional area of the wiring included in the design information or the cross-sectional area of the wiring obtained from the design information, and the width dimension of the wiring included in the design information.
- Disclose a method for creating a circuit pattern including.
- the thickness dimension of each wiring can be individually set based on the cross-sectional area and the width dimension of the wiring, and the drawing operation of the drawing device can be set individually. It is possible to realize the thickness dimension individually set by the degree of freedom of. Therefore, unlike the conventional technique in which the thickness dimension of each wiring is uniformly formed by combining metal plating and etching treatment, the thickness dimension of each wiring can be individually optimized.
- FIG. 5 is a plan view illustrating a method of creating wiring extending in parallel and wiring extending in an oblique direction in a second embodiment using an inkjet drawing device.
- the substrate product 9 is configured by mounting the component 99 on the substrate 91.
- the substrate 91 is composed of an insulating material 92, a circuit pattern 93, an insulating layer 94, and a land 95.
- the insulating material 92 is a plate-shaped member formed by using the insulating material.
- As the insulating material 92 a ready-made plate material formed of a glass epoxy resin or the like may be used, or a liquid insulating material drawn by a drawing apparatus 3 described later may be solidified and formed.
- the circuit pattern 93 is an aggregate of a plurality of wirings 8 arranged on the surface of the insulating material 92. Each wire 8 is generally formed using a conductive material such as silver or copper.
- the insulating layer 94 is formed so as to cover the circuit pattern 93 by using an insulating material.
- the insulating material forming the insulating layer 94 may be the same as or different from the insulating material forming the insulating material 92.
- the connection portion to which the component 99 is connected is maintained in an exposed state without the insulating layer 94 being formed.
- the lands 95 are formed at the exposed connection points of the circuit pattern 93 using a conductive material. As a result, the substrate 91 is manufactured.
- the mounting work of the plurality of components 99 on the substrate 91 is generally carried out by a component mounting line composed of a solder printing machine, a component mounting machine, and the like.
- FIG. 1 shows a single-sided mounting board in which the component 99 is mounted on one side of the board 91.
- a double-sided mounting board in which the component 99 is mounted on both sides of the board 91 and a multi-layer circuit pattern 93.
- the circuit pattern creation system 1 is composed of a transfer device 2, a drawing device 3, an XY drive device 4, and a control device 5.
- the circuit pattern creation system 1 not only creates the circuit pattern 93 but also manufactures the substrate 91.
- the transport device 2 carries the insulating material 92 from outside the system onto the base shown in the drawing. Further, the transport device 2 carries the manufactured substrate 91 out of the system.
- a conveyor device having a rotating conveyor belt can be exemplified.
- the drawing device 3 has a plurality of types of drawing heads (illustrated) and performs a drawing operation toward the insulating material 92. Further, the drawing device 3 has a plurality of drawing heads of each type, so that the drawing speed is improved.
- the first-class drawing head ejects or ejects conductive ink to draw the circuit pattern 93. Conductive ink is produced, for example, by mixing fine metal particles such as silver in a solvent. When the solvent evaporates and dries, a circuit pattern 93 in which metal fine particles are connected is created.
- the second type drawing head draws the insulating layer 94 by injecting or discharging a liquid insulating material. By solidifying the insulating material, the shape and insulating properties of the insulating layer 94 are stabilized.
- the second type drawing head can also be formed by drawing the insulating material 92.
- the third type drawing head ejects or ejects a liquid or paste-like conductive material to draw the land 95. This conductive material may be the same as or different from the conductive ink used by the first-class drawing head. The solidification of the conductive material stabilizes the shape and conductive properties of the land 95.
- an inkjet drawing device that ejects liquid ink
- a dispenser drawing device that ejects ink having a relatively high viscosity, or the like
- an inkjet drawing device and a dispenser drawing device can be used together.
- a composite type drawing device that combines an inkjet method and a dispenser method can also be used.
- the drawing apparatus 3 may have a hot air supply unit that promotes the drying of the ink and a heating unit that promotes the solidification of the insulating material.
- the XY drive device 4 drives the drawing head of the drawing device 3 relative to the insulating material 92 in the two-dimensional direction (XY direction).
- “relative” is meant that the XY drive 4 may drive the drawing head, or the XY drive 4 may drive the insulating material 92.
- the operation of the XY drive device 4 makes it possible to create a circuit pattern 93 having an arbitrary shape.
- the control device 5 controls the transfer device 2, the drawing device 3, and the XY drive device 4. In other words, the control device 5 controls the production of the substrate 91 by controlling the execution of the circuit pattern creating step, the insulating layer forming step, and the land forming step.
- the control device 5 includes three control function units related to the circuit pattern creation process, that is, a design information acquisition unit 51, a wiring thickness setting unit 52, and a drawing control unit 53. The three control functions are realized by software.
- the design information acquisition unit 51 acquires design information regarding the circuit pattern 93 from outside the system.
- the design information is acquired from, for example, the CAD device that designed the substrate 91.
- the design information is passed in the form of electronic data from the client who requested the manufacture of the substrate 91.
- the design information includes information on the cross-sectional area S of the wiring 8 and information on the width dimension W.
- the wiring thickness setting unit 52 individually sets the thickness dimension T of each wiring 8 based on the cross-sectional area S and the width dimension W of the wiring 8 included in the design information. If the information on the cross-sectional area S of the wiring 8 is not included in the design information, the wiring thickness setting unit 52 obtains the cross-sectional area S of the wiring 8 based on other information included in the design information. For example, the wiring thickness setting unit 52 can obtain an appropriate cross-sectional area S in which the wiring 8 does not overheat, based on the magnitude of the current flowing through the wiring 8. The wiring thickness setting unit 52 may obtain an appropriate cross-sectional area S based on the failure current flowing at the time of failure instead of the load current flowing at the time of normal operation.
- the drawing control unit 53 controls the drawing operation of the drawing device 3 so as to satisfy the thickness dimension T individually set for each wiring 8. Specifically, the drawing control unit 53 individually sets the number of overlays N of the drawing operation for each wiring 8 based on the unit thickness dimension TU of the wiring 8 obtained by one drawing operation of the drawing device 3. To do.
- the drawing control unit 53 draws the entire drawing pattern PtA and the number of overlays N relative to each other based on the overlay count N of the drawing operation individually set for each wiring 8.
- a partial drawing pattern PtB for drawing a part of the wiring 8 is created.
- the drawing control unit 53 causes the drawing device 3 to perform drawing operations for the entire drawing pattern PtA and the partial drawing pattern PtB.
- the detailed control functions of the wiring thickness setting unit 52 and the drawing control unit 53 will be described later with reference to a specific example of the circuit pattern 93.
- a specific example of the circuit pattern 93 includes a first wiring 81, a second wiring 82, and a third wiring 83 when the component 99 is a switching element.
- the first wiring 81 and the second wiring 82 form a main circuit, and a large main current flows through them.
- the third wiring 83 constitutes a control circuit, and a small control current flows.
- the design information acquisition unit 51 has information on the cross-sectional area S1 and the width dimension W1 common to the first wiring 81 and the second wiring 82, and the cross-sectional area S3 and the width of the third wiring 83. Acquire the information of the dimension W3. If the information on the cross-sectional area S1 and the cross-sectional area S3 is not included in the design information, the wiring thickness setting unit 52 obtains the cross-sectional area S1 and the cross-sectional area S3 based on other information included in the design information.
- the cross-sectional area S1 is larger than the cross-sectional area S3, and the width dimension W1 is larger than the width dimension W3.
- the drawing control unit 53 uses the following equations 3 and 4 including the unit thickness dimension TU to display the overlay count N1 of the first wiring 81 and the second wiring 82, and the first The number of overlays N3 of the three wirings 83 is individually set.
- the number of overlays N1 and the number of overlays N3 are rounded up integer values.
- N1 T1 / TU ............ Equation 3
- N3 T3 / TU ............ Equation 4
- the magnitude relationship between the number of overlays N1 and the number of overlays N3 is not determined only by the magnitude relationship between the main current and the control current, but is determined in relation to a plurality of design information.
- the number of overlays N1 is 20 and the number of overlays N3 is 15. That is, the number of overlays N1 of the first wiring 81 and the second wiring 82 is relatively large, and the number of overlays N3 of the third wiring 83 is relatively small.
- the drawing control unit 53 creates an overall drawing pattern PtA (shown in FIG. 5) for drawing the first wiring 81, the second wiring 82, and the third wiring 83.
- the drawing control unit 53 creates a partial drawing pattern PtB (shown in FIG. 6) for drawing the first wiring 81 and the second wiring 82 having a relatively large number of overlays N1.
- the drawing control unit 53 causes the drawing device 3 to perform the drawing operation of the entire drawing pattern PtA only 15 times. As a result, the third wiring 83 reaches a predetermined thickness dimension T3 and is finished. On the other hand, the thickness of the first wiring 81 and the second wiring 82 is still insufficient.
- the drawing control unit 53 causes the drawing device 3 to perform the drawing operation of the partial drawing pattern PtB only five times. As a result, the first wiring 81 and the second wiring 82 are overlaid 20 times in total, and reach a predetermined thickness dimension T1 to be finished. If it takes time to dry the conductive ink, the drying time is appropriately set during the repetition of the drawing operation.
- the above-mentioned overlay number calculation process P3, drawing pattern creation process P4, and drawing execution process P5 can be collectively regarded as a drawing control process.
- the design information acquisition step P1, the wiring thickness setting step P2, and the drawing control step complete the creation of the circuit pattern 93.
- the thickness dimension T1 of the first wiring 81 and the second wiring 82 becomes an appropriate value corresponding to the cross-sectional area S1 and the width dimension W1.
- the thickness dimension T3 of the third wiring 83 is an appropriate value corresponding to the cross-sectional area S3 and the width dimension W3.
- the thickness dimension T of each wiring 8 can be individually set based on the cross-sectional area S and the width dimension W of the wiring 8, and the drawing device 3 can draw. It is possible to realize the thickness dimension T individually set according to the degree of freedom of operation. Therefore, unlike the conventional technique in which the thickness dimension T of each wiring 8 is uniformly formed by combining metal plating and etching treatment, the thickness dimension T of each wiring 8 can be individually optimized.
- the drawing device 3 that draws the circuit pattern 93 is limited to an inkjet drawing device that performs a drawing operation in units of pixels PX arranged in a two-dimensional grid pattern.
- a large number of pixel PXs are shown as small squares, respectively.
- the drawing device 3 cannot accurately draw each pixel PX in a square shape, but due to the comprehensive action of the conductive ink, such as wet spread, bleeding, and overwriting, a substantially linear wiring 8 is provided. Can be drawn.
- the second embodiment there are a wiring 8 extending in parallel with the pixel PX and a wiring 8 extending diagonally with respect to the arrangement of the pixel PX.
- the size of one side of the pixel PX is 100 ⁇ m and that there is a wiring 8 extending in an oblique 45 ° direction.
- the unit thickness dimension TU of the wiring 8 obtained by one drawing operation of the drawing device 3 is 0.5 ⁇ m.
- the common width dimension WC is twice the size of one side of the pixel PX. Therefore, the fourth wiring 84 and the fifth wiring 85 are drawn with a wiring width in which two pixel PXs are arranged side by side. Further, with respect to the fourth wiring 84 and the fifth wiring 85, the wiring thickness setting unit 52 and the drawing control unit 53 operate in the same manner as in the first embodiment.
- the sixth wiring 86 and the seventh wiring 87 shown in FIG. 7 are candidates as the wiring 8 extending in the diagonal 45 ° direction with respect to the arrangement of the pixels PX.
- the actual width dimension that can be drawn is not an integral multiple of the size of one side of the pixel PX due to the limitation of the configuration of the drawing device 3 (invertical drawing device). Therefore, the actual width dimension W6 of the sixth wiring 86 and the actual width dimension W7 of the seventh wiring 87 cannot be matched with the design information (200 ⁇ m).
- the actual width dimension W6 of the sixth wiring 86 is 141 ⁇ m, which corresponds to the diagonal dimension of the pixel PX. Further, the actual width dimension W7 of the seventh wiring 87 fluctuates along the diagonal direction, and numerically fluctuates from the diagonal dimension of the pixel PX (141 ⁇ m) to twice the diagonal dimension of the pixel PX (282 ⁇ m). The average value of the actual width dimension W7 of the seventh wiring 87 is 212 ⁇ m.
- the wiring thickness setting unit 52 adopts the seventh wiring 87 on the side that approximates the design information (200 ⁇ m), and discards the sixth wiring 86. Further, the wiring thickness setting unit 52 sets the thickness dimension T7 of the seventh wiring 87 by using the average value of the actual width dimension W7 of the seventh wiring 87.
- the drawing control unit 53 operates in the same manner as in the first embodiment. That is, the drawing control unit 53 creates an overall drawing pattern for drawing the fourth wiring 84, the fifth wiring 85, and the seventh wiring 87, and a partial drawing pattern for drawing the fourth wiring 84 and the fifth wiring 85. ..
- the drawing control unit 53 causes the drawing device 3 to perform the drawing operation of the entire drawing pattern only 19 times, and subsequently performs the drawing operation of the partial drawing pattern only once.
- an appropriate cross-sectional area SC 2000 ⁇ m 2 ) is ensured for all the wirings 8 (fourth wiring 84, fifth wiring 85, and seventh wiring 87).
- the actual width dimension W7 of the seventh wiring 87 extending in the oblique direction cannot be matched with the design information due to the restriction of the configuration of the drawing device 3. Nevertheless, the number of overlays N7 of the seventh wiring 87 can be individually set to ensure an appropriate cross-sectional area SC for all the wirings 8. As a result, the resistance value per unit length of all the wirings 8 can be made uniform, and the deterioration of the characteristics of the electronic circuit can be prevented. This effect becomes remarkable in the circuit pattern 93 in which the width dimension W of the wiring 8 is miniaturized to about several pixels PX or less.
- the drawing control unit 53 individually sets the number of overlays N of the drawing operation on the premise that the unit thickness dimension TU due to the drawing operation of the drawing device 3 is constant. There is another method. That is, the drawing control unit 53 sets the number of times N of the drawing device 3 to be overlaid with respect to the wiring 8 in common, changes the injection amount of the conductive ink of the drawing head for each wiring 8, and sets the unit thickness dimension TU. It may be adjusted individually. Further, the circuit pattern creation system 1 can also be applied to a double-sided mounting board or a multi-layer board.
- the size of one side of the pixel PX described in the second embodiment and the value of the unit thickness dimension TU of the wiring 8 obtained by one drawing operation are examples, and actually affect the performance of the drawing device 3. It is natural to be based.
- the wiring thickness setting unit 52 sets the thickness dimension T7 of the seventh wiring 87 by using the minimum value (141 ⁇ m) of the actual width dimension W7 of the seventh wiring 87. According to this, an appropriate cross-sectional area SC (2000 ⁇ m 2 ) can be secured in the bottleneck, and there is no risk of local overheating.
- the second embodiment can be applied to the wiring 8 extending in an oblique direction other than 45 °.
- the first and second embodiments can be applied and modified in various ways.
- Circuit pattern creation system 2 Conveyor device 3: Drawing device 4: XY drive device 5: Control device 51: Design information acquisition unit 52: Wiring thickness setting unit 53: Drawing control unit 8: Wiring 81-87: First wiring -Seventh wiring 91: Board 92: Insulator 93: Circuit pattern 99: Parts W1, W3: Width dimensions W6, W7: Actual width dimensions PtA: Overall drawing pattern PtB: Partial drawing pattern PX: Pixel
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Provided is a system for creating a circuit pattern comprising a plurality of wires, using a drawing device for drawing a plurality of wires on an insulator using an electrically conductive ink, the system comprising: a design information acquiring unit for acquiring design information relating to a circuit pattern; a wire thickness setting unit which, on the basis of a cross-sectional area of the wires included in the design information or a cross-sectional area of the wires determined from the design information, and width dimensions of the wires included in the design information, sets a thickness dimension of each of the wires separately; and a drawing control unit which controls a drawing operation of the drawing device so that the thickness dimensions separately set for the individual wires are satisfied.
Description
本明細書は、描画装置を使用して電子回路の回路パターンを作成するシステムおよび作成方法に関する。
This specification relates to a system and a method of creating a circuit pattern of an electronic circuit using a drawing device.
電子回路の回路パターンを作成するために、絶縁材に一面に金属メッキを施し、エッチング処理によって不要な金属部分を除去し、残された金属部分を回路パターンとする方法が従来から実施されてきた。近年では、描画装置や造形装置などを使用して、回路パターンを直接的に形成する新方法が開発、実用化されている。この種の新方法の一例として、特許文献1の技術が挙げられる。
In order to create a circuit pattern of an electronic circuit, a method in which an insulating material is plated with metal on one surface, unnecessary metal parts are removed by etching, and the remaining metal parts are used as a circuit pattern has been conventionally practiced. .. In recent years, a new method for directly forming a circuit pattern has been developed and put into practical use by using a drawing device or a modeling device. As an example of this kind of new method, the technique of Patent Document 1 can be mentioned.
特許文献1は、絶縁基材上に配線パターンに沿って導電パターン(回路パターン)と絶縁パターンとを少なくとも1層形成する配線基板の製造方法を開示している。この製造方法では、絶縁基材と絶縁パターンの少なくとも一つを半硬化状態としてその上部に導電パターンを形成し、熱処理によって前記少なくとも一つを完全硬化するとともに、導電パターンを焼成している。特許文献1は、さらに、導電パターンおよび絶縁パターンをインクジェット方式で形成する態様を開示している。これによれば、絶縁層(絶縁基材、絶縁パターン)と導電パターンの間の接着力を改善できる、とされている。
Patent Document 1 discloses a method for manufacturing a wiring board in which at least one layer of a conductive pattern (circuit pattern) and an insulating pattern is formed on an insulating base material along a wiring pattern. In this manufacturing method, at least one of the insulating base material and the insulating pattern is in a semi-cured state, a conductive pattern is formed on the upper portion thereof, and at least one of them is completely cured by heat treatment, and the conductive pattern is fired. Patent Document 1 further discloses an embodiment in which a conductive pattern and an insulating pattern are formed by an inkjet method. According to this, it is said that the adhesive force between the insulating layer (insulating base material, insulating pattern) and the conductive pattern can be improved.
ところで、特許文献1において、インクジェット方式の描画装置を用いて複数の配線からなる回路パターンを作成するときに、複数回の重ね描きが可能であり、配線の厚み寸法に自由度がある。しかしながら、配線の厚み寸法が適正に設定されないと、例えば、複数の配線の単位長当たりの抵抗値が不均一になって、電子回路の特性が低下する場合が生じる。また例えば、複数の配線に流れる電流の大きさに相違がある場合に、各配線の適正な断面積が得られなくなる。
By the way, in Patent Document 1, when a circuit pattern composed of a plurality of wirings is created by using an inkjet drawing device, it is possible to overdraw a plurality of times, and there is a degree of freedom in the thickness dimension of the wiring. However, if the thickness dimension of the wiring is not set appropriately, for example, the resistance value per unit length of the plurality of wirings may become non-uniform and the characteristics of the electronic circuit may deteriorate. Further, for example, when there is a difference in the magnitude of the current flowing through the plurality of wirings, an appropriate cross-sectional area of each wiring cannot be obtained.
本明細書では、描画装置を使用して回路パターンを作成する際に、個々の配線の厚み寸法を個別に設定することによって適正化する回路パターン作成システム、および回路パターン作成方法を提供することを解決すべき課題とする。
The present specification provides a circuit pattern creation system and a circuit pattern creation method that optimize by individually setting the thickness dimension of each wiring when creating a circuit pattern using a drawing apparatus. It is an issue to be solved.
本明細書は、導電性インクを用いて複数の配線を絶縁材に描画する描画装置を使用して、複数の前記配線からなる回路パターンを作成するシステムであって、前記回路パターンに関する設計情報を取得する設計情報取得部と、前記設計情報に含まれる前記配線の断面積または前記設計情報から求められる前記配線の断面積、および、前記設計情報に含まれる前記配線の幅寸法に基づいて、個々の前記配線の厚み寸法を個別に設定する配線厚み設定部と、個々の前記配線に個別に設定された前記厚み寸法を満足させるように前記描画装置の描画動作を制御する描画制御部と、を備える回路パターン作成システムを開示する。
The present specification is a system for creating a circuit pattern composed of a plurality of the wirings by using a drawing device for drawing a plurality of wirings on an insulating material using conductive ink, and provides design information regarding the circuit patterns. Individually based on the design information acquisition unit to be acquired, the cross-sectional area of the wiring included in the design information or the cross-sectional area of the wiring obtained from the design information, and the width dimension of the wiring included in the design information. A wiring thickness setting unit that individually sets the thickness dimension of the wiring, and a drawing control unit that controls the drawing operation of the drawing device so as to satisfy the thickness dimension individually set for each wiring. The circuit pattern creation system provided is disclosed.
また、本明細書は、導電性インクを用いて複数の配線を絶縁材に描画する描画装置を使用して、複数の前記配線からなる回路パターンを作成する方法であって、前記回路パターンに関する設計情報を取得する設計情報取得工程と、前記設計情報に含まれる前記配線の断面積または前記設計情報から求められる前記配線の断面積、および、前記設計情報に含まれる前記配線の幅寸法に基づいて、個々の前記配線の厚み寸法を個別に設定する配線厚み設定工程と、個々の前記配線に個別に設定された前記厚み寸法を満足させるように前記描画装置の描画動作を制御する描画制御工程と、を備える回路パターン作成方法を開示する。
Further, the present specification is a method of creating a circuit pattern composed of a plurality of the wirings by using a drawing device for drawing a plurality of wirings on an insulating material using conductive ink, and is a design relating to the circuit pattern. Based on the design information acquisition process for acquiring information, the cross-sectional area of the wiring included in the design information or the cross-sectional area of the wiring obtained from the design information, and the width dimension of the wiring included in the design information. , A wiring thickness setting step of individually setting the thickness dimension of each of the wirings, and a drawing control step of controlling the drawing operation of the drawing device so as to satisfy the thickness dimension individually set for each of the wirings. Disclose a method for creating a circuit pattern including.
本明細書で開示する回路パターン作成システムや回路パターン作成方法によれば、配線の断面積および幅寸法に基づいて、個々の配線の厚み寸法を個別に設定することができ、描画装置の描画動作の自由度によって個別に設定された厚み寸法を実現することができる。したがって、金属メッキとエッチング処理を組み合わせて各配線の厚み寸法を一律に形成する従来技術と異なり、個々の配線の厚み寸法を個別に適正化することができる。
According to the circuit pattern creation system and the circuit pattern creation method disclosed in the present specification, the thickness dimension of each wiring can be individually set based on the cross-sectional area and the width dimension of the wiring, and the drawing operation of the drawing device can be set individually. It is possible to realize the thickness dimension individually set by the degree of freedom of. Therefore, unlike the conventional technique in which the thickness dimension of each wiring is uniformly formed by combining metal plating and etching treatment, the thickness dimension of each wiring can be individually optimized.
1.回路パターン93を包含する基板製品9
まず、回路パターン93を包含する基板製品9の構成例について、図1を参考にして説明する。基板製品9は、基板91に部品99が装着されて構成される。基板91は、絶縁材92、回路パターン93、絶縁層94、およびランド95から成る。絶縁材92は、絶縁材料を用いて形成された板状の部材である。絶縁材92は、ガラスエポキシ樹脂などで形成された既製品の板材が使用されてもよく、あるいは、後述する描画装置3によって描画された液状の絶縁材料が固化されて形成されてもよい。回路パターン93は、絶縁材92の表面に配置された複数の配線8の集合体である。各配線8は、一般的に、銀や銅などの導電材料を用いて形成される。 1. 1.Substrate product 9 including circuit pattern 93
First, a configuration example of thesubstrate product 9 including the circuit pattern 93 will be described with reference to FIG. The substrate product 9 is configured by mounting the component 99 on the substrate 91. The substrate 91 is composed of an insulating material 92, a circuit pattern 93, an insulating layer 94, and a land 95. The insulating material 92 is a plate-shaped member formed by using the insulating material. As the insulating material 92, a ready-made plate material formed of a glass epoxy resin or the like may be used, or a liquid insulating material drawn by a drawing apparatus 3 described later may be solidified and formed. The circuit pattern 93 is an aggregate of a plurality of wirings 8 arranged on the surface of the insulating material 92. Each wire 8 is generally formed using a conductive material such as silver or copper.
まず、回路パターン93を包含する基板製品9の構成例について、図1を参考にして説明する。基板製品9は、基板91に部品99が装着されて構成される。基板91は、絶縁材92、回路パターン93、絶縁層94、およびランド95から成る。絶縁材92は、絶縁材料を用いて形成された板状の部材である。絶縁材92は、ガラスエポキシ樹脂などで形成された既製品の板材が使用されてもよく、あるいは、後述する描画装置3によって描画された液状の絶縁材料が固化されて形成されてもよい。回路パターン93は、絶縁材92の表面に配置された複数の配線8の集合体である。各配線8は、一般的に、銀や銅などの導電材料を用いて形成される。 1. 1.
First, a configuration example of the
絶縁層94は、絶縁材料を用いて、回路パターン93を覆うように形成される。絶縁層94を形成する絶縁材料は、絶縁材92を形成する絶縁材料と同一でもよいし、相違してもよい。回路パターン93のうち部品99が接続される接続箇所は、絶縁層94が形成されずに、露出状態が維持される。ランド95は、導電材料を用いて、回路パターン93の露出された接続箇所に形成される。これにより、基板91が製造される。
The insulating layer 94 is formed so as to cover the circuit pattern 93 by using an insulating material. The insulating material forming the insulating layer 94 may be the same as or different from the insulating material forming the insulating material 92. In the circuit pattern 93, the connection portion to which the component 99 is connected is maintained in an exposed state without the insulating layer 94 being formed. The lands 95 are formed at the exposed connection points of the circuit pattern 93 using a conductive material. As a result, the substrate 91 is manufactured.
複数の部品99の基板91への装着作業は、一般的に、半田印刷機や部品装着機などで構成された部品装着ラインにより実施される。なお、図1は、基板91の片面に部品99が装着される片面実装基板を示しており、他に、基板91の両面に部品99が装着される両面実装基板や、複数層の回路パターン93が形成される多層基板などが有る。
The mounting work of the plurality of components 99 on the substrate 91 is generally carried out by a component mounting line composed of a solder printing machine, a component mounting machine, and the like. Note that FIG. 1 shows a single-sided mounting board in which the component 99 is mounted on one side of the board 91. In addition, a double-sided mounting board in which the component 99 is mounted on both sides of the board 91 and a multi-layer circuit pattern 93. There is a multi-layer substrate on which is formed.
2.第1実施形態の回路パターン作成システム1の構成および機能
次に、第1実施形態の回路パターン作成システム1の構成および機能について、図2を参考にして説明する。回路パターン作成システム1は、搬送装置2、描画装置3、XY駆動装置4、および制御装置5で構成される。第1実施形態において、回路パターン作成システム1は、回路パターン93の作成だけでなく、基板91の製造までを実施する。 2. 2. Configuration and Function of CircuitPattern Creation System 1 of the First Embodiment Next, the configuration and function of the circuit pattern creation system 1 of the first embodiment will be described with reference to FIG. The circuit pattern creation system 1 is composed of a transfer device 2, a drawing device 3, an XY drive device 4, and a control device 5. In the first embodiment, the circuit pattern creation system 1 not only creates the circuit pattern 93 but also manufactures the substrate 91.
次に、第1実施形態の回路パターン作成システム1の構成および機能について、図2を参考にして説明する。回路パターン作成システム1は、搬送装置2、描画装置3、XY駆動装置4、および制御装置5で構成される。第1実施形態において、回路パターン作成システム1は、回路パターン93の作成だけでなく、基板91の製造までを実施する。 2. 2. Configuration and Function of Circuit
搬送装置2は、絶縁材92をシステム外から図略の基台上に搬入する。また、搬送装置2は、製造された基板91をシステム外に搬出する。搬送装置2として、輪転するコンベアベルトを有するコンベア装置を例示できる。
The transport device 2 carries the insulating material 92 from outside the system onto the base shown in the drawing. Further, the transport device 2 carries the manufactured substrate 91 out of the system. As the transfer device 2, a conveyor device having a rotating conveyor belt can be exemplified.
描画装置3は、図略の複数種の描画ヘッドを有し、絶縁材92に向かって描画動作を行う。さらに、描画装置3は、各種類の描画ヘッドがそれぞれ複数とされることにより、描画速度が向上する。第一種の描画ヘッドは、導電性インクを噴射または吐出して、回路パターン93を描画する。導電性インクは、例えば、溶剤中に銀などの金属微粒子が混入されて製造される。溶剤が蒸発して乾燥することにより、金属微粒子が連なる回路パターン93が作成される。
The drawing device 3 has a plurality of types of drawing heads (illustrated) and performs a drawing operation toward the insulating material 92. Further, the drawing device 3 has a plurality of drawing heads of each type, so that the drawing speed is improved. The first-class drawing head ejects or ejects conductive ink to draw the circuit pattern 93. Conductive ink is produced, for example, by mixing fine metal particles such as silver in a solvent. When the solvent evaporates and dries, a circuit pattern 93 in which metal fine particles are connected is created.
第二種の描画ヘッドは、液状の絶縁材料を噴射または吐出して、絶縁層94を描画する。絶縁材料が固化することにより、絶縁層94の形状および絶縁特性が安定する。なお、第二種の描画ヘッドは、絶縁材92を描画して形成することも可能である。第三種の描画ヘッドは、液状またはペースト状の導電材料を噴射または吐出して、ランド95を描画する。この導電材料は、第一種の描画ヘッドが用いる導電性インクと同一でもよいし、相違してもよい。導電材料が固化することにより、ランド95の形状および導電特性が安定する。
The second type drawing head draws the insulating layer 94 by injecting or discharging a liquid insulating material. By solidifying the insulating material, the shape and insulating properties of the insulating layer 94 are stabilized. The second type drawing head can also be formed by drawing the insulating material 92. The third type drawing head ejects or ejects a liquid or paste-like conductive material to draw the land 95. This conductive material may be the same as or different from the conductive ink used by the first-class drawing head. The solidification of the conductive material stabilizes the shape and conductive properties of the land 95.
描画装置3として、液状のインクを噴射するインクジェット描画装置や、比較的粘度の高いインクを吐出するディスペンサ描画装置などを用いることができる。また、描画装置3として、インクジェット描画装置およびディスペンサ描画装置を併用することができる。さらには、描画装置3として、インクジェット方式およびディスペンサ方式を兼ねる複合タイプの描画装置を用いることもできる。なお、描画装置3は、インクの乾燥を促進する熱風供給部や、絶縁材料の固化を促進する加熱部を有してもよい。
As the drawing device 3, an inkjet drawing device that ejects liquid ink, a dispenser drawing device that ejects ink having a relatively high viscosity, or the like can be used. Further, as the drawing device 3, an inkjet drawing device and a dispenser drawing device can be used together. Further, as the drawing device 3, a composite type drawing device that combines an inkjet method and a dispenser method can also be used. The drawing apparatus 3 may have a hot air supply unit that promotes the drying of the ink and a heating unit that promotes the solidification of the insulating material.
XY駆動装置4は、絶縁材92に対して描画装置3の描画ヘッドを相対的に二次元方向(XY方向)に駆動する。「相対的」とは、XY駆動装置4が描画ヘッドを駆動しても、あるいは、XY駆動装置4が絶縁材92を駆動してもよいことを意味する。XY駆動装置4の動作により、任意形状の回路パターン93の作成が可能となる。
The XY drive device 4 drives the drawing head of the drawing device 3 relative to the insulating material 92 in the two-dimensional direction (XY direction). By "relative" is meant that the XY drive 4 may drive the drawing head, or the XY drive 4 may drive the insulating material 92. The operation of the XY drive device 4 makes it possible to create a circuit pattern 93 having an arbitrary shape.
制御装置5は、搬送装置2、描画装置3、およびXY駆動装置4を制御する。換言すると、制御装置5は、回路パターン作成工程、絶縁層形成工程、およびランド形成工程の実施を制御して、基板91の製造を制御する。制御装置5は、回路パターン作成工程に関する三つの制御機能部、すなわち、設計情報取得部51、配線厚み設定部52、および描画制御部53を備える。三つの制御機能部は、ソフトウェアによって実現される。
The control device 5 controls the transfer device 2, the drawing device 3, and the XY drive device 4. In other words, the control device 5 controls the production of the substrate 91 by controlling the execution of the circuit pattern creating step, the insulating layer forming step, and the land forming step. The control device 5 includes three control function units related to the circuit pattern creation process, that is, a design information acquisition unit 51, a wiring thickness setting unit 52, and a drawing control unit 53. The three control functions are realized by software.
設計情報取得部51は、回路パターン93に関する設計情報をシステム外から取得する。設計情報は、例えば、基板91の設計を行ったCAD装置から取得される。あるいは、設計情報は、基板91の製造を依頼した依頼者から電子データの形態で受け渡される。通常、設計情報には、配線8の断面積Sの情報および幅寸法Wの情報が含まれている。
The design information acquisition unit 51 acquires design information regarding the circuit pattern 93 from outside the system. The design information is acquired from, for example, the CAD device that designed the substrate 91. Alternatively, the design information is passed in the form of electronic data from the client who requested the manufacture of the substrate 91. Usually, the design information includes information on the cross-sectional area S of the wiring 8 and information on the width dimension W.
配線厚み設定部52は、設計情報に含まれる配線8の断面積Sおよび幅寸法Wに基づいて、個々の配線8の厚み寸法Tを個別に設定する。仮に、配線8の断面積Sの情報が設計情報に含まれていない場合、配線厚み設定部52は、設計情報に含まれる他の情報に基づいて、配線8の断面積Sを求める。例えば、配線厚み設定部52は、配線8に流れる電流の大きさに基づいて、配線8が過熱しない適正な断面積Sを求めることができる。なお、配線厚み設定部52は、通常時に流れる負荷電流でなく、故障時に流れる故障電流に基づいて、適正な断面積Sを求めてもよい。
The wiring thickness setting unit 52 individually sets the thickness dimension T of each wiring 8 based on the cross-sectional area S and the width dimension W of the wiring 8 included in the design information. If the information on the cross-sectional area S of the wiring 8 is not included in the design information, the wiring thickness setting unit 52 obtains the cross-sectional area S of the wiring 8 based on other information included in the design information. For example, the wiring thickness setting unit 52 can obtain an appropriate cross-sectional area S in which the wiring 8 does not overheat, based on the magnitude of the current flowing through the wiring 8. The wiring thickness setting unit 52 may obtain an appropriate cross-sectional area S based on the failure current flowing at the time of failure instead of the load current flowing at the time of normal operation.
描画制御部53は、個々の配線8に個別に設定された厚み寸法Tを満足させるように描画装置3の描画動作を制御する。具体的に、描画制御部53は、描画装置3の一回の描画動作によって得られる配線8の単位厚み寸法TUに基づき、個々の配線8に対して描画動作の重ね描き回数Nを個別に設定する。
The drawing control unit 53 controls the drawing operation of the drawing device 3 so as to satisfy the thickness dimension T individually set for each wiring 8. Specifically, the drawing control unit 53 individually sets the number of overlays N of the drawing operation for each wiring 8 based on the unit thickness dimension TU of the wiring 8 obtained by one drawing operation of the drawing device 3. To do.
さらに、描画制御部53は、個々の配線8に対して個別に設定された描画動作の重ね描き回数Nに基づき、全部の配線8を描画する全体描画パターンPtA、および、重ね描き回数Nが相対的に多い一部の配線8を描画する部分描画パターンPtBを作成する。次いで、描画制御部53は、描画装置3に全体描画パターンPtAおよび部分描画パターンPtBの描画動作を行わせる。配線厚み設定部52および描画制御部53の詳細な制御機能については、回路パターン93の具体例を用いて後述する。
Further, the drawing control unit 53 draws the entire drawing pattern PtA and the number of overlays N relative to each other based on the overlay count N of the drawing operation individually set for each wiring 8. A partial drawing pattern PtB for drawing a part of the wiring 8 is created. Next, the drawing control unit 53 causes the drawing device 3 to perform drawing operations for the entire drawing pattern PtA and the partial drawing pattern PtB. The detailed control functions of the wiring thickness setting unit 52 and the drawing control unit 53 will be described later with reference to a specific example of the circuit pattern 93.
3.回路パターン作成システム1の動作
次に、回路パターン作成システム1の動作について、図3に示される回路パターン93の具体例、および図4に示される工程図を参考にして説明する。回路パターン93の具体例は、部品99がスイッチング素子である場合の第一配線81、第二配線82、および第三配線83から成る。第一配線81および第二配線82は、主回路を構成しており、大きな主電流が流れる。一方、第三配線83は、制御回路を構成しており、小さな制御電流が流れる。 3. 3. Operation of CircuitPattern Creation System 1 Next, the operation of the circuit pattern creation system 1 will be described with reference to a specific example of the circuit pattern 93 shown in FIG. 3 and a process diagram shown in FIG. A specific example of the circuit pattern 93 includes a first wiring 81, a second wiring 82, and a third wiring 83 when the component 99 is a switching element. The first wiring 81 and the second wiring 82 form a main circuit, and a large main current flows through them. On the other hand, the third wiring 83 constitutes a control circuit, and a small control current flows.
次に、回路パターン作成システム1の動作について、図3に示される回路パターン93の具体例、および図4に示される工程図を参考にして説明する。回路パターン93の具体例は、部品99がスイッチング素子である場合の第一配線81、第二配線82、および第三配線83から成る。第一配線81および第二配線82は、主回路を構成しており、大きな主電流が流れる。一方、第三配線83は、制御回路を構成しており、小さな制御電流が流れる。 3. 3. Operation of Circuit
図4の設計情報取得工程P1で、設計情報取得部51は、第一配線81および第二配線82に共通する断面積S1および幅寸法W1の情報、ならびに第三配線83の断面積S3および幅寸法W3の情報を取得する。仮に、断面積S1や断面積S3の情報が設計情報に含まれていない場合、配線厚み設定部52は、設計情報に含まれる他の情報に基づいて、断面積S1および断面積S3を求める。断面積S1は断面積S3よりも大きく、幅寸法W1は幅寸法W3よりも大きい。
In the design information acquisition step P1 of FIG. 4, the design information acquisition unit 51 has information on the cross-sectional area S1 and the width dimension W1 common to the first wiring 81 and the second wiring 82, and the cross-sectional area S3 and the width of the third wiring 83. Acquire the information of the dimension W3. If the information on the cross-sectional area S1 and the cross-sectional area S3 is not included in the design information, the wiring thickness setting unit 52 obtains the cross-sectional area S1 and the cross-sectional area S3 based on other information included in the design information. The cross-sectional area S1 is larger than the cross-sectional area S3, and the width dimension W1 is larger than the width dimension W3.
次の配線厚み設定工程P2で、配線厚み設定部52は、下記の式1および式2を用いて、第一配線81および第二配線82の厚み寸法T1、および第三配線83の厚み寸法T3を個別に設定する。
T1=S1/W1…………式1
T3=S3/W3…………式2 In the next wiring thickness setting step P2, the wiringthickness setting unit 52 uses the following equations 1 and 2 to measure the thickness T1 of the first wiring 81 and the second wiring 82, and the thickness dimension T3 of the third wiring 83. Is set individually.
T1 = S1 / W1 …………Equation 1
T3 = S3 / W3 …………Equation 2
T1=S1/W1…………式1
T3=S3/W3…………式2 In the next wiring thickness setting step P2, the wiring
T1 = S1 / W1 …………
T3 = S3 / W3 …………
次の重ね描き回数演算工程P3で、描画制御部53は、単位厚み寸法TUを含む下記の式3および式4を用いて、第一配線81および第二配線82の重ね描き回数N1、ならびに第三配線83の重ね描き回数N3を個別に設定する。なお、式3および式4の除算の商に小数点以下の端数が生じる場合、重ね描き回数N1および重ね描き回数N3は、切り上げた整数値となる。
N1=T1/TU…………式3
N3=T3/TU…………式4 In the next overlay count calculation step P3, thedrawing control unit 53 uses the following equations 3 and 4 including the unit thickness dimension TU to display the overlay count N1 of the first wiring 81 and the second wiring 82, and the first The number of overlays N3 of the three wirings 83 is individually set. When the quotient of division in Equations 3 and 4 has a fraction after the decimal point, the number of overlays N1 and the number of overlays N3 are rounded up integer values.
N1 = T1 / TU …………Equation 3
N3 = T3 / TU …………Equation 4
N1=T1/TU…………式3
N3=T3/TU…………式4 In the next overlay count calculation step P3, the
N1 = T1 / TU …………
N3 = T3 / TU …………
重ね描き回数N1および重ね描き回数N3の大小関係は、主電流と制御電流の大小関係だけでは定まらず、複数の設計情報が関係して定まる。以降の説明では、重ね描き回数N1は20回、重ね描き回数N3は15回であるとする。つまり、第一配線81および第二配線82の重ね描き回数N1が相対的に多く、第三配線83の重ね描き回数N3が相対的に少ない。
The magnitude relationship between the number of overlays N1 and the number of overlays N3 is not determined only by the magnitude relationship between the main current and the control current, but is determined in relation to a plurality of design information. In the following description, it is assumed that the number of overlays N1 is 20 and the number of overlays N3 is 15. That is, the number of overlays N1 of the first wiring 81 and the second wiring 82 is relatively large, and the number of overlays N3 of the third wiring 83 is relatively small.
次の描画パターン作成工程P4で、描画制御部53は、第一配線81、第二配線82、および第三配線83を描画する全体描画パターンPtA(図5に示す)を作成する。描画制御部53は、次に、重ね描き回数N1が相対的に多い第一配線81および第二配線82を描画する部分描画パターンPtB(図6に示す)を作成する。
In the next drawing pattern creation step P4, the drawing control unit 53 creates an overall drawing pattern PtA (shown in FIG. 5) for drawing the first wiring 81, the second wiring 82, and the third wiring 83. Next, the drawing control unit 53 creates a partial drawing pattern PtB (shown in FIG. 6) for drawing the first wiring 81 and the second wiring 82 having a relatively large number of overlays N1.
次の描画実施工程P5で、描画制御部53は、描画装置3に全体描画パターンPtAの描画動作を15回だけ実施させる。これにより、第三配線83は、所定の厚み寸法T3に到達して仕上がる。一方、第一配線81および第二配線82は、厚み寸法が未だ不足している。描画制御部53は、次に、描画装置3に部分描画パターンPtBの描画動作を5回だけ実施させる。これにより、第一配線81および第二配線82は、合計20回の重ね描きが実施され、所定の厚み寸法T1に到達して仕上がる。なお、導電性インクの乾燥に時間を要する場合、描画動作の繰り返しの間に乾燥時間が適宜設定される。
In the next drawing execution step P5, the drawing control unit 53 causes the drawing device 3 to perform the drawing operation of the entire drawing pattern PtA only 15 times. As a result, the third wiring 83 reaches a predetermined thickness dimension T3 and is finished. On the other hand, the thickness of the first wiring 81 and the second wiring 82 is still insufficient. Next, the drawing control unit 53 causes the drawing device 3 to perform the drawing operation of the partial drawing pattern PtB only five times. As a result, the first wiring 81 and the second wiring 82 are overlaid 20 times in total, and reach a predetermined thickness dimension T1 to be finished. If it takes time to dry the conductive ink, the drying time is appropriately set during the repetition of the drawing operation.
上述した重ね描き回数演算工程P3、描画パターン作成工程P4、および描画実施工程P5をまとめて、描画制御工程と捉えることができる。換言すると、設計情報取得工程P1、配線厚み設定工程P2、および描画制御工程により、回路パターン93の作成が終了する。これにより、第一配線81および第二配線82の厚み寸法T1は、断面積S1および幅寸法W1に見合った適正な値となる。同様に、第三配線83の厚み寸法T3は、断面積S3および幅寸法W3に見合った適正な値となる。この後、回路パターン作成システム1は、絶縁層形成工程へと進む。
The above-mentioned overlay number calculation process P3, drawing pattern creation process P4, and drawing execution process P5 can be collectively regarded as a drawing control process. In other words, the design information acquisition step P1, the wiring thickness setting step P2, and the drawing control step complete the creation of the circuit pattern 93. As a result, the thickness dimension T1 of the first wiring 81 and the second wiring 82 becomes an appropriate value corresponding to the cross-sectional area S1 and the width dimension W1. Similarly, the thickness dimension T3 of the third wiring 83 is an appropriate value corresponding to the cross-sectional area S3 and the width dimension W3. After this, the circuit pattern creation system 1 proceeds to the insulating layer forming step.
第1実施形態の回路パターン作成システム1によれば、配線8の断面積Sおよび幅寸法Wに基づいて、個々の配線8の厚み寸法Tを個別に設定することができ、描画装置3の描画動作の自由度によって個別に設定された厚み寸法Tを実現することができる。したがって、金属メッキとエッチング処理を組み合わせて各配線8の厚み寸法Tを一律に形成する従来技術と異なり、個々の配線8の厚み寸法Tを個別に適正化することができる。
According to the circuit pattern creation system 1 of the first embodiment, the thickness dimension T of each wiring 8 can be individually set based on the cross-sectional area S and the width dimension W of the wiring 8, and the drawing device 3 can draw. It is possible to realize the thickness dimension T individually set according to the degree of freedom of operation. Therefore, unlike the conventional technique in which the thickness dimension T of each wiring 8 is uniformly formed by combining metal plating and etching treatment, the thickness dimension T of each wiring 8 can be individually optimized.
4.第2実施形態の回路パターン作成システム
次に、第2実施形態の回路パターン作成システムについて、第1実施形態と異なる点を主にして説明する。第2実施形態において、回路パターン93を描画する描画装置3は、二次元格子状に配置されたピクセルPXを単位として描画動作を行うインクジェット描画装置に限定される。図7において、多数のピクセルPXが小さな正方形でそれぞれ示されている。描画装置3は、ピクセルPXの1個ずつを正確に正方形に描画することはできないが、導電性インクの濡れ拡がりや滲み、重ね描きのなどの総合的な作用により、概ね直線的な配線8を描くことができる。 4. Circuit pattern creation system of the second embodiment Next, the circuit pattern creation system of the second embodiment will be mainly described with respect to the differences from the first embodiment. In the second embodiment, thedrawing device 3 that draws the circuit pattern 93 is limited to an inkjet drawing device that performs a drawing operation in units of pixels PX arranged in a two-dimensional grid pattern. In FIG. 7, a large number of pixel PXs are shown as small squares, respectively. The drawing device 3 cannot accurately draw each pixel PX in a square shape, but due to the comprehensive action of the conductive ink, such as wet spread, bleeding, and overwriting, a substantially linear wiring 8 is provided. Can be drawn.
次に、第2実施形態の回路パターン作成システムについて、第1実施形態と異なる点を主にして説明する。第2実施形態において、回路パターン93を描画する描画装置3は、二次元格子状に配置されたピクセルPXを単位として描画動作を行うインクジェット描画装置に限定される。図7において、多数のピクセルPXが小さな正方形でそれぞれ示されている。描画装置3は、ピクセルPXの1個ずつを正確に正方形に描画することはできないが、導電性インクの濡れ拡がりや滲み、重ね描きのなどの総合的な作用により、概ね直線的な配線8を描くことができる。 4. Circuit pattern creation system of the second embodiment Next, the circuit pattern creation system of the second embodiment will be mainly described with respect to the differences from the first embodiment. In the second embodiment, the
また、第2実施形態において、ピクセルPXの並びに平行して延在する配線8、およびピクセルPXの並びに対して斜め方向に延在する配線8が存在する。以降の説明を簡明化するために、ピクセルPXの一辺のサイズは 100μmであり、斜め45°方向に延在する配線8が存在すると想定する。また、全部の配線8に対して、設計情報に共通の幅寸法WC= 200μm、および共通の断面積SC= 2000μm2 が定められているものとする。さらに、描画装置3の一回の描画動作によって得られる配線8の単位厚み寸法TU= 0.5μmであるとする。
Further, in the second embodiment, there are a wiring 8 extending in parallel with the pixel PX and a wiring 8 extending diagonally with respect to the arrangement of the pixel PX. For the sake of simplification of the following description, it is assumed that the size of one side of the pixel PX is 100 μm and that there is a wiring 8 extending in an oblique 45 ° direction. Further, it is assumed that the width dimension WC = 200 μm and the common cross-sectional area SC = 2000 μm 2 common to the design information are defined for all the wirings 8. Further, it is assumed that the unit thickness dimension TU of the wiring 8 obtained by one drawing operation of the drawing device 3 is 0.5 μm.
図7に示されるピクセルPXの並びに平行して延在する第四配線84および第五配線85において、共通の幅寸法WCはピクセルPXの一辺のサイズの2倍である。したがって、第四配線84および第五配線85は、ピクセルPXを2個並べた配線幅で描画される。また、第四配線84および第五配線85に対して、配線厚み設定部52および描画制御部53は、第1実施形態と同様に動作する。
In the fourth wiring 84 and the fifth wiring 85 extending in parallel with the pixel PX shown in FIG. 7, the common width dimension WC is twice the size of one side of the pixel PX. Therefore, the fourth wiring 84 and the fifth wiring 85 are drawn with a wiring width in which two pixel PXs are arranged side by side. Further, with respect to the fourth wiring 84 and the fifth wiring 85, the wiring thickness setting unit 52 and the drawing control unit 53 operate in the same manner as in the first embodiment.
すなわち、配線厚み設定部52は、第四配線84および第五配線85の厚み寸法T4=SC/WC=( 2000/200)= 10μmと設定する。また、描画制御部53は、第四配線84および第五配線85の重ね描き回数N4=T4/TU=( 10/0.5)=20回と設定する。
That is, the wiring thickness setting unit 52 sets the thickness dimension T4 = SC / WC = (2000/200) = 10 μm of the fourth wiring 84 and the fifth wiring 85. Further, the drawing control unit 53 sets the number of times the fourth wiring 84 and the fifth wiring 85 are overlaid N4 = T4 / TU = (10 / 0.5) = 20 times.
一方、ピクセルPXの並びに対して斜め45°方向に延在する配線8として、図7に示された第六配線86および第七配線87が候補となる。第六配線86および第七配線87では、描画装置3(インクジェット描画装置)の構成の制約により、描画可能な実際の幅寸法がピクセルPXの一辺のサイズの整数倍にならない。このため、第六配線86の実際の幅寸法W6および第七配線87の実際の幅寸法W7を設計情報( 200μm)に一致させることができない。
On the other hand, the sixth wiring 86 and the seventh wiring 87 shown in FIG. 7 are candidates as the wiring 8 extending in the diagonal 45 ° direction with respect to the arrangement of the pixels PX. In the sixth wiring 86 and the seventh wiring 87, the actual width dimension that can be drawn is not an integral multiple of the size of one side of the pixel PX due to the limitation of the configuration of the drawing device 3 (invertical drawing device). Therefore, the actual width dimension W6 of the sixth wiring 86 and the actual width dimension W7 of the seventh wiring 87 cannot be matched with the design information (200 μm).
具体的に、第六配線86の実際の幅寸法W6は、ピクセルPXの対角線寸法に相当する 141μmとなる。また、第七配線87の実際の幅寸法W7は、斜め方向に沿って変動し、数値としてはピクセルPXの対角線寸法( 141μm)からピクセルPXの対角線寸法の2倍( 282μm)まで変動する。第七配線87の実際の幅寸法W7の平均値は、 212μmである。
Specifically, the actual width dimension W6 of the sixth wiring 86 is 141 μm, which corresponds to the diagonal dimension of the pixel PX. Further, the actual width dimension W7 of the seventh wiring 87 fluctuates along the diagonal direction, and numerically fluctuates from the diagonal dimension of the pixel PX (141 μm) to twice the diagonal dimension of the pixel PX (282 μm). The average value of the actual width dimension W7 of the seventh wiring 87 is 212 μm.
このため、配線厚み設定部52は、設計情報( 200μm)に近似する側の第七配線87を採用し、第六配線86を破棄する。かつ、配線厚み設定部52は、第七配線87の実際の幅寸法W7の平均値を用いて、第七配線87の厚み寸法T7を設定する。厚み寸法T7は、 9.43μm(=2000/212)となり、第四配線84および第五配線85と比較して小さくなる。また、描画制御部53は、第七配線87の重ね描き回数N7=T7/TU=( 9.43/0.5)=19回と設定する。
Therefore, the wiring thickness setting unit 52 adopts the seventh wiring 87 on the side that approximates the design information (200 μm), and discards the sixth wiring 86. Further, the wiring thickness setting unit 52 sets the thickness dimension T7 of the seventh wiring 87 by using the average value of the actual width dimension W7 of the seventh wiring 87. The thickness dimension T7 is 9.43 μm (= 2000/212), which is smaller than that of the fourth wiring 84 and the fifth wiring 85. Further, the drawing control unit 53 sets the number of times the seventh wiring 87 is overlaid N7 = T7 / TU = (9.43 / 0.5) = 19 times.
この後、描画制御部53は、第1実施形態と同様に動作する。すなわち、描画制御部53は、第四配線84、第五配線85、および第七配線87を描画する全体描画パターン、ならびに、第四配線84および第五配線85を描画する部分描画パターンを作成する。次に、描画制御部53は、描画装置3に全体描画パターンの描画動作を19回だけ実施させ、続いて、部分描画パターンの描画動作を1回だけ実施させる。これにより、すべての配線8(第四配線84、第五配線85、および第七配線87)で、適正な断面積SC( 2000μm2)が確保される。
After that, the drawing control unit 53 operates in the same manner as in the first embodiment. That is, the drawing control unit 53 creates an overall drawing pattern for drawing the fourth wiring 84, the fifth wiring 85, and the seventh wiring 87, and a partial drawing pattern for drawing the fourth wiring 84 and the fifth wiring 85. .. Next, the drawing control unit 53 causes the drawing device 3 to perform the drawing operation of the entire drawing pattern only 19 times, and subsequently performs the drawing operation of the partial drawing pattern only once. As a result, an appropriate cross-sectional area SC (2000 μm 2 ) is ensured for all the wirings 8 (fourth wiring 84, fifth wiring 85, and seventh wiring 87).
第2実施形態の回路パターン作成システムでは、描画装置3の構成の制約により、斜め方向に延在する第七配線87の実際の幅寸法W7を設計情報に一致させることができない。それでも、第七配線87の重ね描き回数N7を個別に設定して、すべての配線8で適正な断面積SCを確保することができる。これにより、すべての配線8の単位長当たりの抵抗値を均一化して、電子回路の特性の低下を防止することができる。この効果は、配線8の幅寸法Wが数ピクセルPX程度以下まで微細化された回路パターン93で顕著となる。
In the circuit pattern creation system of the second embodiment, the actual width dimension W7 of the seventh wiring 87 extending in the oblique direction cannot be matched with the design information due to the restriction of the configuration of the drawing device 3. Nevertheless, the number of overlays N7 of the seventh wiring 87 can be individually set to ensure an appropriate cross-sectional area SC for all the wirings 8. As a result, the resistance value per unit length of all the wirings 8 can be made uniform, and the deterioration of the characteristics of the electronic circuit can be prevented. This effect becomes remarkable in the circuit pattern 93 in which the width dimension W of the wiring 8 is miniaturized to about several pixels PX or less.
5.実施形態の応用および変形
なお、描画制御部53は、描画装置3の描画動作による単位厚み寸法TUが一定であることを前提条件にして、描画動作の重ね描き回数Nを個別に設定するが、別法もある。つまり、描画制御部53は、配線8に対する描画装置3の重ね描き回数Nを共通に設定し、個々の配線8に対して描画ヘッドの導電性インクの噴射量を変化させ、単位厚み寸法TUを個別に調整してもよい。また、回路パターン作成システム1は、両面実装基板や多層基板に適用することもできる。 5. Application and Modification of the Embodiment Thedrawing control unit 53 individually sets the number of overlays N of the drawing operation on the premise that the unit thickness dimension TU due to the drawing operation of the drawing device 3 is constant. There is another method. That is, the drawing control unit 53 sets the number of times N of the drawing device 3 to be overlaid with respect to the wiring 8 in common, changes the injection amount of the conductive ink of the drawing head for each wiring 8, and sets the unit thickness dimension TU. It may be adjusted individually. Further, the circuit pattern creation system 1 can also be applied to a double-sided mounting board or a multi-layer board.
なお、描画制御部53は、描画装置3の描画動作による単位厚み寸法TUが一定であることを前提条件にして、描画動作の重ね描き回数Nを個別に設定するが、別法もある。つまり、描画制御部53は、配線8に対する描画装置3の重ね描き回数Nを共通に設定し、個々の配線8に対して描画ヘッドの導電性インクの噴射量を変化させ、単位厚み寸法TUを個別に調整してもよい。また、回路パターン作成システム1は、両面実装基板や多層基板に適用することもできる。 5. Application and Modification of the Embodiment The
さらに、第2実施形態で説明したピクセルPXの一辺のサイズや、一回の描画動作によって得られる配線8の単位厚み寸法TUの値などは一例であって、実際には描画装置3の性能に基づくことは当然である。また、第2実施形態で説明した第七配線87の厚み寸法T7では、幅寸法W7が狭くなった隘路の部分で局部的な過熱が心配される場合もある。この場合、配線厚み設定部52は、第七配線87の実際の幅寸法W7の最小値( 141μm)を用いて、第七配線87の厚み寸法T7を設定する。これによれば、隘路において適正な断面積SC( 2000μm2)を確保することができ、局部的な過熱のおそれは生じない。また、第2実施形態は、45°以外の斜め方向に延在する配線8に対して応用することが可能である。その他にも、第1および第2実施形態は、さまざまな応用や変形が可能である。
Further, the size of one side of the pixel PX described in the second embodiment and the value of the unit thickness dimension TU of the wiring 8 obtained by one drawing operation are examples, and actually affect the performance of the drawing device 3. It is natural to be based. Further, in the thickness dimension T7 of the seventh wiring 87 described in the second embodiment, there may be a concern about local overheating in the bottleneck portion where the width dimension W7 is narrowed. In this case, the wiring thickness setting unit 52 sets the thickness dimension T7 of the seventh wiring 87 by using the minimum value (141 μm) of the actual width dimension W7 of the seventh wiring 87. According to this, an appropriate cross-sectional area SC (2000 μm 2 ) can be secured in the bottleneck, and there is no risk of local overheating. Further, the second embodiment can be applied to the wiring 8 extending in an oblique direction other than 45 °. In addition, the first and second embodiments can be applied and modified in various ways.
1:回路パターン作成システム 2:搬送装置 3:描画装置 4:XY駆動装置 5:制御装置 51:設計情報取得部 52:配線厚み設定部 53:描画制御部 8:配線 81~87:第一配線~第七配線 91:基板 92:絶縁材 93:回路パターン 99:部品 W1、W3:幅寸法 W6、W7:実際の幅寸法 PtA:全体描画パターン PtB:部分描画パターン PX:ピクセル
1: Circuit pattern creation system 2: Conveyor device 3: Drawing device 4: XY drive device 5: Control device 51: Design information acquisition unit 52: Wiring thickness setting unit 53: Drawing control unit 8: Wiring 81-87: First wiring -Seventh wiring 91: Board 92: Insulator 93: Circuit pattern 99: Parts W1, W3: Width dimensions W6, W7: Actual width dimensions PtA: Overall drawing pattern PtB: Partial drawing pattern PX: Pixel
Claims (7)
- 導電性インクを用いて複数の配線を絶縁材に描画する描画装置を使用して、複数の前記配線からなる回路パターンを作成するシステムであって、
前記回路パターンに関する設計情報を取得する設計情報取得部と、
前記設計情報に含まれる前記配線の断面積または前記設計情報から求められる前記配線の断面積、および、前記設計情報に含まれる前記配線の幅寸法に基づいて、個々の前記配線の厚み寸法を個別に設定する配線厚み設定部と、
個々の前記配線に個別に設定された前記厚み寸法を満足させるように前記描画装置の描画動作を制御する描画制御部と、
を備える回路パターン作成システム。 A system that creates a circuit pattern consisting of a plurality of the wirings by using a drawing device that draws a plurality of wirings on an insulating material using conductive ink.
A design information acquisition unit that acquires design information related to the circuit pattern,
Based on the cross-sectional area of the wiring included in the design information or the cross-sectional area of the wiring obtained from the design information, and the width dimension of the wiring included in the design information, the thickness dimension of each wiring is individually set. Wiring thickness setting part to be set to
A drawing control unit that controls the drawing operation of the drawing device so as to satisfy the thickness dimension individually set for each of the wirings.
Circuit pattern creation system with. - 前記描画制御部は、前記描画装置の一回の前記描画動作によって得られる前記配線の単位厚み寸法に基づき、個々の前記配線に対して前記描画動作の重ね描き回数を個別に設定する、請求項1に記載の回路パターン作成システム。 The drawing control unit individually sets the number of times the drawing operation is overlaid for each wiring based on the unit thickness dimension of the wiring obtained by one drawing operation of the drawing device. The circuit pattern creation system according to 1.
- 前記描画制御部は、個々の前記配線に対して個別に設定された前記描画動作の前記重ね描き回数に基づき、全部の前記配線を描画する全体描画パターン、および、前記重ね描き回数が相対的に多い一部の前記配線を描画する部分描画パターンを作成して、前記描画装置に前記描画動作を行わせる、請求項2に記載の回路パターン作成システム。 The drawing control unit draws all the wirings based on the number of overlays of the drawing operation individually set for each wiring, and the overall drawing pattern and the number of overlays are relatively high. The circuit pattern creation system according to claim 2, wherein a partial drawing pattern for drawing a large number of the wirings is created, and the drawing apparatus is made to perform the drawing operation.
- 前記描画装置は、二次元格子状に配置されたピクセルを単位として前記描画動作を行うインクジェット描画装置であり、
前記配線厚み設定部は、前記ピクセルの並びに対して斜め方向に延在する前記配線の前記設計情報に含まれる前記幅寸法に近似し、かつ前記インクジェット描画装置の構成で描画可能な実際の前記幅寸法を用いて、前記斜め方向に延在する前記配線の前記厚み寸法を設定する、
請求項1~3のいずれか一項に記載の回路パターン作成システム。 The drawing device is an inkjet drawing device that performs the drawing operation in units of pixels arranged in a two-dimensional lattice.
The wiring thickness setting unit approximates the width dimension included in the design information of the wiring extending in an oblique direction with respect to the arrangement of the pixels, and the actual width that can be drawn by the configuration of the inkjet drawing device. The dimension is used to set the thickness dimension of the wiring extending in the diagonal direction.
The circuit pattern creation system according to any one of claims 1 to 3. - 前記配線厚み設定部は、前記斜め方向に延在する前記配線の実際の前記幅寸法が前記斜め方向に沿って変動する場合に、実際の前記幅寸法の平均値または最小値を用いて、前記斜め方向に延在する前記配線の前記厚み寸法を設定する、請求項4に記載の回路パターン作成システム。 The wiring thickness setting unit uses the average value or the minimum value of the actual width dimensions when the actual width dimension of the wiring extending in the diagonal direction fluctuates along the diagonal direction. The circuit pattern creating system according to claim 4, wherein the thickness dimension of the wiring extending in an oblique direction is set.
- 前記斜め方向に延在する前記配線、および、前記ピクセルの並びに平行して延在する前記配線に対して、前記設計情報に共通の前記幅寸法および共通の前記断面積が定められている、請求項4または5に記載の回路パターン作成システム。 Claims that the width dimension common to the design information and the common cross-sectional area are defined for the wiring extending in the diagonal direction and the wiring extending in parallel with the pixels. Item 4. The circuit pattern creation system according to item 4 or 5.
- 導電性インクを用いて複数の配線を絶縁材に描画する描画装置を使用して、複数の前記配線からなる回路パターンを作成する方法であって、
前記回路パターンに関する設計情報を取得する設計情報取得工程と、
前記設計情報に含まれる前記配線の断面積または前記設計情報から求められる前記配線の断面積、および、前記設計情報に含まれる前記配線の幅寸法に基づいて、個々の前記配線の厚み寸法を個別に設定する配線厚み設定工程と、
個々の前記配線に個別に設定された前記厚み寸法を満足させるように前記描画装置の描画動作を制御する描画制御工程と、
を備える回路パターン作成方法。 A method of creating a circuit pattern consisting of a plurality of the wirings by using a drawing device that draws a plurality of wirings on an insulating material using conductive ink.
A design information acquisition process for acquiring design information related to the circuit pattern, and
Based on the cross-sectional area of the wiring included in the design information or the cross-sectional area of the wiring obtained from the design information, and the width dimension of the wiring included in the design information, the thickness dimension of each wiring is individually set. Wiring thickness setting process to be set to
A drawing control step of controlling the drawing operation of the drawing apparatus so as to satisfy the thickness dimension individually set for each of the wirings,
A circuit pattern creation method comprising.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021530376A JP7455833B2 (en) | 2019-07-08 | 2019-07-08 | Circuit pattern creation system and circuit pattern creation method |
PCT/JP2019/026997 WO2021005683A1 (en) | 2019-07-08 | 2019-07-08 | Circuit pattern creating system, and method for creating circuit pattern |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2019/026997 WO2021005683A1 (en) | 2019-07-08 | 2019-07-08 | Circuit pattern creating system, and method for creating circuit pattern |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2021005683A1 true WO2021005683A1 (en) | 2021-01-14 |
Family
ID=74114979
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2019/026997 WO2021005683A1 (en) | 2019-07-08 | 2019-07-08 | Circuit pattern creating system, and method for creating circuit pattern |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP7455833B2 (en) |
WO (1) | WO2021005683A1 (en) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07221411A (en) * | 1994-02-08 | 1995-08-18 | Toyota Autom Loom Works Ltd | Printed circuit board and manufacture thereof |
JPH0846304A (en) * | 1995-07-03 | 1996-02-16 | Rohm Co Ltd | Printed-wiring board |
JPH09307201A (en) * | 1996-05-10 | 1997-11-28 | Hitachi Aic Inc | Printed wiring board |
JPH1056242A (en) * | 1997-06-09 | 1998-02-24 | Nitto Denko Corp | Flexible printed circuit board |
JP2001007456A (en) * | 1999-06-17 | 2001-01-12 | Toshiba Corp | Wiring circuit board |
JP2007201346A (en) * | 2006-01-30 | 2007-08-09 | Mitsuboshi Belting Ltd | Ceramics circuit board and its manufacturing method |
JP2014067847A (en) * | 2012-09-26 | 2014-04-17 | Fujifilm Corp | Pattern forming method, electronic wiring board, optical device and pattern forming apparatus |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10242600A (en) * | 1997-02-28 | 1998-09-11 | Nec Home Electron Ltd | Printed board for high-frequency circuit |
GB2483702A (en) * | 2010-09-17 | 2012-03-21 | Ge Aviat Systems Ltd | Method for the manufacture of a Silicon Carbide, Silicon Oxide interface having reduced interfacial carbon gettering |
WO2021064903A1 (en) | 2019-10-02 | 2021-04-08 | 三菱電機株式会社 | Planar light source device and liquid crystal display device |
-
2019
- 2019-07-08 JP JP2021530376A patent/JP7455833B2/en active Active
- 2019-07-08 WO PCT/JP2019/026997 patent/WO2021005683A1/en active Application Filing
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07221411A (en) * | 1994-02-08 | 1995-08-18 | Toyota Autom Loom Works Ltd | Printed circuit board and manufacture thereof |
JPH0846304A (en) * | 1995-07-03 | 1996-02-16 | Rohm Co Ltd | Printed-wiring board |
JPH09307201A (en) * | 1996-05-10 | 1997-11-28 | Hitachi Aic Inc | Printed wiring board |
JPH1056242A (en) * | 1997-06-09 | 1998-02-24 | Nitto Denko Corp | Flexible printed circuit board |
JP2001007456A (en) * | 1999-06-17 | 2001-01-12 | Toshiba Corp | Wiring circuit board |
JP2007201346A (en) * | 2006-01-30 | 2007-08-09 | Mitsuboshi Belting Ltd | Ceramics circuit board and its manufacturing method |
JP2014067847A (en) * | 2012-09-26 | 2014-04-17 | Fujifilm Corp | Pattern forming method, electronic wiring board, optical device and pattern forming apparatus |
Also Published As
Publication number | Publication date |
---|---|
JPWO2021005683A1 (en) | 2021-01-14 |
JP7455833B2 (en) | 2024-03-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5549769B1 (en) | Manufacturing method of module parts | |
JPWO2012049822A1 (en) | Hybrid substrate, method for manufacturing the same, and semiconductor integrated circuit package | |
EP2896495A1 (en) | Electronic device manufacturing apparatus and method for manufacturing same | |
CN101466205B (en) | Circuit board preparation method | |
CN101120623A (en) | Manufacturing method of multi-layer circuit board and multi-layer circuit board | |
WO2021005683A1 (en) | Circuit pattern creating system, and method for creating circuit pattern | |
JPH03283493A (en) | Manufacture of multilayer wiring board | |
CN102227959B (en) | Wiring board and method for manufacturing same | |
JP7479283B2 (en) | Method for manufacturing a multilayer printed circuit board, lay-up for manufacturing a multilayer printed circuit board, circuitized core layer for manufacturing a multilayer printed circuit board, and multilayer printed circuit board | |
CN109548301B (en) | Electronic circuit 3D printing method based on FR-4 substrate | |
CN104781925B (en) | The discrete device being installed on substrate | |
JP2006526897A (en) | Polymer thick film resistor, design cell, and manufacturing method thereof | |
JP2005183803A (en) | Method and device for forming wiring, wiring board, and ink set | |
TWI463927B (en) | Transparent printed circuit board | |
CN104427788B (en) | The via method to set up and structure of power-supply controller of electric multilayer power printed circuit board | |
US20150289381A1 (en) | Method for producing a three-dimensional circuit configuration and circuit configuration | |
CN108346640B (en) | Semiconductor structure and manufacturing method thereof | |
TWI573502B (en) | Substrate structure and manufacturing method thereof | |
US20170236777A1 (en) | Method for manufacturing a circuit carrier and circuit carrier for electronic components | |
JP2016219574A (en) | Flexible printed wiring board and method for manufacturing flexible printed wiring board | |
TWI333819B (en) | Printing template of legend and method of manufacturing printed circuit board using the same | |
US20230064497A1 (en) | Resistor-embedded circuit board and method for processing the resistor-embedded circuit board | |
Albertsen et al. | Combined manufacture methods for high density LTCC substrates: thick film screen printing, ink jet, postfiring thin film processes, and laser-drilled fine vias | |
DE102004030588A1 (en) | Connecting material template and method of use | |
KR102129886B1 (en) | Method for manufacturing wood pcb and wood pcb using the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 19936866 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2021530376 Country of ref document: JP Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 19936866 Country of ref document: EP Kind code of ref document: A1 |