WO2021085791A1

WO2021085791A1 - Feedback-based on-die termination circuit

Info

Publication number: WO2021085791A1
Application number: PCT/KR2020/008254
Authority: WO
Inventors: 조성환; 정연욱
Original assignee: 한국과학기술원
Priority date: 2019-10-29
Filing date: 2020-06-25
Publication date: 2021-05-06

Abstract

The present invention relates to a feedback-based on-die termination circuit, which may comprise: a transistor connected to a transmission channel so as to perform channel resistance-based impedance matching; and a feedback circuit configured such that, if impedance matching is requested, a driving voltage or ground is fed back to a gate of the transistor, thereby adjusting the channel resistance.

Description

Feedback-based on-die termination circuit

The present invention relates to an on-die termination circuit for transmission channel impedance matching, and more particularly, to a feedback-based on-die termination circuit that reduces power and maintains signal integrity by adjusting a gate voltage of a transistor using a feedback method. .

In general, various semiconductor devices implemented as integrated circuit chips such as a CPU, memory, and gate array are used in various electrical products such as personal computers, servers, or workstations. In most cases, the semiconductor device has a receiving circuit for receiving various signals transmitted from the outside world through an input pad, and an output circuit for providing internal signals to the outside through an output pad.

Meanwhile, as the operation speed of electrical products increases, the swing width of signals interfaced between the semiconductor devices gradually decreases. The reason is to minimize the delay time required for signal transmission. However, as the swing width of the signal decreases, the influence on external noise increases, and the reflection of the signal due to impedance mismatching (hereinafter referred to as'mismatching') at the interface terminal becomes serious. The impedance mismatch occurs due to changes in operating temperature, changes and limitations in manufacturing processes, and the like. When impedance mismatching occurs, high-speed transmission of data becomes difficult, and output data output from the data output terminal of the semiconductor device may be distorted. Accordingly, when the semiconductor device of the receiving side receives the distorted output signal through the input terminal, problems such as setup/hold failure or an error in determining the input level may be frequently caused.

Accordingly, the semiconductor device on the receiving side, which is required to increase the operation speed, employs an impedance matching circuit called on-chip termination or on-die termination near the pad in the integrated circuit chip.

In general, in on-die termination, source termination by an output circuit is performed on the transmission side, and parallel termination is performed by a termination circuit connected in parallel to the reception circuit connected to the input pad on the reception side.

1 is a conceptual diagram of an on-die termination circuit according to the prior art, and FIG. 1 is to perform impedance matching through resistors connected to each transmission line. This method has a disadvantage in that the DC power consumption is greatly increased. This is a fundamental problem of the parallel termination method, so it is intended to solve the problem in implementation.

In realizing parallel termination, a resistor is not used to save an area, and a transistor such as a MOSFET is used instead of a resistor. In order to further reduce the area, a separate resistor is not added, and as shown in FIG. 2, the transmitting end Tx is also used as a termination resistor.

The conventional method of using a MOSFET and using the Tx stage as a termination resistor can bring a large gain in terms of area.

It can be seen that the channel resistance (r _DS ) in the linear region of the MOSFET is defined as in Equation 1, and the channel resistance (r _DS ) decreases non-linearly with respect to the drain voltage (v _{SD ).}

[Equation 1]

In this case, k _n is a preset constant, v _SG is a gate voltage, v _th is a threshold voltage, and v _SD is a drain voltage.

The reflection coefficient formula is an equation of the value of the termination resistance and the load impedance, and is shown in Equation 2 below. The magnitude of the reflected and returned signal is the same as in Equation 3, and the input signal Δv is multiplied by a reflection coefficient and an attenuation coefficient α.

[Equation 2]

At this time, Z _L is the load impedance and Z _O is the transmission channel impedance.

[Equation 3]

Reflected signal Amplitude = △v

Reflection coefficient

α

Therefore, the channel resistance of the MOSFET linearly decreases according to the drain voltage of the MOSFET, and the current consumption increases as the channel resistance of the MOSFET decreases. For example, if the voltage of the transmission channel is 500mV, it is 50 ohms, in the case of 750 mV, it is 40 ohms, and in the case of 1V, if it is 30 ohms, reflection occurs at the part falling below 50 ohms and it consumes less than 50 ohms Becomes larger.

On the other hand, if the resistance of the MOSFET is increased excessively, it becomes 50 ohms for 500mV, 60 ohms for 750mV, and 70 ohms for 1V, causing an additional problem of increasing the reflected signal.

Accordingly, as to solve the above problems, the present invention is to provide a new type of feedback-based on-die termination circuit that reduces power and maintains signal integrity by adjusting the gate voltage of the transistor using a feedback method. .

The object of the present invention is not limited to the above-mentioned object, and other objects not mentioned will be clearly understood by those of ordinary skill in the art from the following description.

As a means for solving the above problem, according to an embodiment of the present invention, a transistor connected to a transmission channel to perform impedance matching based on a channel resistance; And a feedback circuit for adjusting the channel resistance by feeding back a driving voltage or a ground to a gate of the transistor when impedance matching is requested.

The transistor is connected between a driving voltage and a transmission channel, and is a first type transistor that is turned on when a gate voltage is less than or equal to a threshold.

The feedback circuit comprises: first and second resistors for applying a voltage to a gate of a first transistor by dividing a driving voltage; A first switch connecting a driving voltage to the first and second resistors when impedance matching is requested; And a second switch connecting a transmission channel to the first and second resistors when impedance matching is requested.

In addition, the feedback circuit includes a third resistor connected to the ground; A second type transistor connected between the gate of the first transistor and the third resistor and turned on when a threshold voltage or more is applied to the gate; And a third switch connected to a contact point between the drain of the first type transistor and the transfer channel, and connecting the transfer channel to the gate of the second type transistor when impedance matching is requested. .

On the other hand, the transistor may be a second type transistor that is connected between the ground and the transmission channel and is turned on when the gate voltage is greater than or equal to a threshold.

In this case, the feedback circuit includes fourth and fifth resistors that divide the voltage of the transmission channel and apply it to the gate of the second type transistor; A fourth switch connecting the transmission channel to the fourth and fifth resistors when impedance matching is requested; And a fifth switch connecting the ground to the fourth and fifth resistors when impedance matching is requested.

The present invention adjusts a gate voltage of a transmission transistor through feedback, so that power can be saved without increasing the maximum size of a reflected signal regardless of whether or not the drain voltage is increased.

In addition, since the maximum size of the reflected signal does not increase, the same effect can be obtained in terms of signal integrity. In addition, it is possible to reduce power consumption by increasing the resistance during data value change.

Lastly, impedance matching can be turned on or off through a switch, so that it can be directly applied to an existing circuit, and can be applied directly to a current structure that uses a transmitting transistor as a terminating resistor.

1 and 2 are diagrams for explaining an on-die termination circuit according to the prior art.

3 is a diagram illustrating a conceptual diagram of an on-die termination circuit according to an embodiment of the present invention.

4 is a diagram showing a detailed circuit diagram of an on-die termination circuit according to an embodiment of the present invention.

5 is a diagram illustrating a data value change pattern according to a detailed circuit diagram of an on-die termination circuit according to an embodiment of the present invention.

6 is a diagram showing a detailed circuit diagram of an on-die termination circuit according to another embodiment of the present invention.

7 is a diagram showing a detailed circuit diagram of an on-die termination circuit according to another embodiment of the present invention.

8 is a diagram illustrating a data value change pattern according to a detailed circuit diagram of an on-die termination circuit according to another embodiment of the present invention.

9 is a diagram for explaining the performance of a transistor according to an embodiment of the present invention.

The following content merely exemplifies the principles of the present invention. Therefore, those skilled in the art can implement the principles of the present invention and invent various devices included in the concept and scope of the present invention, although not clearly described or illustrated herein. In addition, it is understood that all conditional terms and examples listed in this specification are, in principle, expressly intended only for the purpose of making the concept of the present invention understood, and are not limited to the embodiments and states specifically listed as such. It should be.

In addition, it is to be understood that all detailed descriptions listing specific embodiments as well as principles, aspects and embodiments of the present invention are intended to include structural and functional equivalents of these matters. It should also be understood that these equivalents include not only currently known equivalents, but also equivalents to be developed in the future, that is, all devices invented to perform the same function regardless of the structure.

Thus, for example, the block diagrams herein are to be understood as representing a conceptual perspective of exemplary circuits embodying the principles of the invention. Similarly, all flowcharts, state transition diagrams, pseudocodes, etc. are understood to represent the various processes performed by a computer or processor, whether or not the computer or processor is clearly depicted and that can be represented substantially in a computer-readable medium. It should be.

The functions of the various elements shown in the drawings, including a processor or functional block represented by a similar concept, may be provided by the use of dedicated hardware as well as hardware having the ability to execute software in association with appropriate software. When provided by a processor, the function may be provided by a single dedicated processor, a single shared processor, or a plurality of individual processors, some of which may be shared.

In addition, the explicit use of terms presented as processor, control, or similar concepts should not be interpreted exclusively by quoting hardware capable of executing software, but without limitation, digital signal processor (DSP) hardware, ROM for storing software. It should be understood to implicitly include (ROM), RAM (RAM) and non-volatile memory. Other commonly used hardware may also be included.

In the claims of the present specification, components expressed as means for performing the functions described in the detailed description include all types of software including, for example, combinations of circuit elements or firmware/microcodes that perform the above functions. It is intended to include all methods of performing a function to perform the function, and is combined with suitable circuitry for executing the software to perform the function. Since the invention defined by these claims is combined with the functions provided by the various enumerated means and combined with the manner required by the claims, any means capable of providing the above functions are equivalent to those conceived from this specification. It should be understood as.

The above-described objects, features, and advantages will become more apparent through the following detailed description in connection with the accompanying drawings, whereby those of ordinary skill in the technical field to which the present invention pertains can easily implement the technical idea of the present invention. There will be. In addition, in describing the present invention, when it is determined that a detailed description of a known technology related to the present invention may unnecessarily obscure the subject matter of the present invention, a detailed description thereof will be omitted.

3, the circuit 10 of the present invention is connected to the transmission channel CH, the transistor 11 applies a channel resistance to the transmission channel, and when impedance matching is requested from an external control device, the driving voltage or ground Is fed back to the gate of the transistor 11 so that the channel resistance r _DS of the transistor 11 is adjusted according to the gate voltage.

That is, it can be seen that the present invention adjusts the gate voltage of the MOSFET through feedback differently from the conventional method, thereby conserving power without increasing the maximum size of the reflected signal.

In addition, it can be directly applied to an existing circuit by determining through a switch whether or not the feedback circuit is driven. In particular, it can be applied directly to the current structure using the transmitting end (Tx) as a terminating resistor.

The transistor 11 of the present invention _{is connected between the driving voltage V DD} and the transmission channel CH, and is implemented as a pMOSFET that is turned on when the gate voltage is less than or equal to the threshold, or the ground (GND) and the transmission channel (CH) It is connected between and can be implemented as an nMOSFET that turns on when the gate voltage is greater than the threshold.

4 is a diagram showing a detailed circuit diagram of an on-die termination circuit according to an embodiment of the present invention, and it is assumed that the transistor 11 at this time is implemented as a pMOSFET (PM).

Referring to FIG. 4, the feedback circuit 12 of the present invention comprises first and second resistors R1 and R2 applied to the gate of the pMOSFET PM by dividing the driving voltage VDD, and the driving voltage VDD. ) And the first and second resistors R1 and R2 to connect the driving voltage VDD to the first and second resistors R1 and R2 when impedance matching is requested. , Is located between the first and second resistors R1 and R2 and the transmission channel CH, and connects the transmission channel CH to the first and second resistors R1 and R2 when impedance matching is requested. 2 Impedance matching is performed by using a pMOSFET (PM) connected to the driving voltage in a VDD termination method, including the switch SW2, as a resistor.

Hereinafter, a method of operating the on-die termination circuit of FIG. 4 will be described.

If impedance matching is requested, the first and second switches SW1 and SW2 are turned on _{to connect the driving voltage V DD} and the transmission channel CH to both ends of the first and second resistors R1 and R2. .

Then, the first and second resistors R1 and R2 _{divide the voltage difference between the driving voltage V DD} and the transmission channel CH according to their resistance ratio (

) And applied to the gate of the pMOSFET PM, so that the correlation between the gate voltage Vgs and the drain voltage Vds is maintained at a specific coefficient ratio.

Equation 4 is the current formula of the MOSFET in the linear mode. However, if the gate voltage Vgs is maintained at a specific coefficient ratio of the drain voltage Vds, V _ds ² may be canceled, and in this case, Equation 4 may be converted to Equation 5.

Then, the drain current changes linearly with the drain voltage, and the magnitude of the channel resistance of the MOSFET is always maintained at 50 ohms. In other words, the MOSFET acts like a pure resistor.

[Equation 4]

[Equation 5]

Here, I _D is the drain current, Vds is the drain voltage, Vt is the threshold voltage, W is the capacitance of the parallel plate capacitor per unit gate area, W is the channel width, and L is the channel length.

On the other hand, if impedance matching is not requested, the first and second switches SW1 and SW2 are turned off, and no voltage is applied through the first and second resistors R1 and R2, so that the gate of the pMOSFET PM Goes to the floating state. Then, the channel resistance (r _DS ) of the pMOSFET (PM) becomes infinite, and it no longer functions as a termination resistor.

However, in the case of FIG. 4, the resistance of the feedback circuit 12 is seen as it is from the side of the transmission channel.

The data value transmitted through the transmission channel swings within the range from VDD/2 to VDD as shown in FIG. 5, and at this time, if the resistance in the feedback circuit 12 is sufficiently large, no problem occurs.

However, when a current of about 500 mV flows through the transmission channel while the resistance in the feedback circuit 12 is as small as about 500 ohms, a large current of about 1 mA flows toward the feedback circuit 12. The impedance value seen from the transmission channel toward the feedback circuit is also lowered because it is the parallel resistance between the resistor and the transistor 11.

Accordingly, in the present invention, as shown in FIG. 6, an nMOSFET is attached without a resistance directly attached to the contact point (Node A) of the transmission channel and the feedback circuit, so that the impedance of the feedback circuit viewed from the transmission channel becomes a large resistance of the nMOSFET gate. At this time, since the gate voltage and the source voltage of the nMOSFET are the same, the same effect as the resistor connection can be achieved.

Referring to FIG. 6, the feedback circuit 12' of the present invention is connected between the third resistor R connected to the ground, the gate of the pMOSFET PM, and the third resistor R3, and the gate voltage is greater than or equal to the threshold voltage. When applied to the nMOSFET (NM), the drain of the pMOSFET (PM) is connected to the contact point of the transmission channel (CH), and when impedance matching is requested, the transmission channel (CH) is connected to the gate of the nMOSFET (NM). It is configured to include three switches (SW3) and the like.

That is, after connecting the nMOSFET (NM) to the junction (Node A) of the transmission channel and the feedback circuit, the voltage of the transmission channel (CH) is fed back through the nMOSFET (NM) so that the gate voltage of the pMOSFET (PM) is variable. .

7 is a diagram showing a detailed circuit diagram of an on-die termination circuit according to another embodiment of the present invention, and it is assumed that the transistor 11' at this time is implemented as an nMOSFET (NM).

Referring to FIG. 7, the feedback circuit 12 ″ of the present invention divides the voltage of the transmission channel CH and applies the fourth and fifth resistors R4 and R5 to the gate of the nMOSFET NM, and the transmission channel. And a fourth switch SW4 positioned between the fourth and fifth resistors R4 and R5 to connect the transmission channel CH to the fourth and fifth resistors R4 and R5 when impedance matching is requested, Including a fifth switch (SW5) that is located between the fourth and fifth resistors (R4, R5) and the ground, and connects the ground to the fourth and fifth resistors (R4, R5) when impedance matching is requested. , Impedance matching is performed by using an nMOSFET (NM) connected to the ground in a ground termination method as a resistor.

That is, the feedback circuit of FIG. 7 is driven by the same principle as in FIG. 4, but the feedback is implemented in a source follower method.

In this case, the data value transmitted through the transmission channel of FIG. 7 swings within the range from VDD/2 to VDD as shown in FIG. 8.

9 is a diagram for explaining the performance of a transistor according to an embodiment of the present invention. In FIG. 9, a dotted line corresponds to a conventional transistor, and a solid line corresponds to a transistor of the present invention.

First, in the case of a conventional transistor, when the drain voltage is around 500mV, the drain current slope is gentle and the channel resistance maintains 50 ohms, but as the drain voltage approaches 1V, the slope of the drain current becomes steep and the channel resistance decreases. It can be seen that reflection occurs in the area and current consumption increases.

On the other hand, in the transistor of the present invention, it can be seen that the linear relationship between the drain voltage and the drain current is continuously maintained regardless of the drain voltage, and as a result, the channel resistance is also maintained at 50 ohms.

As described above, the present invention keeps the channel resistance of the transistor constant through the gate voltage feedback, so that the reflected signal does not increase and the current can be saved at the same time.

The method according to the present invention described above may be produced as a program for execution in a computer and stored in a computer-readable recording medium. Examples of computer-readable recording media include ROM, RAM, CD-ROM, and magnetic tape. , Floppy disks, optical data storage devices, and the like, and also include those implemented in the form of a carrier wave (for example, transmission through the Internet).

The computer-readable recording medium is distributed over a computer system connected through a network, so that computer-readable codes can be stored and executed in a distributed manner. In addition, functional programs, codes, and code segments for implementing the method can be easily inferred by programmers in the art to which the present invention pertains.

In the above, preferred embodiments of the present invention have been illustrated and described, but the present invention is not limited to the specific embodiments described above, and the present invention is generally in the technical field to which the present invention belongs without departing from the gist of the present invention claimed in the claims. Of course, various modifications may be implemented by those skilled in the art, and these modifications should not be individually understood from the technical idea or perspective of the present invention.

Claims

A transistor connected to the transmission channel to perform impedance matching based on a channel resistance; And

When impedance matching is requested, a feedback-based on-die termination circuit comprising a feedback circuit for adjusting the channel resistance by feeding back a driving voltage or a ground to a gate of the transistor.
The method of claim 1, wherein the transistor is

A feedback-based on-die termination circuit, characterized in that it is a first type transistor connected between a driving voltage and a transmission channel and turned on when a gate voltage is less than or equal to a threshold.
The method of claim 2, wherein the feedback circuit

First and second resistors applied to the gate of the first transistor by voltage-dividing the driving voltage;

A first switch connecting a driving voltage to the first and second resistors when impedance matching is requested; And

And a second switch connecting a transmission channel to the first and second resistors when impedance matching is requested.
The method of claim 3, wherein the feedback circuit

A third resistor connected to ground;

A second type transistor connected between the gate of the first transistor and the third resistor and turned on when a threshold voltage or more is applied to the gate; And

And a third switch connected to a contact point between the drain of the first type transistor and the transfer channel, and connecting the transfer channel to the gate of the second type transistor when impedance matching is requested. Based on-die termination circuit.
The method of claim 1, wherein the transistor is

A feedback-based on-die termination circuit, characterized in that it is a second type transistor connected between ground and a transmission channel and turned on when a gate voltage is greater than or equal to a threshold.
The method of claim 5, wherein the feedback circuit

Fourth and fifth resistors for applying voltage to the gate of the second type transistor by dividing the voltage of the transmission channel;

A fourth switch connecting the transmission channel to the fourth and fifth resistors when impedance matching is requested; And

And a fifth switch connecting the ground to the fourth and fifth resistors when impedance matching is requested.