WO2020003445A1

WO2020003445A1 - Display panel, method for inspecting display panel, and method for manufacturing display panel

Info

Publication number: WO2020003445A1
Application number: PCT/JP2018/024626
Authority: WO
Inventors: 英俊中川
Original assignee: 堺ディスプレイプロダクト株式会社
Priority date: 2018-06-28
Filing date: 2018-06-28
Publication date: 2020-01-02

Abstract

This display panel comprises: a first bus line and a second bus line provided on a substrate and intersecting with each other; an insulating film interposed between the first bus line and the second bus line; a pixel provided at the intersection between the first bus line and the second bus line and including a portion of the insulating film; a drive circuit formed on the surface of the substrate, the drive circuit supplying a signal to the pixel through the first bus line; a switching element provided on the substrate and connected to the first bus line; and a third bus line connected to the first bus line via the switching element, the third bus line being used for screening the insulating film. The drive circuit is provided with an output transistor that is connected to the first bus line and outputs a signal. The switching element is provided separately from the output transistor.

Description

Display panel, display panel inspection method, and display panel manufacturing method

The present invention relates to a display panel, a display panel inspection method, and a display panel manufacturing method.

A liquid crystal display panel or an organic EL display panel used for a display of a portable device or a screen of a television receiver includes a plurality of pixels arranged in a matrix, and each pixel emits light having a desired luminance. A pixel drive circuit that operates to emit light is provided. The liquid crystal display panel and the like further include a bus line through which a signal supplied to each pixel is transmitted, and the bus line is connected to a gate electrode or a source electrode of a thin film transistor included in the pixel driving circuit. An insulating film forming a gate insulating film of the thin film transistor is provided between a gate electrode of the thin film transistor and a gate bus line connected to the gate electrode, and a drain electrode, a source electrode, and a source bus line connected to the source electrode. Is interposed.

In the manufacturing process of the display panel, this insulating film is formed by forming a film such as silicon dioxide (SiO ₂ ) using, for example, chemical vapor deposition (CVD). However, this insulating film may include a defect such as a pinhole or a foreign substance that lowers the insulating property during the formation process. Such initial defects may accelerate a phenomenon called time-dependent dielectric breakdown (TDDB) in the gate insulating film. However, it may be difficult to detect defects that evolve over time at an early stage. For this reason, there is a case where a screening is performed in which a completed display panel is placed in a more severe state than a normal use state for a short time to reveal potential defects and then an inspection is performed. For example, in Patent Document 1, as a screening of a liquid crystal display panel, a high voltage of a predetermined magnitude is applied between a gate electrode and a source electrode of a thin film transistor connected to a pixel electrode.

JP-A-10-170956

(4) A source signal and a gate signal are supplied to a pixel driver circuit of a display panel from a driver circuit called a source driver and a driver circuit called a gate driver (or a scan driver). In recent years, a technique for forming these drive circuits on a display panel has been introduced, and in particular, a case in which a gate driver is formed on a display panel has been increasing. In that case, if a voltage higher than the normal use voltage is applied to the pixel driving circuit in the screening, the high voltage may be applied to the gate driver or the like unintentionally. In that case, circuit elements constituting a gate driver or the like may be deteriorated or destroyed in this screening. In other words, there is a possibility that a drive circuit that does not have a defect is unintentionally destroyed by application of a high voltage that can exceed its withstand voltage, and a substantially completed display panel is turned into a defective product. In addition, if a driving circuit such as a gate driver is damaged, it is difficult to repair the driving circuit, so that all costs spent on the display panel are wasted and the yield is reduced. On the other hand, when a display panel including a gate driver or the like that has been deteriorated to some extent without being damaged is shipped, it may turn into a failure during use, and the reliability of the display panel may be reduced.

Accordingly, the present invention provides a display panel having a drive circuit for supplying a signal to a pixel via a bus line therein, which is stably produced and has high reliability in both the pixel and the drive circuit. It is another object of the present invention to provide a display panel inspection method and a manufacturing method capable of obtaining a highly reliable display panel while suppressing a decrease in yield.

The display panel according to the first embodiment of the present invention is provided on a substrate and interposed between a first bus line and a second bus line that intersect each other, and is interposed between the first bus line and the second bus line. An insulating film, a pixel provided at an intersection of the first bus line and the second bus line and including a part of the insulating film, and a first bus line formed on a surface of the substrate. A driving circuit for supplying a signal to the pixel via the switching element, a switching element formed on the substrate and connected to the first bus line, and a switching circuit connected to the first bus line via the switching element. And a third bus line used for screening the insulating film. The drive circuit includes an output transistor connected to the first bus line to output the signal. The switching element is provided separately from the output transistor.

The inspection method of the display panel according to the second embodiment of the present invention includes a first bus line and a second bus line which intersect each other via an insulating film, and an intersection between the first bus line and the second bus line. A provided pixel, a driving circuit for supplying a signal from the output transistor connected to the first bus line to the pixel, and a third bus line connected to the first bus line via a switching element Preparing a display panel having at least the following, and controlling the switching element to electrically connect the first bus line and the third bus line, and providing a connection between the second bus line and the third bus line. A predetermined test voltage is applied between the first bus line and the second bus line without passing through the driving circuit, and a voltage is applied before and after the test voltage is applied. Implementing the functional test of the pixels includes that.

The method for manufacturing a display panel according to the third embodiment of the present invention includes inspecting the display panel using the inspection method according to the second embodiment, wherein the first bus line and the insulating layer are provided on the substrate. Preparing the display panel by forming a film, the second bus line, a plurality of the pixels, the drive circuit including the output transistor, the switching element, and the third bus line; The method further includes disabling energization to a pixel determined to be defective in the functional test among the plurality of pixels.

According to the first embodiment of the present invention, in a display panel including therein a drive circuit for supplying a signal to a pixel via a bus line, the production of the display panel is stabilized by preventing the drive circuit from being damaged. In addition, the reliability of the driving circuit can be improved. Further, according to the second and third embodiments of the present invention, it is possible to screen the insulating film while avoiding the risk of damaging the drive circuit, so that a highly reliable display can be performed while suppressing a decrease in yield. You can get panels.

FIG. 1 is a diagram schematically illustrating an example of a configuration of a display panel according to a first embodiment of the present invention. FIG. 2 is a circuit diagram illustrating an example of a switching element and a drive circuit according to the first embodiment. FIG. 3 is a diagram illustrating an example of a cross section taken along a cutting line passing through a first bus line of the display panel according to the first embodiment. FIG. 3 is a diagram illustrating an example of a cross section taken along a cutting line passing through the thin film transistor of the display panel of the first embodiment. FIG. 3 is a circuit diagram illustrating another example of the display panel of the first embodiment. FIG. 3 is a circuit diagram illustrating another example of the display panel of the first embodiment. FIG. 3 is a circuit diagram illustrating another example of the display panel of the first embodiment. FIG. 9 is a diagram illustrating an example of a method of applying a test voltage in

Embodiments

2 and 3 of the present invention. 6 is a flowchart illustrating an example of a display panel inspection method according to a second embodiment of the present invention. FIG. 11 is a diagram illustrating an example of a conventional screening method for a display panel.

(4) The inventor of the present invention has made intensive studies on a display panel having a drive circuit such as a gate driver therein to avoid damage to the drive circuit due to screening of an insulating film. The inventor has found that the output transistor that outputs a signal to be supplied to each pixel in the drive circuit destroyed by the screening is damaged at a portion between the source electrode and the drain electrode. Although the potential difference for screening was not applied between the drain electrode and the source electrode of the output transistor, the output transistor was damaged. In addition, the present inventor has found that in a display panel in which such a damage has occurred in a drive circuit, a leak has also occurred in an insulating film.

FIG. 7 shows a method of applying a potential difference (test voltage Vs) performed in screening in a conventional display panel. The display panel includes a pixel 300, a driving circuit 200, a gate bus line 110, and a source bus line 120. The pixel 300 includes a pixel driving circuit including a thin film transistor (TFT) 310. The source electrode of the TFT 310 is connected to the source bus line 120, and its gate electrode is connected to the gate bus line 110. The driving circuit 200 includes an output transistor 210 connected to the gate bus line 110, and supplies a gate signal to the pixel 300 via the gate bus line 110. At the time of screening, the drive circuit 200 is controlled, and as shown in FIG. 7, the test voltage Vs is applied between the gate bus line 110 and the source bus line 120 via the output transistor 210, that is, the gate insulating film (not shown) of the TFT 310. ). Therefore, the test voltage Vs is not directly applied between the source electrode and the drain electrode of the output transistor 210 of the drive circuit 200. However, when the gate insulating film (not shown) has a defect and the state between the gate electrode and the source electrode of the TFT 310 reaches a low resistance state or a short state, the test voltage Vs is reduced as shown by a symbol Vsd in FIG. A large potential difference can be applied between the source and drain electrodes of the output transistor 210. When the potential difference Vsd is equal to or higher than the breakdown voltage of the output transistor 210, the output transistor 210, that is, the drive circuit 200 is broken. The inventor has confirmed such a mechanism of destruction in a driving circuit provided in a display panel.

The present inventor provides a path for applying a test voltage at the time of screening to an insulating film (gate insulating film) separately from a signal supply path to a pixel in a normal image display, so that destruction by the above-described mechanism is achieved. It was found that the drive circuit could be protected from That is, since a potential difference for screening can be applied to the gate insulating film without passing through the driving circuit, even if the insulating property of the gate insulating film is defective, the output transistor or the like of the driving circuit may be deteriorated or damaged. No high potential difference is applied to the drive circuit. On the other hand, even if a circuit element used for applying a test voltage is destroyed by an unintended large potential difference, the image display function of the display panel is not impaired. As described above, since the insulating film can be screened while avoiding the risk of damaging the driving circuit, the production of the display panel can be stabilized, and a highly reliable display panel can be obtained for both the pixel and the driving circuit. Can be.

Hereinafter, a display panel, a method of inspecting and manufacturing a display panel according to an embodiment of the present invention will be described with reference to the drawings. In addition, the material and shape of each component in each embodiment described below, their relative positional relationship, and the order of each processing in the display panel inspection method and manufacturing method are clearly limited. Except for those that are present, they are only examples. The display panel of the present invention and the method of inspecting and manufacturing the display panel are not to be construed as being limited thereto.

[Display panel structure]
FIG. 1 schematically illustrates an example of the configuration of the display panel 1 according to the first embodiment. As shown in FIG. 1, the display panel 1 includes a first bus line 11 and a second bus line 12 provided on a substrate 10 and intersecting each other, and a first bus line 11 and a second bus line 12. The pixel includes a pixel 3 provided at the intersection and a drive circuit 2 formed on the surface of the substrate 10 and supplying a signal to the pixel 3 via the first bus line 11. The display panel 1 further includes an insulating film 13 (see FIG. 3A) interposed between the first bus line 11 and the second bus line 12, as will be described later. Contains.

In the example of FIG. 1, the display panel 1 includes a plurality of first bus lines 11 and a plurality of second bus lines 12, and is provided at each intersection of the plurality of first bus lines 11 and the plurality of second bus lines 12. Pixel 3 is provided. The image display unit 30 of the display panel 1 is configured by the plurality of pixels 3, and the drive circuit 2 is formed outside the image display unit 30. Each of the plurality of first bus lines 11 is connected to each of the pixels 3 arranged in the same row (each row parallel to the X direction which is the horizontal direction in FIG. 1) among the plurality of pixels 3 arranged in a matrix. Further, each of the second bus lines 12 is connected to each of the pixels 3 arranged in the same column (each column parallel to the Y direction, which is the vertical direction in FIG. 1) among the plurality of pixels 3.

In the example of FIG. 1, the display panel 1 includes a plurality of drive circuits 2, and each drive circuit 2 is connected to each of the pixels 3 arranged in the same row via the first bus line 11. Each drive circuit 2 supplies a gate signal to each of the pixels 3 arranged in the same row at substantially the same time, and a plurality of drive circuits 2 sequentially supply a gate signal for each row of the pixels 3. That is, the drive circuit 2 in FIG. 1 is an example of a drive circuit that functions as a so-called gate driver (scan driver), and each drive circuit 2 functions as a gate driver for one row for each row of the plurality of pixels 3. . The first bus line 11 is a gate bus line of the display panel 1, and the second bus line 12 is a source bus line of the display panel 1. Note that the drive circuit in the present embodiment may supply the gate signal to a plurality of pixels arranged in the same column, not at the same row, at substantially the same time. FIG. 1 also shows a driving circuit (source driver) 2 s provided outside the display panel 1 and supplying a source signal for each column of the plurality of pixels 3, and the second bus line 12 is a driving circuit. It is connected to the circuit 2s.

The display panel 1 further includes a switching element 4 (first switching element) formed on the substrate 10 and connected to the first bus line 11, and a first bus line 11 via the switching element 4. The third bus line 23 is connected. The connection state between the first bus line 11 and the third bus line 23 is switched by the switching element 4. For example, the first bus line 11 and the third bus line 23 are electrically connected, or both are connected. Electrically isolated. As described later, the switching element 4 is exemplified by a transistor or a diode configured by appropriately connecting each terminal of the transistor. The switching element 4 is not limited to these as long as it can switch the electrical connection state of the two bus lines, but is preferably a thin film transistor in terms of ease of manufacturing and control.

1 The display panel 1 of FIG. 1 further includes a clear bus line 25 connected to each of the plurality of drive circuits 2 in addition to the first to

third bus lines

11, 12, and 23. The clear bus line 25 is a bus line for transmitting a signal for discharging electric charges accumulated in the drive circuit 2 as described later. The third bus line 23 and the clear bus line 25 may be connected to a drive circuit 2s functioning as a source driver, as shown in FIG. The supplied signal is supplied from the drive circuit 2s.

(4) Each of the plurality of pixels 3 includes a pixel drive circuit 3a that switches the state of light emission from the pixel 3. The driving circuit 2 (hereinafter, the driving circuit 2 in the example functioning as a gate driver is also referred to as a gate driver 2 to clarify the distinction from the pixel driving circuit 3a) is connected to the pixel driving circuit 3a of each pixel 3. Have been. In the example of FIG. 1, the pixel drive circuit 3a includes a thin film transistor (TFT) 31 and an auxiliary capacitor 3b. The gate driver 2 is connected to the gate electrode of the TFT 31 via the first bus line 11. I have. The source electrode of the TFT 31 is connected to an external source driver (drive circuit 2s) via the second bus line 12. The drain electrode of the TFT 31 is connected to a pixel electrode provided in the liquid crystal layer LC for each pixel 3 and is connected to an auxiliary capacitor 3b. That is, FIG. 1 shows an example in which the display panel 1 is a liquid crystal display panel. The display panel of the present embodiment may be an active matrix type display panel other than the liquid crystal display panel, for example, an organic EL display panel.

FIG. 2 is a circuit diagram showing an example of the switching element 4 and the drive circuit 2 functioning as a gate driver in the display panel 1 of the present embodiment. FIG. 2 also shows a TFT 31 provided in the second bus line 12 and the pixel 3 (see FIG. 1). In FIG. 2, some of the circuit elements constituting the drive circuit 2 are omitted as appropriate. In the example of FIG. 2, the drive circuit 2 includes five transistors 2a to 2e including an output transistor 2a that outputs a signal to be supplied to the pixel 3, and a capacitor 2f. The transistors 2a to 2e are preferably thin film transistors formed on the substrate 10. One of the drain electrode and the source electrode of the output transistor 2a is connected to the first bus line 11 via the output GO of the drive circuit 2, and the other is connected to the clock bus line 26 via the input CK of the drive circuit 2. It is connected. The clock bus line 26 is a bus line that transmits a clock signal that defines a timing for outputting a gate signal from the drive circuit 2, and is preferably arranged in parallel with the clear bus line 25. When a plurality of drive circuits 2 are provided as in the example of FIG. 1, the inputs I1 and I2 and the output Q of the drive circuit 2 can be connected to another drive circuit 2.

In the example of FIG. 2, the switching element 4 is a field effect transistor, and is preferably a thin film transistor formed on the substrate 10. In the example of FIG. 2, the switching element 4 has an input terminal to which a test voltage to be described later is applied, an output terminal, and a control terminal used for controlling electric resistance between the input terminal and the output terminal. . The output terminal of the switching element 4 is connected to the first bus line 11, and the input terminal of the switching element 4 is connected to the third bus line 23. In other words, in the switching element 4 (thin film transistor) in the example of FIG. 2, the terminal (electrode) connected to the first bus line 11 is an output terminal, and the terminal (electrode) connected to the third bus line 23 is an input. Is the end. Although a thin film transistor has two electrodes called a drain electrode and a source electrode, these electrodes have substantially the same structure and can have similar functions. In the following description with reference to FIGS. 2 to 5, the terms “source electrode” and “drain electrode” are frequently used so that the switching element 4 can be easily understood even if it is other than a thin film transistor. However, when the switching element 4 is a thin film transistor, either the source electrode or the drain electrode thereof may be the input terminal or the output terminal of the switching element 4. In the thin film transistor, a gate electrode used for controlling conduction and cutoff between these electrodes is a control terminal of the switching element 4.

The third bus line 23 is used for screening the insulating film 13 (see FIG. 3A) provided in the display panel 1. Specifically, the switching element 4 is controlled to be turned on by inputting an appropriate gate potential. The potential of each of the third bus line 23 and the second bus line 12 is controlled by application of a predetermined voltage or the like, and a test voltage (potential difference) Vs is applied between the third bus line 23 and the second bus line 12. Is done. By doing so, a potential difference based on the test voltage Vs can be applied to the insulating film 13 interposed between the first bus line 11 and the second bus line 12. On the other hand, during a period other than the time when the screening of the insulating film 13 is performed, the TFT 31, the first bus line 11, and the third bus line 23 are electrically connected to each other by controlling the gate potential to a potential at which the switching element 4 can be turned off. Can be separated.

Here, the “test voltage” is a voltage that can reduce the insulating property of the insulating film including a potential defect to a level lower than the insulating property required for the initial insulating film within a predetermined time by the application of the “test voltage”. It is. Therefore, the third bus line 23 is a bus line to which a voltage large enough to make defects of the insulating film 13 evident in the screening of the insulating film 13 is applied between the third bus line 23 and the second bus line 12. The “test voltage” is a voltage that does not lower the reliability of a normal insulating film to below a required level by application of the “test voltage”. The “test voltage” is required for the manufacturing process of the pixel drive circuit 3a (see FIG. 1) and the display panel 1. It can be determined as appropriate based on the required characteristics and reliability level.

(2) As shown in FIG. 2, the switching element 4 is provided separately from the output transistor 2a of the drive circuit 2. Therefore, even if a defect occurs in the insulating film 13 in the screening for the insulating film 13 (see FIG. 3A), the drive circuit 2 is not destroyed. That is, even if the insulating film 13 is short-circuited in the screening, the potential difference based on the test voltage Vs is not applied to the drive circuit 2, specifically, the output transistor 2a. Accordingly, the damage to the drive circuit 2 can be prevented and the reliability of the drive circuit 2 can be improved while screening the insulating film 13. Further, it is possible to suppress a decrease in the yield due to the destruction of the drive circuit 2, and to stabilize the production of the display panel 1.

When the insulating film 13 is short-circuited, a potential difference based on the test voltage Vs can be applied between the source electrode and the drain electrode of the switching element 4 as shown by a reference symbol Vsd in FIG. In this case, the switching element 4 may be damaged. However, since the switching element 4 is not normally used when the display panel 1 is used, the reliability of the display panel 1 is not reduced.

Also, even if the switching element 4 is destroyed during the screening, there is no particular problem in the screening as long as the destruction causes a short circuit between the source electrode and the drain electrode of the switching element 4. The application of the test voltage Vs to the insulating film 13 via the third bus line 23 and the first bus line 11 can be continued as it is. Then, for example, the source electrode and the drain electrode of the destroyed switching element 4 are electrically separated from the first bus line 11 and the third bus line 23 after the screening, so that the influence of the breakdown is reduced on the display panel 1. To the image display function. In this case, the gate electrode of the switching element 4 and the conductor (the clear bus line 25 in the example of FIG. 2) to which the gate electrode is connected are electrically separated, and the source electrode or the drain electrode of the switching element 4 May be electrically separated from the first bus line 11 or the third bus line 23.

On the other hand, if the destruction of the switching element 4 during screening is a destruction that causes an open state between the source electrode and the drain electrode, the image display function of the display panel 1 is not affected by the destruction.

In the example of FIG. 2, the drive circuit 2 further includes an input I3, and the gate electrode of the transistor 2c is connected to the clear bus line 25 via the input I3. One of the source electrode and the drain electrode of the transistor 2c is connected to the gate electrode of the transistor 2a and the capacitor 2f, and the other of the source electrode and the drain electrode of the transistor 2c is connected to an arbitrary constant potential node (in the example of FIG. Potential Vss). Therefore, the transistor 2c discharges the charge stored in the gate capacitance of the transistor 2a and the capacitor 2f according to the potential of the clear bus line 25. The “negative reference potential” can be generated and provided by a voltage source such as an on-board power supply provided outside the display panel 1, for example. The negative reference potential Vss is, for example, -6 V or -8 V, but is not limited thereto.

(4) In addition to the transistor 2c, a gate electrode of any transistor capable of discharging the charge accumulated in any capacitance component of the drive circuit 2 may be connected to the clear bus line 25. The clear bus line 25 is a bus line that transmits a signal of a predetermined potential that can turn on the transistor 2c and the like when discharging the charge stored in the drive circuit 2 as described above. For example, a signal for turning on the transistor 2 c or the like to discharge the electric charge accumulated in the drive circuit 2 at a predetermined timing, for example, at a predetermined cycle or at an irregular time, is transmitted through the clear bus line 25. Is done. Preferably, when image data for one frame of a display image starts to be sequentially written to each pixel 3, a signal that enables discharge in a capacitance component of the drive circuit 2 is transmitted through the clear bus line 25.

In the example of FIG. 2, the control terminal (gate electrode) of the switching element 4 is connected to the clear bus line 25. Accordingly, the charge accumulated in the capacitance component in the drive circuit 2 can be discharged only by inputting a signal of a potential that can turn on the transistor 2c and the switching element 4 to the clear bus line 25, and at the same time, the first bus The line 11 and the third bus line 23 can be electrically connected. That is, when screening the insulating film 13 (see FIG. 3A), the insulating film 13 can be screened while the output transistor 2a is stably kept in the off state.

In the example of FIG. 2, the third bus line 23 and the switching element 4 can also be used for discharging the charge accumulated in the gate capacitance and the storage capacitance 3b of the TFT 31 (see FIG. 1). More specifically, every time image data is written to the TFT 31, an amount of charge corresponding to the image data is stored in the gate capacitance and the storage capacitance 3b of the TFT 31. After the display of the image for one frame and before the writing of the image data for the next frame starts, preferably, the charge stored in the previous frame is discharged. In the example of FIG. 2, the control terminal (gate electrode) of the switching element 4 is connected to the clear bus line 25, and as described above, when one frame of image data starts to be sequentially written to each pixel 3, A predetermined signal is transmitted through the clear bus line 25. At this time, by connecting the third bus line 23 to an arbitrary constant potential node, for example, a negative reference potential Vss, the charge stored in the gate capacitance of the TFT 31 is discharged through the switching element 4 and the third bus line 23. Can be done.

FIG. 3A shows an example of a cross section in the thickness direction of the substrate 10 in the display panel 1 of the present embodiment, which is taken along a cutting line passing through the first bus line 11. FIG. 3B shows an example of a cross section in a thickness direction of the substrate 10 along a cutting line passing through the TFT 31 and the switching element 4 as in the cross section shown in FIG. 3A. Note that, in FIG. 3B, illustration of circuit elements other than the TFT 31 configuring the drive circuit 2 and the pixel drive circuit 3a is omitted.

As shown in FIG. 3A, a first bus line 11 and a second bus line 12 are formed on the surface of the substrate 10 so as to intersect each other, and the first bus line 11 and the second bus line 12 And an insulating film 13 is interposed therebetween. The insulating film 13 is interposed between the source electrode 35 and the drain electrode 36 and the gate electrode 32 in the TFT 31 as shown in FIG. 3B, and forms a gate insulating film of the TFT 31. In other words, each of the plurality of pixels 3 (see FIG. 1) including the TFT 31 in the pixel driving circuit 3a includes a part of the insulating film 13. Although not explicitly shown in FIGS. 3A and 3B, the gate electrode 32 of the TFT 31 is connected to the first bus line 11, and the source electrode 35 is connected to the second bus line 12. In the insulating film 13 (gate insulating film) sandwiched between the gate electrode 32 and the source electrode 35, a decrease in insulation or a short circuit due to a defect during manufacturing or the like may occur during the screening. In the present embodiment, as described above, the drive circuit 2 can be prevented from being broken even in such a case.

3A and 3B, the first bus line 11 is formed on the surface of the substrate 10, and the insulating film 13 covering the first bus line 11 is formed on substantially the entire surface of the substrate 10. The second bus line 12 is formed at the bottom. The third bus line 23 is formed on the substrate 10 along a direction substantially orthogonal to the first bus line 11, and is formed between the edge of the substrate 10 and the switching element 4. However, the third bus line 23 may be formed between the switching element 4 and the image display unit 30, or may be formed on the substrate 10 more than the driving circuit 2 (see FIG. 1) not shown in FIG. 3B. It may be formed at a position near the edge. Note that the vertical positional relationship between the first bus line 11 and the second bus line 12 on the substrate 10 may be opposite to that in the example of FIGS. 3A and 3B. Further, the third bus line 23 may be formed on the insulating film 13 similarly to the second bus line 12.

{Circle around (4)} The clear bus line 25 is formed on the surface of the substrate 10 similarly to the first bus line 11. The clear bus line 25 is formed on the edge of the substrate 10 along a direction substantially orthogonal to the first bus line 11.

In FIG. 3B, the switching element 4 is formed of a thin film transistor like the TFT 31, and is formed outside the image display unit 30 (see FIG. 1). The thin film transistor and the TFT 31 that constitute the switching element 4 include semiconductor layers 43 and 33 on

gate electrodes

42 and 32, respectively, with a gate insulating film formed by a part of the insulating film 13 interposed therebetween. As the insulating film 13, a silicon oxide film (SiO ₂ ) or a silicon nitride film (SiN _x ) is exemplified. The semiconductor layers 43 and 33 are formed using, for example, amorphous silicon, low-temperature polycrystalline silicon (LTPS), or a mixed crystal semiconductor. On the semiconductor layers 43 and 33, contact layers 44 and 34 are formed by a semiconductor having a high impurity concentration, and on the contact layers 44 and 34 and a part of the insulating film 13,

source electrodes

45 and 35 and

Drain electrodes

46 and 36 are formed. The

gate electrodes

42 and 32 and the first bus line 11, the

source electrodes

45 and 35, the

drain electrodes

46 and 36, the second bus line 12 and the third bus line 23 are made of, for example, tungsten, molybdenum, titanium, aluminum, or copper. -It is formed using a titanium alloy or the like. The transistors 2a to 2e (see FIG. 2) constituting the drive circuit 2 omitted in FIGS. 3A and 3B are also formed using the same material as the switching element 4 and the TFT 31 shown in FIG. 3B. May have the same structure as Note that the structures of the TFT 31 and the switching element 4 shown in FIG. 3B are merely examples. The TFT 31 and the switching element 4 may be, for example, top-gate thin film transistors.

(4) A large potential difference can be unintentionally applied between the source electrode 45 and the drain electrode 46 of the switching element 4 as described above. Therefore, the gap G4 between the source electrode 45 and the drain electrode 46 of the thin film transistor constituting the switching element 4 is preferably larger than the gap between the source electrode and the drain electrode of the transistor in the drive circuit 2 (not shown). . Further, the gap G4 may be larger than the gap G3 between the source electrode 35 and the drain electrode 36 of the TFT 31.

3A and 3B illustrate the display panel 1 which is a liquid crystal display panel similarly to FIG. 1, so that a liquid crystal layer LC and the like are formed on the pixel driving circuit 3a. Specifically, as shown in FIG. 3B, a flattening film 14a covering the pixel driving circuit 3a is formed, and a pixel electrode 16a is formed on the surface of the flattening film 14a. The pixel electrode 16a is connected to the drain electrode 36 via the contact conductor 15 formed on the flattening film 14a. A first alignment film 17a is formed on the planarizing film 14a and the pixel electrode 16a, and a liquid crystal layer LC is formed between the first alignment film 17a and the second alignment film 17b by injecting a nematic liquid crystal or the like. ing. The second alignment film 17b is laminated on the surface of the opposing substrate 10b facing the substrate 10, together with the color filter 19, the planarizing film 14b, and the opposing electrode 16b. The opposing substrate 10b is disposed so as to oppose the substrate 10 with the pixel drive circuit 3a interposed therebetween, and a predetermined space is secured between the substrate 10 and the opposing substrate 10b by a spacer 18. Although not shown, a polarizing plate may be provided on the surface of each of the substrate 10 and the counter substrate 10b facing the direction opposite to the liquid crystal layer LC, and the display panel 1 is a transmissive liquid crystal display panel. Is provided with a light source constituted by an LED or the like, or a light guide plate (neither is shown), facing the polarizing plate provided on the substrate 10. Since each component such as the pixel electrode 16a, the first and

second alignment films

17a and 17b, and the liquid crystal layer LC on the pixel drive circuit 3a can have a general structure, detailed description thereof is omitted. Is done. When the display panel 1 is an organic EL display panel, an organic light emitting element is formed for each pixel 3 instead of the liquid crystal layer LC or the like.

[Modification 1 of Display Panel]
FIG. 4A shows the switching element 4 according to the first modification of the present embodiment together with the drive circuit 2. In the example of FIG. 4A, the switching element 4 is formed of a transistor as in the example of FIG. 2 referred to above, and is preferably formed of a thin film transistor. In the present modification, the control terminal (gate electrode) of the switching element 4 is not connected to the clear bus line 25 and the drive circuit 2, but is connected to the input terminal (source electrode or drain electrode of the thin film transistor) of the switching element 4 on the third bus. Connected to line 23. Therefore, the thin film transistor constituting the switching element 4 can have a diode function by so-called diode connection.

On the other hand, the output terminal of the switching element 4 (the electrode of the source electrode and the drain electrode that is not connected to the third bus line 23) is connected to the first bus line 11 as in the example of FIG. Therefore, if a potential difference exceeding the threshold voltage of the thin film transistor constituting the switching element 4 is applied between the third bus line 23 and the first bus line 11, the switching element 4 is turned on, and the third bus line 23 The first bus line 11 is electrically connected. Therefore, by applying a potential difference between the third bus line 23 and the second bus line 12 that sufficiently exceeds the threshold voltage of the thin film transistor forming the switching element 4, the screening of the insulating film 13 (see FIG. 3A) can be performed. It can be carried out. That is, unlike the example of FIG. 2, the screening of the insulating film 13 can be performed without being affected by the signal transmitted through the clear bus line 25. Except that the control terminal of the switching element 4 is connected to the third bus line 23, the configuration of the present modification is the same as the configuration shown in FIG. 2, and a redundant description of the same components will be omitted. Is done.

[Modification 2 of Display Panel]
FIG. 4B shows the switching element 4 according to the second modification of the present embodiment together with the drive circuit 2. In the example of FIG. 4B, the switching element 4 is configured by a transistor, similarly to the example of FIG. 2 referred to above, and is preferably configured by a thin film transistor. In this modification, the display panel 1 (see FIG. 1) further includes a fourth bus line 24, and the control terminal (gate electrode) of the switching element 4 is connected to the clear bus line 25 and the drive circuit 2. Instead, they are connected to the fourth bus line 24. Therefore, the fourth bus line 24 is used for controlling the switching element 4 and for screening the insulating film 13 (see FIG. 3A). That is, in the present modification, when screening the insulating film 13, a signal of a predetermined potential at which the switching element 4 can be turned on is transmitted through the fourth bus line 24. Then, by applying a predetermined test voltage between the third bus line 23 and the second bus line 12, the insulating film 13 can be screened.

In the present modification, the switching element 4 can be controlled independently of the clear bus line 25, similarly to the first modification described above. Therefore, the screening of the insulating film 13 can be performed without affecting the operation of the drive circuit 2. Further, in this modification, the source electrode and the drain electrode of the switching element 4 are independently connected to the third bus line 23 or the first bus line 11 without a gate electrode. Therefore, the potential difference between the source electrode and the drain electrode when the switching element 4 is on is smaller than the potential difference in the first modification. Therefore, for example, if the potential of the signal transmitted through the third bus line 23 is the same in the first modification and the second modification, it is considered that a higher potential difference can be applied to the insulating film 13 in the second modification. Can be Except that the gate electrode of the thin film transistor that constitutes the switching element 4 is connected to the fourth bus line 24, the configuration of this modification is the same as the configuration shown in FIG. Is omitted.

[Modification 3 of Display Panel]
FIG. 4C shows the switching element 4 according to the third modification of the present embodiment together with the drive circuit 2. In the example of FIG. 4C as well, the switching element 4 is configured by a transistor, similarly to the above-described modification 2, and is preferably configured by a thin film transistor. Also, in the present modification, a fourth bus line 24 is provided, and a control terminal (gate electrode) of the switching element 4 is connected to the fourth bus line 24. Therefore, the insulating film 13 (see FIG. 3A) can be screened without affecting the operation of the drive circuit 2. Also, a clear bus line 25 is provided as in the example of FIG. Through the clear bus line 25, the electric charge stored in the drive circuit 2, for example, the electric charge stored between the gate electrode of the output transistor 2a and the first bus line 11, is supplied at a predetermined timing, for example, at a predetermined cycle or A signal to be discharged at an occasional desired time is transmitted.

In this modification, a second switching element 4b connected to the fourth bus line 24 and the gate electrode of the output transistor 2a of the drive circuit 2 is further provided. As the second switching element 4b, various transistors, thyristors, semiconductor switch ICs, and the like are exemplified. However, like the switching element 4a, a thin film transistor is preferable as the second switching element 4b. Therefore, the second switching element 4b can have the same structure as the switching element 4 illustrated in FIG. 3B. In the example of FIG. 4C, the gate electrode of the second switching element 4b formed by a transistor is connected to the fourth bus line 24. One of the source electrode and the drain electrode of the second switching element 4b is connected to the gate electrode of the output transistor 2a of the drive circuit 2, and the other of the source electrode and the drain electrode of the second switching element 4b is connected to an arbitrary constant potential node (see FIG. 4C, it is connected to the negative reference potential Vss). Therefore, the second switching element 4b can control the output transistor 2a to be turned off according to the potential of the fourth bus line 24.

As described above, at the time of screening the insulating film 13, a signal of a predetermined potential at which the switching element 4 can be turned on is transmitted through the fourth bus line 24. In this modified example, at the time of this screening, by transmitting a signal of a predetermined potential capable of turning on the second switching element 4b in addition to the switching element 4, the gate electrode of the output transistor 2a and the first bus line 11 are connected. The electric charge stored during the discharge can be discharged. That is, the electric charge stored in the gate capacitance of the output transistor 2a, the capacitor 2f, and the like can be discharged without requiring the application of a specific signal to the clear bus line 25. Then, without applying a specific signal to the clear bus line 25, the insulating film 13 can be screened while the output transistor 2a is stably kept in the OFF state as in the example of FIG. 2 referred to earlier. it can. Depending on the circuit configuration of the drive circuit 2, the timing when a specific signal can be applied to the clear bus line 25 may be limited. In such a case, a configuration like the third modification is useful.

[Display panel inspection method]
The display panel inspection method according to the second embodiment will be described with reference to FIGS. 1, 2, 3 </ b> A, 3 </ b> A and 3 </ b> B. This will be described with reference to FIG.

First, the display panel 1 is prepared (S1 in FIG. 6). As illustrated in FIGS. 1, 2, 3A, and 3B, the display panel 1 includes a first bus line 11 and a second bus line 12 that intersect each other via an insulating film 13, and a first bus line 11. Pixel 3 provided at the intersection of the first bus line 11, the driving circuit 2 for supplying a signal from the output transistor 2 a connected to the first bus line 11 to the pixel 3, and the switching element 4. And at least a third bus line 23 connected to the first bus line 11. The display panel 1 includes at least a first bus line 11, an insulating film 13, a second bus line 12, and a pixel on a substrate 10 as described in a display panel manufacturing method according to a third embodiment described later. 3, can be prepared by forming the drive circuit 2 including the output transistor 2a, the switching element 4, and the third bus line 23. Note that the display panel inspection method of the present embodiment does not necessarily include the formation of the components of the display panel 1 such as the first bus line 11. For example, the display panel 1 includes the necessary components. It may be prepared by simply bringing the provided display panel 1 to the place where the inspection is performed.

Then, the switching element 4 is controlled, and the first bus line 11 and the third bus line 23 are electrically connected (S2 in FIG. 6). In the example of FIG. 5, since the switching element 4 is configured by a transistor, a voltage that can turn on the switching element 4 is applied to the gate electrode of the switching element 4. In the example of FIG. 5, since the gate electrode of the switching element 4 is connected to the clear bus line 25, a voltage at which the switching element 4 can be turned on is applied to the clear bus line 25. Thereby, the first bus line 11 and the third bus line 23 connected to the source electrode or the drain electrode of the switching element 4, respectively, are electrically connected. When the display panel 1 is a first modification illustrated in FIG. 4A, a test voltage is applied between a second bus line 12 and a third bus line 23 to be described later, and the first bus line 11 The three bus lines 23 are electrically connected. When the display panel 1 is the second modification or the third modification illustrated in FIG. 4B or 4C, the switching element 4 is connected to the fourth bus line 24 included in the display panel 1 of the second modification or the third modification. A voltage that can be turned on is applied.

As shown in FIG. 5, between the second bus line 12 and the third bus line 23, a predetermined test voltage Vs capable of exposing a potential defect of the insulating film 13 (see FIG. 3A) is applied. (S3 in FIG. 6). Thereby, a voltage (potential difference) based on the test voltage Vs is applied between the first bus line 11 electrically connected to the third bus line 23 and the second bus line 12. As shown in FIG. 5, a voltage based on the test voltage Vs is applied between the first bus line 11 and the second bus line 12 without passing through the drive circuit 2.

As described above, the test voltage Vs can be appropriately determined based on the manufacturing process of the pixel drive circuit 3a (see FIG. 1), the characteristics and the reliability level required for the display panel 1, and the like. The test voltage Vs (potential difference between the second bus line 12 and the third bus line 23) is, for example, 50 V or more and 100 V or less, and preferably 70 V. In this case, positive and negative power supply voltages supplied to the display panel 1 for normal image display can be used.

The polarity of the test voltage Vs may be constant between the second bus line 12 and the third bus line 23, or may be appropriately inverted. Further, a pulse voltage may be applied. For example, the polarity may be inverted at intervals of about 1 second to 10 seconds. By doing so, a defect of the insulating film 13 may be efficiently made visible. During application of the test voltage Vs, preferably, 0 V (ground potential) is input to each input terminal such as the input CK in the drive circuit 2. Even if a leak occurs in the TFT 31 of the pixel 3 during the screening, it is possible to prevent a voltage higher than the voltage applied to the switching element 4 from being applied to the output transistor 2 a of the drive circuit 2. The test voltage Vs can be supplied, for example, by using an external voltage source or a pulse generator alone or incorporated in the screening apparatus.

(4) After the application of the test voltage, the function test of the pixel 3 is performed (S4 in FIG. 6). The method of the functional test is not particularly limited. For example, a test image such as all white, all black, checkered pattern, vertical and / or horizontal stripe, and gray scale is displayed, and an image pickup device such as a visual inspection or a CCD is provided. The quality of each pixel 3 is determined using an image inspection device. Since the potential difference based on the test voltage Vs is applied first between the first bus line 11 and the second bus line 12, the defective pixel hidden in the insulating film 13 interposed between these bus lines is defective. It can be appropriately determined as a pixel.

In the display panel inspection method of the present embodiment, the potential difference applied between the first bus line 11 and the second bus line 12 for screening the insulating film 13 is applied without passing through the drive circuit 2. . Therefore, even if the first bus line 11 and the second bus line 12 are short-circuited due to the defect of the insulating film 13, the drive circuit 2 is prevented from being damaged or destroyed during the screening. Can come off.

In the method for inspecting a display panel according to the present embodiment, it is preferable that the output transistor 2a of the drive circuit 2 be controlled to be in the off state during the application of the test voltage Vs. The test voltage Vs can be prevented from being applied to the circuit elements constituting the drive circuit 2, and the drive circuit 2 can be maintained in a stable state. In the example of FIG. 5, the output transistor 2a can be turned off by applying a voltage to the clear bus line 25 that can turn on the transistor 2c of the drive circuit 2 in addition to the switching element 4. Also in the case where the display panel 1 is any one of Modifications 1 to 3 illustrated in any of FIGS. 4A to 4C, a voltage capable of turning on the transistor 2c of the drive circuit 2 is applied to the clear bus line 25. By doing so, the output transistor 2a can be turned off. When the display panel 1 is the third modification, the output transistor 2a can be turned off by applying a voltage that can turn on the second switching element 4b to the fourth bus line 24.

During the screening, an amount of charge based on the test voltage Vs is accumulated in the capacitance component of the pixel 3. Therefore, the charge stored in the pixel 3 may be discharged via the switching element 4 and the third bus line 23 after the application of the test voltage Vs. Specifically, the electric charge stored in the gate capacitance of the TFT 31 is discharged. For example, in the example of FIG. 5, the charge stored in these capacitance components is applied to the clear bus line 25 so that the switching element 4 can be turned on, and is applied to an arbitrary constant potential node (for example, the negative reference potential Vss). It can be discharged by connecting the third bus line 23. If there is a potential difference between the first bus line 11 and a node (netA) of the drive circuit 2 to which the gate electrode of the output transistor 2a is connected, the netA is unintentionally charged and the drive circuit 2 malfunctions. May cause. However, such an erroneous operation can be prevented by intentionally discharging the charge stored in the pixel 3. When the display panel 1 is the second modification or the third modification shown in FIG. 4B or FIG. 4C, a voltage capable of turning on the switching element 4 is applied to the fourth bus line 24, and the voltage is applied to an arbitrary constant potential node. By connecting the third bus line 23, the electric charge stored in the pixel 3 can be discharged.

[Display panel manufacturing method]
A method of manufacturing the display panel according to the third embodiment will be described with reference to the drawings again, taking the display panel 1 according to the first embodiment illustrated in FIGS. 1, 2, 3A, and 3B as an example.

表示 The method for manufacturing a display panel according to the present embodiment includes inspecting the display panel 1 using the above-described inspection method for a display panel according to the second embodiment. First, as shown in FIGS. 1, 2, 3A and 3B, a first bus line 11, an insulating film 13, a second bus line 12, a plurality of pixels 3, The display panel 1 is prepared by forming the drive circuit 2 including the output transistor 2a, the switching element 4, and the third bus line 23. An example of a method of forming the first to

third bus lines

11, 12, and 23, the plurality of pixels 3, the drive circuit 2, and the switching element 4 will be described below. It is not limited to the method described below. Note that the following description uses the display panel 1 illustrated in FIGS. 1, 2, 3A, and 3B as an example, so that the switching element 4 is configured by a thin film transistor. Further, as described above, since the drive circuit 2 is preferably mainly formed of a thin film transistor, it can be formed by forming a thin film transistor in the same manner as the switching element 4. Therefore, the description thereof will be appropriately omitted.

As shown in FIGS. 3A and 3B, the first bus line 11, the third bus line 23, the gate electrode 42 of the switching element 4, and the gate electrode 32 of the TFT 31 of the pixel driving circuit 3a are formed on the surface of the substrate 10. It is formed. 3A and 3B, the clear bus line 25 is formed together with the first bus line 11 and the like. 3A and 3B show an example in which the switching element 4 and the TFT 31 are bottom gate type amorphous silicon transistors.

In forming the first and

third bus lines

11 and 23 and the

gate electrodes

42 and 32, first, a metal film such as tungsten or molybdenum is formed on the surface of the substrate 10 by sputtering or the like. Then, the metal film is patterned by forming an etching resist using photolithography technology and dry or wet etching. As a result, the metal film is separated into conductor patterns having a desired shape, and the

respective bus lines

11 and 23 and the

respective gate electrodes

42 and 32 formed of the respective conductor patterns are formed. At the same time, other bus lines such as the clear bus line 25 and the fourth bus line 24 (see FIG. 4B), and conductor patterns forming other circuit elements such as the auxiliary capacitor 3b (see FIG. 1) also have the first bus line. 11 and the like.

As shown in FIG. 3B, an insulating film 13 covering the first bus line 11 and the

gate electrodes

42 and 32 is formed. The insulating film 13 is formed, for example, by forming a SiO ₂ film or a SiN _x film using a plasma CVD method. A part of the insulating film 13 forms a gate insulating film of the switching element 4, the TFT 31 forming the pixel driving circuit 3a (see FIG. 1), and the transistors 2a to 2e forming the driving circuit 2 (see FIG. 2). . Next, semiconductor layers 43 and 33 are formed on insulating film 13 using, for example, a plasma CVD method. The semiconductor layers 43 and 33 are patterned into a desired shape using dry etching or the like. Thereafter, preferably, contact layers 44 and 34 are formed on the semiconductor layers 43 and 33 using a semiconductor having a high impurity concentration.

Then, the source electrode 45 and the drain electrode 46 of the switching element 4 are formed on the semiconductor layer 43 (or the contact layer 44) and the insulating film 13, and on the semiconductor layer 33 (or the contact layer 34) and the insulating film 13. The source electrode 35 and the drain electrode 36 of the TFT 31 are formed. At the same time, the second bus line 12 and the source electrode and the drain electrode (not shown) of the transistors 2a to 2e (see FIG. 2) constituting the drive circuit 2 are formed on the insulating film 13. For example, a tungsten film or a titanium film is formed by using sputtering, and the formed film is separated by dry or wet etching or the like, whereby each electrode and the second bus line 12 can be formed. A conductor pattern forming another circuit element such as the auxiliary capacitor 3b may be formed together with the second bus line 12 or the like. As a result, at least the first to

third bus lines

11, 12, and 23, the switching element 4, the driving circuit 2, and the pixel driving circuit 3a including the TFT 31 and the auxiliary capacitance 3b (see FIG. 1) are formed. Note that the third and

fourth bus lines

23 and 24 may be formed on the insulating film 13 together with the second bus line 12.

Thereafter, a flattening film 14a made of SiO ₂ or SiN _X is formed by, for example, a CVD method. Further, components necessary for image display using liquid crystal molecules such as a liquid crystal layer LC are formed on the flattening film 14a. Alternatively, an organic light emitting element is formed by vapor deposition of an organic light emitting material or the like. Since the liquid crystal layer LC and the organic light emitting layer (not shown) are formed by a general method, description thereof is omitted. For example, the display panel 1 is prepared through the above steps.

(4) A test voltage is applied to the prepared display panel 1 and a function test of the pixel 3 is performed in accordance with the display panel inspection method of the second embodiment, and the quality of the pixel 3 is determined.

The method for manufacturing a display panel according to the third embodiment further includes disabling energization to the pixels 3 determined to be defective in the function test in the display panel inspection method according to the second embodiment among the plurality of pixels 3. In. For example, any one of a connection portion between the gate electrode of the TFT 31 constituting the pixel 3 including the defect and the first bus line 11 and a connection portion connecting the source electrode of the TFT 31 and the second bus line 12 or Both are cut by laser light irradiation or the like. By doing so, it is possible to prevent the display of the other pixels 3 from being affected by the pixel 3 determined to be defective. Therefore, when a predetermined quality criterion for the number and content of defective pixels is satisfied, the display panel 1 including the defective pixels 3 can be modified into a display panel 1 that can be handled as a non-defective product.

As described above, according to the method for manufacturing a display panel of the present embodiment, even when the insulation of the display panel includes a defect, the insulating film can be screened while avoiding damage to the drive circuit. Then, it may be possible to repair the display panel in which the defect is detected to a non-defective product. Therefore, a highly reliable display panel can be obtained while suppressing a decrease in yield.

[Summary]
(1) The display panel according to the first embodiment of the present invention is provided on a substrate and is provided between a first bus line and a second bus line that intersect each other, and between the first bus line and the second bus line. An insulating film interposed between the first bus line and the second bus line; a pixel provided at an intersection of the first bus line and the second bus line, the pixel including a part of the insulating film; A drive circuit for supplying a signal to the pixel via a bus line; a switching element formed on the substrate and connected to the first bus line; and a first bus line via the switching element. And a third bus line used for screening the insulating film. The drive circuit includes an output transistor connected to the first bus line to output the signal. Ri, the switching element is provided separately from the output transistor.

According to the configuration (1), the production of the display panel can be stabilized by preventing the driving circuit from being damaged, and the reliability of the pixels and the driving circuit can be improved.

(2) In the display panel according to the above (1), the third bus line may be a bus line to which a voltage large enough to make defects of the insulating film apparent in the screening is applied. In that case, a potential defect can be made obvious, and the reliability of the display panel can be improved.

(3) In the display panel according to (1) or (2), the switching element is a thin film transistor having an input terminal, an output terminal, and a control terminal, and the output terminal of the switching element is connected to the first bus line. The input terminal of the switching element may be connected to the third bus line. In this case, the connection and disconnection between the first bus line and the third bus line can be switched only by controlling the switching element.

(4) In the display panel according to (3), the control terminal of the switching element may be connected to the third bus line together with the input terminal of the switching element. In that case, the insulating film can be screened only by applying a voltage between the third bus line and the second bus line.

(5) In the display panel according to (3), the display panel further includes a clear bus line for transmitting a signal for discharging electric charges accumulated in the drive circuit at a predetermined timing, and the control terminal of the switching element. May be connected to the clear bus line. In that case, the insulating film can be screened while the output transistor of the driver circuit is stably kept in the off state.

(6) The display panel according to (3) may further include a fourth bus line connected to the control terminal of the switching element and used for the screening. In that case, screening of the insulating film can be performed without affecting the operation of the driver circuit.

(7) The display panel according to (6), wherein the display panel is connected to the fourth bus line and a gate electrode of the output transistor, and controls the output transistor to be in an off state according to the potential of the fourth bus line. A switching element may be further provided. In that case, the insulating film can be screened while the output transistor is stably kept off without affecting the operation of the drive circuit.

(8) The display panel according to (7), further including a clear bus line for transmitting a signal for discharging the electric charge stored between the gate electrode of the output transistor and the first bus line at a predetermined timing. May be. In that case, the electric charge accumulated in the drive circuit 2 can be discharged at a predetermined time regardless of whether or not the screening is being performed.

(9) In the display panel inspection method according to the second embodiment of the present invention, the first bus line and the second bus line intersecting each other with an insulating film interposed therebetween, and the first bus line and the second bus line are connected to each other. A pixel provided at the intersection, a driving circuit for supplying a signal from the output transistor connected to the first bus line to the pixel, and a driving circuit connected to the first bus line via a switching element A display panel including at least three bus lines; controlling the switching element to electrically connect the first bus line and the third bus line; A predetermined test voltage is applied between the first bus line and the second bus line without passing through the drive circuit by applying a predetermined test voltage between the first bus line and the second bus line. Implementing the functional test of the pixels includes that.

According to the configuration (9), a highly reliable display panel can be obtained while suppressing a decrease in yield.

(10) The method for inspecting a display panel according to (9) further includes, after the test voltage is applied, discharging the charge stored in the pixel via the switching element and the third bus line. It may be. By doing so, breakage and deterioration of the display panel can be prevented.

(11) In the method for inspecting a display panel according to the above (9) or (10), the output transistor may be turned off during the application of the test voltage. By doing so, the drive circuit can be maintained in a stable state during the application of the test voltage.

(12) The method of manufacturing a display panel according to the third embodiment of the present invention includes inspecting the display panel by using any one of the inspection methods (9) to (11) above. Forming the first bus line, the insulating film, the second bus line, the plurality of pixels, the driving circuit including the output transistor, the switching element, and the third bus line. The method further includes preparing the display panel and disabling energization to a pixel determined to be defective in the functional test among the plurality of pixels.

According to the configuration (12), a highly reliable display panel can be obtained while suppressing a decrease in yield.

Reference Signs List 1 display panel 10 substrate 11 first bus line 12 second bus line 13 insulating film (gate insulating film)
2 Drive circuit 2a Output transistor 23 Third bus line 24 Fourth bus line 25 Clear bus line 3 Pixel 31 Thin film transistor (TFT)
4 Switching element 42 Gate electrode 45 Source electrode 46 Drain electrode 4b Second switching element Vs Test voltage

Claims

A first bus line and a second bus line provided on a substrate and intersecting each other;
An insulating film interposed between the first bus line and the second bus line;
A pixel provided at an intersection of the first bus line and the second bus line and including a part of the insulating film;
A drive circuit formed on a surface of the substrate and supplying a signal to the pixel via the first bus line;
A switching element formed on the substrate and connected to the first bus line;
A third bus line connected to the first bus line via the switching element and used for screening the insulating film;
The drive circuit includes an output transistor connected to the first bus line and outputting the signal.
The display panel, wherein the switching element is provided separately from the output transistor.
The display panel according to claim 1, wherein the third bus line is a bus line to which a voltage having a magnitude that can make defects of the insulating film visible in the screening is applied.
The switching element is a thin film transistor having an input terminal, an output terminal, and a control terminal,
The display panel according to claim 1, wherein the output terminal of the switching element is connected to the first bus line, and the input terminal of the switching element is connected to the third bus line.
The display panel according to claim 3, wherein the control terminal of the switching element is connected to the third bus line together with the input terminal of the switching element.
The display panel further includes a clear bus line that transmits a signal for discharging the electric charge accumulated in the driving circuit at a predetermined timing,
The display panel according to claim 3, wherein the control terminal of the switching element is connected to the clear bus line.
The display panel according to claim 3, further comprising a fourth bus line connected to the control terminal of the switching element and used for the screening.
7. The semiconductor device according to claim 6, further comprising a second switching element connected to the fourth bus line and a gate electrode of the output transistor, the second switching element controlling the output transistor to be in an off state according to the potential of the fourth bus line. Display panel as described.
8. The display panel according to claim 7, further comprising: a clear bus line transmitting a signal for discharging a charge stored between the gate electrode of the output transistor and the first bus line at a predetermined timing.
A first bus line and a second bus line that intersect with each other via an insulating film, a pixel provided at an intersection of the first bus line and the second bus line, and a pixel connected to the first bus line. Preparing a display panel including at least a driving circuit for supplying a signal from the output transistor to the pixel, and a third bus line connected to the first bus line via a switching element;
Controlling the switching element to electrically connect the first bus line and the third bus line;
By applying a predetermined test voltage between the second bus line and the third bus line, a voltage is applied between the first bus line and the second bus line without passing through the driving circuit. And
Performing a function test of the pixel after applying the test voltage.
The method according to claim 9, further comprising: discharging the charge stored in the pixel via the switching element and the third bus line after the application of the test voltage.
11. The display panel inspection method according to claim 9, wherein the output transistor is controlled to be in an off state while the test voltage is being applied.
Inspecting a display panel using the inspection method according to any one of claims 9 to 11,
On the substrate, the first bus line, the insulating film, the second bus line, a plurality of the pixels, the drive circuit including the output transistor, the switching element, the third bus, Preparing said display panel by forming lines and
A method of manufacturing a display panel, further comprising disabling energization to a pixel determined to be defective in the functional test among the plurality of pixels.