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WO2020071020A1 - High-frequency module and communication device - Google Patents

High-frequency module and communication device

Info

Publication number
WO2020071020A1
WO2020071020A1 PCT/JP2019/034054 JP2019034054W WO2020071020A1 WO 2020071020 A1 WO2020071020 A1 WO 2020071020A1 JP 2019034054 W JP2019034054 W JP 2019034054W WO 2020071020 A1 WO2020071020 A1 WO 2020071020A1
Authority
WO
WIPO (PCT)
Prior art keywords
main surface
frequency module
semiconductor
module substrate
frequency
Prior art date
Application number
PCT/JP2019/034054
Other languages
French (fr)
Japanese (ja)
Inventor
優佑 浪花
武藤　英樹
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2020071020A1 publication Critical patent/WO2020071020A1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Definitions

  • the present invention relates to a high-frequency module and a communication device.
  • Patent Document 1 discloses a configuration of a circuit component built-in module (high-frequency module) in which surface mounting components are mounted on a first main surface of a multilayer circuit board and semiconductor elements are mounted on a second main surface.
  • this circuit component built-in module when the multilayer circuit board is viewed in plan, a plurality of vias and lands are arranged so as to surround the semiconductor element. Accordingly, the module with built-in circuit components is said to be useful as a high-frequency module excellent in high-frequency operation, noise resistance, heat dissipation, and miniaturization.
  • the plurality of vias and lands are arranged so as to surround the semiconductor element (semiconductor IC), so that high-frequency operation and noise resistance are achieved.
  • electrical performance such as the electrical performance and mechanical performance such as the mounting strength can be secured to some extent, there is a problem that the degree of freedom in designing the arrangement of semiconductor elements (semiconductor ICs) and the degree of design due to the size of the high-frequency module are not secured. is there.
  • the present invention has been made to solve the above problems, and has as its object to provide a high-frequency module and a communication device with improved design flexibility without deteriorating electrical and mechanical performance. I do.
  • a high-frequency module has a module substrate having a first main surface and a second main surface, and a third main surface and a fourth main surface.
  • a semiconductor IC for processing a high-frequency signal mounted on the first main surface so as to be in the order of the third main surface and the fourth main surface, and at least the fourth main surface from the first main surface
  • a plurality of first connection electrodes extending in a direction perpendicular to the first main surface up to a first virtual plane including: a plurality of first connection electrodes, the outer edges of the semiconductor ICs being parallel to each other when the module substrate is viewed in plan The first side and the second side, and a plurality of sides that are orthogonal to the first side and the second side and that are parallel to each other and that constitute a plurality of sides forming the outer edge of the module substrate.
  • the first region on the module substrate and the second region on the module substrate between the side opposite to the second side of the plurality of sides and the second side each include the plurality of regions.
  • Some of the first connection electrodes are arranged, and a third region on the module substrate between the third side of the plurality of sides and the third side is provided with the plurality of first connection electrodes. The first connection electrode is not provided.
  • FIG. 1 is a circuit block diagram illustrating an example of a circuit configuration of the communication device according to the first embodiment.
  • FIG. 2 is a schematic plan view illustrating an example of an arrangement of circuit elements built in the semiconductor IC according to the first embodiment.
  • FIG. 3A is a schematic plan view of the high-frequency module according to Embodiment 1.
  • FIG. 3B is a schematic cross-sectional configuration diagram of the high-frequency module according to Embodiment 1.
  • FIG. 4 is a schematic plan view of a high-frequency module according to a modification of the first embodiment.
  • FIG. 5A is a schematic cross-sectional configuration diagram of the high-frequency module according to Embodiment 2.
  • FIG. 5B is a schematic cross-sectional configuration diagram of the high-frequency module according to Comparative Example 1.
  • FIG. 5A is a schematic cross-sectional configuration diagram of the high-frequency module according to Embodiment 2.
  • FIG. 5B is a schematic cross-sectional configuration diagram of the high-frequency module according to Compar
  • FIG. 5C is a schematic cross-sectional view of the high-frequency module according to Comparative Example 2.
  • FIG. 5D is a schematic cross-sectional view of the high-frequency module according to Comparative Example 3.
  • FIG. 6 is a schematic diagram illustrating a planar configuration and a cross-sectional configuration of a high-frequency module according to Embodiment 3.
  • FIG. 7 is a schematic diagram illustrating a planar configuration and a cross-sectional configuration of a high-frequency module according to a modification of the third embodiment.
  • FIG. 1 is a circuit block diagram illustrating an example of a circuit configuration of the communication device 5 according to the first embodiment.
  • the communication device 5 includes a high-frequency module 1, an antenna element 2, an RF signal processing circuit (RFIC) 3, and a baseband signal processing circuit (BBIC) 4.
  • the high-frequency module 1 is arranged, for example, at the front end of a multi-mode / multi-band compatible mobile phone.
  • the RFIC 3 is an RF signal processing circuit that processes a high-frequency signal transmitted and received by the antenna element 2. Specifically, the RFIC 3 performs signal processing on the high-frequency signal input via the output terminal 102 of the high-frequency module 1 by down-conversion or the like, and outputs a reception signal generated by the signal processing to the BBIC 4.
  • the BBIC 4 is a circuit that performs signal processing using an intermediate frequency band that is lower in frequency than the high frequency signal transmitted through the high frequency module 1.
  • the signal processed by the BBIC 4 is used, for example, as an image signal for displaying an image or as an audio signal for a telephone call via a speaker.
  • the antenna element 2 is connected to the common terminal 101 of the high-frequency module 1, receives an external high-frequency signal, and outputs the signal to the high-frequency module 1.
  • the antenna element 2 and the BBIC 4 are not essential components.
  • the high frequency module 1 includes a digital control circuit 11, switches 12, 13 and 14, an inductor 31, a low noise amplifier 41, and filters 21 and 22.
  • the switches 12, 13, and 14 each have a function of switching the propagation path of the high-frequency signal input to the high-frequency module 1.
  • the switch 12 has, for example, a common terminal and a plurality of selection terminals, and connects the antenna element 2 to the filter 21, the connection between the antenna element 2 and the filter 22, and the connection between the antenna element 2 and other elements. Switch the connection with the filter.
  • the switch 13 has, for example, a common terminal and two selection terminals, and switches connection between the filter 21 and the inductor 31 and connection between the filter 22 and the inductor 31.
  • the switch 14 has, for example, a common terminal and two selection terminals, and switches the connection between the low noise amplifier 41 and the RFIC 3 and the connection between the other low noise amplifiers and the RFIC 3.
  • the filter 21 is, for example, a band-pass filter having a first frequency band as a pass band
  • the filter 22 is, for example, a band-pass filter having a second frequency band as a pass band.
  • the filters 21 and 22 may be, for example, any of a surface acoustic wave filter, an elastic wave filter using BAW (Bulk Acoustic Wave), an LC resonance filter, and a dielectric filter. Is not limited.
  • the inductor 31 is a matching element for matching the output impedance of the filters 21 and 22 with the input impedance of the low noise amplifier 41.
  • the inductor 31 as the matching element may be connected between a node on the path and the ground.
  • it may be composed of one or more inductors and one or more capacitors.
  • the inductor 31 is typically a chip inductor mounted on the module substrate 90, but may be configured by a plurality of planar coils formed in the module substrate 90, for example.
  • the low-noise amplifier 41 is a low-noise amplifier that amplifies a high-frequency signal in the first frequency band or the second frequency band that has passed through the filter 21 or 22.
  • the digital control circuit 11 is built in the semiconductor IC 10.
  • FIG. 2 is a schematic plan view illustrating an example of an arrangement of circuit elements built in the semiconductor IC 10 according to the first embodiment.
  • the semiconductor IC 10 shown in FIG. 1 includes a digital control circuit 11, switches 12, 13, and 14, and a low-noise amplifier 41.
  • the low noise amplifier 41 is formed on the same IC substrate.
  • the semiconductor IC 10 is composed of, for example, CMOS (Complementary Metal Oxide Semiconductor). This makes it possible to manufacture the semiconductor IC 10 at low cost.
  • the semiconductor IC 10 may be made of GaAs. This makes it possible to output a high-frequency signal having high-quality amplification performance and noise performance.
  • Each circuit element incorporated in the semiconductor IC 10 and the digital control circuit 11 are connected by digital control wiring.
  • the switch 12 and the digital control circuit 11 are connected by a control wiring 112
  • the switch 13 and the digital control circuit 11 are connected by a control wiring 113
  • the switch 14 and the digital control circuit 11 are connected by a control wiring 114.
  • 41 and the digital control circuit 11 are connected by a control wiring 141.
  • the digital control circuit 11 supplies a digital control signal 112 s for switching between conduction and non-conduction of the switch 12 to the switch 12 via the control wiring 112.
  • the digital control circuit 11 supplies a digital control signal 113 s for switching between conduction and non-conduction of the switch 13 to the switch 13 via the control wiring 113.
  • the digital control circuit 11 supplies a digital control signal 114 s for switching between conduction and non-conduction of the switch 14 to the switch 14 via the control wiring 114.
  • the digital control circuit 11 supplies a digital control signal 141 s for adjusting the amplification factor of the low noise amplifier 41 to the low noise amplifier 41 via the control line 141.
  • the high frequency module 1 controls the switches 12 to 14 and the low noise amplifier 41 by the digital control circuit 11 so that the high frequency signal received by the antenna element 2 is propagated through an appropriate signal path and transmitted to the RFIC 3 and the BBIC 4. I do.
  • a high-frequency module having a receiving / splitting circuit has been exemplified as the high-frequency module 1.
  • the high-frequency module according to the present invention may be a transmission / multiplexing circuit, or both of the transmitting and receiving circuits. May be a demultiplexing / multiplexing circuit capable of The number of frequency bands (signal paths) is not limited.
  • the high-frequency module 1 is applicable not only to selecting only one signal path but also to a system that can simultaneously receive high-frequency signals in a plurality of frequency bands.
  • each of the switches 12 to 14 may have a configuration capable of simultaneously connecting a common terminal and two or more selection terminals.
  • the high-frequency module according to the present invention only needs to have at least the semiconductor IC 10 among the circuit elements (circuit components) constituting the high-frequency module 1 according to the first embodiment. Furthermore, the semiconductor IC 10 only needs to have at least the digital control circuit 11, and need not have the low noise amplifier 41 and the switches 12 to 14. In this case, the low-noise amplifier 41 and the switches 12 to 14 may be arranged as individual components in the high-frequency module 1 other than the semiconductor IC 10.
  • FIG. 3A is a schematic plan view of the high-frequency module 1 according to Embodiment 1.
  • FIG. 3B is a schematic cross-sectional view of the high-frequency module 1 according to Embodiment 1, specifically, a cross-sectional view taken along line IIIB-IIIB of FIG. 3A.
  • FIG. 3A shows an arrangement diagram of circuit elements when the main surface 90a of the main surfaces 90a and 90b of the module substrate 90 is viewed from the z-axis positive direction side.
  • FIG. 3B shows an arrangement diagram of the circuit elements when the main surface 90b is viewed from the y-axis negative direction side.
  • the high-frequency module 1 includes a module substrate 90, a semiconductor IC 10, a plurality of columnar electrodes 150, filters 21 and 22, an inductor 31, and a circuit element 51. And 52, and resin members 80A and 80B.
  • Module substrate 90 has a main surface 90a (second main surface) and a main surface 90b (first main surface), and is a substrate on which semiconductor IC 10, filters 21 and 22, inductor 31, and circuit elements 51 and 52 are mounted. is there.
  • a low-temperature co-fired ceramic (LTC) substrate having a laminated structure of a plurality of dielectric layers (LTCC) substrate, a printed substrate, or the like is used.
  • the filters 21 and 22, the inductor 31, and the circuit elements 51 and 52 are mounted on the main surface 90a.
  • the filters 21 and 22, the inductor 31, and the circuit elements 51 and 52 are electrically and mechanically connected to the module substrate 90 via land electrodes formed on the main surface 90a of the module substrate 90 and bumps or solder. It is connected.
  • the circuit elements 51 and 52 are not shown in the circuit configuration of the high-frequency module 1 shown in FIG. 1, but are other circuit elements forming the high-frequency module 1, such as a filter, a switch, an inductor, and a capacitor. Is equivalent to
  • the module substrate 90 is a substrate on which circuit elements can be mounted on both surfaces of the main surfaces 90a and 90b.
  • the main surface 90a has the filters 21 and 22, the inductor 31, the circuit elements 51 and 52, etc. May not be mounted.
  • the semiconductor IC 10 has a main surface 10a (third main surface) and a main surface 10b (fourth main surface), and has a rectangular outer shape when the main surfaces 10a and 10b are viewed in plan.
  • the semiconductor IC 10 is mounted on the main surface 90b such that the main surface 10a faces the main surface 90b of the module substrate 90.
  • the semiconductor IC 10 is electrically and mechanically connected to the module substrate 90 via land electrodes formed on the main surface 90b of the module substrate 90 and bumps or solder.
  • the corner may be chamfered or rounded, or may have a notch at the outer edge.
  • the electrical connection between the circuit elements mounted on the main surface 90a, the electrical connection between the devices built in the semiconductor IC 10 mounted on the main surface 90b, and the circuit elements mounted on the main surface 90a is realized by the plane wiring patterns and via conductors formed inside the main surfaces 90 a and 90 b and the module substrate 90.
  • the planar wiring pattern is a conductive film formed along a direction parallel to the main surfaces 90a and 90b of the module substrate 90, and the via conductor is a direction perpendicular to the main surfaces 90a and 90b of the module substrate 90. Is a columnar conductor that extends.
  • the resin member 80A is disposed on the main surface 90a of the module substrate 90, covers at least a part of the circuit element mounted on the main surface 90a and the main surface 90a, and has reliability such as mechanical strength and moisture resistance of the circuit element. It has the function to secure the performance.
  • the resin member 80B is disposed on the main surface 90b of the module substrate 90, covers the semiconductor IC 10 and the main surface 90b, and has a function of securing reliability such as mechanical strength and moisture resistance of the semiconductor IC 10.
  • the resin member 80B does not need to cover all of the main surface 90b and the semiconductor IC 10, but may cover a part thereof. For example, the resin member 80B may only be filled between the semiconductor IC 10 and the main surface 90b. Note that the resin members 80A and 80B are not essential components of the high-frequency module according to the present invention.
  • the columnar electrode 150 extends in the vertical direction (z-axis direction) of the main surface 90b from the main surface 90b to a virtual plane 100p (first virtual plane) including at least the main surface 10b.
  • the first connection electrode extends to In the present embodiment, the columnar electrode 150 extends from the main surface 90b to the surface of the resin member 80B in a direction perpendicular to the main surface 90b (z-axis direction), beyond the virtual plane 100p.
  • One end of the columnar electrode 150 is electrically connected to a land electrode, a planar wiring pattern, or a via conductor formed on the module substrate 90 on the main surface 90b.
  • the other end of the columnar electrode 150 is exposed on the surface of the resin member 80B, and can be electrically connected to an electrode of an external (mother) board on which the high-frequency module 1 is mounted.
  • the columnar electrode 150 may be an electrode set to the ground potential (GND) of the high-frequency module 1 or an electrode that conducts a high-frequency signal (HOT) propagating through the high-frequency module 1 (for example, the common terminal in FIG. 1). 101).
  • the columnar electrode 150 may have a cylindrical shape, or may have a prismatic shape.
  • the columnar electrode 150 may be a connection electrode such as a solder ball or a bump electrode.
  • the surface of the columnar electrode 150 may have a spherical shape.
  • the outer edge of the semiconductor IC 10 includes sides 100a (first side) and 100b (second side) parallel to each other, and sides 100c orthogonal to the sides 100a and 100b and parallel to each other. (Third side) and 100d (fourth side).
  • the outer edge of the module substrate 90 includes sides 190a and 190b parallel to each other, and sides 190c and 190d orthogonal to the sides 190a and 190b and parallel to each other.
  • two sides are parallel is not limited to an angle formed by two sides being strictly 0 deg, but is defined as an angle formed by two sides being within ⁇ 15 deg. Is done.
  • the columnar electrode 150 is disposed in each of the Ab (second region) and the region Ad on the module substrate 90 between the side 190d and the side 100d facing the side 100d.
  • the columnar electrode 150 is not arranged in the region Ac (third region) on the module substrate 90 between the side 190c and the side 100c facing the side 100c.
  • the side of the semiconductor IC 10 and the side of the module substrate 90 face each other indicates a state where there is no other side of the semiconductor IC 10 and the other side of the module substrate 90 between the two sides.
  • the semiconductor IC 10 can be arranged also in the region Ac.
  • the region Ac can be effectively used.
  • the region Ac can be reduced. It is also possible to reduce the size. That is, since the degree of freedom in the arrangement of the semiconductor ICs 10 or the area reduction of the high-frequency module 1 by reducing the size of the module substrate 90 can be realized, the degree of freedom in designing the high-frequency module 1 is improved.
  • the columnar electrodes 150 are arranged in the regions Aa and Ab opposed to each other with the semiconductor IC 10 interposed therebetween, the extraction of the electric signal processed by the semiconductor IC 10 and each circuit element and the reinforcement of the ground are sufficiently ensured. In addition, the mounting strength of the high-frequency module 1 on the external board can be secured.
  • the distance Lc between the side 100c and the side 190c of the module substrate 90 that defines the region Ac is smaller than the distance La between the side 100a and the side 190a, and the distance Lc between the side 100b and the side 190b. It may be smaller than the distance Lb.
  • the columnar electrodes 150 arranged in the regions Aa and Ab sufficiently secure the extraction of the electric signal processed by the semiconductor IC 10 and each circuit element and the strengthening of the ground, and increase the mounting strength of the high-frequency module 1 on the external substrate.
  • the area of the high-frequency module 1 can be reduced by reducing the area Ac of the module substrate 90 while securing the area.
  • the present invention also includes a high-frequency module having a configuration in which the region Ac is not provided because the columnar electrode 150 is not arranged in the region Ac. That is, the side 100c and the side 190c are in an overlapping state in the plan view. In other words, the distance Lc between the side 100c and the side 190c is 0. According to this, the area of the high-frequency module 1 in the plan view can be minimized.
  • FIG. 4 is a schematic plan view of a high-frequency module 1A according to a modification of the first embodiment.
  • the high-frequency module 1A shown in the figure differs from the high-frequency module 1 according to the first embodiment only in the arrangement of the columnar electrodes 150.
  • the description of the same configuration as the high-frequency module 1 according to Embodiment 1 will be omitted, and different configurations will be described.
  • the columnar electrodes 150 are arranged in each of the two regions.
  • the columnar electrode 150 is not arranged in each of the regions Ad (fourth region).
  • the opposing regions Ac and Ad have no columnar electrode 150.
  • the semiconductor IC 10 can be arranged also in the regions Ac and Ad, or the regions Ac and Ad can be reduced. That is, the design flexibility of the high-frequency module 1A is further improved.
  • the columnar electrodes 150 are arranged in the regions Aa and Ab opposed to each other with the semiconductor IC 10 interposed therebetween, the extraction of the electric signal processed by the semiconductor IC 10 and each circuit element and the reinforcement of the ground are sufficiently ensured.
  • the high-frequency module 1A can be mounted on an external substrate.
  • the high-frequency module 1 has a module substrate 90 having main surfaces 90a and 90b, and main surfaces 10a and 10b, and the main substrate 90, the main surface 10a, and the main surface 10b are arranged in this order.
  • a semiconductor IC 10 mounted on the surface 90b for processing a high-frequency signal, and a plurality of columnar electrodes 150 extending in a direction perpendicular to the main surface 90b from the main surface 90b to a virtual plane 100p including at least the main surface 10b.
  • the outer edge of the semiconductor IC 10 includes sides 100a and 100b parallel to each other, and sides 100c and 100d orthogonal to the sides 100a and 100b and parallel to each other.
  • the semiconductor IC 10 can be arranged also in the region Ac.
  • the region Ac can be effectively used.
  • the region Ac can be reduced. It is also possible to reduce the size. That is, since the degree of freedom in the arrangement of the semiconductor ICs 10 or the area reduction of the high-frequency module 1 by reducing the size of the module substrate 90 can be realized, the degree of freedom in designing the high-frequency module 1 is improved.
  • the high-frequency module 1 can be mounted on an external substrate.
  • the high-frequency module 1 with improved design flexibility and the communication device 5 including the high-frequency module 1 without deteriorating electrical and mechanical performance.
  • FIG. 5A is a schematic cross-sectional configuration diagram of a high-frequency module 1B according to the second embodiment. Note that the planar configuration of the high-frequency module 1B according to the present embodiment is the same as that in FIG. 3A.
  • FIG. 5A is a cross-sectional view taken along line IIIB-IIIB of FIG. 3A.
  • the high-frequency module 1B includes a module substrate 90, a semiconductor IC 10, a plurality of columnar electrodes 150, filters 21 and 22, an inductor 31, and circuit elements 51 and 52. , Resin members 80A and 80B.
  • the high-frequency module 1B shown in FIG. 4 differs from the high-frequency module 1 according to the first embodiment in that the element arrangement in the semiconductor IC 10 is shown, and the connection between the semiconductor IC 10 and the inductor 31. Is different.
  • description of the same configuration as that of the high-frequency module 1 according to the first embodiment will be omitted, and different configurations will be mainly described.
  • the inductor 31 is a first component disposed on the main surface 90a.
  • the inductor 31 and the semiconductor IC 10 are connected via a via conductor 91 formed in the module substrate 90 and along a direction (z-axis direction) perpendicular to the main surfaces 90a and 90b.
  • connection wiring between the inductor 31 and the semiconductor IC 10 can be reduced, and the connection is made by a wiring (via conductor 91) having a low resistance and a small parasitic capacitance, thereby realizing low loss and high performance of the high-frequency module 1B. it can.
  • the first component connected to the semiconductor IC 10 via the via conductor 91 is not limited to the inductor 31, but includes the filters 21 and 22 and the circuit elements 51 and 52 mounted on the main surface 90a. Either one may be used.
  • the via conductor 91 may be arranged closest to the side 100c among the sides 100a to 100d in the plan view.
  • the via conductor 91 is arranged in a region that is not close to the columnar electrode 150, and is arranged in an end region of the semiconductor IC 10 and has a low probability of being close to the wiring in the module substrate 90. Therefore, the parasitic capacitance formed by the via conductor 91 and the columnar electrode 150 or the wiring can be reduced. Further, since the inductor 31 connected to the semiconductor IC 10 by the via conductor 91 is arranged on the side 100c side, the inductor 31 can be arranged so as to overlap the semiconductor IC 10 in the plan view. The wiring can be shortened and the area can be reduced.
  • the semiconductor IC 10 has a built-in low-noise amplifier 41.
  • the inductor 31 and the low noise amplifier 41 are connected via a via conductor 91.
  • FIG. 5B is a schematic cross-sectional view of the high-frequency module 500 according to Comparative Example 1.
  • the high-frequency module 500 according to Comparative Example 1 has a module substrate 90, a semiconductor IC 510, a plurality of columnar electrodes 150, filters 21 and 22, an inductor 31, circuit elements 51 and 52, Resin members 80A and 80B.
  • the high-frequency module 500 according to Comparative Example 1 is different from the high-frequency module 1B according to the second embodiment in that the arrangement of the low-noise amplifier 541 in the semiconductor IC 510 is different and the area Ac on the module substrate 90 is also columnar. The difference is that the electrode 150 is arranged.
  • the description of the same configuration as the high-frequency module 1B according to Embodiment 2 will be omitted, and different configurations will be described.
  • the semiconductor IC 510 has a built-in low noise amplifier 541.
  • the inductor 31 and the low noise amplifier 541 are connected via a via conductor 591 and a plane wiring pattern 592.
  • each of the regions Aa, Ab, Ac, Ad between each of the four sides forming the outer edge of the semiconductor IC 510 and each side of the module substrate 90 facing each of the four sides has a columnar electrode. 150 are arranged.
  • the low noise amplifier 541 is not disposed close to the sides 100a to 100d because of the columnar electrode 150 disposed in the region Ac, but is disposed in the central region of the semiconductor IC 510.
  • the inductor 31 is disposed closest to the side 100c among the sides 100a to 100d, and is disposed in an end region of the module substrate 90.
  • the inductor 31 is arranged in the end region of the module substrate 90, unnecessary magnetic field coupling with other components and wiring mounted on the module substrate 90 Alternatively, electrolytic bonding is suppressed.
  • the inductor 31 and the low-noise amplifier 541 are connected by wiring (via conductor 591 and planar wiring pattern 592) having high resistance and large parasitic capacitance, the propagation loss of the high-frequency module 500 increases.
  • FIG. 5C is a schematic sectional view of a high-frequency module 500A according to Comparative Example 2.
  • the high-frequency module 500A according to Comparative Example 2 is different from the high-frequency module 500 according to Comparative Example 1 in the arrangement of the low-noise amplifier 541 and the inductor 31.
  • the inductor 31 is connected to the center of the main surface 90a.
  • the dead space Ds occurs in the outer peripheral region of the main surface 90a, that is, in the region on the main surface 90a that overlaps with the columnar electrode 150 when the main surface 90a is viewed in a plan view. Even if some other component is arranged in the dead space Ds, there is a concern that the component and the inductor 31 may be unnecessarily coupled.
  • the area of the high-frequency module 500A cannot be reduced due to the dead space Ds, and the high-frequency module 500A is not required due to unnecessary coupling between the inductor 31 and other components. High-frequency signal transmission characteristics deteriorate.
  • FIG. 5D is a schematic sectional view of a high-frequency module 500B according to Comparative Example 3.
  • the high-frequency module 500B according to Comparative Example 3 is different from the high-frequency module 500A according to Comparative Example 2 in that the low-noise amplifier 541 and the inductor 31 are further arranged on the center side of the main surface 90a. According to this, the probability that unnecessary coupling between the inductor 31 and other components arranged around the inductor 31 will be further increased.
  • the high-frequency signal transmission characteristics of the high-frequency module 500 deteriorate due to unnecessary coupling between the inductor 31 and other components.
  • the arrangement of the low-noise amplifier 41 and the inductor 31 is optimized in the plan view, and the low-noise amplifier 41 and the inductor 31 are located on the sides 100a to 100d. Are arranged closest to the side 100c.
  • the low noise amplifier 41, the inductor 31, and the via conductor 91 are arranged in a region that is not close to the columnar electrode 150, and are in the end region of the semiconductor IC 10 and are close to the wiring in the module substrate 90. Are arranged in a low area. Therefore, unnecessary magnetic field coupling or electrolytic coupling between the inductor 31 and other circuit elements and wiring is suppressed. Further, since the connection wiring length between the inductor 31 and the semiconductor IC 10 is short and connected by a wiring (via conductor 91) having a low resistance and a small parasitic capacitance, high-frequency noise generated in the preceding stage of the low noise amplifier 41 can be reduced. Therefore, a reduction in the loss and a higher performance of the high-frequency module 1B can be realized.
  • the low-noise amplifier 41 and the inductor 31 are described as a combination arranged closest to the side 100c.
  • the power amplifier and the power It may be a combination with a matching element connected to the output terminal of the amplifier. That is, the combination arranged closest to the side 100c may be an amplifier circuit and a matching element (first component) connected to the amplifier circuit.
  • FIG. 6 is a schematic diagram showing a plan configuration and a cross-sectional configuration of high-frequency module 1C according to Embodiment 3.
  • FIG. 6A shows an arrangement diagram of circuit elements when the main surface 90b of the main surfaces 90a and 90b of the module substrate 90 is viewed from the z-axis negative direction side.
  • FIG. 6B is a cross-sectional view taken along the line VI-VI of FIG. The layout of the circuit elements when the main surface 90a is viewed from the positive z-axis direction is the same as that in FIG.
  • the high-frequency module 1C includes a module substrate 90, a semiconductor IC 10, a plurality of columnar electrodes 150, via conductors 151, filters 21 and 22, an inductor 31, Elements 51 and 52 and resin members 80A and 80B are provided.
  • the high-frequency module 1C shown in the drawing differs from the high-frequency module 1B according to the second embodiment in that a via conductor 151 is arranged.
  • description of the same configuration as high-frequency module 1B according to Embodiment 2 will be omitted, and different configurations will be mainly described.
  • the columnar electrode 150 extends from the main surface 90b to a virtual plane 100q (second virtual plane) farther from the main surface 90b than the virtual plane 100p (first virtual plane).
  • the virtual plane 100q (second virtual plane) is a plane including the surface of the resin member 80B.
  • the area Aa (first area) on the module substrate 90 between the side 190a and the side 100a facing the side 100a, and the side 190b and the side 100b facing the side 100b.
  • the columnar electrode 150 is disposed in each of the region Ab (second region) on the module substrate 90 between the sides and the region Ad on the module substrate 90 between the side 190d and the side 100d facing the side 100d. I have. On the other hand, the columnar electrode 150 is not arranged in the region Ac (third region) on the module substrate 90 between the side 190c and the side 100c facing the side 100c.
  • the via conductor 151 is a second connection electrode extending in the vertical direction from the main surface 10b (fourth main surface) of the semiconductor IC 10 to the surface (virtual plane 100q) of the resin member 80B.
  • Some of the plurality of via conductors 151 are connected to the low-noise amplifier 41 via the via electrodes 140. Some of the plurality of via conductors 151 are connected to land electrodes formed on the module substrate 90 via via electrodes 160 penetrating the semiconductor IC 10.
  • the low-noise amplifier 41 and the inductor 31 are arranged closest to the side 100c of the sides 100a to 100d.
  • the via conductor 151 extending from the main surface 10b (top surface) of the semiconductor IC 10 is disposed in place of the columnar electrode 150 which is no longer disposed in the region Ac on the module substrate 90, so that an electric signal is provided.
  • the high-frequency module 1 ⁇ / b> C can be reduced in area while compensating for taking out, strengthening the ground, and strengthening the mounting with the external board.
  • FIG. 7 is a schematic diagram showing a planar configuration and a cross-sectional configuration of a high-frequency module 1D according to a modification of the third embodiment.
  • FIG. 7A shows an arrangement diagram of the semiconductor IC 10 and the columnar electrode 150 when the main surface 90b of the main surfaces 90a and 90b of the module substrate 90 is viewed from the z-axis negative direction side.
  • FIG. 7B is a cross-sectional view taken along the line VII-VII of FIG. The layout of the circuit elements when the main surface 90a is viewed from the positive z-axis direction is the same as that in FIG.
  • a high-frequency module 1D includes a module substrate 90, a semiconductor IC 10, a plurality of columnar electrodes 150, via conductors 152, filters 21 and 22, an inductor 31, and a circuit element. 51 and 52, resin members 80A and 80B, and a shield electrode 70.
  • the high-frequency module 1D shown in FIG. 6 differs from the high-frequency module 1 according to the first embodiment in that the element arrangement in the semiconductor IC 10 is shown, the via conductor 152 is arranged, and And a shield electrode 70 are provided.
  • a description of the same configuration as that of the high-frequency module 1 according to the first embodiment will be omitted, and different configurations will be mainly described.
  • the columnar electrode 150 is farther away from the main surface 90b than the virtual plane 100p (first virtual plane) in the direction perpendicular to the main surface 90b (z-axis direction). It extends to the virtual plane 100q (second virtual plane).
  • the virtual plane 100q (second virtual plane) is a plane including the surface of the resin member 80B.
  • the columnar electrode 150 is disposed in each of the region Ab (second region) on the module substrate 90 between the sides and the region Ad on the module substrate 90 between the side 190d and the side 100d facing the side 100d. I have.
  • the columnar electrode 150 is not disposed in the region Ac (third region) on the module substrate 90 between the side 190c and the side 100c facing the side 100c.
  • the semiconductor IC 10 has a digital control circuit 11 built therein.
  • the digital control circuit 11 is arranged closest to the side 100c among the sides 100a to 100d.
  • the via conductor 152 is a second connection electrode extending in the vertical direction from the main surface 10b (fourth main surface) of the semiconductor IC 10 to the surface (virtual plane 100q) of the resin member 80B.
  • Some of the plurality of via conductors 152 are connected to the digital control circuit 11 via the via electrodes 110.
  • the digital control circuit 11 since the digital control circuit 11 is arranged in the end region of the semiconductor IC 10, it is not necessary to route the wiring in the module substrate 90, and digital noise (spurious) via the digital wiring is reduced. Flow into the circuit element can be suppressed. Further, the via conductor 152 connected to the top surface of the digital control circuit 11 is disposed near the region Ac where the columnar electrode 150 is not disposed, so that digital noise can be removed, electric signals can be extracted, ground can be enhanced, and In addition, the area of the high-frequency module 1D can be reduced while compensating for the enhancement of mounting with the external substrate.
  • the high-frequency module 1D further includes a shield electrode 70 formed so as to cover at least a side surface of resin member 80B and connected to ground electrode 92G on the side surface.
  • the ground electrode 92G is a planar wiring pattern formed along a direction parallel to the main surfaces 90a and 90b of the module substrate 90.
  • the high-frequency signal output from the semiconductor IC 10, particularly the digital noise output from the digital control circuit 11, can be suppressed from being directly radiated from the high-frequency module 1D to the outside. Further, it is possible to suppress external noise from entering the semiconductor IC 10. Further, the heat generated by the semiconductor IC 10 can be radiated through the shield electrode 70, so that the high-frequency module 1D has improved heat radiation.
  • the shield electrode 70 may not be provided. Further, shield electrode 70 and ground electrode 92G may be arranged in high-frequency module 1C according to the present embodiment.
  • the via conductors 151 and 152 may have a cylindrical shape, or may have a prismatic shape.
  • the via conductors 151 and 152 may be solder balls or connection electrodes such as bump electrodes.
  • the surfaces of the via conductors 151 and 152 may have a spherical shape.
  • the high-frequency module and the communication device according to the first to third embodiments have been described with reference to the above-described embodiment.
  • the high-frequency module and the communication device of the present invention are not limited to the above-described embodiment.
  • Examples and various devices including the high-frequency module and the communication device according to the present disclosure are also included in the present invention.
  • another circuit element, wiring, or the like may be inserted between paths connecting each circuit element and signal path disclosed in the drawings.
  • the semiconductor IC 10 may be realized as an LSI (Large Scale Integration) which is an integrated circuit. Further, the method of circuit integration may be realized by a dedicated circuit or a general-purpose processor. After the LSI is manufactured, a programmable FPGA (Field Programmable Gate Array) or a reconfigurable processor capable of reconfiguring connection and setting of circuit cells inside the LSI may be used. Furthermore, if an integrated circuit technology that replaces the LSI appears due to the progress of the semiconductor technology or another technology derived therefrom, the functional blocks may be naturally integrated using the technology.
  • LSI Large Scale Integration
  • the present invention can be widely used in communication devices such as mobile phones as high-frequency modules that require miniaturization.
  • RFIC RF signal processing circuit
  • BBIC Baseband signal processing circuit
  • Communication device 10 510 Semiconductor IC 10a, 10b, 90a, 90b Main surface 11 Digital control circuit 12, 13, 14 Switch 21, 22 Filter 31 Inductor 41, 541 Low noise amplifier 51, 52 Circuit element 70 Shield electrode 80A, 80B Resin member 90 Module substrate 91, 151, 152, 591 Via conductor 92G Ground electrode 100a, 100b, 100c, 100d, 190a, 190b, 190c, 190d Side 100p, 100q Virtual plane 101 Common terminal 102 Output terminal 110, 140, 160 Via electrode 112, 113, 114, 141 Control Wiring 112s, 113s, 114s, 141s Digital control signal 150 Columnar electrode 592 Planar wiring pattern Aa, Ab, Ac, Ad area La, Lb, Lc, Ld Distance

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Abstract

A high-frequency module (1) equipped with a module substrate (90) having principal surfaces (90a, 90b), also equipped with a semiconductor IC (10) having principal surfaces (10a, 10b) and mounted on the principal surface (90b) in a manner such that the module substrate (90), the principal surface (10a) and the principal surface (10b) are arranged in this order, and also equipped with a plurality of columnar electrodes (150) which extend in a direction perpendicular to the principal surface (90b), wherein: when seen from a planar view, the semiconductor IC (10) is configured from sides (100a, 100b) which are parallel to one another and sides (100c, 100d) which are parallel to one another; columnar electrodes (150) are positioned in a region (Aa) between the side (100a) and a side (190a) which faces the side (100a) and also positioned in a region (Ab) between the side (100b) and a (190b) which faces the side (100b); and no columnar electrodes (150) are positioned in a region (Ac) between the side (100c) and a side (190c) which faces the side (100c).

Description

高周波モジュールおよび通信装置High frequency module and communication device
　本発明は、高周波モジュールおよび通信装置に関する。 The present invention relates to a high-frequency module and a communication device.
　特許文献１には、多層回路基板の第１主面に表面実装部品が実装され、第２主面に半導体素子が実装された回路部品内蔵モジュール（高周波モジュール）の構成が開示されている。この回路部品内蔵モジュールでは、多層回路基板を平面視した場合、半導体素子を囲むように、複数のビアおよびランドが配置されている。これにより、回路部品内蔵モジュールは、高周波動作、耐ノイズ性、放熱性、小型化に優れた高周波モジュールとして有用であるとされている。 Patent Document 1 discloses a configuration of a circuit component built-in module (high-frequency module) in which surface mounting components are mounted on a first main surface of a multilayer circuit board and semiconductor elements are mounted on a second main surface. In this circuit component built-in module, when the multilayer circuit board is viewed in plan, a plurality of vias and lands are arranged so as to surround the semiconductor element. Accordingly, the module with built-in circuit components is said to be useful as a high-frequency module excellent in high-frequency operation, noise resistance, heat dissipation, and miniaturization.
特開２００７－２８１１６０号公報JP 2007-281160 A
　しかしながら、特許文献１に開示された回路部品内蔵モジュール（高周波モジュール）のように、上記平面視において、半導体素子（半導体ＩＣ）を複数のビアおよびランドで囲んだ場合、第２主面上における半導体素子（半導体ＩＣ）の配置自由度が制限される。さらには、半導体素子の配置自由度が制限されるため、例えば、第１主面に配置された表面実装部品との接続配線を最適化（最短化）することが困難となり、高周波伝搬特性が劣化する可能性がある。また、半導体素子（半導体ＩＣ）の全ての外辺に対向するように複数のビアおよびランドが配置されているので、当該ビアおよびランドを配置するための大きなスペースが必要となる。このため、多層回路基板を小型化することができず、例えば、外部（マザー）基板に回路部品内蔵モジュール（高周波モジュール）を配置する自由度が制限される。 However, when a semiconductor element (semiconductor IC) is surrounded by a plurality of vias and lands in a plan view, as in the module with a built-in circuit component (high-frequency module) disclosed in Patent Literature 1, the semiconductor on the second main surface The degree of freedom in arranging elements (semiconductor ICs) is limited. Furthermore, since the degree of freedom of arrangement of the semiconductor element is limited, it becomes difficult to optimize (minimize) the connection wiring with the surface mount component arranged on the first main surface, for example, and the high-frequency propagation characteristics deteriorate. there's a possibility that. Further, since a plurality of vias and lands are arranged so as to face all the outer sides of the semiconductor element (semiconductor IC), a large space for arranging the vias and lands is required. Therefore, the size of the multilayer circuit board cannot be reduced, and, for example, the degree of freedom in arranging the circuit component built-in module (high-frequency module) on the external (mother) board is limited.
　このように、特許文献１に開示された回路部品内蔵モジュール（高周波モジュール）では、半導体素子（半導体ＩＣ）を囲むように複数のビアおよびランドが配置されていることで、高周波動作および耐ノイズ性などの電気的性能および実装強度などの機械的性能は、ある程度確保されるが、半導体素子（半導体ＩＣ）の配置に関する設計自由度および高周波モジュールのサイズに起因する設計自由度が確保されないといった問題がある。 As described above, in the circuit component built-in module (high-frequency module) disclosed in Patent Document 1, the plurality of vias and lands are arranged so as to surround the semiconductor element (semiconductor IC), so that high-frequency operation and noise resistance are achieved. Although electrical performance such as the electrical performance and mechanical performance such as the mounting strength can be secured to some extent, there is a problem that the degree of freedom in designing the arrangement of semiconductor elements (semiconductor ICs) and the degree of design due to the size of the high-frequency module are not secured. is there.
　そこで、本発明は、上記課題を解決するためになされたものであって、電気的および機械的性能を劣化させずに、設計自由度が向上した高周波モジュールおよび通信装置を提供することを目的とする。 Therefore, the present invention has been made to solve the above problems, and has as its object to provide a high-frequency module and a communication device with improved design flexibility without deteriorating electrical and mechanical performance. I do.
　上記目的を達成するために、本発明の一態様に係る高周波モジュールは、第１主面および第２主面を有するモジュール基板と、第３主面および第４主面を有し、前記モジュール基板、前記第３主面、前記第４主面の順となるように前記第１主面上に実装された、高周波信号を処理する半導体ＩＣと、前記第１主面から少なくとも前記第４主面を含む第１仮想平面まで、前記第１主面の垂直方向に延在する複数の第１接続電極と、を備え、前記モジュール基板を平面視した場合に、前記半導体ＩＣの外縁は、互いに平行な第１辺および第２辺、ならびに、前記第１辺および前記第２辺と直交し、互いに平行な第３辺および第４辺で構成され、前記モジュール基板の外縁を構成する複数の辺のうちの前記第１辺に対向する辺と前記第１辺との間の前記モジュール基板上の第１領域、および、前記複数の辺のうちの前記第２辺に対向する辺と前記第２辺との間の前記モジュール基板上の第２領域のそれぞれには、前記複数の第１接続電極のいくつかが配置され、前記複数の辺のうちの前記第３辺に対向する辺と前記第３辺との間の前記モジュール基板上の第３領域には、前記複数の第１接続電極は配置されていない。 In order to achieve the above object, a high-frequency module according to one embodiment of the present invention has a module substrate having a first main surface and a second main surface, and a third main surface and a fourth main surface. A semiconductor IC for processing a high-frequency signal, mounted on the first main surface so as to be in the order of the third main surface and the fourth main surface, and at least the fourth main surface from the first main surface And a plurality of first connection electrodes extending in a direction perpendicular to the first main surface up to a first virtual plane including: a plurality of first connection electrodes, the outer edges of the semiconductor ICs being parallel to each other when the module substrate is viewed in plan The first side and the second side, and a plurality of sides that are orthogonal to the first side and the second side and that are parallel to each other and that constitute a plurality of sides forming the outer edge of the module substrate. Between the side opposite to the first side and the first side The first region on the module substrate and the second region on the module substrate between the side opposite to the second side of the plurality of sides and the second side each include the plurality of regions. Some of the first connection electrodes are arranged, and a third region on the module substrate between the third side of the plurality of sides and the third side is provided with the plurality of first connection electrodes. The first connection electrode is not provided.
　本発明によれば、電気的および機械的性能を劣化させずに、設計自由度が向上した高周波モジュールおよび通信装置を提供することが可能となる。 According to the present invention, it is possible to provide a high-frequency module and a communication device with improved design flexibility without deteriorating electrical and mechanical performance.
図１は、実施の形態１に係る通信装置の回路構成の一例を示す回路ブロック図である。FIG. 1 is a circuit block diagram illustrating an example of a circuit configuration of the communication device according to the first embodiment. 図２は、実施の形態１に係る半導体ＩＣに内蔵された回路素子の配置の一例を表す平面概略図である。FIG. 2 is a schematic plan view illustrating an example of an arrangement of circuit elements built in the semiconductor IC according to the first embodiment. 図３Ａは、実施の形態１に係る高周波モジュールの平面構成概略図である。FIG. 3A is a schematic plan view of the high-frequency module according to Embodiment 1. 図３Ｂは、実施の形態１に係る高周波モジュールの断面構成概略図である。FIG. 3B is a schematic cross-sectional configuration diagram of the high-frequency module according to Embodiment 1. 図４は、実施の形態１の変形例に係る高周波モジュールの平面構成概略図である。FIG. 4 is a schematic plan view of a high-frequency module according to a modification of the first embodiment. 図５Ａは、実施の形態２に係る高周波モジュールの断面構成概略図である。FIG. 5A is a schematic cross-sectional configuration diagram of the high-frequency module according to Embodiment 2. 図５Ｂは、比較例１に係る高周波モジュールの断面構成概略図である。FIG. 5B is a schematic cross-sectional configuration diagram of the high-frequency module according to Comparative Example 1. 図５Ｃは、比較例２に係る高周波モジュールの断面構成概略図である。FIG. 5C is a schematic cross-sectional view of the high-frequency module according to Comparative Example 2. 図５Ｄは、比較例３に係る高周波モジュールの断面構成概略図である。FIG. 5D is a schematic cross-sectional view of the high-frequency module according to Comparative Example 3. 図６は、実施の形態３に係る高周波モジュールの平面構成および断面構成を示す概略図である。FIG. 6 is a schematic diagram illustrating a planar configuration and a cross-sectional configuration of a high-frequency module according to Embodiment 3. 図７は、実施の形態３の変形例に係る高周波モジュールの平面構成および断面構成を示す概略図である。FIG. 7 is a schematic diagram illustrating a planar configuration and a cross-sectional configuration of a high-frequency module according to a modification of the third embodiment.
　以下、本発明の実施の形態について、実施の形態およびその図面を用いて詳細に説明する。なお、以下で説明する実施の形態は、いずれも包括的または具体的な例を示すものである。以下の実施の形態で示される数値、形状、材料、構成要素、構成要素の配置および接続形態などは、一例であり、本発明を限定する主旨ではない。以下の実施の形態における構成要素のうち、独立請求項に記載されていない構成要素については、任意の構成要素として説明される。また、図面に示される構成要素の大きさまたは大きさの比は、必ずしも厳密ではない。 Hereinafter, embodiments of the present invention will be described in detail with reference to the embodiments and the drawings. Each of the embodiments described below shows a comprehensive or specific example. Numerical values, shapes, materials, constituent elements, arrangement of constituent elements, connection forms, and the like shown in the following embodiments are merely examples, and do not limit the present invention. Among the components in the following embodiments, components not described in the independent claims are described as arbitrary components. Also, the sizes or size ratios of the components shown in the drawings are not necessarily exact.
　（実施の形態１）
　［１．１　通信装置および高周波モジュールの回路構成］
　図１は、実施の形態１に係る通信装置５の回路構成の一例を示す回路ブロック構成図である。同図に示すように、通信装置５は、高周波モジュール１と、アンテナ素子２と、ＲＦ信号処理回路（ＲＦＩＣ）３と、ベースバンド信号処理回路（ＢＢＩＣ）４と、を備える。高周波モジュール１は、例えば、マルチモード／マルチバンド対応の携帯電話のフロントエンド部に配置される。 (Embodiment 1)
[1.1 Circuit Configuration of Communication Device and High-Frequency Module]
FIG. 1 is a circuit block diagram illustrating an example of a circuit configuration of the communication device 5 according to the first embodiment. As shown in FIG. 1, the communication device 5 includes a high-frequency module 1, an antenna element 2, an RF signal processing circuit (RFIC) 3, and a baseband signal processing circuit (BBIC) 4. The high-frequency module 1 is arranged, for example, at the front end of a multi-mode / multi-band compatible mobile phone.
　ＲＦＩＣ３は、アンテナ素子２で送受信される高周波信号を処理するＲＦ信号処理回路である。具体的には、ＲＦＩＣ３は、高周波モジュール１の出力端子１０２を介して入力された高周波信号を、ダウンコンバートなどにより信号処理し、当該信号処理して生成された受信信号をＢＢＩＣ４へ出力する。 The RFIC 3 is an RF signal processing circuit that processes a high-frequency signal transmitted and received by the antenna element 2. Specifically, the RFIC 3 performs signal processing on the high-frequency signal input via the output terminal 102 of the high-frequency module 1 by down-conversion or the like, and outputs a reception signal generated by the signal processing to the BBIC 4.
　ＢＢＩＣ４は、高周波モジュール１を伝搬する高周波信号よりも低周波の中間周波数帯域を用いて信号処理する回路である。ＢＢＩＣ４で処理された信号は、例えば、画像表示のための画像信号として使用され、または、スピーカを介した通話のために音声信号として使用される。 The BBIC 4 is a circuit that performs signal processing using an intermediate frequency band that is lower in frequency than the high frequency signal transmitted through the high frequency module 1. The signal processed by the BBIC 4 is used, for example, as an image signal for displaying an image or as an audio signal for a telephone call via a speaker.
　アンテナ素子２は、高周波モジュール１の共通端子１０１に接続され、外部からの高周波信号を受信して高周波モジュール１へ出力する。 The antenna element 2 is connected to the common terminal 101 of the high-frequency module 1, receives an external high-frequency signal, and outputs the signal to the high-frequency module 1.
　なお、本実施の形態に係る通信装置５において、アンテナ素子２およびＢＢＩＣ４は、必須の構成要素ではない。 In the communication device 5 according to the present embodiment, the antenna element 2 and the BBIC 4 are not essential components.
　次に、高周波モジュール１の詳細な構成について説明する。 Next, a detailed configuration of the high-frequency module 1 will be described.
　高周波モジュール１は、ディジタル制御回路１１と、スイッチ１２、１３および１４と、インダクタ３１と、ローノイズアンプ４１と、フィルタ２１および２２と、を備える。 The high frequency module 1 includes a digital control circuit 11, switches 12, 13 and 14, an inductor 31, a low noise amplifier 41, and filters 21 and 22.
　スイッチ１２、１３および１４は、それぞれ、高周波モジュール１に入力された高周波信号の伝搬経路を切り替える機能を有する。 The switches 12, 13, and 14 each have a function of switching the propagation path of the high-frequency signal input to the high-frequency module 1.
　より具体的には、スイッチ１２は、例えば、共通端子および複数の選択端子を有し、アンテナ素子２とフィルタ２１との接続、アンテナ素子２とフィルタ２２との接続、およびアンテナ素子２とその他のフィルタとの接続を切り替える。 More specifically, the switch 12 has, for example, a common terminal and a plurality of selection terminals, and connects the antenna element 2 to the filter 21, the connection between the antenna element 2 and the filter 22, and the connection between the antenna element 2 and other elements. Switch the connection with the filter.
　スイッチ１３は、例えば、共通端子および２つの選択端子を有し、フィルタ２１とインダクタ３１との接続、および、フィルタ２２とインダクタ３１との接続を切り替える。 The switch 13 has, for example, a common terminal and two selection terminals, and switches connection between the filter 21 and the inductor 31 and connection between the filter 22 and the inductor 31.
　スイッチ１４は、例えば、共通端子および２つの選択端子を有し、ローノイズアンプ４１とＲＦＩＣ３との接続、および、その他のローノイズアンプとＲＦＩＣ３との接続を切り替える。 The switch 14 has, for example, a common terminal and two selection terminals, and switches the connection between the low noise amplifier 41 and the RFIC 3 and the connection between the other low noise amplifiers and the RFIC 3.
　フィルタ２１、例えば、第１周波数帯域を通過帯域とする帯域通過型フィルタであり、フィルタ２２は、例えば、第２周波数帯域を通過帯域とする帯域通過型フィルタである。 The filter 21 is, for example, a band-pass filter having a first frequency band as a pass band, and the filter 22 is, for example, a band-pass filter having a second frequency band as a pass band.
　なお、フィルタ２１および２２は、例えば、弾性表面波フィルタ、ＢＡＷ（Ｂｕｌｋ　Ａｃｏｕｓｔｉｃ　Ｗａｖｅ）を用いた弾性波フィルタ、ＬＣ共振フィルタ、および誘電体フィルタのいずれかであってもよく、さらには、これらには限定されない。 Note that the filters 21 and 22 may be, for example, any of a surface acoustic wave filter, an elastic wave filter using BAW (Bulk Acoustic Wave), an LC resonance filter, and a dielectric filter. Is not limited.
　インダクタ３１は、フィルタ２１および２２の出力インピーダンスとローノイズアンプ４１の入力インピーダンスとのインピーダンス整合をとるための整合素子である。なお、整合素子であるインダクタ３１について、スイッチ１３とローノイズアンプ４１とを結ぶ経路上に直列配置された構成を例示したが、当該経路上のノードとグランドとの間に接続されていてもよいし、また、１以上のインダクタおよび１以上のキャパシタで構成されていてもよい。また、インダクタ３１は、典型的には、モジュール基板９０上に実装されたチップインダクタであるが、例えば、モジュール基板９０内に形成された複数の平面コイルで構成されていてもよい。 The inductor 31 is a matching element for matching the output impedance of the filters 21 and 22 with the input impedance of the low noise amplifier 41. In addition, although the configuration in which the inductor 31 as the matching element is arranged in series on the path connecting the switch 13 and the low-noise amplifier 41 has been illustrated, it may be connected between a node on the path and the ground. Alternatively, it may be composed of one or more inductors and one or more capacitors. The inductor 31 is typically a chip inductor mounted on the module substrate 90, but may be configured by a plurality of planar coils formed in the module substrate 90, for example.
　ローノイズアンプ４１は、フィルタ２１または２２を通過した第１周波数帯域または第２周波数帯域の高周波信号を増幅する低雑音増幅器である。 The low-noise amplifier 41 is a low-noise amplifier that amplifies a high-frequency signal in the first frequency band or the second frequency band that has passed through the filter 21 or 22.
　ディジタル制御回路１１は、半導体ＩＣ１０に内蔵されている。 The digital control circuit 11 is built in the semiconductor IC 10.
　図２は、実施の形態１に係る半導体ＩＣ１０に内蔵された回路素子の配置の一例を表す平面概略図である。同図に示された半導体ＩＣ１０は、ディジタル制御回路１１と、スイッチ１２、１３および１４と、ローノイズアンプ４１とを内蔵しており、ディジタル制御回路１１と、高周波回路素子であるスイッチ１２～１４およびローノイズアンプ４１とが、同一のＩＣ基板に形成されている。 FIG. 2 is a schematic plan view illustrating an example of an arrangement of circuit elements built in the semiconductor IC 10 according to the first embodiment. The semiconductor IC 10 shown in FIG. 1 includes a digital control circuit 11, switches 12, 13, and 14, and a low-noise amplifier 41. The digital control circuit 11, switches 12 to 14, which are high-frequency circuit elements, and The low noise amplifier 41 is formed on the same IC substrate.
　半導体ＩＣ１０は、例えば、ＣＭＯＳ（Ｃｏｍｐｌｅｍｅｎｔａｒｙ　Ｍｅｔａｌ　Ｏｘｉｄｅ　Ｓｅｍｉｃｏｎｄｕｃｔｏｒ）で構成されている。これにより、半導体ＩＣ１０を安価に製造することが可能となる。なお、半導体ＩＣ１０は、ＧａＡｓで構成されていてもよい。これにより、高品質な増幅性能および雑音性能を有する高周波信号を出力することが可能となる。 The semiconductor IC 10 is composed of, for example, CMOS (Complementary Metal Oxide Semiconductor). This makes it possible to manufacture the semiconductor IC 10 at low cost. The semiconductor IC 10 may be made of GaAs. This makes it possible to output a high-frequency signal having high-quality amplification performance and noise performance.
　半導体ＩＣ１０に内蔵された各回路素子とディジタル制御回路１１とは、それぞれ、ディジタル制御配線で接続されている。スイッチ１２とディジタル制御回路１１とは制御配線１１２で接続され、スイッチ１３とディジタル制御回路１１とは制御配線１１３で接続され、スイッチ１４とディジタル制御回路１１とは制御配線１１４で接続され、ローノイズアンプ４１とディジタル制御回路１１とは、制御配線１４１で接続されている。 (4) Each circuit element incorporated in the semiconductor IC 10 and the digital control circuit 11 are connected by digital control wiring. The switch 12 and the digital control circuit 11 are connected by a control wiring 112, the switch 13 and the digital control circuit 11 are connected by a control wiring 113, and the switch 14 and the digital control circuit 11 are connected by a control wiring 114. 41 and the digital control circuit 11 are connected by a control wiring 141.
　上記構成により、ディジタル制御回路１１は、スイッチ１２の導通および非導通を切り替えるためのディジタル制御信号１１２ｓを、制御配線１１２を経由してスイッチ１２へ供給する。また、ディジタル制御回路１１は、スイッチ１３の導通および非導通を切り替えるためのディジタル制御信号１１３ｓを、制御配線１１３を経由してスイッチ１３へ供給する。また、ディジタル制御回路１１は、スイッチ１４の導通および非導通を切り替えるためのディジタル制御信号１１４ｓを、制御配線１１４を経由してスイッチ１４へ供給する。また、ディジタル制御回路１１は、ローノイズアンプ４１の増幅率を調整するためのディジタル制御信号１４１ｓを、制御配線１４１を経由してローノイズアンプ４１へ供給する。 With the above configuration, the digital control circuit 11 supplies a digital control signal 112 s for switching between conduction and non-conduction of the switch 12 to the switch 12 via the control wiring 112. In addition, the digital control circuit 11 supplies a digital control signal 113 s for switching between conduction and non-conduction of the switch 13 to the switch 13 via the control wiring 113. In addition, the digital control circuit 11 supplies a digital control signal 114 s for switching between conduction and non-conduction of the switch 14 to the switch 14 via the control wiring 114. Further, the digital control circuit 11 supplies a digital control signal 141 s for adjusting the amplification factor of the low noise amplifier 41 to the low noise amplifier 41 via the control line 141.
　上記構成により、高周波モジュール１は、ディジタル制御回路１１によりスイッチ１２～１４およびローノイズアンプ４１を制御することで、アンテナ素子２で受信した高周波信号を適切な信号経路で伝搬させ、ＲＦＩＣ３およびＢＢＩＣ４に伝達する。 With the above configuration, the high frequency module 1 controls the switches 12 to 14 and the low noise amplifier 41 by the digital control circuit 11 so that the high frequency signal received by the antenna element 2 is propagated through an appropriate signal path and transmitted to the RFIC 3 and the BBIC 4. I do.
　なお、本実施の形態では、高周波モジュール１として受信分波回路を有する高周波モジュールを例示したが、本発明に係る高周波モジュールは、送信合波回路であってもよく、または、送信および受信の双方が可能な分波／合波回路であってもよい。また、周波数帯域（信号経路）の数には限定されない。さらには、高周波モジュール１は、１つの信号経路のみを選択するだけではなく、複数の周波数帯域の高周波信号を同時に受信できるシステムにも適用可能である。この場合には、例えば、スイッチ１２～１４は、それぞれ、共通端子と２以上の選択端子とを同時に接続可能な構成を有してもよい。 In the present embodiment, a high-frequency module having a receiving / splitting circuit has been exemplified as the high-frequency module 1. However, the high-frequency module according to the present invention may be a transmission / multiplexing circuit, or both of the transmitting and receiving circuits. May be a demultiplexing / multiplexing circuit capable of The number of frequency bands (signal paths) is not limited. Furthermore, the high-frequency module 1 is applicable not only to selecting only one signal path but also to a system that can simultaneously receive high-frequency signals in a plurality of frequency bands. In this case, for example, each of the switches 12 to 14 may have a configuration capable of simultaneously connecting a common terminal and two or more selection terminals.
　さらに、本発明に係る高周波モジュールは、実施の形態１に係る高周波モジュール１を構成する回路素子（回路部品）のうち、少なくとも半導体ＩＣ１０を有していればよい。さらに、半導体ＩＣ１０は、少なくともディジタル制御回路１１を有していればよく、ローノイズアンプ４１およびスイッチ１２～１４を有していなくてもよい。この場合、ローノイズアンプ４１およびスイッチ１２～１４は、個別部品として半導体ＩＣ１０以外の高周波モジュール１に配置されていてもよい。 Further, the high-frequency module according to the present invention only needs to have at least the semiconductor IC 10 among the circuit elements (circuit components) constituting the high-frequency module 1 according to the first embodiment. Furthermore, the semiconductor IC 10 only needs to have at least the digital control circuit 11, and need not have the low noise amplifier 41 and the switches 12 to 14. In this case, the low-noise amplifier 41 and the switches 12 to 14 may be arranged as individual components in the high-frequency module 1 other than the semiconductor IC 10.
　［１．２　高周波モジュールの回路素子配置構成］
　図３Ａは、実施の形態１に係る高周波モジュール１の平面構成概略図である。また、図３Ｂは、実施の形態１に係る高周波モジュール１の断面構成概略図であり、具体的には、図３ＡのＩＩＩＢ－ＩＩＩＢ線における断面図である。なお、図３Ａの（ａ）には、モジュール基板９０の主面９０ａおよび９０ｂのうち、主面９０ａをｚ軸正方向側から見た場合の回路素子の配置図が示されている。一方、図３Ａの（ｂ）には、主面９０ｂをｙ軸負方向側から見た場合の回路素子の配置図が示されている。 [1.2 Circuit element arrangement of high frequency module]
FIG. 3A is a schematic plan view of the high-frequency module 1 according to Embodiment 1. FIG. FIG. 3B is a schematic cross-sectional view of the high-frequency module 1 according to Embodiment 1, specifically, a cross-sectional view taken along line IIIB-IIIB of FIG. 3A. FIG. 3A shows an arrangement diagram of circuit elements when the main surface 90a of the main surfaces 90a and 90b of the module substrate 90 is viewed from the z-axis positive direction side. On the other hand, FIG. 3B shows an arrangement diagram of the circuit elements when the main surface 90b is viewed from the y-axis negative direction side.
　図３Ａおよび図３Ｂに示すように、本実施の形態に係る高周波モジュール１は、モジュール基板９０と、半導体ＩＣ１０と、複数の柱状電極１５０と、フィルタ２１および２２と、インダクタ３１と、回路素子５１および５２と、樹脂部材８０Ａおよび８０Ｂと、を有している。 As shown in FIGS. 3A and 3B, the high-frequency module 1 according to the present embodiment includes a module substrate 90, a semiconductor IC 10, a plurality of columnar electrodes 150, filters 21 and 22, an inductor 31, and a circuit element 51. And 52, and resin members 80A and 80B.
　モジュール基板９０は、主面９０ａ（第２主面）および主面９０ｂ（第１主面）を有し、半導体ＩＣ１０、フィルタ２１および２２、インダクタ３１、ならびに回路素子５１および５２を実装する基板である。モジュール基板９０としては、例えば、複数の誘電体層の積層構造を有する低温同時焼成セラミックス（Ｌｏｗ　Ｔｅｍｐｅｒａｔｕｒｅ　Ｃｏ－ｆｉｒｅｄ　Ｃｅｒａｍｉｃｓ：ＬＴＣＣ）基板、または、プリント基板等が用いられる。 Module substrate 90 has a main surface 90a (second main surface) and a main surface 90b (first main surface), and is a substrate on which semiconductor IC 10, filters 21 and 22, inductor 31, and circuit elements 51 and 52 are mounted. is there. As the module substrate 90, for example, a low-temperature co-fired ceramic (LTC) substrate having a laminated structure of a plurality of dielectric layers (LTCC) substrate, a printed substrate, or the like is used.
　フィルタ２１および２２、インダクタ３１、ならびに回路素子５１および５２は、主面９０ａに実装されている。フィルタ２１および２２、インダクタ３１、ならびに回路素子５１および５２のそれぞれは、モジュール基板９０の主面９０ａに形成されたランド電極とバンプまたは半田などを介して、モジュール基板９０と電気的および機械的に接続されている。 The filters 21 and 22, the inductor 31, and the circuit elements 51 and 52 are mounted on the main surface 90a. The filters 21 and 22, the inductor 31, and the circuit elements 51 and 52 are electrically and mechanically connected to the module substrate 90 via land electrodes formed on the main surface 90a of the module substrate 90 and bumps or solder. It is connected.
　回路素子５１および５２は、図１に示された高周波モジュール１の回路構成には表されていないが、高周波モジュール１を構成するその他の回路素子であり、例えば、フィルタ、スイッチ、インダクタ、キャパシタなどに相当する。 The circuit elements 51 and 52 are not shown in the circuit configuration of the high-frequency module 1 shown in FIG. 1, but are other circuit elements forming the high-frequency module 1, such as a filter, a switch, an inductor, and a capacitor. Is equivalent to
　なお、モジュール基板９０は、主面９０ａおよび９０ｂの両面に回路素子を実装することが可能な基板であるが、主面９０ａには、フィルタ２１および２２、インダクタ３１、ならびに回路素子５１および５２などの回路素子が実装されていなくてもよい。 The module substrate 90 is a substrate on which circuit elements can be mounted on both surfaces of the main surfaces 90a and 90b. The main surface 90a has the filters 21 and 22, the inductor 31, the circuit elements 51 and 52, etc. May not be mounted.
　半導体ＩＣ１０は、主面１０ａ（第３主面）および主面１０ｂ（第４主面）を有し、主面１０ａおよび１０ｂを平面視した場合、矩形形状の外形を有している。半導体ＩＣ１０は、主面１０ａがモジュール基板９０の主面９０ｂと対向するように、主面９０ｂ上に実装されている。半導体ＩＣ１０は、モジュール基板９０の主面９０ｂに形成されたランド電極とバンプまたは半田などを介してモジュール基板９０と電気的および機械的に接続されている。 The semiconductor IC 10 has a main surface 10a (third main surface) and a main surface 10b (fourth main surface), and has a rectangular outer shape when the main surfaces 10a and 10b are viewed in plan. The semiconductor IC 10 is mounted on the main surface 90b such that the main surface 10a faces the main surface 90b of the module substrate 90. The semiconductor IC 10 is electrically and mechanically connected to the module substrate 90 via land electrodes formed on the main surface 90b of the module substrate 90 and bumps or solder.
　なお、半導体ＩＣ１０は、矩形形状の外形を有しているが、角部が面取りまたは丸みを帯びていてもよく、また、外縁部に切り欠き部を有していてもよい。 Although the semiconductor IC 10 has a rectangular outer shape, the corner may be chamfered or rounded, or may have a notch at the outer edge.
　また、主面９０ａに実装された回路素子間の電気的接続、主面９０ｂに実装された半導体ＩＣ１０に内蔵された各素子間の電気的接続、および、主面９０ａに実装された回路素子と半導体ＩＣ１０との電気的接続は、主面９０ａおよび９０ｂならびにモジュール基板９０の内部に形成された平面配線パターンおよびビア導体により実現されている。 In addition, the electrical connection between the circuit elements mounted on the main surface 90a, the electrical connection between the devices built in the semiconductor IC 10 mounted on the main surface 90b, and the circuit elements mounted on the main surface 90a. Electrical connection with the semiconductor IC 10 is realized by the plane wiring patterns and via conductors formed inside the main surfaces 90 a and 90 b and the module substrate 90.
　なお、平面配線パターンとは、モジュール基板９０の主面９０ａおよび９０ｂに平行な方向に沿って形成された導電膜であり、ビア導体とは、モジュール基板９０の主面９０ａおよび９０ｂに垂直な方向に延在する柱状導体である。 The planar wiring pattern is a conductive film formed along a direction parallel to the main surfaces 90a and 90b of the module substrate 90, and the via conductor is a direction perpendicular to the main surfaces 90a and 90b of the module substrate 90. Is a columnar conductor that extends.
　樹脂部材８０Ａは、モジュール基板９０の主面９０ａに配置され、主面９０ａに実装された回路素子の少なくとも一部および主面９０ａを覆っており、上記回路素子の機械強度および耐湿性などの信頼性を確保する機能を有している。樹脂部材８０Ｂは、モジュール基板９０の主面９０ｂに配置され、半導体ＩＣ１０および主面９０ｂを覆っており、半導体ＩＣ１０の機械強度および耐湿性などの信頼性を確保する機能を有している。なお、樹脂部材８０Ｂは、主面９０ｂおよび半導体ＩＣ１０のすべてを覆う必要はなく、その一部を覆っていてもよい。例えば、樹脂部材８０Ｂは、半導体ＩＣ１０と主面９０ｂとの間に充填されるだけであってもよい。なお、樹脂部材８０Ａおよび８０Ｂは、本発明に係る高周波モジュールに必須の構成要素ではない。 The resin member 80A is disposed on the main surface 90a of the module substrate 90, covers at least a part of the circuit element mounted on the main surface 90a and the main surface 90a, and has reliability such as mechanical strength and moisture resistance of the circuit element. It has the function to secure the performance. The resin member 80B is disposed on the main surface 90b of the module substrate 90, covers the semiconductor IC 10 and the main surface 90b, and has a function of securing reliability such as mechanical strength and moisture resistance of the semiconductor IC 10. The resin member 80B does not need to cover all of the main surface 90b and the semiconductor IC 10, but may cover a part thereof. For example, the resin member 80B may only be filled between the semiconductor IC 10 and the main surface 90b. Note that the resin members 80A and 80B are not essential components of the high-frequency module according to the present invention.
　柱状電極１５０は、図３Ｂにてモジュール基板９０を断面視した場合に、主面９０ｂから少なくとも主面１０ｂを含む仮想平面１００ｐ（第１仮想平面）まで主面９０ｂの垂直方向（ｚ軸方向）に延在する第１接続電極である。本実施の形態では、柱状電極１５０は、主面９０ｂの垂直方向（ｚ軸方向）に、主面９０ｂから仮想平面１００ｐを超えて、樹脂部材８０Ｂの表面まで延在している。柱状電極１５０の一端は、主面９０ｂにおいてモジュール基板９０に形成されたランド電極、平面配線パターンまたはビア導体と電気的に接続されている。また、柱状電極１５０の他端は、樹脂部材８０Ｂの表面に露出しており、高周波モジュール１が実装される外部（マザー）基板の電極と電気的に接続可能となっている。柱状電極１５０は、高周波モジュール１のグランド電位（ＧＮＤ）に設定された電極であってもよく、または、高周波モジュール１を伝搬する高周波信号（ＨＯＴ）を導通させる電極（例えば、図１の共通端子１０１）であってもよい。 When the module substrate 90 is viewed in cross section in FIG. 3B, the columnar electrode 150 extends in the vertical direction (z-axis direction) of the main surface 90b from the main surface 90b to a virtual plane 100p (first virtual plane) including at least the main surface 10b. The first connection electrode extends to In the present embodiment, the columnar electrode 150 extends from the main surface 90b to the surface of the resin member 80B in a direction perpendicular to the main surface 90b (z-axis direction), beyond the virtual plane 100p. One end of the columnar electrode 150 is electrically connected to a land electrode, a planar wiring pattern, or a via conductor formed on the module substrate 90 on the main surface 90b. The other end of the columnar electrode 150 is exposed on the surface of the resin member 80B, and can be electrically connected to an electrode of an external (mother) board on which the high-frequency module 1 is mounted. The columnar electrode 150 may be an electrode set to the ground potential (GND) of the high-frequency module 1 or an electrode that conducts a high-frequency signal (HOT) propagating through the high-frequency module 1 (for example, the common terminal in FIG. 1). 101).
　なお、本実施の形態および後述する実施の形態２において、柱状電極１５０は円柱形状であってもよく、また、角柱形状などを有していてもよい。また、柱状電極１５０は、半田ボール、または、バンプ電極などの接続電極であってもよく、この場合には柱状電極１５０の表面に球面形状を有していてもよい。 In the present embodiment and the second embodiment described later, the columnar electrode 150 may have a cylindrical shape, or may have a prismatic shape. The columnar electrode 150 may be a connection electrode such as a solder ball or a bump electrode. In this case, the surface of the columnar electrode 150 may have a spherical shape.
　図３Ａの（ｂ）に示すように、半導体ＩＣ１０の外縁は、互いに平行な辺１００ａ（第１辺）および１００ｂ（第２辺）、ならびに、辺１００ａおよび１００ｂと直交し、互いに平行な辺１００ｃ（第３辺）および１００ｄ（第４辺）を含んでいる。 As shown in FIG. 3B, the outer edge of the semiconductor IC 10 includes sides 100a (first side) and 100b (second side) parallel to each other, and sides 100c orthogonal to the sides 100a and 100b and parallel to each other. (Third side) and 100d (fourth side).
　モジュール基板９０の外縁は、互いに平行な辺１９０ａおよび１９０ｂ、ならびに、辺１９０ａおよび１９０ｂと直交し、互いに平行な辺１９０ｃおよび１９０ｄを含んでいる。 The outer edge of the module substrate 90 includes sides 190a and 190b parallel to each other, and sides 190c and 190d orthogonal to the sides 190a and 190b and parallel to each other.
　なお、本明細書において、２つの辺が平行であるとは、２つの辺のなす角度が厳密に０ｄｅｇであることに限定されず、２つの辺のなす角度が±１５ｄｅｇ以内であるものと定義される。 Note that in this specification, that two sides are parallel is not limited to an angle formed by two sides being strictly 0 deg, but is defined as an angle formed by two sides being within ± 15 deg. Is done.
　ここで、辺１００ａに対向する辺１９０ａと辺１００ａとの間のモジュール基板９０上の領域Ａａ（第１領域）、辺１００ｂに対向する辺１９０ｂと辺１００ｂとの間のモジュール基板９０上の領域Ａｂ（第２領域）、および、辺１００ｄに対向する辺１９０ｄと辺１００ｄとの間のモジュール基板９０上の領域Ａｄのそれぞれには、柱状電極１５０が配置されている。一方、辺１００ｃに対向する辺１９０ｃと辺１００ｃとの間のモジュール基板９０上の領域Ａｃ（第３領域）には、柱状電極１５０は配置されていない。 Here, a region Aa (first region) on the module substrate 90 between the sides 190a and 100a facing the side 100a, and a region on the module substrate 90 between the sides 190b and 100b facing the side 100b. The columnar electrode 150 is disposed in each of the Ab (second region) and the region Ad on the module substrate 90 between the side 190d and the side 100d facing the side 100d. On the other hand, the columnar electrode 150 is not arranged in the region Ac (third region) on the module substrate 90 between the side 190c and the side 100c facing the side 100c.
　なお、半導体ＩＣ１０の辺とモジュール基板９０の辺とが対向する、とは、当該２つの辺の間に、半導体ＩＣ１０の他の辺およびモジュール基板９０の他の辺がない状態を表している。 The expression “the side of the semiconductor IC 10 and the side of the module substrate 90 face each other” indicates a state where there is no other side of the semiconductor IC 10 and the other side of the module substrate 90 between the two sides.
　上記構成によれば、モジュール基板９０を平面視した場合において、領域Ａｃには柱状電極１５０がない。これにより、領域Ａｃにも半導体ＩＣ１０を配置することができ、半導体ＩＣ１０のサイズが比較的大きい場合には領域Ａｃを有効活用でき、また、半導体ＩＣ１０のサイズが比較的小さい場合には領域Ａｃを縮小することも可能となる。つまり、半導体ＩＣ１０の配置自由度、または、モジュール基板９０の縮小による高周波モジュール１の省面積化を実現できるので、高周波モジュール１の設計自由度が向上する。また一方で、半導体ＩＣ１０を挟んで対向する領域ＡａおよびＡｂには柱状電極１５０が配置されているので、半導体ＩＣ１０および各回路素子で処理された電気信号の取り出しおよびグランド強化を十分に確保しつつ、高周波モジュール１の外部基板への実装強度を確保できる。 According to the above configuration, when the module substrate 90 is viewed in a plan view, there is no columnar electrode 150 in the region Ac. Thereby, the semiconductor IC 10 can be arranged also in the region Ac. When the size of the semiconductor IC 10 is relatively large, the region Ac can be effectively used. When the size of the semiconductor IC 10 is relatively small, the region Ac can be reduced. It is also possible to reduce the size. That is, since the degree of freedom in the arrangement of the semiconductor ICs 10 or the area reduction of the high-frequency module 1 by reducing the size of the module substrate 90 can be realized, the degree of freedom in designing the high-frequency module 1 is improved. On the other hand, since the columnar electrodes 150 are arranged in the regions Aa and Ab opposed to each other with the semiconductor IC 10 interposed therebetween, the extraction of the electric signal processed by the semiconductor IC 10 and each circuit element and the reinforcement of the ground are sufficiently ensured. In addition, the mounting strength of the high-frequency module 1 on the external board can be secured.
　なお、上記平面視において、辺１００ｃと、領域Ａｃを規定するモジュール基板９０の辺１９０ｃとの距離Ｌｃは、辺１００ａと辺１９０ａとの距離Ｌａよりも小さく、かつ、辺１００ｂと辺１９０ｂとの距離Ｌｂよりも小さくてもよい。 In the plan view, the distance Lc between the side 100c and the side 190c of the module substrate 90 that defines the region Ac is smaller than the distance La between the side 100a and the side 190a, and the distance Lc between the side 100b and the side 190b. It may be smaller than the distance Lb.
　これにより、領域ＡａおよびＡｂに配置された柱状電極１５０により、半導体ＩＣ１０および各回路素子で処理された電気信号の取り出しおよびグランド強化を十分に確保し、高周波モジュール１の外部基板への実装強度を確保しつつ、モジュール基板９０の領域Ａｃを縮小することによる高周波モジュール１の省面積化を実現できる。 As a result, the columnar electrodes 150 arranged in the regions Aa and Ab sufficiently secure the extraction of the electric signal processed by the semiconductor IC 10 and each circuit element and the strengthening of the ground, and increase the mounting strength of the high-frequency module 1 on the external substrate. The area of the high-frequency module 1 can be reduced by reducing the area Ac of the module substrate 90 while securing the area.
　なお、領域Ａｃに柱状電極１５０が配置されていないことにより、領域Ａｃがない構成を有する高周波モジュールも本発明に含まれる。つまり、辺１００ｃと辺１９０ｃとが、上記平面視において重複している状態である。言い換えると、辺１００ｃと辺１９０ｃとの距離Ｌｃが０である状態である。これによれば、上記平面視における高周波モジュール１の面積を最小にできる。 高周波 Note that the present invention also includes a high-frequency module having a configuration in which the region Ac is not provided because the columnar electrode 150 is not arranged in the region Ac. That is, the side 100c and the side 190c are in an overlapping state in the plan view. In other words, the distance Lc between the side 100c and the side 190c is 0. According to this, the area of the high-frequency module 1 in the plan view can be minimized.
　図４は、実施の形態１の変形例に係る高周波モジュール１Ａの平面構成概略図である。同図に示された高周波モジュール１Ａは、実施の形態１に係る高周波モジュール１と比較して、柱状電極１５０の配置構成のみが異なる。以下、本変形例に係る高周波モジュール１Ａについて、実施の形態１に係る高周波モジュール１と同じ構成については説明を省略し、異なる構成について説明する。 FIG. 4 is a schematic plan view of a high-frequency module 1A according to a modification of the first embodiment. The high-frequency module 1A shown in the figure differs from the high-frequency module 1 according to the first embodiment only in the arrangement of the columnar electrodes 150. Hereinafter, regarding the high-frequency module 1A according to the present modification, the description of the same configuration as the high-frequency module 1 according to Embodiment 1 will be omitted, and different configurations will be described.
　辺１００ａに対向する辺１９０ａと辺１００ａとの間のモジュール基板９０上の領域Ａａ（第１領域）、辺１００ｂに対向する辺１９０ｂと辺１００ｂとの間のモジュール基板９０上の領域Ａｂ（第２領域）のそれぞれには、柱状電極１５０が配置されている。一方、辺１００ｃに対向する辺１９０ｃと辺１００ｃとの間のモジュール基板９０上の領域Ａｃ（第３領域）、および、辺１００ｄに対向する辺１９０ｄと辺１００ｄとの間のモジュール基板９０上の領域Ａｄ（第４領域）のそれぞれ、には、柱状電極１５０は配置されていない。 A region Aa (first region) on the module substrate 90 between the sides 190a and 100a facing the side 100a, and a region Ab (first region) on the module substrate 90 between the sides 190b and 100b facing the side 100b. The columnar electrodes 150 are arranged in each of the two regions. On the other hand, a region Ac (third region) on the module substrate 90 between the sides 190c and 100c facing the side 100c and a region Ac on the module substrate 90 between the sides 190d and 100d facing the side 100d. The columnar electrode 150 is not arranged in each of the regions Ad (fourth region).
　上記構成によれば、モジュール基板９０を平面視した場合において、対向する領域ＡｃおよびＡｄには柱状電極１５０がない。これにより、領域ＡｃおよびＡｄにも半導体ＩＣ１０を配置することができ、または、領域ＡｃおよびＡｄを縮小することも可能となる。つまり、高周波モジュール１Ａの設計自由度がさらに向上する。また一方で、半導体ＩＣ１０を挟んで対向する領域ＡａおよびＡｂには柱状電極１５０が配置されているので、半導体ＩＣ１０および各回路素子で処理された電気信号の取り出しおよびグランド強化を十分に確保しつつ、高周波モジュール１Ａの外部基板への実装が可能となる。 According to the above configuration, when the module substrate 90 is viewed in a plan view, the opposing regions Ac and Ad have no columnar electrode 150. Thus, the semiconductor IC 10 can be arranged also in the regions Ac and Ad, or the regions Ac and Ad can be reduced. That is, the design flexibility of the high-frequency module 1A is further improved. On the other hand, since the columnar electrodes 150 are arranged in the regions Aa and Ab opposed to each other with the semiconductor IC 10 interposed therebetween, the extraction of the electric signal processed by the semiconductor IC 10 and each circuit element and the reinforcement of the ground are sufficiently ensured. Thus, the high-frequency module 1A can be mounted on an external substrate.
　［１．３　効果など］
　本実施の形態に係る高周波モジュール１は、主面９０ａおよび９０ｂを有するモジュール基板９０と、主面１０ａおよび１０ｂを有し、モジュール基板９０、主面１０ａ、主面１０ｂの順となるように主面９０ｂ上に実装された、高周波信号を処理する半導体ＩＣ１０と、主面９０ｂから少なくとも主面１０ｂを含む仮想平面１００ｐまで主面９０ｂの垂直方向に、延在する複数の柱状電極１５０と、を備える。モジュール基板９０を平面視した場合に、半導体ＩＣ１０の外縁は、互いに平行な辺１００ａおよび１００ｂ、ならびに、辺１００ａおよび１００ｂと直交し、互いに平行な辺１００ｃおよび１００ｄで構成されている。辺１００ａに対向する辺１９０ａと辺１００ａとの間のモジュール基板９０上の領域Ａａ、および、辺１００ｂに対向する辺１９０ｂと辺１００ｂとの間のモジュール基板９０上の領域Ａｂのそれぞれには、複数の柱状電極１５０のいくつかが配置されている。また、辺１００ｃに対向する辺１９０ｃと辺１００ｃとの間のモジュール基板９０上の領域Ａｃには、複数の柱状電極１５０は配置されていない。 [1.3 Effects, etc.]
The high-frequency module 1 according to the present embodiment has a module substrate 90 having main surfaces 90a and 90b, and main surfaces 10a and 10b, and the main substrate 90, the main surface 10a, and the main surface 10b are arranged in this order. A semiconductor IC 10 mounted on the surface 90b for processing a high-frequency signal, and a plurality of columnar electrodes 150 extending in a direction perpendicular to the main surface 90b from the main surface 90b to a virtual plane 100p including at least the main surface 10b. Prepare. When the module substrate 90 is viewed in a plan view, the outer edge of the semiconductor IC 10 includes sides 100a and 100b parallel to each other, and sides 100c and 100d orthogonal to the sides 100a and 100b and parallel to each other. Each of the region Aa on the module substrate 90 between the side 190a and the side 100a facing the side 100a and the region Ab on the module substrate 90 between the side 190b and the side 100b facing the side 100b, Some of the plurality of columnar electrodes 150 are arranged. Further, the plurality of columnar electrodes 150 are not arranged in the region Ac on the module substrate 90 between the side 190c and the side 100c facing the side 100c.
　これによれば、モジュール基板９０を平面視した場合において、領域Ａｃには柱状電極１５０がない。これにより、領域Ａｃにも半導体ＩＣ１０を配置することができ、半導体ＩＣ１０のサイズが比較的大きい場合には領域Ａｃを有効活用でき、また、半導体ＩＣ１０のサイズが比較的小さい場合には領域Ａｃを縮小することも可能となる。つまり、半導体ＩＣ１０の配置自由度、または、モジュール基板９０の縮小による高周波モジュール１の省面積化を実現できるので、高周波モジュール１の設計自由度が向上する。また一方で、半導体ＩＣ１０を挟んで対向する領域ＡａおよびＡｂには柱状電極１５０が配置されているので、半導体ＩＣ１０および各回路素子で処理された電気信号の取り出しおよびグランド強化を十分に確保しつつ、高周波モジュール１の外部基板への実装が可能となる。 According to this, when the module substrate 90 is viewed in a plan view, there is no columnar electrode 150 in the region Ac. Thereby, the semiconductor IC 10 can be arranged also in the region Ac. When the size of the semiconductor IC 10 is relatively large, the region Ac can be effectively used. When the size of the semiconductor IC 10 is relatively small, the region Ac can be reduced. It is also possible to reduce the size. That is, since the degree of freedom in the arrangement of the semiconductor ICs 10 or the area reduction of the high-frequency module 1 by reducing the size of the module substrate 90 can be realized, the degree of freedom in designing the high-frequency module 1 is improved. On the other hand, since the columnar electrodes 150 are arranged in the regions Aa and Ab opposed to each other with the semiconductor IC 10 interposed therebetween, the extraction of the electric signal processed by the semiconductor IC 10 and each circuit element and the reinforcement of the ground are sufficiently ensured. Thus, the high-frequency module 1 can be mounted on an external substrate.
　よって、電気的および機械的性能を劣化させずに、設計自由度が向上した高周波モジュール１、および、高周波モジュール１を備える通信装置５を提供することが可能となる。 Accordingly, it is possible to provide the high-frequency module 1 with improved design flexibility and the communication device 5 including the high-frequency module 1 without deteriorating electrical and mechanical performance.
　（実施の形態２）
　本実施の形態では、半導体ＩＣ１０に内蔵された増幅回路および当該増幅回路に接続された整合用回路素子の配置構成について説明する。 (Embodiment 2)
In the present embodiment, an arrangement of an amplifier circuit built in the semiconductor IC 10 and a matching circuit element connected to the amplifier circuit will be described.
　図５Ａは、実施の形態２に係る高周波モジュール１Ｂの断面構成概略図である。なお、本実施の形態に係る高周波モジュール１Ｂの平面構成については、図３Ａと同様である。図５Ａは、具体的には、図３ＡのＩＩＩＢ－ＩＩＩＢ線における断面図である。 FIG. 5A is a schematic cross-sectional configuration diagram of a high-frequency module 1B according to the second embodiment. Note that the planar configuration of the high-frequency module 1B according to the present embodiment is the same as that in FIG. 3A. FIG. 5A is a cross-sectional view taken along line IIIB-IIIB of FIG. 3A.
　図５Ａに示すように、本実施の形態に係る高周波モジュール１Ｂは、モジュール基板９０と、半導体ＩＣ１０と、複数の柱状電極１５０と、フィルタ２１および２２と、インダクタ３１と、回路素子５１および５２と、樹脂部材８０Ａおよび８０Ｂと、を有している。同図に示された高周波モジュール１Ｂは、実施の形態１に係る高周波モジュール１と比較して、半導体ＩＣ１０内の素子配置構成が示されている点、および、半導体ＩＣ１０とインダクタ３１との接続構成が示されている点が異なる。以下、本実施の形態に係る高周波モジュール１Ｂについて、実施の形態１に係る高周波モジュール１と同じ構成については説明を省略し、異なる構成を中心に説明する。 As shown in FIG. 5A, the high-frequency module 1B according to the present embodiment includes a module substrate 90, a semiconductor IC 10, a plurality of columnar electrodes 150, filters 21 and 22, an inductor 31, and circuit elements 51 and 52. , Resin members 80A and 80B. The high-frequency module 1B shown in FIG. 4 differs from the high-frequency module 1 according to the first embodiment in that the element arrangement in the semiconductor IC 10 is shown, and the connection between the semiconductor IC 10 and the inductor 31. Is different. Hereinafter, with respect to the high-frequency module 1B according to the present embodiment, description of the same configuration as that of the high-frequency module 1 according to the first embodiment will be omitted, and different configurations will be mainly described.
　インダクタ３１は、主面９０ａに配置された第１部品である。インダクタ３１と半導体ＩＣ１０とは、モジュール基板９０内であって主面９０ａおよび９０ｂに垂直な方向（ｚ軸方向）に沿って形成されたビア導体９１を介して接続されている。 The inductor 31 is a first component disposed on the main surface 90a. The inductor 31 and the semiconductor IC 10 are connected via a via conductor 91 formed in the module substrate 90 and along a direction (z-axis direction) perpendicular to the main surfaces 90a and 90b.
　これにより、インダクタ３１と半導体ＩＣ１０との接続配線長さを短くでき、低抵抗および寄生容量の小さな配線（ビア導体９１）で接続されるので、高周波モジュール１Ｂの低損失化および高性能化を実現できる。 As a result, the length of the connection wiring between the inductor 31 and the semiconductor IC 10 can be reduced, and the connection is made by a wiring (via conductor 91) having a low resistance and a small parasitic capacitance, thereby realizing low loss and high performance of the high-frequency module 1B. it can.
　なお、本実施の形態において、半導体ＩＣ１０とビア導体９１を介して接続される第１部品は、インダクタ３１に限定されず、主面９０ａに実装されたフィルタ２１および２２、回路素子５１および５２のいずれかであってもよい。 In the present embodiment, the first component connected to the semiconductor IC 10 via the via conductor 91 is not limited to the inductor 31, but includes the filters 21 and 22 and the circuit elements 51 and 52 mounted on the main surface 90a. Either one may be used.
　なお、ビア導体９１は、上記平面視において、辺１００ａ～１００ｄのうち辺１００ｃに最近接して配置されていてもよい。 The via conductor 91 may be arranged closest to the side 100c among the sides 100a to 100d in the plan view.
　これにより、ビア導体９１は、柱状電極１５０と近接しない領域に配置され、かつ、半導体ＩＣ１０の端部領域であってモジュール基板９０内の配線と近接する確率が低い領域に配置される。よって、ビア導体９１と柱状電極１５０または上記配線とで形成される寄生容量を低減できる。また、ビア導体９１により半導体ＩＣ１０と接続されたインダクタ３１が辺１００ｃ側に配置されることで、インダクタ３１を、上記平面視で半導体ＩＣ１０と重複するように配置できるので、インダクタ３１と半導体ＩＣ１０との配線を短くしつつ、省面積化することができる。 Accordingly, the via conductor 91 is arranged in a region that is not close to the columnar electrode 150, and is arranged in an end region of the semiconductor IC 10 and has a low probability of being close to the wiring in the module substrate 90. Therefore, the parasitic capacitance formed by the via conductor 91 and the columnar electrode 150 or the wiring can be reduced. Further, since the inductor 31 connected to the semiconductor IC 10 by the via conductor 91 is arranged on the side 100c side, the inductor 31 can be arranged so as to overlap the semiconductor IC 10 in the plan view. The wiring can be shortened and the area can be reduced.
　また、図５Ａに示すように、本実施の形態に係る高周波モジュール１Ｂにおいて、半導体ＩＣ１０は、ローノイズアンプ４１を内蔵している。インダクタ３１とローノイズアンプ４１とは、ビア導体９１を介して接続されている。 (5) As shown in FIG. 5A, in the high-frequency module 1B according to the present embodiment, the semiconductor IC 10 has a built-in low-noise amplifier 41. The inductor 31 and the low noise amplifier 41 are connected via a via conductor 91.
　図５Ｂは、比較例１に係る高周波モジュール５００の断面構成概略図である。同図に示すように、比較例１に係る高周波モジュール５００は、モジュール基板９０と、半導体ＩＣ５１０と、複数の柱状電極１５０と、フィルタ２１および２２と、インダクタ３１と、回路素子５１および５２と、樹脂部材８０Ａおよび８０Ｂと、を有している。比較例１に係る高周波モジュール５００は、実施の形態２に係る高周波モジュール１Ｂと比較して、半導体ＩＣ５１０内のローノイズアンプ５４１の配置構成が異なること、および、モジュール基板９０上の領域Ａｃにも柱状電極１５０が配置されていること、が異なる。以下、比較例１に係る高周波モジュール５００について、実施の形態２に係る高周波モジュール１Ｂと同じ構成については説明を省略し、異なる構成について説明する。 FIG. 5B is a schematic cross-sectional view of the high-frequency module 500 according to Comparative Example 1. As shown in the figure, the high-frequency module 500 according to Comparative Example 1 has a module substrate 90, a semiconductor IC 510, a plurality of columnar electrodes 150, filters 21 and 22, an inductor 31, circuit elements 51 and 52, Resin members 80A and 80B. The high-frequency module 500 according to Comparative Example 1 is different from the high-frequency module 1B according to the second embodiment in that the arrangement of the low-noise amplifier 541 in the semiconductor IC 510 is different and the area Ac on the module substrate 90 is also columnar. The difference is that the electrode 150 is arranged. Hereinafter, regarding the high-frequency module 500 according to Comparative Example 1, the description of the same configuration as the high-frequency module 1B according to Embodiment 2 will be omitted, and different configurations will be described.
　半導体ＩＣ５１０は、ローノイズアンプ５４１を内蔵している。インダクタ３１とローノイズアンプ５４１とは、ビア導体５９１および平面配線パターン５９２を介して接続されている。 (4) The semiconductor IC 510 has a built-in low noise amplifier 541. The inductor 31 and the low noise amplifier 541 are connected via a via conductor 591 and a plane wiring pattern 592.
　また、半導体ＩＣ５１０の外縁を構成する４つの辺の各々と、当該４つの辺の各々に対向するモジュール基板９０の各辺との間の領域Ａａ、Ａｂ、Ａｃ、Ａｄのそれぞれには、柱状電極１５０が配置されている。 Further, each of the regions Aa, Ab, Ac, Ad between each of the four sides forming the outer edge of the semiconductor IC 510 and each side of the module substrate 90 facing each of the four sides has a columnar electrode. 150 are arranged.
　また、上記平面視において、ローノイズアンプ５４１は、領域Ａｃに配置された柱状電極１５０のため、辺１００ａ～１００ｄに近接して配置されておらず、半導体ＩＣ５１０の中央領域に配置されている。一方、インダクタ３１は、辺１００ａ～１００ｄのうち辺１００ｃに最近接して配置され、モジュール基板９０の端部領域に配置されている。 In addition, in the plan view, the low noise amplifier 541 is not disposed close to the sides 100a to 100d because of the columnar electrode 150 disposed in the region Ac, but is disposed in the central region of the semiconductor IC 510. On the other hand, the inductor 31 is disposed closest to the side 100c among the sides 100a to 100d, and is disposed in an end region of the module substrate 90.
　比較例１に係る高周波モジュール５００の上記構成によれば、インダクタ３１がモジュール基板９０の端部領域に配置されているので、モジュール基板９０に実装されたその他の部品および配線との不要な磁界結合または電解結合が抑制される。しかしながら、インダクタ３１とローノイズアンプ５４１とが、高抵抗および大きな寄生容量を有する配線（ビア導体５９１および平面配線パターン５９２）で接続されるので、高周波モジュール５００の伝搬損失が大きくなる。 According to the above configuration of the high-frequency module 500 according to Comparative Example 1, since the inductor 31 is arranged in the end region of the module substrate 90, unnecessary magnetic field coupling with other components and wiring mounted on the module substrate 90 Alternatively, electrolytic bonding is suppressed. However, since the inductor 31 and the low-noise amplifier 541 are connected by wiring (via conductor 591 and planar wiring pattern 592) having high resistance and large parasitic capacitance, the propagation loss of the high-frequency module 500 increases.
　図５Ｃは、比較例２に係る高周波モジュール５００Ａの断面構成概略図である。比較例２に係る高周波モジュール５００Ａは、比較例１に係る高周波モジュール５００と比較して、ローノイズアンプ５４１およびインダクタ３１の配置構成が異なる。 FIG. 5C is a schematic sectional view of a high-frequency module 500A according to Comparative Example 2. The high-frequency module 500A according to Comparative Example 2 is different from the high-frequency module 500 according to Comparative Example 1 in the arrangement of the low-noise amplifier 541 and the inductor 31.
　比較例１に係る高周波モジュール５００に対して、比較例２に係る高周波モジュール５００Ａのように、ローノイズアンプ５４１とインダクタ３１とをビア導体９１のみで接続しようとすると、インダクタ３１を主面９０ａの中央側にずらす必要があり、主面９０ａの外周領域、つまり主面９０ａを平面視した場合に柱状電極１５０と重複する主面９０ａ上の領域にデッドスペースＤｓが発生する。仮に、デッドスペースＤｓに何か他の部品を配置したとしても、当該部品とインダクタ３１とが不要な結合をしてしまう懸念がある。 When the low-noise amplifier 541 and the inductor 31 are connected only with the via conductor 91 as in the high-frequency module 500A according to the second comparative example, the inductor 31 is connected to the center of the main surface 90a. The dead space Ds occurs in the outer peripheral region of the main surface 90a, that is, in the region on the main surface 90a that overlaps with the columnar electrode 150 when the main surface 90a is viewed in a plan view. Even if some other component is arranged in the dead space Ds, there is a concern that the component and the inductor 31 may be unnecessarily coupled.
　比較例２に係る高周波モジュール５００Ａの上記構成によれば、デッドスペースＤｓにより高周波モジュール５００Ａを省面積化することができず、また、インダクタ３１と他の部品との不要な結合により高周波モジュール５００の高周波信号伝送特性が劣化する。 According to the above-described configuration of the high-frequency module 500A according to Comparative Example 2, the area of the high-frequency module 500A cannot be reduced due to the dead space Ds, and the high-frequency module 500A is not required due to unnecessary coupling between the inductor 31 and other components. High-frequency signal transmission characteristics deteriorate.
　図５Ｄは、比較例３に係る高周波モジュール５００Ｂの断面構成概略図である。比較例３に係る高周波モジュール５００Ｂは、比較例２に係る高周波モジュール５００Ａと比較して、ローノイズアンプ５４１およびインダクタ３１を、さらに主面９０ａの中央側に配置している。これによれば、インダクタ３１の周囲に配置された他の部品とインダクタ３１との不要な結合が発生する確率がさらに高くなる。 FIG. 5D is a schematic sectional view of a high-frequency module 500B according to Comparative Example 3. The high-frequency module 500B according to Comparative Example 3 is different from the high-frequency module 500A according to Comparative Example 2 in that the low-noise amplifier 541 and the inductor 31 are further arranged on the center side of the main surface 90a. According to this, the probability that unnecessary coupling between the inductor 31 and other components arranged around the inductor 31 will be further increased.
　比較例３に係る高周波モジュール５００Ｂの上記構成によれば、インダクタ３１と他の部品との不要な結合により高周波モジュール５００の高周波信号伝送特性が劣化する。 According to the above-described configuration of the high-frequency module 500B according to Comparative Example 3, the high-frequency signal transmission characteristics of the high-frequency module 500 deteriorate due to unnecessary coupling between the inductor 31 and other components.
　これに対して、本実施の形態に係る高周波モジュール１Ｂによれば、上記平面視において、ローノイズアンプ４１およびインダクタ３１の配置が最適化されており、ローノイズアンプ４１およびインダクタ３１は、辺１００ａ～１００ｄのうち辺１００ｃに最近接して配置されている。 On the other hand, in the high-frequency module 1B according to the present embodiment, the arrangement of the low-noise amplifier 41 and the inductor 31 is optimized in the plan view, and the low-noise amplifier 41 and the inductor 31 are located on the sides 100a to 100d. Are arranged closest to the side 100c.
　これによれば、ローノイズアンプ４１、インダクタ３１、およびビア導体９１は、柱状電極１５０と近接しない領域に配置され、かつ、半導体ＩＣ１０の端部領域であってモジュール基板９０内の配線と近接する確率が低い領域に配置される。このため、インダクタ３１とその他の回路素子および配線との不要な磁界結合または電解結合が抑制される。また、インダクタ３１と半導体ＩＣ１０との接続配線長が短く、かつ、低抵抗および寄生容量の小さな配線（ビア導体９１）で接続されるので、ローノイズアンプ４１の前段において発生する高周波ノイズを低減できる。よって、高周波モジュール１Ｂの低損失化および高性能化を実現できる。 According to this, the low noise amplifier 41, the inductor 31, and the via conductor 91 are arranged in a region that is not close to the columnar electrode 150, and are in the end region of the semiconductor IC 10 and are close to the wiring in the module substrate 90. Are arranged in a low area. Therefore, unnecessary magnetic field coupling or electrolytic coupling between the inductor 31 and other circuit elements and wiring is suppressed. Further, since the connection wiring length between the inductor 31 and the semiconductor IC 10 is short and connected by a wiring (via conductor 91) having a low resistance and a small parasitic capacitance, high-frequency noise generated in the preceding stage of the low noise amplifier 41 can be reduced. Therefore, a reduction in the loss and a higher performance of the high-frequency module 1B can be realized.
　なお、上記平面視において、辺１００ｃに最近接して配置されている組み合わせとして、ローノイズアンプ４１およびインダクタ３１を挙げたが、半導体ＩＣ１０がパワーアンプを内蔵している場合には、パワーアンプと当該パワーアンプの出力端に接続された整合素子との組み合わせであってもよい。つまり、辺１００ｃに最近接して配置されている組み合わせとしては、増幅回路および当該増幅回路に接続された整合素子（第１部品）であってもよい。 In the above-described plan view, the low-noise amplifier 41 and the inductor 31 are described as a combination arranged closest to the side 100c. However, when the semiconductor IC 10 has a built-in power amplifier, the power amplifier and the power It may be a combination with a matching element connected to the output terminal of the amplifier. That is, the combination arranged closest to the side 100c may be an amplifier circuit and a matching element (first component) connected to the amplifier circuit.
　（実施の形態３）
　本実施の形態では、半導体ＩＣ１０の主面から、当該主面の垂直方向に延在する第２接続電極を有する高周波モジュールの構成について説明する。 (Embodiment 3)
In the present embodiment, a configuration of a high-frequency module having a second connection electrode extending from the main surface of semiconductor IC 10 in a direction perpendicular to the main surface will be described.
　図６は、実施の形態３に係る高周波モジュール１Ｃの平面構成および断面構成を示す概略図である。図６の（ａ）には、モジュール基板９０の主面９０ａおよび９０ｂのうち、主面９０ｂをｚ軸負方向側から見た場合の回路素子の配置図が示されている。また、図６の（ｂ）は、図６の（ａ）のＶＩ－ＶＩ線における断面図である。なお、主面９０ａをｚ軸正方向側から見た場合の回路素子の配置図については、図３Ａの（ａ）と同様であるため、図示を省略している。 FIG. 6 is a schematic diagram showing a plan configuration and a cross-sectional configuration of high-frequency module 1C according to Embodiment 3. FIG. 6A shows an arrangement diagram of circuit elements when the main surface 90b of the main surfaces 90a and 90b of the module substrate 90 is viewed from the z-axis negative direction side. FIG. 6B is a cross-sectional view taken along the line VI-VI of FIG. The layout of the circuit elements when the main surface 90a is viewed from the positive z-axis direction is the same as that in FIG.
　図６に示すように、本実施の形態に係る高周波モジュール１Ｃは、モジュール基板９０と、半導体ＩＣ１０と、複数の柱状電極１５０と、ビア導体１５１と、フィルタ２１および２２と、インダクタ３１と、回路素子５１および５２と、樹脂部材８０Ａおよび８０Ｂと、を有している。同図に示された高周波モジュール１Ｃは、実施の形態２に係る高周波モジュール１Ｂと比較して、ビア導体１５１が配置されている点が異なる。以下、本実施の形態に係る高周波モジュール１Ｃについて、実施の形態２に係る高周波モジュール１Ｂと同じ構成については説明を省略し、異なる構成を中心に説明する。 As shown in FIG. 6, the high-frequency module 1C according to the present embodiment includes a module substrate 90, a semiconductor IC 10, a plurality of columnar electrodes 150, via conductors 151, filters 21 and 22, an inductor 31, Elements 51 and 52 and resin members 80A and 80B are provided. The high-frequency module 1C shown in the drawing differs from the high-frequency module 1B according to the second embodiment in that a via conductor 151 is arranged. Hereinafter, with respect to high-frequency module 1C according to the present embodiment, description of the same configuration as high-frequency module 1B according to Embodiment 2 will be omitted, and different configurations will be mainly described.
　柱状電極１５０は、モジュール基板９０を断面視した場合に、主面９０ｂから、仮想平面１００ｐ（第１仮想平面）よりも主面９０ｂから離れた仮想平面１００ｑ（第２仮想平面）まで主面９０ｂの垂直方向（ｚ軸方向）に延在している。ここで、仮想平面１００ｑ（第２仮想平面）は、樹脂部材８０Ｂの表面を含む平面である。 When the module substrate 90 is viewed in cross section, the columnar electrode 150 extends from the main surface 90b to a virtual plane 100q (second virtual plane) farther from the main surface 90b than the virtual plane 100p (first virtual plane). In the vertical direction (z-axis direction). Here, the virtual plane 100q (second virtual plane) is a plane including the surface of the resin member 80B.
　図６の（ａ）に示すように、辺１００ａに対向する辺１９０ａと辺１００ａとの間のモジュール基板９０上の領域Ａａ（第１領域）、辺１００ｂに対向する辺１９０ｂと辺１００ｂとの間のモジュール基板９０上の領域Ａｂ（第２領域）、および、辺１００ｄに対向する辺１９０ｄと辺１００ｄとの間のモジュール基板９０上の領域Ａｄのそれぞれには、柱状電極１５０が配置されている。一方、辺１００ｃに対向する辺１９０ｃと辺１００ｃとの間のモジュール基板９０上の領域Ａｃ（第３領域）には、柱状電極１５０は配置されていない。 As shown in FIG. 6A, the area Aa (first area) on the module substrate 90 between the side 190a and the side 100a facing the side 100a, and the side 190b and the side 100b facing the side 100b. The columnar electrode 150 is disposed in each of the region Ab (second region) on the module substrate 90 between the sides and the region Ad on the module substrate 90 between the side 190d and the side 100d facing the side 100d. I have. On the other hand, the columnar electrode 150 is not arranged in the region Ac (third region) on the module substrate 90 between the side 190c and the side 100c facing the side 100c.
　ビア導体１５１は、半導体ＩＣ１０の主面１０ｂ（第４主面）から樹脂部材８０Ｂの表面（仮想平面１００ｑ）まで、上記垂直方向に延在する第２接続電極である。 The via conductor 151 is a second connection electrode extending in the vertical direction from the main surface 10b (fourth main surface) of the semiconductor IC 10 to the surface (virtual plane 100q) of the resin member 80B.
　複数のビア導体１５１のいくつかは、ビア電極１４０を介してローノイズアンプ４１と接続されている。また、複数のビア導体１５１のいくつかは、半導体ＩＣ１０を貫通するビア電極１６０を介してモジュール基板９０に形成されたランド電極と接続されている。 い く つ か Some of the plurality of via conductors 151 are connected to the low-noise amplifier 41 via the via electrodes 140. Some of the plurality of via conductors 151 are connected to land electrodes formed on the module substrate 90 via via electrodes 160 penetrating the semiconductor IC 10.
　また、ローノイズアンプ４１およびインダクタ３１は、辺１００ａ～１００ｄのうちの辺１００ｃに最近接して配置されている。 {Circle around (1)} The low-noise amplifier 41 and the inductor 31 are arranged closest to the side 100c of the sides 100a to 100d.
　上記構成によれば、モジュール基板９０上の領域Ａｃに配置されなくなった柱状電極１５０に代わって、半導体ＩＣ１０の主面１０ｂ（天面）から延びたビア導体１５１が配置されることにより、電気信号の取り出し、グランド強化、および、外部基板との実装強化を補填しつつ、高周波モジュール１Ｃの小面積化を実現できる。 According to the above configuration, the via conductor 151 extending from the main surface 10b (top surface) of the semiconductor IC 10 is disposed in place of the columnar electrode 150 which is no longer disposed in the region Ac on the module substrate 90, so that an electric signal is provided. The high-frequency module 1 </ b> C can be reduced in area while compensating for taking out, strengthening the ground, and strengthening the mounting with the external board.
　図７は、実施の形態３の変形例に係る高周波モジュール１Ｄの平面構成および断面構成を示す概略図である。図７の（ａ）には、モジュール基板９０の主面９０ａおよび９０ｂのうち、主面９０ｂをｚ軸負方向側から見た場合の半導体ＩＣ１０および柱状電極１５０の配置図が示されている。また、図７の（ｂ）は、図７の（ａ）のＶＩＩ－ＶＩＩ線における断面図である。なお、主面９０ａをｚ軸正方向側から見た場合の回路素子の配置図については、図３Ａの（ａ）と同様であるため、図示を省略している。 FIG. 7 is a schematic diagram showing a planar configuration and a cross-sectional configuration of a high-frequency module 1D according to a modification of the third embodiment. FIG. 7A shows an arrangement diagram of the semiconductor IC 10 and the columnar electrode 150 when the main surface 90b of the main surfaces 90a and 90b of the module substrate 90 is viewed from the z-axis negative direction side. FIG. 7B is a cross-sectional view taken along the line VII-VII of FIG. The layout of the circuit elements when the main surface 90a is viewed from the positive z-axis direction is the same as that in FIG.
　図７に示すように、本変形例に係る高周波モジュール１Ｄは、モジュール基板９０と、半導体ＩＣ１０と、複数の柱状電極１５０と、ビア導体１５２と、フィルタ２１および２２と、インダクタ３１と、回路素子５１および５２と、樹脂部材８０Ａおよび８０Ｂと、シールド電極７０と、を有している。同図に示された高周波モジュール１Ｄは、実施の形態１に係る高周波モジュール１と比較して、半導体ＩＣ１０内の素子配置構成が示されている点、ビア導体１５２が配置されている点、および、シールド電極７０が配置されている点が異なる。以下、本実施の形態に係る高周波モジュール１Ｄについて、実施の形態１に係る高周波モジュール１と同じ構成については説明を省略し、異なる構成を中心に説明する。 As shown in FIG. 7, a high-frequency module 1D according to this modification includes a module substrate 90, a semiconductor IC 10, a plurality of columnar electrodes 150, via conductors 152, filters 21 and 22, an inductor 31, and a circuit element. 51 and 52, resin members 80A and 80B, and a shield electrode 70. The high-frequency module 1D shown in FIG. 6 differs from the high-frequency module 1 according to the first embodiment in that the element arrangement in the semiconductor IC 10 is shown, the via conductor 152 is arranged, and And a shield electrode 70 are provided. Hereinafter, with respect to the high-frequency module 1D according to the present embodiment, a description of the same configuration as that of the high-frequency module 1 according to the first embodiment will be omitted, and different configurations will be mainly described.
　柱状電極１５０は、モジュール基板９０を断面視した場合に、主面９０ｂの垂直方向（ｚ軸方向）に、主面９０ｂから、仮想平面１００ｐ（第１仮想平面）よりも主面９０ｂから離れた仮想平面１００ｑ（第２仮想平面）まで延在している。ここで、仮想平面１００ｑ（第２仮想平面）は、樹脂部材８０Ｂの表面を含む平面である。 When the module substrate 90 is viewed in cross section, the columnar electrode 150 is farther away from the main surface 90b than the virtual plane 100p (first virtual plane) in the direction perpendicular to the main surface 90b (z-axis direction). It extends to the virtual plane 100q (second virtual plane). Here, the virtual plane 100q (second virtual plane) is a plane including the surface of the resin member 80B.
　図７の（ａ）に示すように、辺１００ａに対向する辺１９０ａと辺１００ａとの間のモジュール基板９０上の領域Ａａ（第１領域）、辺１００ｂに対向する辺１９０ｂと辺１００ｂとの間のモジュール基板９０上の領域Ａｂ（第２領域）、および、辺１００ｄに対向する辺１９０ｄと辺１００ｄとの間のモジュール基板９０上の領域Ａｄのそれぞれには、柱状電極１５０が配置されている。一方、辺１００ｃに対向する辺１９０ｃと辺１００ｃとの間のモジュール基板９０上の領域Ａｃ（第３領域）には、柱状電極１５０は配置されていない。 As shown in FIG. 7A, a region Aa (first region) on the module substrate 90 between the side 190a and the side 100a facing the side 100a and a side 190b and the side 100b facing the side 100b. The columnar electrode 150 is disposed in each of the region Ab (second region) on the module substrate 90 between the sides and the region Ad on the module substrate 90 between the side 190d and the side 100d facing the side 100d. I have. On the other hand, the columnar electrode 150 is not disposed in the region Ac (third region) on the module substrate 90 between the side 190c and the side 100c facing the side 100c.
　半導体ＩＣ１０は、ディジタル制御回路１１を内蔵している。ディジタル制御回路１１は、辺１００ａ～１００ｄのうち辺１００ｃに最近接して配置されている。 (4) The semiconductor IC 10 has a digital control circuit 11 built therein. The digital control circuit 11 is arranged closest to the side 100c among the sides 100a to 100d.
　ビア導体１５２は、半導体ＩＣ１０の主面１０ｂ（第４主面）から樹脂部材８０Ｂの表面（仮想平面１００ｑ）まで、上記垂直方向に延在する第２接続電極である。 The via conductor 152 is a second connection electrode extending in the vertical direction from the main surface 10b (fourth main surface) of the semiconductor IC 10 to the surface (virtual plane 100q) of the resin member 80B.
　複数のビア導体１５２のいくつかは、ビア電極１１０を介してディジタル制御回路１１と接続されている。 い く つ か Some of the plurality of via conductors 152 are connected to the digital control circuit 11 via the via electrodes 110.
　上記構成によれば、ディジタル制御回路１１は、半導体ＩＣ１０の端部領域に配置されているので、モジュール基板９０内で配線を引き回す必要がなくなり、ディジタル配線を介したディジタルノイズ（スプリアス）がその他の回路素子に流入することを抑制できる。また、柱状電極１５０が配置されていない領域Ａｃの近辺に、ディジタル制御回路１１の天面と接続されたビア導体１５２が配置されるので、ディジタルノイズの除去、電気信号の取り出し、グランド強化、および、外部基板との実装強化を補填しつつ、高周波モジュール１Ｄの小面積化を実現できる。 According to the above configuration, since the digital control circuit 11 is arranged in the end region of the semiconductor IC 10, it is not necessary to route the wiring in the module substrate 90, and digital noise (spurious) via the digital wiring is reduced. Flow into the circuit element can be suppressed. Further, the via conductor 152 connected to the top surface of the digital control circuit 11 is disposed near the region Ac where the columnar electrode 150 is not disposed, so that digital noise can be removed, electric signals can be extracted, ground can be enhanced, and In addition, the area of the high-frequency module 1D can be reduced while compensating for the enhancement of mounting with the external substrate.
　さらに、本実施の形態に係る高周波モジュール１Ｄは、さらに、樹脂部材８０Ｂの少なくとも側面を覆うように形成され、当該側面においてグランド電極９２Ｇと接続されたシールド電極７０を備える。 高周波 Furthermore, the high-frequency module 1D according to the present embodiment further includes a shield electrode 70 formed so as to cover at least a side surface of resin member 80B and connected to ground electrode 92G on the side surface.
　グランド電極９２Ｇは、モジュール基板９０の主面９０ａおよび９０ｂに平行な方向に沿って形成された平面配線パターンである。 The ground electrode 92G is a planar wiring pattern formed along a direction parallel to the main surfaces 90a and 90b of the module substrate 90.
　ディジタル制御回路１１が半導体ＩＣ１０およびモジュール基板９０の端部領域に配置されると、高周波モジュールの外部にもディジタルノイズが放射されてしまう恐れがある。 (4) If the digital control circuit 11 is arranged in the end region of the semiconductor IC 10 and the module substrate 90, there is a possibility that digital noise may be radiated outside the high-frequency module.
　これに対して、半導体ＩＣ１０から出力される高周波信号、特に、ディジタル制御回路１１から出るディジタルノイズが、高周波モジュール１Ｄから直接外部に放射されることを抑制できる。また、外来ノイズが半導体ＩＣ１０に侵入することを抑制できる。さらに、シールド電極７０を介して、半導体ＩＣ１０の発熱を放熱できるので、高周波モジュール１Ｄ放熱性が向上する。 In contrast, the high-frequency signal output from the semiconductor IC 10, particularly the digital noise output from the digital control circuit 11, can be suppressed from being directly radiated from the high-frequency module 1D to the outside. Further, it is possible to suppress external noise from entering the semiconductor IC 10. Further, the heat generated by the semiconductor IC 10 can be radiated through the shield electrode 70, so that the high-frequency module 1D has improved heat radiation.
　なお、本変形例に係る高周波モジュール１Ｄにおいて、シールド電極７０が配置されていなくてもよい。また、本実施の形態に係る高周波モジュール１Ｃに、シールド電極７０およびグランド電極９２Ｇが配置されてもよい。 In the high frequency module 1D according to the present modification, the shield electrode 70 may not be provided. Further, shield electrode 70 and ground electrode 92G may be arranged in high-frequency module 1C according to the present embodiment.
　なお、本実施の形態およびその変形例において、ビア導体１５１および１５２は円柱形状であってもよく、また、角柱形状などを有していてもよい。また、ビア導体１５１および１５２は、半田ボール、または、バンプ電極などの接続電極であってもよく、この場合にはビア導体１５１および１５２の表面に球面形状を有していてもよい。 In the present embodiment and its modifications, the via conductors 151 and 152 may have a cylindrical shape, or may have a prismatic shape. The via conductors 151 and 152 may be solder balls or connection electrodes such as bump electrodes. In this case, the surfaces of the via conductors 151 and 152 may have a spherical shape.
　（その他の実施の形態など）
　以上、実施の形態１～３に係る高周波モジュールおよび通信装置について、上記実施の形態を挙げて説明したが、本発明の高周波モジュールおよび通信装置は、上記実施の形態に限定されるものではない。上記実施の形態における任意の構成要素を組み合わせて実現される別の実施の形態や、上記実施の形態に対して本発明の主旨を逸脱しない範囲で当業者が思いつく各種変形を施して得られる変形例や、本開示の高周波モジュールおよび通信装置を内蔵した各種機器も本発明に含まれる。 (Other embodiments, etc.)
As described above, the high-frequency module and the communication device according to the first to third embodiments have been described with reference to the above-described embodiment. However, the high-frequency module and the communication device of the present invention are not limited to the above-described embodiment. Another embodiment realized by combining arbitrary constituent elements in the above embodiment, and a modification obtained by applying various modifications conceived by those skilled in the art to the above embodiment without departing from the gist of the present invention. Examples and various devices including the high-frequency module and the communication device according to the present disclosure are also included in the present invention.
　例えば、上記実施の形態に係る高周波モジュールおよび通信装置において、図面に開示された各回路素子および信号経路を接続する経路の間に別の回路素子および配線などが挿入されていてもよい。 For example, in the high-frequency module and the communication device according to the above-described embodiment, another circuit element, wiring, or the like may be inserted between paths connecting each circuit element and signal path disclosed in the drawings.
　また、本発明に係る半導体ＩＣ１０は、集積回路であるＬＳＩ（Ｌａｒｇｅ　Ｓｃａｌｅ　Ｉｎｔｅｇｒａｔｉｏｎ）として実現されてもよい。また、集積回路化の手法は、専用回路または汎用プロセッサで実現してもよい。ＬＳＩ製造後に、プログラムすることが可能なＦＰＧＡ（Ｆｉｅｌｄ　Ｐｒｏｇｒａｍｍａｂｌｅ　Ｇａｔｅ　Ａｒｒａｙ）や、ＬＳＩ内部の回路セルの接続や設定を再構成可能なリコンフィギュラブル・プロセッサを利用しても良い。さらには、半導体技術の進歩または派生する別技術によりＬＳＩに置き換わる集積回路化の技術が登場すれば、当然、その技術を用いて機能ブロックの集積化を行ってもよい。 The semiconductor IC 10 according to the present invention may be realized as an LSI (Large Scale Integration) which is an integrated circuit. Further, the method of circuit integration may be realized by a dedicated circuit or a general-purpose processor. After the LSI is manufactured, a programmable FPGA (Field Programmable Gate Array) or a reconfigurable processor capable of reconfiguring connection and setting of circuit cells inside the LSI may be used. Furthermore, if an integrated circuit technology that replaces the LSI appears due to the progress of the semiconductor technology or another technology derived therefrom, the functional blocks may be naturally integrated using the technology.
　本発明は、小型化が要求される高周波モジュールとして、携帯電話などの通信機器に広く利用できる。 The present invention can be widely used in communication devices such as mobile phones as high-frequency modules that require miniaturization.
　１、１Ａ、１Ｂ、１Ｃ、１Ｄ、５００、５００Ａ、５００Ｂ　　高周波モジュール
　２　　アンテナ素子
　３　　ＲＦ信号処理回路（ＲＦＩＣ）
　４　　ベースバンド信号処理回路（ＢＢＩＣ）
　５　　通信装置
　１０、５１０　　半導体ＩＣ
　１０ａ、１０ｂ、９０ａ、９０ｂ　　主面
　１１　　ディジタル制御回路
　１２、１３、１４　　スイッチ
　２１、２２　　フィルタ
　３１　　インダクタ
　４１、５４１　　ローノイズアンプ
　５１、５２　　回路素子
　７０　　シールド電極
　８０Ａ、８０Ｂ　　樹脂部材
　９０　　モジュール基板
　９１、１５１、１５２、５９１　　ビア導体
　９２Ｇ　　グランド電極
　１００ａ、１００ｂ、１００ｃ、１００ｄ、１９０ａ、１９０ｂ、１９０ｃ、１９０ｄ　　辺
　１００ｐ、１００ｑ　　仮想平面
　１０１　　共通端子
　１０２　　出力端子
　１１０、１４０、１６０　　ビア電極
　１１２、１１３、１１４、１４１　　制御配線
　１１２ｓ、１１３ｓ、１１４ｓ、１４１ｓ　　ディジタル制御信号
　１５０　　柱状電極
　５９２　　平面配線パターン
　Ａａ、Ａｂ、Ａｃ、Ａｄ　　領域
　Ｌａ、Ｌｂ、Ｌｃ、Ｌｄ　　距離 1, 1A, 1B, 1C, 1D, 500, 500A, 500B High frequency module 2 Antenna element 3 RF signal processing circuit (RFIC)
4 Baseband signal processing circuit (BBIC)
5 Communication device 10, 510 Semiconductor IC
10a, 10b, 90a, 90b Main surface 11 Digital control circuit 12, 13, 14 Switch 21, 22 Filter 31 Inductor 41, 541 Low noise amplifier 51, 52 Circuit element 70 Shield electrode 80A, 80B Resin member 90 Module substrate 91, 151, 152, 591 Via conductor 92G Ground electrode 100a, 100b, 100c, 100d, 190a, 190b, 190c, 190d Side 100p, 100q Virtual plane 101 Common terminal 102 Output terminal 110, 140, 160 Via electrode 112, 113, 114, 141 Control Wiring 112s, 113s, 114s, 141s Digital control signal 150 Columnar electrode 592 Planar wiring pattern Aa, Ab, Ac, Ad area La, Lb, Lc, Ld Distance

Claims (11)

  1. 　第１主面および第２主面を有するモジュール基板と、
    　第３主面および第４主面を有し、前記モジュール基板、前記第３主面、前記第４主面の順となるように前記第１主面上に実装された、高周波信号を処理する半導体ＩＣと、
    　前記第１主面から少なくとも前記第４主面を含む第１仮想平面まで、前記第１主面の垂直方向に延在する複数の第１接続電極と、を備え、
    　前記モジュール基板を平面視した場合に、
    　前記半導体ＩＣの外縁は、互いに平行な第１辺および第２辺、ならびに、前記第１辺および前記第２辺と直交し、互いに平行な第３辺および第４辺で構成され、
    　前記モジュール基板の外縁を構成する複数の辺のうちの前記第１辺に対向する辺と前記第１辺との間の前記モジュール基板上の第１領域、および、前記複数の辺のうちの前記第２辺に対向する辺と前記第２辺との間の前記モジュール基板上の第２領域のそれぞれには、前記複数の第１接続電極のいくつかが配置され、
    　前記複数の辺のうちの前記第３辺に対向する辺と前記第３辺との間の前記モジュール基板上の第３領域には、前記複数の第１接続電極は配置されていない、
    　高周波モジュール。     A module substrate having a first main surface and a second main surface;
    Processing a high-frequency signal, having a third main surface and a fourth main surface, mounted on the first main surface in the order of the module substrate, the third main surface, and the fourth main surface. A semiconductor IC,
    A plurality of first connection electrodes extending in a direction perpendicular to the first main surface from the first main surface to a first virtual plane including at least the fourth main surface;
    When the module substrate is viewed in a plan view,
    The outer edge of the semiconductor IC includes a first side and a second side parallel to each other, and a third side and a fourth side orthogonal to the first side and the second side and parallel to each other,
    A first region on the module substrate between a side facing the first side and a first side of the plurality of sides forming an outer edge of the module substrate; and In each of the second regions on the module substrate between the side facing the second side and the second side, some of the plurality of first connection electrodes are arranged;
    The plurality of first connection electrodes are not arranged in a third region on the module substrate between a side of the plurality of sides facing the third side and the third side,
    High frequency module.
  2. 　前記複数の辺のうちの前記第４辺に対向する辺と前記第４辺との間の前記モジュール基板上の第４領域には、前記複数の第１接続電極は配置されていない、
    　請求項１に記載の高周波モジュール。     The plurality of first connection electrodes are not arranged in a fourth region on the module substrate between a side of the plurality of sides facing the fourth side and the fourth side,
    The high-frequency module according to claim 1.
  3. 　前記平面視において、
    　前記第３辺と前記第３領域を規定する前記モジュール基板の辺との距離は、前記第１辺と前記第１領域を規定する前記モジュール基板の辺との距離よりも小さく、かつ、前記第２辺と前記第２領域を規定する前記モジュール基板の辺との距離よりも小さい、
    　請求項１または２に記載の高周波モジュール。     In the plan view,
    The distance between the third side and the side of the module substrate that defines the third region is smaller than the distance between the first side and the side of the module substrate that defines the first region, and Smaller than the distance between two sides and a side of the module substrate that defines the second region;
    The high-frequency module according to claim 1.
  4. 　さらに、
    　前記第２主面上に実装された第１部品を備え、
    　前記第１部品と前記半導体ＩＣとは、前記モジュール基板内であって前記第１主面に垂直な方向に沿って形成されたビア導体を介して接続されている、
    　請求項１～３のいずれか１項に記載の高周波モジュール。     further,
    A first component mounted on the second main surface;
    The first component and the semiconductor IC are connected via a via conductor formed in a direction perpendicular to the first main surface in the module substrate.
    The high-frequency module according to any one of claims 1 to 3.
  5. 　前記ビア導体は、前記平面視において、前記第１辺～前記第４辺のうち前記第３辺に最近接して配置されている、
    　請求項４に記載の高周波モジュール。     The via conductor is disposed closest to the third side among the first side to the fourth side in the plan view.
    The high-frequency module according to claim 4.
  6. 　前記半導体ＩＣは、高周波信号を増幅する増幅回路を内蔵し、
    　前記平面視において、前記増幅回路および前記第１部品は、前記第１辺～前記第４辺のうち前記第３辺に最近接して配置されている、
    　請求項４または５に記載の高周波モジュール。     The semiconductor IC has a built-in amplifier circuit for amplifying a high-frequency signal,
    In the plan view, the amplifier circuit and the first component are arranged closest to the third side of the first side to the fourth side,
    The high-frequency module according to claim 4.
  7. 　前記増幅回路は、低雑音増幅器を有し、
    　前記第１部品は、前記低雑音増幅器の入力端に接続されたインダクタである、
    　請求項６に記載の高周波モジュール。     The amplification circuit has a low noise amplifier,
    The first component is an inductor connected to an input terminal of the low noise amplifier.
    The high-frequency module according to claim 6.
  8. 　前記複数の第１接続電極は、前記第１仮想平面よりも前記第１主面から離れた第２仮想平面まで延在しており、
    　前記高周波モジュールは、さらに、前記第４主面から前記第２仮想平面まで、前記垂直方向に延在する第２接続電極を備える、
    　請求項１～７のいずれか１項に記載の高周波モジュール。     The plurality of first connection electrodes extend to a second virtual plane farther from the first main surface than the first virtual plane,
    The high-frequency module further includes a second connection electrode extending in the vertical direction from the fourth main surface to the second virtual plane.
    The high-frequency module according to any one of claims 1 to 7.
  9. 　前記半導体ＩＣは、当該半導体ＩＣに内蔵された素子にディジタル制御信号を供給するディジタル制御回路を内蔵し、
    　前記平面視において、前記ディジタル制御回路は、前記第１辺～前記第４辺のうち前記第３辺に最近接して配置されており、
    　前記第２接続電極は、前記ディジタル制御回路と接続されている、
    　請求項８に記載の高周波モジュール。     The semiconductor IC includes a digital control circuit that supplies a digital control signal to an element built in the semiconductor IC,
    In the plan view, the digital control circuit is disposed closest to the third side of the first side to the fourth side,
    The second connection electrode is connected to the digital control circuit,
    A high-frequency module according to claim 8.
  10. 　さらに、
    　前記第１主面上に形成され、前記半導体ＩＣの少なくとも一部を覆う樹脂部材と、
    　前記モジュール基板の平面配線パターンにより形成されたグランド電極と、
    　前記樹脂部材の少なくとも側面を覆うように形成され、前記側面において前記グランド電極と接続されたシールド電極と、を備える、
    　請求項１～９のいずれか１項に記載の高周波モジュール。     further,
    A resin member formed on the first main surface and covering at least a part of the semiconductor IC;
    A ground electrode formed by a planar wiring pattern of the module substrate,
    A shield electrode formed so as to cover at least a side surface of the resin member and connected to the ground electrode at the side surface.
    The high-frequency module according to any one of claims 1 to 9.
  11. 　アンテナ素子で送受信される高周波信号を処理するＲＦ信号処理回路と、
    　前記アンテナ素子と前記ＲＦ信号処理回路との間で前記高周波信号を伝達する請求項１～１０のいずれか１項に記載の高周波モジュールと、を備える、
    　通信装置。     An RF signal processing circuit for processing a high-frequency signal transmitted and received by the antenna element;
    The high-frequency module according to any one of claims 1 to 10, which transmits the high-frequency signal between the antenna element and the RF signal processing circuit.
    Communication device.
PCT/JP2019/034054 2018-10-05 2019-08-30 High-frequency module and communication device WO2020071020A1 (en)

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