WO2019008730A1

WO2019008730A1 - High-frequency amplifier

Info

Publication number: WO2019008730A1
Application number: PCT/JP2017/024845
Authority: WO
Inventors: 純神岡; 山中　宏治
Original assignee: 三菱電機株式会社
Priority date: 2017-07-06
Filing date: 2017-07-06
Publication date: 2019-01-10

Abstract

The source electrode of a first transistor (6a), and the source electrode of a second transistor (6b) are connected to a first grounding point (14), the source electrode of the second transistor (6b), and the source electrode of a third transistor (6c) are connected to a second grounding point (17), and the source electrode of the third transistor (6c), and the source electrode of a fourth transistor (6d) are connected to a third grounding point (20).

Description

High frequency amplifier

The present invention relates to a high frequency amplifier for amplifying a high frequency signal.

A high frequency amplifier for amplifying a high frequency signal is mounted in a wireless communication apparatus, a radar apparatus, etc., and high frequency characteristics are required for the high frequency amplifier.
A push-pull amplifier that includes two source-grounded field effect transistors (FETs) as high frequency amplifiers with high gain characteristics, and the connection point of the source electrodes of the two FETs is grounded via a via hole Is disclosed in the following non-patent document 1.

In this high frequency amplifier, one high frequency signal into which the high frequency signal is reverse phase distributed is inputted to the gate electrode of one FET, and the other high frequency signal into which the high frequency signal is reverse phase distributed is inputted to the gate electrode of the other FET Then, a virtual ground is generated at a symmetry point which is a connection point between source electrodes in two FETs.
This virtual ground reduces the influence of the source inductance due to the via holes, thereby improving the gain of the high frequency amplifier.

In the conventional high frequency amplifier, if the number of FETs mounted is two, the influence of the source inductance due to the via hole can be reduced by grounding the connection point of the source electrodes of the two FETs via the via hole it can.
However, in order to increase the output power, if the number of mounted FETs is increased more than two and many FETs are connected in parallel, for example, at equal intervals, the influence of the source inductance due to the via holes can be reduced. Because of the failure, there is a problem that a combined loss occurs between high frequency signals amplified by a plurality of FETs connected in parallel.

That is, when many FETs are connected in parallel, it is general to avoid the crossing of the line that propagates the high frequency signal, so for example, a high frequency signal with a phase of 0 degree is input to the gate electrode A first group of FETs and a second group of FETs in which a high frequency signal having a phase of 180 degrees is input to a gate electrode are divided and arranged.
Therefore, when connecting a large number of FETs in parallel, the connection point of the source electrodes of the two centrally arranged FETs can be grounded via the via holes. Here, the two FETs arranged in the center are the FET adjacent to the second FET group in the first FET group, and the first FET group in the second FET group. Adjacent FETs correspond.

However, in the first group of FETs, since the FETs other than the centrally placed FET are not adjacent to the FETs belonging to the second group of FETs, the source electrode is connected to the source electrode of the next FET Even if it does not generate virtual ground. For this reason, in the first FET group, each of the source electrodes of the FETs other than the centrally disposed FET is grounded via a separate via hole.
Further, in the second FET group, since the FETs other than the FET arranged in the center are not adjacent to the FETs belonging to the first FET group, the source electrode is connected to the source electrode of the adjacent FET But virtual ground does not occur. Thus, in the second group of FETs, each of the source electrodes of the FETs other than the centrally disposed FET is grounded via a separate via hole.
Therefore, since the FETs other than the two FETs disposed in the center are affected by the source inductance due to the via holes, the gain is smaller than those of the two FETs disposed in the center. As a result, gain imbalance occurs between the respective FETs mounted in the high frequency amplifier, resulting in a combined loss among the high frequency signals amplified by the plurality of FETs connected in parallel.

The present invention has been made to solve the above problems, and provides a high frequency amplifier capable of reducing the influence of source inductance due to a via hole for grounding the source electrode even if four transistors are mounted. The purpose is

The high frequency amplifier according to the present invention distributes the high frequency signal in reverse phase, distributes one of the high frequency signals in reverse phase as the first and third high frequency signals in phase, and distributes the other high frequency signal in reverse phase as the second and third high frequency signals. A signal distributor for performing in-phase distribution as a fourth high frequency signal, a first transistor for amplifying the first high frequency signal, and outputting the amplified first high frequency signal, and a second high frequency signal for amplification. A second transistor that outputs a second high frequency signal, a third transistor that amplifies the third high frequency signal, and outputs a third high frequency signal after amplification; and a fourth high frequency signal. A fourth transistor for outputting the fourth high frequency signal after amplification, an in-phase composite signal of the first high frequency signal after amplification and the third high frequency signal after amplification, and a second high frequency signal after amplification And the fourth high frequency signal after amplification A signal combiner for reverse-phase synthesizing the phase synthesis signal, the source electrodes of the first and second transistors are connected to the first ground point, and the source electrodes of the second and third transistors are second It is connected to the ground point, and the source electrodes of the third and fourth transistors are connected to the third ground point.

According to the present invention, the source electrodes of the first and second transistors are connected to the first ground point, and the source electrodes of the second and third transistors are connected to the second ground point. Since the source electrodes of the four transistors are connected to the third ground point, even if the first to fourth transistors are mounted, the influence of the source inductance due to the via holes for grounding the source electrodes is There is an effect that can be reduced.

It is a block diagram which shows the high frequency amplifier by Embodiment 1 of this invention. It is explanatory drawing which shows the structure of the transistor of the high frequency amplifier by Embodiment 1 of this invention. It is explanatory drawing which shows the cross | intersection part 23 of the high frequency amplifier by Embodiment 1 of this invention. It is explanatory drawing which shows the cross | intersection part 33 of the high frequency amplifier by Embodiment 1 of this invention. It is explanatory drawing which shows the structure of the transistor of the high frequency amplifier by Embodiment 1 of this invention. It is an explanatory view showing an example of distribution of a high frequency signal using two

baluns

3a and 3b. It is explanatory drawing which shows the cross | intersection part 23 and the open stub 26 of the high frequency amplifier by Embodiment 2 of this invention. It is explanatory drawing which shows the cross | intersection part 33 and the open stub 36 of the high frequency amplifier by Embodiment 2 of this invention. It is a block diagram which shows the high frequency amplifier by Embodiment 3 of this invention. It is explanatory drawing which shows the structure of the transistor of the high frequency amplifier by Embodiment 3 of this invention. It is a block diagram which shows the high frequency amplifier by Embodiment 4 of this invention.

Hereinafter, in order to explain the present invention in more detail, a mode for carrying out the present invention will be described according to the attached drawings.

Embodiment 1
FIG. 1 is a block diagram showing a high frequency amplifier according to a first embodiment of the present invention.
In FIG. 1, an input terminal 1 is a terminal to which a high frequency signal to be amplified is input.
The signal distributor 2 includes a balun 3, a first input matching circuit 4 and a second input matching circuit 5.
The signal distributor 2 performs reverse phase distribution on the high frequency signal input from the input terminal 1 and distributes one of the high frequency signals subjected to reverse phase distribution as the first and third high frequency signals in phase and the other phase obtained by reverse phase distribution. The high frequency signal is in-phase distributed as second and fourth high frequency signals.

The balun 3 performs reverse phase distribution on the high frequency signal input from the input terminal 1, outputs one high frequency signal subjected to reverse phase distribution to the first input matching circuit 4, and outputs the other high frequency signal subjected to reverse phase distribution Output to the input matching circuit 5 of 2.
The first input matching circuit 4 in-phase distributes one high frequency signal output from the balun 3 as the first and third high frequency signals, and outputs the first high frequency signal to the first transistor 6a, The third high frequency signal is output to the third transistor 6c.
The second input matching circuit 5 in-phase distributes the other high frequency signal output from the balun 3 as the second and fourth high frequency signals, and outputs the second high frequency signal to the second transistor 6b. The fourth high frequency signal is output to the fourth transistor 6d.

The first transistor 6a amplifies the first high frequency signal output from the first input matching circuit 4 and outputs the amplified first high frequency signal to the first output matching circuit 8 of the signal combiner 7. Do.
The second transistor 6 b amplifies the second high frequency signal output from the second input matching circuit 5 and outputs the amplified second high frequency signal to the second output matching circuit 9 of the signal combiner 7. Do.
The third transistor 6 c amplifies the third high frequency signal output from the first input matching circuit 4, and outputs the amplified third high frequency signal to the first output matching circuit 8 of the signal combiner 7. Do.
The fourth transistor 6 d amplifies the fourth high frequency signal output from the second input matching circuit 5, and outputs the amplified fourth high frequency signal to the second output matching circuit 9 of the signal combiner 7. Do.

The signal synthesizer 7 comprises a first output matching circuit 8, a second output matching circuit 9 and a balun 10.
The first output matching circuit 8 combines in phase the amplified first high frequency signal output from the first transistor 6a and the amplified third high frequency signal output from the third transistor 6c. Then, the in-phase combined signal is output to the balun 10.
The second output matching circuit 9 performs in-phase combining of the amplified second high frequency signal output from the second transistor 6b and the amplified fourth high frequency signal output from the fourth transistor 6d. Then, the in-phase combined signal is output to the balun 10.
The balun 10 reverse-phase synthesizes the in-phase composite signal output from the first output matching circuit 8 and the in-phase composite signal output from the second output matching circuit 9, and outputs a composite signal obtained by reverse-phase combining Output to 11.
The output terminal 11 is a terminal that outputs the amplified high frequency signal which is a combined signal output from the balun 10.

The connection point 12 is a point at which the source electrode of the first transistor 6a and the source electrode of the second transistor 6b are connected. For example, the connection point 12 is disposed at a position where the distance from the source electrode of the first transistor 6a and the distance from the source electrode of the second transistor 6b are equal.
One end of the first via hole 13 is connected to the connection point 12 and the other end is connected to a first ground point 14 which is a ground.

The connection point 15 is a point at which the source electrode of the second transistor 6b and the source electrode of the third transistor 6c are connected. For example, the connection point 15 is disposed at a position where the distance from the source electrode of the second transistor 6b is equal to the distance from the source electrode of the third transistor 6c.
One end of the second via hole 16 is connected to the connection point 15 and the other end is connected to a second ground point 17 which is a ground.

The connection point 18 is a point at which the source electrode of the third transistor 6c and the source electrode of the fourth transistor 6d are connected. For example, the connection point 18 is disposed at a position where the distance from the source electrode of the third transistor 6c is equal to the distance from the source electrode of the fourth transistor 6d.
One end of the third via hole 19 is connected to the connection point 18, and the other end is connected to the third ground point 20 which is a ground.

The first line 21 is a line that propagates the third high frequency signal output from the first input matching circuit 4 to the third transistor 6 c.
The second line 22 is a line that propagates the second high frequency signal output from the second input matching circuit 5 to the second transistor 6 b.
The intersection portion 23 is a portion where the first line 21 and the second line 22 intersect.
The first line 21 and the second line 22 cross each other so as not to contact physically and electrically at the intersection 23.

The third line 31 is a line for propagating the amplified second high frequency signal output from the second transistor 6 b to the second output matching circuit 9.
The fourth line 32 is a line that propagates the amplified third high frequency signal output from the third transistor 6 c to the first output matching circuit 8.
The intersection 33 is a portion where the third line 31 and the fourth line 32 intersect.
The third line 31 and the fourth line 32 cross each other so as not to contact physically and electrically at the intersection 33.

FIG. 2 is an explanatory view showing a structure of a transistor of the high frequency amplifier according to the first embodiment of the present invention. In FIG. 2, the same reference numerals as in FIG. 1 denote the same or corresponding parts.
The gate terminal 6a _g is a terminal connected to a gate electrode of the first transistor 6a.
The drain terminal 6 _ad is a terminal connected to the drain electrode of the first transistor 6 a.
The gate terminal 6b _g is a terminal connected to the gate electrode of the second transistor 6b.
The drain terminal 6b _d is a terminal connected to a drain electrode of the second transistor 6b.
The gate terminal 6c _g is a terminal connected to the gate electrode of the third transistor 6c.
The drain terminal 6c _d is a terminal connected to the drain electrode of the third transistor 6c.
The gate terminal 6d _g is a terminal connected to the gate electrode of the fourth transistor 6d.
The drain terminal 6d _d is a terminal connected to the drain electrode of the fourth transistor 6d.

FIG. 3 is an explanatory view showing the crossing portion 23 of the high frequency amplifier according to the first embodiment of the present invention. In FIG. 3, the same reference numerals as in FIG. 1 denote the same or corresponding parts.
The line at the intersection 23 of the first line 21 is a base electrode 24.
The line at the intersection 23 in the second line 22 is an air bridge 25 disposed so as to straddle the base electrode 24.
Although FIG. 3 shows an example in which the crossing angle between the first line 21 and the second line 22 is at a right angle at the crossing portion 23, the first line 21 and the second line 22 are in contact with each other. If not, the crossing angle is not limited to a right angle.

FIG. 4 is an explanatory view showing a crossing portion 33 of the high frequency amplifier according to the first embodiment of the present invention. In FIG. 4, the same reference numerals as in FIG. 1 denote the same or corresponding parts.
The line at the intersection 33 in the third line 31 is the base electrode 34.
The line at the intersection 33 in the fourth line 32 is an air bridge 35 disposed so as to straddle the base electrode 34.
Although FIG. 4 shows an example in which the crossing angle between the third line 31 and the fourth line 32 is at a right angle at the crossing portion 33, the third line 31 and the fourth line 32 are in contact with each other. If not, the crossing angle is not limited to a right angle.

Next, the operation will be described.
The high frequency signal to be amplified input from the input terminal 1 is distributed in reverse phase by the balun 3 of the signal distributor 2.
In the first embodiment, for convenience of description, the phase of the high frequency signal output from balun 3 to first input matching circuit 4 is 0 degree, and the high frequency signal output from balun 3 to second input matching circuit 5 Assume that the phase of the signal is 180 degrees.

The first input matching circuit 4 performs in-phase distribution of the high frequency signal having a phase of 0 degrees output from the balun 3 as the first and third high frequency signals, and outputs the first high frequency signal to the first transistor 6 a Outputs the third high frequency signal to the third transistor 6c.
The second input matching circuit 5 performs in-phase distribution of the high frequency signal having a phase of 180 degrees output from the balun 3 as the second and fourth high frequency signals, and outputs the second high frequency signal to the second transistor 6 b The fourth high frequency signal is output to the fourth transistor 6d.

Here, the first input matching circuit 4 and the second input matching circuit 5 are set to circuits in which the pass characteristics of a high frequency signal having a phase of 0 degrees are the same as the pass characteristics of a high frequency signal having a phase of 180 degrees. It shall be done.
Further, in the first input matching circuit 4 and the second input matching circuit 5, at the intersection 23, the second high frequency signal and the third high frequency signal are obtained because one is the base electrode 24 and the other is the air bridge 25. It is assumed that the circuit is set in such a way that each of the passing phase difference and the amplitude difference with the signal is canceled.

A first high frequency signal, which is a high frequency signal with a phase of 0 degrees, is applied from the first input matching circuit 4 to the gate electrode of the first transistor 6a. Thereby, the first transistor 6 a amplifies the first high frequency signal, and outputs the amplified first high frequency signal from the drain electrode to the first output matching circuit 8 of the signal combiner 7.
A second high frequency signal, which is a high frequency signal having a phase of 180 degrees, is applied from the second input matching circuit 5 to the second transistor 6b disposed next to the first transistor 6a. Thereby, the second transistor 6 b amplifies the second high frequency signal, and outputs the amplified second high frequency signal from the drain electrode to the second output matching circuit 9 of the signal combiner 7.

A third high frequency signal, which is a high frequency signal having a phase of 0 degrees, is supplied from the first input matching circuit 4 to the third transistor 6c arranged next to the second transistor 6b. Thereby, the third transistor 6 c amplifies the third high frequency signal, and outputs the amplified third high frequency signal from the drain electrode to the first output matching circuit 8 of the signal combiner 7.
Further, a fourth high frequency signal, which is a high frequency signal having a phase of 180 degrees, is applied from the second input matching circuit 5 to the fourth transistor 6d disposed next to the third transistor 6c. Thereby, the fourth transistor 6 d amplifies the fourth high frequency signal, and outputs the amplified fourth high frequency signal from the drain electrode to the second output matching circuit 9 of the signal combiner 7.

Here, the source electrode of the first transistor 6 a and the source electrode of the second transistor 6 b are connected at the connection point 12, and the connection point 12 is the ground via the first via hole 13. It is connected to the ground point 14 of 1.
Since the first high frequency signal and the second high frequency signal are high frequency signals of opposite phase, a symmetry point which is a connection point 12 between the source electrode of the first transistor 6a and the source electrode of the second transistor 6b. Virtual grounding occurs.

Further, the source electrode of the second transistor 6 b and the source electrode of the third transistor 6 c are connected at the connection point 15, and the connection point 15 is a second via the second via hole 16. And the ground point 17 of the
Since the second high frequency signal and the third high frequency signal are high frequency signals of opposite phase, a symmetry point which is a connection point 15 between the source electrode of the second transistor 6b and the source electrode of the third transistor 6c. Virtual grounding occurs.

Furthermore, the source electrode of the third transistor 6c and the source electrode of the fourth transistor 6d are connected at the connection point 18, and the connection point 18 is the third via the third via hole 19 and is the ground. And the ground point 20 of the
Since the third high frequency signal and the fourth high frequency signal are high frequency signals of opposite phase, a symmetry point which is a connection point 18 between the source electrode of the third transistor 6c and the source electrode of the fourth transistor 6d. Virtual grounding occurs.

The generation of virtual ground at the symmetry points which are the connection points 12, 15 and 18 reduces the influence of the source inductance due to the first via hole 13, the second via hole 16 and the third via hole 19.
For this reason, the unbalance in the gain among the first transistor 6a, the second transistor 6b, the third transistor 6c, and the fourth transistor 6d is eliminated.

The first output matching circuit 8 of the signal synthesizer 7 outputs the amplified first high frequency signal output from the first transistor 6a and the amplified third high frequency signal output from the third transistor 6c. Is output to the balun 10 as an in-phase composite signal with a phase of 0 degrees.
The second output matching circuit 9 of the signal synthesizer 7 outputs the amplified second high frequency signal output from the second transistor 6 b and the amplified fourth high frequency signal output from the fourth transistor 6 d. Are output to the balun 10 as an in-phase composite signal having a phase of 180 degrees.
The balun 10 of the signal synthesizer 7 outputs the in-phase composite signal of 0 degree output from the first output matching circuit 8 and the in-phase composite signal of 180 degrees in phase output from the second output matching circuit 9. Are synthesized in the reverse phase, and a synthesized signal having a phase of 0 degree obtained by the reverse phase synthesis is output to the output terminal 11.

Here, the first output matching circuit 8 and the second output matching circuit 9 are set to circuits in which the pass characteristics of a high frequency signal having a phase of 0 degrees are the same as the pass characteristics of a high frequency signal having a phase of 180 degrees. It shall be done.
Further, in the first output matching circuit 8 and the second output matching circuit 9, the second high-frequency signal and the third high-frequency signal due to one being the base electrode 34 and the other being the air bridge 35 at the intersection 33. It is assumed that the circuit is set in such a way that each of the passing phase difference and the amplitude difference with the signal is canceled.

As apparent from the above, according to the first embodiment, the source electrode of the first transistor 6a and the source electrode of the second transistor 6b are connected to the first ground point 14, and the second transistor 6b is The source electrode and the source electrode of the third transistor 6c are connected to the second ground point 17, and the source electrode of the third transistor 6c and the source electrode of the fourth transistor 6d are connected to the third ground point 20. Are configured to Thereby, even if the first transistor 6a, the second transistor 6b, the third transistor 6c and the fourth transistor 6d are mounted, the influence of the source inductance due to the via hole for grounding the source electrode can be reduced. it can. Therefore, the combined loss is reduced compared to the case where the source electrodes of the first transistor 6a, the second transistor 6b, the third transistor 6c, and the fourth transistor 6d are grounded through separate via holes, respectively. The overall gain of the high frequency amplifier can be increased.

In the first embodiment, an example is shown in which the first transistor 6a, the second transistor 6b, the third transistor 6c and the fourth transistor 6d have a structure as shown in FIG.
However, this is merely an example, and the structure as shown in FIG. 5 may be employed.
The generation of virtual ground at the symmetry points, which are the connection points 12, 15 and 18, makes the source inductance due to the first via hole 13, the second via hole 16 and the third via hole 19 invisible. For this reason, the first via hole 13, the second via hole 16, and the third via hole 19 may not be disposed near the source electrode.
In the structure shown in FIG. 5, the lead lines 41, 42 and 43 are provided at the connection points 12, 15 and 18, and the first via hole 13, the second via hole 16 and the third via the lead lines 41, 42 and 43 are provided. The via hole 19 is connected to the connection points 12, 15 and 18.
In the structure shown in FIG. 5, the first via hole 13, the second via hole 16 and the third via hole 19 are disposed in the vicinity of the

drain terminals

6a _d , 6b _d , 6c _d and 6d _d. _It may be arranged in the vicinity of _g 6 b _g 6 c _g 6 d _g .
By providing the

lead wires

41, 42, 43 at the connection points 12, 15, 18, the degree of freedom in design of the high frequency amplifier can be enhanced.

In the first embodiment, an example is shown in which the balun 3 performs reverse phase distribution on the high frequency signal input from the input terminal 1 as long as the high frequency signal can be distributed in reverse phase. For example, a 180 degree line may be used.
Further, in the first embodiment, an example in which balun 10 performs reverse phase synthesis on the in-phase combined signal output from first output matching circuit 8 and the in-phase combined signal output from second output matching circuit 9. However, as long as two in-phase combined signals can be reverse-phase combined, a 180-degree line may be used instead of the balun 10, for example.

In the first embodiment, using the signal distributor 2 including the balun 3, the first input matching circuit 4 and the second input matching circuit 5, high frequency signals are transmitted to the first transistor 6 a, the second transistor 6 b, An example of distributing to the third transistor 6c and the fourth transistor 6d is shown.
This is only an example, and as shown in FIG. 6, using the two

baluns

3a and 3b, the high frequency signal is transmitted to the first transistor 6a, the second transistor 6b, the third transistor 6c and the fourth transistor 6d. It may be distributed to each of the
FIG. 6 is an explanatory view showing an example of distribution of high frequency signals using two

baluns

3a and 3b.
In FIG. 6, the balun 3a performs reverse phase distribution on the high frequency signal input from the input terminal 1, and outputs one high frequency signal subjected to reverse phase distribution as the first high frequency signal to the first transistor 6a, The other distributed high frequency signal is output to the second transistor 6b as a second high frequency signal.
The balun 3b performs reverse phase distribution on the high frequency signal input from the input terminal 1 and outputs one high frequency signal subjected to reverse phase distribution to the third transistor 6c as a third high frequency signal, and the other phase obtained by reverse phase distribution. The high frequency signal is output to the fourth transistor 6 d as a fourth high frequency signal.
For example, the phases of the first and third high frequency signals are 0 degrees, and the phases of the second and fourth high frequency signals are 180 degrees.

Second Embodiment
In the first embodiment, an example is shown in which one is the base electrode 24 and the other is the air bridge 25 at the intersection 23 of the first line 21 and the second line 22.
At this time, when the passage phase of the third high frequency signal in the air bridge 25 is larger than the passage phase of the second high frequency signal in the base electrode 24, as shown in FIG. By connecting 26, the passing phase of the third high frequency signal in the air bridge 25 may be reduced. Thereby, the difference between the passing phase of the second high frequency signal in the base electrode 24 and the passing phase of the third high frequency signal in the air bridge 25 can be eliminated.
FIG. 7 is an explanatory view showing the crossing portion 23 and the open stub 26 of the high frequency amplifier according to the second embodiment of the present invention.

Here, an example in which the open stub 26 is connected to the second line 22 is shown, but the passing phase of the third high frequency signal in the air bridge 25 is greater than the passing phase of the second high frequency signal in the base electrode 24 If it is smaller, the open stub 26 may be connected to the first line 21.
In addition, the open stub 26 may be connected to the first line 21 or the second line 22 as long as the difference between the pass phase of the second high frequency signal and the pass phase of the third high frequency signal can be eliminated. It is not limited to Therefore, another line may be connected in series to the first line 21 or the second line 22. Further, the first line 21 or the second line 22 MIM (Metal-Insulator-Metal) capacitance may be connected in series or in a shunt.
Alternatively, an open stub or an MIM capacitor may be connected to the inside of the first input matching circuit 4 or the second input matching circuit 5 instead of the first line 21 or the second line 22.

In the first embodiment, an example is shown in which one is the base electrode 34 and the other is the air bridge 35 at the intersection 33 between the third line 31 and the fourth line 32.
At this time, when the passage phase of the third high frequency signal in the air bridge 35 is larger than the passage phase of the second high frequency signal in the base electrode 34, as shown in FIG. By connecting 36, the passing phase of the third high frequency signal in the air bridge 35 may be reduced. Thereby, the difference between the passing phase of the second high frequency signal in the base electrode 34 and the passing phase of the third high frequency signal in the air bridge 35 can be eliminated.
FIG. 8 is an explanatory view showing an intersection 33 and an open stub 36 of a high frequency amplifier according to a second embodiment of the present invention.

Here, an example in which the open stub 36 is connected to the fourth line 32 is shown, but the passing phase of the third high frequency signal in the air bridge 35 is greater than the passing phase of the second high frequency signal in the base electrode 34 If it is smaller, the open stub 36 may be connected to the third line 31.
In addition, the open stub 36 may be connected to the third line 31 or the fourth line 32 as long as the difference between the passing phase of the second high frequency signal and the passing phase of the third high frequency signal can be eliminated. It is not limited to Therefore, another line may be connected in series to the third line 31 or the fourth line 32. In addition, the MIM capacitor may be connected in series or in a shunt to the third line 31 or the fourth line 32.
Alternatively, an open stub or an MIM capacitor may be connected to the inside of the first output matching circuit 8 or the second output matching circuit 9 instead of the third line 31 or the fourth line 32.

Third Embodiment
In the first embodiment, an example is shown in which all of the first transistor 6a, the second transistor 6b, the third transistor 6c, and the fourth transistor 6d are arranged in the same direction.
In the third embodiment, as shown in FIG. 9, an example in which a first transistor 6a, a second transistor 6b, a third transistor 6c and a fourth transistor 6d are arranged will be described.
In the example of FIG. 9, the direction of each gate electrode of the first transistor 6a and the third transistor 6c is opposite to the direction of each gate electrode of the second transistor 6b and the fourth transistor 6d. Thus, the first transistor 6a, the second transistor 6b, the third transistor 6c, and the fourth transistor 6d are disposed.

FIG. 9 is a block diagram showing a high frequency amplifier according to a third embodiment of the present invention.
FIG. 10 is an explanatory view showing a structure of a transistor of a high frequency amplifier according to a third embodiment of the present invention.
9 and 10, the same reference numerals as in FIGS. 1 and 2 denote the same or corresponding parts.
One end of the line 51 is connected to the output side of the second input matching circuit 5, and the other end is connected to the second line 22.
The line 52 has one end connected to the input side of the first output matching circuit 8 and the other end connected to the fourth line 32.

The intersection portion 61 is a portion where the first line 21 and the third line 31 intersect.
The first line 21 and the third line 31 cross each other so as not to make physical and electrical contact at the intersection 61.
The intersection portion 62 is a portion where the second line 22 and the fourth line 32 intersect.
The second line 22 and the fourth line 32 cross each other so as not to make physical and electrical contact at the intersection 62.
The intersection portion 63 is a portion where the line 51 and the line 52 intersect.
The line 51 and the line 52 cross each other so as not to make physical and electrical contact at the intersection 63.

The direction of the gate electrode of each of the first transistor 6a and the third transistor 6c is opposite to the direction of the gate electrode of each of the second transistor 6b and the fourth transistor 6d, so that adjacent transistors are adjacent to each other. It becomes possible to directly connect the source electrodes 70 of each other.
71 is a symmetry line of adjacent transistors.
The distance from the symmetry line 71 to the source electrode 70 of each transistor is shorter than the distance from the connection points 12, 15, and 18 to the source electrode of each transistor in the first embodiment, as compared with the first embodiment. Furthermore, the influence of the source inductance can be reduced.

Fourth Embodiment
In the first to third embodiments, the high frequency amplifier including four transistors is described. However, the number of the transistors included in the high frequency amplifier may be four or more even numbers, and the number of the transistors is limited to four. Absent.
In the fourth embodiment, for example, a high frequency amplifier including six transistors will be described.

FIG. 11 is a block diagram showing a high frequency amplifier according to a fourth embodiment of the present invention. In FIG. 11, the same reference numerals as those in FIG.
The first input matching circuit 4a performs in-phase distribution of one high frequency signal output from the balun 3 as first, third and fifth high frequency signals, and outputs the first high frequency signal to the first transistor 6a. The third high frequency signal is output to the third transistor 6c, and the fifth high frequency signal is output to the fifth transistor 6e.
The second input matching circuit 5a distributes the other high frequency signal output from the balun 3 in phase as the second, fourth and sixth high frequency signals, and outputs the second high frequency signal to the second transistor 6b. The fourth high frequency signal is output to the fourth transistor 6d, and the sixth high frequency signal is output to the sixth transistor 6f.

The fifth transistor 6e amplifies the fifth high frequency signal output from the first input matching circuit 4a, and outputs the amplified fifth high frequency signal to the first output matching circuit 8a of the signal combiner 7. Do.
The sixth transistor 6f amplifies the sixth high frequency signal output from the second input matching circuit 5a, and outputs the amplified sixth high frequency signal to the second output matching circuit 9a of the signal combiner 7. Do.

The first output matching circuit 8a includes the amplified first high frequency signal output from the first transistor 6a and the amplified third high frequency signal output from the third transistor 6c and the fifth transistor 6e. The in-phase combined signal is output to the balun 10 by in-phase combining with the amplified fifth high-frequency signal output from the circuit.
The second output matching circuit 9a includes the amplified second high frequency signal output from the second transistor 6b and the amplified fourth high frequency signal output from the fourth transistor 6d and the sixth transistor 6f. The in-phase combined signal is output to the balun 10 by in-phase combining with the amplified sixth high-frequency signal output from the circuit.

The connection point 81 is a point at which the source electrode of the fourth transistor 6d and the source electrode of the fifth transistor 6e are connected. For example, the connection point 81 is disposed at a position where the distance from the source electrode of the fourth transistor 6d is equal to the distance from the source electrode of the fifth transistor 6e.
One end of the fourth via hole 82 is connected to the connection point 81, and the other end is connected to a fourth ground point 83 which is a ground.

The connection point 84 is a point at which the source electrode of the fifth transistor 6e and the source electrode of the sixth transistor 6f are connected. For example, the connection point 84 is disposed at a position where the distance from the source electrode of the fifth transistor 6e is equal to the distance from the source electrode of the sixth transistor 6f.
One end of the fifth via hole 85 is connected to the connection point 84, and the other end is connected to a fifth ground point 86 which is a ground.

In the fourth embodiment, virtual ground occurs at the connection points 81 and 84 as well as virtual ground occurs at the connection points 12 15 and 18 as in the first embodiment.
As virtual ground is generated at the connection points 12, 15, 18, 81, 84, the source by the first via hole 13, the second via hole 16, the third via hole 19, the fourth via hole 82 and the fifth via hole 85. The influence of the inductance is reduced.
Therefore, the unbalance in gain among the first transistor 6a, the second transistor 6b, the third transistor 6c, the fourth transistor 6d, the fifth transistor 6e, and the sixth transistor 6f is eliminated. .
Therefore, even when the high frequency amplifier includes six transistors, the combined loss can be reduced and the gain of the entire high frequency amplifier can be increased as in the first embodiment.

The fourth embodiment shows an example in which the number of transistors mounted in the high frequency amplifier is six, but the number of transistors mounted in the high frequency amplifier is eight, ten, twelve,. Similarly, the combined losses can be reduced to increase the overall gain of the high frequency amplifier.

In the scope of the invention, the present invention allows free combination of each embodiment, or modification of any component of each embodiment, or omission of any component in each embodiment. .

The present invention is suitable for a high frequency amplifier for amplifying a high frequency signal.

1 input terminal, 2 a signal distributor, 3, 3a, 3b balun, 4, 4a first input matching circuit, 5, 5a second input matching circuit, 6a first transistor, 6a _g gate terminal, 6a _d drain terminal, 6b second transistor, 6b _g gate terminal, 6b _d drain terminal, 6c third transistor, 6c _g gate terminal, 6c _d drain terminal, 6d fourth transistor, 6d _g gate terminal, 6d _d drain terminal, 6e fifth transistor, 6f sixth transistor, 7 signal combiner, 8, 8a first output matching circuit, 9, 9a second output matching circuit, 10 balun, 11 output terminal, 12 connection point, 13 third 1 via hole, 14 first ground point, 15 connection point, 16 second via hole, 17 second ground point, 18 connection point, 19 third via hole, 20 third Point 21 first line 22 second line 23 intersection 24 base electrode 25 air bridge 26 open stub 31 third line 32 fourth line 33 intersection 34 base electrode 35 air bridge, 36 open stub, 41, 42, 43 lead wire, 51, 52 line, 61, 62, 63 intersection, 70 source electrode, 71 symmetry line, 81 connection point, 82 fourth via hole, 83 fourth Ground point, 84 connection point, 85 fifth via hole, 86 fifth ground point.

Claims

The high frequency signal is subjected to reverse phase distribution, and one high frequency signal subjected to reverse phase distribution is subjected to in-phase distribution as the first and third high frequency signals, and the other high frequency signal subjected to reverse phase distribution is provided as the second and fourth high frequency signals. A signal distributor,
A first transistor that amplifies the first high frequency signal and outputs the amplified first high frequency signal;
A second transistor that amplifies the second high frequency signal and outputs the amplified second high frequency signal;
A third transistor that amplifies the third high frequency signal and outputs the amplified third high frequency signal;
A fourth transistor that amplifies the fourth high frequency signal and outputs a fourth high frequency signal after amplification;
In-phase composite signal of in-phase composite signal of amplified first high-frequency signal and amplified third high-frequency signal, in-phase composite signal of amplified second high-frequency signal and amplified fourth high-frequency signal And a signal combiner for reverse-phase combining
Source electrodes of the first and second transistors are connected to a first ground point, and source electrodes of the second and third transistors are connected to a second ground point, and the third and fourth transistors are connected. A high-frequency amplifier characterized in that the source electrode of the second ground terminal is connected to the third ground point.
A connection point between a source electrode of the first transistor and a source electrode of the second transistor is connected to the first ground point via a first via hole.
A connection point between a source electrode of the second transistor and a source electrode of the third transistor is connected to the second ground point via a second via hole.
A connection point between a source electrode of the third transistor and a source electrode of the fourth transistor is connected to the third ground point via a third via hole. High frequency amplifier as described.
The signal distributor
A balun for distributing the high frequency signal in reverse phase,
A first input matching circuit for in-phase distributing one of the high-frequency signals reverse-phase distributed by the balun as the first and third high-frequency signals;
2. The high frequency amplifier according to claim 1, further comprising: a second input matching circuit for in-phase distributing the other high frequency signal reverse-phase distributed by the balun as the second and fourth high frequency signals.
The signal combiner is
A first output matching circuit that outputs an in-phase combined signal by combining the first amplified high frequency signal and the amplified third high frequency signal in phase;
A second output matching circuit that outputs an in-phase combined signal by combining the amplified second high-frequency signal and the amplified fourth high-frequency signal in phase;
The balun according to claim 1, further comprising: a balun for combining the in-phase composite signal output from the first output matching circuit and the in-phase composite signal output from the second output matching circuit. High frequency amplifier.
A first line for propagating a third high frequency signal output from the first input matching circuit to the third transistor, and a second high frequency signal output from the second input matching circuit; 4. The high frequency amplifier according to claim 3, wherein the first line and the second line cross three-dimensionally such that the second line propagating to the two transistors is not in contact at an intersection. .
The high frequency amplifier according to claim 5, wherein an open stub is connected to the first line or the second line.
A third line for propagating the amplified second high frequency signal output from the second transistor to the second output matching circuit, and an amplified third high frequency signal output from the third transistor The third line and the fourth line intersect at a three-dimensional crossing so that the fourth line that propagates the signal to the first output matching circuit does not contact at the intersection. The high frequency amplifier according to item 4.
The high frequency amplifier according to claim 7, wherein an open stub is connected to the third line or the fourth line.
The first to fourth transistors are disposed such that the directions of the gate electrodes of the first and third transistors and the directions of the gate electrodes of the second and fourth transistors are opposite to each other. The high frequency amplifier according to claim 1, characterized in that: