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WO2019048066A1 - Optoelectronic device and method for producing an optoelectronic decvice - Google Patents

Optoelectronic device and method for producing an optoelectronic decvice Download PDF

Info

Publication number
WO2019048066A1
WO2019048066A1 PCT/EP2017/072744 EP2017072744W WO2019048066A1 WO 2019048066 A1 WO2019048066 A1 WO 2019048066A1 EP 2017072744 W EP2017072744 W EP 2017072744W WO 2019048066 A1 WO2019048066 A1 WO 2019048066A1
Authority
WO
WIPO (PCT)
Prior art keywords
plating
encapsulant
mounting area
optoelectronic
semiconductor chip
Prior art date
Application number
PCT/EP2017/072744
Other languages
French (fr)
Inventor
Seng Hooi YEOH
Original Assignee
Osram Opto Semiconductors Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Opto Semiconductors Gmbh filed Critical Osram Opto Semiconductors Gmbh
Priority to PCT/EP2017/072744 priority Critical patent/WO2019048066A1/en
Publication of WO2019048066A1 publication Critical patent/WO2019048066A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0091—Scattering means in or on the semiconductor body or semiconductor body package
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H01L33/505—Wavelength conversion elements characterised by the shape, e.g. plate or foil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present invention relates to an optoelectronic device and a method for producing an optoelectronic device according to the independent claims.
  • it is known to embed optoelectronic semiconductor chips into an encapsulant.
  • a dam can be arranged such that the dam encloses the optoelectronic semiconductor chips and the encapsulant laterally.
  • One disadvantage of arranging such a dam is that a lateral position of the dam varies due to a placement accuracy, e.g. during dispensing the dam.
  • Fur ⁇ thermore the dam which can be deposited in a liquid state on a substrate might also deliquesce depending on the surface energies of the substrate and the dam material.
  • phenom- ena can affect the height of the encapsulant.
  • the height of the encapsulant can be too low or too high. If the height of the encapsulant is too low, e.g. means for contacting the optoelectronic semiconductor chips can be exposed. If the height of the encapsulant is too high, the encapsulant can cover upper surfaces of the optoelectronic semiconductor chips which can be designed to emit electromag ⁇ netic radiation.
  • An objective of the invention is to provide an optoelectronic device which overcomes the above mentioned problems and a method for producing an optoelectronic device.
  • a method for producing an optoelectronic device comprises the following steps.
  • a carrier comprising a surface, wherein the surface comprises a mounting area is provided.
  • a retaining section is formed at the surface of the carrier .
  • the retaining section encloses the mounting area laterally and is designed to retain a liquid.
  • At least one optoelectronic semiconductor chip is arranged above the mounting area.
  • An encapsulant is arranged above the retaining section and above the mounting area, wherein the optoelectronic semiconductor chip is at least partially embedded into the encapsulant.
  • Advantageous ⁇ ly, only one material can be arranged above the retaining section and the mounting area.
  • forming the retaining section comprises forming a groove at the surface.
  • forming of the groove is associated with variations of a lateral position of the groove within an accuracy of manufacture, advantageously, the lateral position is maintained after forming the groove.
  • forming the retaining section comprises arranging a plating at the surface. Although arranging of the plating is associated with variations of a lateral position of the plating within an accuracy of manufacture, advanta- geously, the lateral position is maintained after arranging the plating.
  • the plating is arranged such that the plat ⁇ ing encloses the groove laterally. In an embodiment, the plating is arranged at the mounting area such that the groove encloses the plating laterally.
  • the optoelectronic semiconductor chip and the encapsulant are arranged such that the surface enclosed by the retaining section is fully covered by the optoelec ⁇ tronic semiconductor chip and the encapsulant.
  • the plating is arranged together with a further plating, wherein the further plating is arranged at the mounting area. At least one optoelectronic semiconductor chip is arranged above the further plating.
  • the further plat- ing can be arranged at the mounting area in order to contact the optoelectronic semiconductor chip arranged above the fur ⁇ ther plating.
  • the plating and the further plating can be arranged in one step.
  • the encapsulant arranged above the retain ⁇ ing section comprises a height before arranging the encapsul ⁇ ant above the mounting area which is higher than a sum of the height of the plating, a height of the optoelectronic semi ⁇ conductor chip and a height of a wavelength-converting mate- rial, wherein the wavelength-converting material is arranged at least above one optoelectronic semiconductor chip.
  • An optoelectronic device comprises a carrier with a surface comprising a mounting area.
  • the mounting area is enclosed laterally by a retaining section formed at the surface.
  • At least one optoelectronic semiconductor chip is arranged above the mounting area.
  • An encapsulant is arranged above the re ⁇ taining section and the mounting area.
  • the optoelectronic semiconductor chip is at least partially embedded into the encapsulant.
  • the retaining section is de ⁇ signed to retain a lateral position of the encapsulant ar ⁇ ranged in a liquid state above the retaining section. Fur ⁇ thermore, the retaining section prevents the encapsulant ar ⁇ ranged above the retaining section from a deliquescence. This allows to determine a height of the encapsulant arranged above the mounting area such that an undercast or an overflow can be avoided.
  • the retaining section comprises a groove formed at the surface.
  • a lateral position of the groove formed at the surface is fixed.
  • the retaining section comprises a plating arranged at the surface.
  • the plating acts as a stopper for the encapsulant arranged above the retaining section. Due to the surface tension of the encapsulant ar- ranged above the plating of the retaining section, the encap ⁇ sulant will form a droplet which extends to boundaries of the plating .
  • the plating is arranged such that the plat- ing encloses a groove laterally.
  • the plating arranged beyond the groove prevents the droplet forming en ⁇ capsulant from a deliquescence beyond the plating. This can avoid an undercast of the optoelectronic semiconductor chip.
  • the plating is arranged at the mounting ar ⁇ ea such that the groove encloses the plating laterally. Ad ⁇ vantageously, the encapsulant arranged above the retaining section is hindered from a deliquescence towards the mounting area .
  • the optoelectronic device can comprise an array of optoelectronic semiconductor chips.
  • a plurali- ty of individualized optoelectronic devices can be produced.
  • the optoelectronic semiconductor chip and the further optoelectronic semiconductor chip are separated from each other by a first distance.
  • the retaining section comprises a second distance to the optoelectronic semiconduc ⁇ tor chips.
  • the second distance is at least two times larger than the first distance.
  • an increased second distance between the retaining section and the optoelectronic semiconductor chips leads to a flat surface of the encapsul- ant.
  • a further plating is arranged at the mount ⁇ ing area, wherein at least one optoelectronic semiconductor chip is arranged at the further plating.
  • the further plating is provided to contact the optoelectronic semiconductor chips.
  • a height of the plating equals to a height of the further plating.
  • equal heights of the plating and the further plating allow to arrange the plating and the further plating simultaneously.
  • a wavelength-converting material is arranged at least above one optoelectronic semiconductor chip.
  • the wavelength-converting material is de ⁇ signed to convert the wavelength of the electromagnetic radi ⁇ ation emitted by the optoelectronic semiconductor chips.
  • a height of the encapsulant arranged above the mounting area equals to the sum of the height of the plating, the height of the optoelectronic semiconductor chip and the height of the wavelength-converting material.
  • the optoelectronic semiconductor chip and the wavelength-converting material are embedded in the encapsul ⁇ ant such that a surface of the wavelength-converting material is not covered by the encapsulant.
  • the encapsulant is arranged above the mount ⁇ ing area such that the encapsualant is not arranged above an upper side of the optoelectronic semiconductor chip.
  • Advanta ⁇ geously, the upper side which is an emitting facet of the op ⁇ toelectronic semiconductor chip is not covered by the encap ⁇ sulant .
  • Fig. 1 shows a top view of a carrier comprising a retain- ing section and optoelectronic semiconductor chips arranged above a mounting area of a surface of the carrier ;
  • Fig. 2 shows a side view of the carrier comprising a retaining section corresponding to Fig. 1 ;
  • Fig. 3 shows an encapsulant arranged above the retaining section
  • Fig. 4 shows an encapsulant arranged above the mounting area
  • Fig. 5 shows an embodiment, wherein a distance between the retaining section and the optoelectronic semiconductor chips is increased
  • FIG. 6 shows an individualized optoelectronic device with one optoelectronic semiconductor chip being embed ⁇ ded into the encapsulant.
  • Figure 1 shows a schematic top view of a carrier 20 compris ⁇ ing a surface 21.
  • the surface 21 comprises a mounting area 22.
  • the carrier 20 can be any suitable substrate.
  • the carrier 20 can be a metal substrate, a ceramic substrate, a glass substrate, a semiconductor oxide substrate or a printed circuit board (PCB) .
  • PCB printed circuit board
  • the carrier 20 comprises a retaining section 40 which is formed at the surface 21 of the carrier 20.
  • the retaining section 40 encloses the mounting area 22 laterally.
  • the re- taining section 40 is designed to retain a liquid.
  • Figure 2 shows a schematic cross-sectional side view along the line shown in Figure 1.
  • the retaining section 40 comprises a groove 50 and a plating 60.
  • the groove 50 can for example be formed by etching, mill ⁇ ing or any other suitable methods.
  • the groove 50 is designed to receive a liquid and to retain a lateral position of the liquid arranged in the groove 50.
  • the groove 50 comprises an outer edge 51 and an inner edge 52.
  • the inner edge 52 of the groove 50 faces the mounting ar ⁇ ea 22 while the outer edge 51 of the groove 50 is opposite of the mounting area 22.
  • a part of the plating 60 is arranged beyond the outer edge 51 of the groove 50 such that this part of the plating 60 en ⁇ closes the groove 50 laterally. Furthermore, another part of the plating 60 is arranged at the mounting area 22 near the inner edge 52 of the groove 50 such that the groove 50 en ⁇ closes this part of the plating 60 laterally.
  • the plating 60 comprises a metal, e.g. copper, gold or sil- ver.
  • the plating 60 can be arranged by any suitable methods, e.g. by sputter-coating in combination with a shadow mask. Alternatively, the plating 60 can be arranged at the whole surface 21 while a subsequent selective etching process can be used to form the plating 60 as desired.
  • the plating 60 is designed to act as a stopper for a liquid arranged in the groove 50. If a liquid material is arranged in the groove 50 it forms a droplet which extends to bounda ⁇ ries 63 of the plating 60, wherein the boundaries 63 of the plating are opposite of the groove 50.
  • a combination of materials for the liquid and for the plating 60 has to be chosen in such a way that a wet ⁇ ting property of the liquid allows the formation of the drop ⁇ let of the liquid rather than a deliquescence of the liquid.
  • the retaining section 40 retains a lateral position of the droplet. A shift of the droplet or a flattening due to a deliquescence of the droplet is avoided.
  • the plating 60 can also be omitted. It is also possible that only parts of the plating 60 are omitted. For example, the plating 60 which is enclosed by the groove 50 laterally can be omitted. Alternatively, the plating 60 which encloses the groove 50 can be omitted.
  • the number of optoelectronic semiconductor chips 30 can also deviate from the number shown in Figure 1.
  • the optoelectronic semiconductor chips 30 can for example be designed to emit electromagnetic radiation. In this case, the optoelectronic semiconductor chips 30 can for example be light-emitting diodes. Alternatively, the optoelectronic semiconductor chips 30 can be designed to detect electromagnetic radiation. In this case, the optoelectronic semiconductor chips 30 can be photodiodes .
  • the optoelectronic semiconductor chips 30 comprise upper sides 31 and bottom sides 32.
  • the optoelec ⁇ tronic semiconductor chips 30 are arranged with the bottom sides 32 above a further plating 61.
  • the further plating 61 comprises a metal and can be simultaneously formed with the plating 60.
  • the plating 60 and the further plating 61 can comprise equal heights 62.
  • the further plating 61 is designed to contact the optoelectronic semiconductor chips 30.
  • each optoelectronic semiconductor chip 30 can comprise one contact area at its bottom side 32, wherein the optoelectronic semiconductor chips 30 are arranged with the contact area above the further plating.
  • a second contact area at the upper side 31 of an optoelectronic semiconductor chip 30 can be contacted by wire-bonding.
  • the further plating 61 can also be omitted.
  • the optoe- lectronic semiconductor chips 30 can be contacted by wire- bonding, for example.
  • the upper sides 31 of the optoelectronic semiconductor chips 30 are either designed to emit electromagnetic radiation or to detect electromagnetic radiation. If the upper sides 31 are designed to emit electromagnetic radiation, a wavelength- converting material 90 can be arranged at the upper sides 31 of the optoelectronic semiconductor chips 30.
  • the wavelength- converting material 90 is designed to convert the wavelength of the electromagnetic radiation emitted by the optoelectron ⁇ ic semiconductor chips 30.
  • the wavelength-converting material 90 can comprise a resin, for example silicone or an epoxy, with embedded wavelength-converting particles. However, the wavelength-converting material 90 can also be omitted.
  • Figure 3 shows a schematic cross section of the carrier 20 shown in Figure 2 together with an encapsulant 70 arranged above the retaining section 40.
  • the encapsulant 70 can com ⁇ prise a resin, for example a silicone, an epoxy or any other curable material.
  • the encapsulant 70 can also comprise embed ⁇ ded particles.
  • the encapsulant 70 can comprise titanium dioxide particles in order to increase a reflectivi ⁇ ty.
  • the encapsulant 70 is arranged above the retaining section 40 such that it forms a droplet. Due to the wetting properties of the encapsulant 70 on the plating 60, the droplet of the encapsulant 70 extends to the boundaries 63 of the plating 60 which are opposite of the groove 50.
  • the encapsulant 70 com ⁇ prises a height 71 which is higher than a sum of the height 62 of the plating 60,61, a height 37 of the optoelectronic semiconductor chips 30 and a height 91 of the wavelength- converting material 90.
  • the retaining section 40 retains a lateral position of the droplet forming encapsulant 70 and avoids a flattening due to deliquescence of the droplet form ⁇ ing encapsulant 70.
  • the encapsulant 70 can for example be ar- ranged by dispensing above the retaining section 40.
  • Figure 4 shows a schematic side view of an optoelectronic de ⁇ vice 10.
  • the encapsulant 70 After the encapsulant 70 has been arranged above the retaining section 40 it is also arranged above the mounting area 22.
  • the arrangement of the encapsulant 70 above the mounting area 22 can also be performed by a dispensing method. As the encapsulant 70 deposited above the mounting area 22 gets in contact with the encapsulant 70 arranged above the retaining section 40, the surface tension of the droplet forming encapsulant 70 which is arranged above the retaining section 40 is neutralized.
  • the encapsulant 70 ar ⁇ ranged above the mounting area 22 and the encapsulant 70 ar- ranged above the retaining section 40 are unified to form a cast embedding the optoelectronic semiconductor chips 30.
  • the encapsulant 70 extends to the boundaries 63 of the plating 60, wherein the boundaries 63 are opposite of the mounting area 22.
  • a height 72 of the encapsulant 70 arranged above the mounting area 22 equals to the sum of the height 62 of the plating 60,61, the height 33 of the optoelectronic semiconductor chips 30 and the height 91 of the wavelength-converting material 90.
  • the thickness 72 of the encapsulant 70 can also deviate from the thickness 72 shown in Figure 4.
  • the encapsulant 70 can comprise a height 72 such that a surface 73 of the en ⁇ capsulant 70 is below a surface 92 of the wavelength- converting material 90. If the wavelength-converting material 90 is omitted, the encapsulant 70 can comprises a height 72 equal to the sum of the height 62 of the plating 60,61 and the height 33 of the optoelectronic semiconductor chips 30.
  • the encapsulant 70 arranged above the retaining section 40 and the encapsulant 70 arranged above the mounting area 22 can also comprise different materials, e.g. different curable materials. It is also possible that the encapsulant 70 com ⁇ prises different amounts of filler particles above the re ⁇ taining section 40 and above the mounting area 22.
  • the optoelectronic semiconductor chips 30 and the encapsulant 70 can be arranged such that the surface 21 of the carrier 20 enclosed by the retaining section 40 is fully covered by the optoelectronic semiconductor chips 30 and the encapsulant 70.
  • possibly arranged means for contacting the optoelectronic semiconductor chips 30 are not exposed.
  • Figure 5 shows a schematic cross-sectional side view of a part of an embodiment of the optoelectronic device 10.
  • the retaining section 40 comprises a dis ⁇ tance 82 to the optoelectronic semiconductor chips 30 which is bigger than a distance 81 between the optoelectronic semi- conductor chips 30.
  • This embodiment has the advantage, that the surface 73 of the encapsulant 70 is formed especially flat.
  • the optoelectronic devices 10 shown in Figure 4 and Figure 5 can for example be arrays of light-emitting diodes. However, as indicated in Fig. 5 by cutting lines 100, individual opto ⁇ electronic semiconductor chips 30 embedded in the encapsulant 70 can be separated from each other by cutting the carrier 20 and the encapsulant 70 by any suitable method along the cut- ting lines 100. Such an individualized optoelectronic device 11 is shown in Figure 6.

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Abstract

An optoelectronic device (10) comprises a carrier (20) with a surface (21) wherein the surface (21) comprises a mounting area (22). The mounting area (22) is enclosed laterally by a retaining section (40) formed at the surface (21). At least one optoelectronic semiconductor chip (30) is arranged above the mounting area (22). An encapsulant (70) is arranged above the retaining section (40) and the mounting area (22), wherein the at least one optoelectronic semiconductor chip (30) is at least partially embedded in the encapsulant (70).

Description

OPTOELECTRONIC DEVICE AND METHOD FOR PRODUCING AN
OPTOELECTRONIC DECVICE
DESCRIPTION
The present invention relates to an optoelectronic device and a method for producing an optoelectronic device according to the independent claims. From the state of art, it is known to embed optoelectronic semiconductor chips into an encapsulant. In order to ensure a certain height of the encapsulant, a dam can be arranged such that the dam encloses the optoelectronic semiconductor chips and the encapsulant laterally. One disadvantage of arranging such a dam is that a lateral position of the dam varies due to a placement accuracy, e.g. during dispensing the dam. Fur¬ thermore, the dam which can be deposited in a liquid state on a substrate might also deliquesce depending on the surface energies of the substrate and the dam material. These phenom- ena can affect the height of the encapsulant. As a conse¬ quence, the height of the encapsulant can be too low or too high. If the height of the encapsulant is too low, e.g. means for contacting the optoelectronic semiconductor chips can be exposed. If the height of the encapsulant is too high, the encapsulant can cover upper surfaces of the optoelectronic semiconductor chips which can be designed to emit electromag¬ netic radiation.
An objective of the invention is to provide an optoelectronic device which overcomes the above mentioned problems and a method for producing an optoelectronic device.
This objective is solved by an optoelectronic device and a method for producing an optoelectronic device with the fea- tures of the independent claims.
A method for producing an optoelectronic device comprises the following steps. A carrier comprising a surface, wherein the surface comprises a mounting area is provided. At the surface of the carrier a retaining section is formed. The retaining section encloses the mounting area laterally and is designed to retain a liquid. At least one optoelectronic semiconductor chip is arranged above the mounting area. An encapsulant is arranged above the retaining section and above the mounting area, wherein the optoelectronic semiconductor chip is at least partially embedded into the encapsulant. Advantageous¬ ly, only one material can be arranged above the retaining section and the mounting area. The arrangement of the encap¬ sulant above the retaining section and the arrangement of the encapsulant above the mounting area can be carried out in two distinct steps. In an embodiment, forming the retaining section comprises forming a groove at the surface. Although forming of the groove is associated with variations of a lateral position of the groove within an accuracy of manufacture, advantageously, the lateral position is maintained after forming the groove.
In an embodiment, forming the retaining section comprises arranging a plating at the surface. Although arranging of the plating is associated with variations of a lateral position of the plating within an accuracy of manufacture, advanta- geously, the lateral position is maintained after arranging the plating.
In an embodiment, the plating is arranged such that the plat¬ ing encloses the groove laterally. In an embodiment, the plating is arranged at the mounting area such that the groove encloses the plating laterally.
In an embodiment, the optoelectronic semiconductor chip and the encapsulant are arranged such that the surface enclosed by the retaining section is fully covered by the optoelec¬ tronic semiconductor chip and the encapsulant. Advantageous¬ ly, possibly arranged means for contacting the optoelectronic semiconductor chip are not exposed. In an embodiment, the plating is arranged together with a further plating, wherein the further plating is arranged at the mounting area. At least one optoelectronic semiconductor chip is arranged above the further plating. The further plat- ing can be arranged at the mounting area in order to contact the optoelectronic semiconductor chip arranged above the fur¬ ther plating. Advantageously, the plating and the further plating can be arranged in one step. In an embodiment, the encapsulant arranged above the retain¬ ing section comprises a height before arranging the encapsul¬ ant above the mounting area which is higher than a sum of the height of the plating, a height of the optoelectronic semi¬ conductor chip and a height of a wavelength-converting mate- rial, wherein the wavelength-converting material is arranged at least above one optoelectronic semiconductor chip.
An optoelectronic device comprises a carrier with a surface comprising a mounting area. The mounting area is enclosed laterally by a retaining section formed at the surface. At least one optoelectronic semiconductor chip is arranged above the mounting area. An encapsulant is arranged above the re¬ taining section and the mounting area. The optoelectronic semiconductor chip is at least partially embedded into the encapsulant. Advantageously, the retaining section is de¬ signed to retain a lateral position of the encapsulant ar¬ ranged in a liquid state above the retaining section. Fur¬ thermore, the retaining section prevents the encapsulant ar¬ ranged above the retaining section from a deliquescence. This allows to determine a height of the encapsulant arranged above the mounting area such that an undercast or an overflow can be avoided.
In an embodiment, the retaining section comprises a groove formed at the surface. Advantageously, a lateral position of the groove formed at the surface is fixed. As the encapsulant is arranged in the groove, a lateral shift of the encapsulant is suppressed. In an embodiment, the retaining section comprises a plating arranged at the surface. Advantageously, the plating acts as a stopper for the encapsulant arranged above the retaining section. Due to the surface tension of the encapsulant ar- ranged above the plating of the retaining section, the encap¬ sulant will form a droplet which extends to boundaries of the plating .
In an embodiment, the plating is arranged such that the plat- ing encloses a groove laterally. Advantageously, the plating arranged beyond the groove prevents the droplet forming en¬ capsulant from a deliquescence beyond the plating. This can avoid an undercast of the optoelectronic semiconductor chip. In an embodiment, the plating is arranged at the mounting ar¬ ea such that the groove encloses the plating laterally. Ad¬ vantageously, the encapsulant arranged above the retaining section is hindered from a deliquescence towards the mounting area .
In an embodiment, at least one further optoelectronic semi¬ conductor chip is arranged above the mounting area. Advanta¬ geously, the optoelectronic device can comprise an array of optoelectronic semiconductor chips. Alternatively, a plurali- ty of individualized optoelectronic devices can be produced.
In an embodiment, the optoelectronic semiconductor chip and the further optoelectronic semiconductor chip are separated from each other by a first distance. The retaining section comprises a second distance to the optoelectronic semiconduc¬ tor chips. The second distance is at least two times larger than the first distance. Advantageously, an increased second distance between the retaining section and the optoelectronic semiconductor chips leads to a flat surface of the encapsul- ant.
In an embodiment, a further plating is arranged at the mount¬ ing area, wherein at least one optoelectronic semiconductor chip is arranged at the further plating. Advantageously, the further plating is provided to contact the optoelectronic semiconductor chips. In an embodiment, a height of the plating equals to a height of the further plating. Advantageously, equal heights of the plating and the further plating allow to arrange the plating and the further plating simultaneously.
In an embodiment, a wavelength-converting material is arranged at least above one optoelectronic semiconductor chip. Advantageously, the wavelength-converting material is de¬ signed to convert the wavelength of the electromagnetic radi¬ ation emitted by the optoelectronic semiconductor chips.
In an embodiment, a height of the encapsulant arranged above the mounting area equals to the sum of the height of the plating, the height of the optoelectronic semiconductor chip and the height of the wavelength-converting material. Advantageously, the optoelectronic semiconductor chip and the wavelength-converting material are embedded in the encapsul¬ ant such that a surface of the wavelength-converting material is not covered by the encapsulant. Thus, electromagnetic ra¬ diation which can be emitted at an upper side of the optoe¬ lectronic semiconductor chip can be radiated without being transmitted through the encapsulant.
In an embodiment the encapsulant is arranged above the mount¬ ing area such that the encapsualant is not arranged above an upper side of the optoelectronic semiconductor chip. Advanta¬ geously, the upper side which is an emitting facet of the op¬ toelectronic semiconductor chip is not covered by the encap¬ sulant . The above-described properties, features and advantages of this invention and the way in which they are achieved will become clearer and more clearly understood in association with the following description of the exemplary embodiments explained in greater detail in association with the drawings. Here, in each case in schematic illustration:
Fig. 1: shows a top view of a carrier comprising a retain- ing section and optoelectronic semiconductor chips arranged above a mounting area of a surface of the carrier ;
Fig. 2: shows a side view of the carrier comprising a retaining section corresponding to Fig. 1 ;
Fig. 3: shows an encapsulant arranged above the retaining section;
Fig. 4: shows an encapsulant arranged above the mounting area;
Fig. 5: shows an embodiment, wherein a distance between the retaining section and the optoelectronic semiconductor chips is increased; and
Fig. 6: shows an individualized optoelectronic device with one optoelectronic semiconductor chip being embed¬ ded into the encapsulant. Figure 1 shows a schematic top view of a carrier 20 compris¬ ing a surface 21. The surface 21 comprises a mounting area 22. The carrier 20 can be any suitable substrate. For example the carrier 20 can be a metal substrate, a ceramic substrate, a glass substrate, a semiconductor oxide substrate or a printed circuit board (PCB) .
The carrier 20 comprises a retaining section 40 which is formed at the surface 21 of the carrier 20. The retaining section 40 encloses the mounting area 22 laterally. The re- taining section 40 is designed to retain a liquid.
Figure 2 shows a schematic cross-sectional side view along the line shown in Figure 1. The retaining section 40 comprises a groove 50 and a plating 60. The groove 50 can for example be formed by etching, mill¬ ing or any other suitable methods. The groove 50 is designed to receive a liquid and to retain a lateral position of the liquid arranged in the groove 50.
The groove 50 comprises an outer edge 51 and an inner edge 52. The inner edge 52 of the groove 50 faces the mounting ar¬ ea 22 while the outer edge 51 of the groove 50 is opposite of the mounting area 22.
A part of the plating 60 is arranged beyond the outer edge 51 of the groove 50 such that this part of the plating 60 en¬ closes the groove 50 laterally. Furthermore, another part of the plating 60 is arranged at the mounting area 22 near the inner edge 52 of the groove 50 such that the groove 50 en¬ closes this part of the plating 60 laterally.
The plating 60 comprises a metal, e.g. copper, gold or sil- ver. The plating 60 can be arranged by any suitable methods, e.g. by sputter-coating in combination with a shadow mask. Alternatively, the plating 60 can be arranged at the whole surface 21 while a subsequent selective etching process can be used to form the plating 60 as desired.
The plating 60 is designed to act as a stopper for a liquid arranged in the groove 50. If a liquid material is arranged in the groove 50 it forms a droplet which extends to bounda¬ ries 63 of the plating 60, wherein the boundaries 63 of the plating are opposite of the groove 50. In order to achieve this effect, a combination of materials for the liquid and for the plating 60 has to be chosen in such a way that a wet¬ ting property of the liquid allows the formation of the drop¬ let of the liquid rather than a deliquescence of the liquid. Thus, the retaining section 40 retains a lateral position of the droplet. A shift of the droplet or a flattening due to a deliquescence of the droplet is avoided. The plating 60 can also be omitted. It is also possible that only parts of the plating 60 are omitted. For example, the plating 60 which is enclosed by the groove 50 laterally can be omitted. Alternatively, the plating 60 which encloses the groove 50 can be omitted.
In the example shown in Figure 1, four optoelectronic semi¬ conductor chips 30 are arranged above the mounting area 22. The number of optoelectronic semiconductor chips 30 can also deviate from the number shown in Figure 1. The optoelectronic semiconductor chips 30 can for example be designed to emit electromagnetic radiation. In this case, the optoelectronic semiconductor chips 30 can for example be light-emitting diodes. Alternatively, the optoelectronic semiconductor chips 30 can be designed to detect electromagnetic radiation. In this case, the optoelectronic semiconductor chips 30 can be photodiodes .
Details of the optoelectronic semiconductor chips 30 are re- viewed in Figure 2. The optoelectronic semiconductor chips 30 comprise upper sides 31 and bottom sides 32. The optoelec¬ tronic semiconductor chips 30 are arranged with the bottom sides 32 above a further plating 61. The further plating 61 comprises a metal and can be simultaneously formed with the plating 60. In this case, the plating 60 and the further plating 61 can comprise equal heights 62. The further plating 61 is designed to contact the optoelectronic semiconductor chips 30. Therefor, each optoelectronic semiconductor chip 30 can comprise one contact area at its bottom side 32, wherein the optoelectronic semiconductor chips 30 are arranged with the contact area above the further plating. A second contact area at the upper side 31 of an optoelectronic semiconductor chip 30 can be contacted by wire-bonding. However, the further plating 61 can also be omitted. In this case, the optoe- lectronic semiconductor chips 30 can be contacted by wire- bonding, for example. The upper sides 31 of the optoelectronic semiconductor chips 30 are either designed to emit electromagnetic radiation or to detect electromagnetic radiation. If the upper sides 31 are designed to emit electromagnetic radiation, a wavelength- converting material 90 can be arranged at the upper sides 31 of the optoelectronic semiconductor chips 30. The wavelength- converting material 90 is designed to convert the wavelength of the electromagnetic radiation emitted by the optoelectron¬ ic semiconductor chips 30. The wavelength-converting material 90 can comprise a resin, for example silicone or an epoxy, with embedded wavelength-converting particles. However, the wavelength-converting material 90 can also be omitted.
Figure 3 shows a schematic cross section of the carrier 20 shown in Figure 2 together with an encapsulant 70 arranged above the retaining section 40. The encapsulant 70 can com¬ prise a resin, for example a silicone, an epoxy or any other curable material. The encapsulant 70 can also comprise embed¬ ded particles. For example the encapsulant 70 can comprise titanium dioxide particles in order to increase a reflectivi¬ ty.
The encapsulant 70 is arranged above the retaining section 40 such that it forms a droplet. Due to the wetting properties of the encapsulant 70 on the plating 60, the droplet of the encapsulant 70 extends to the boundaries 63 of the plating 60 which are opposite of the groove 50. The encapsulant 70 com¬ prises a height 71 which is higher than a sum of the height 62 of the plating 60,61, a height 37 of the optoelectronic semiconductor chips 30 and a height 91 of the wavelength- converting material 90. The retaining section 40 retains a lateral position of the droplet forming encapsulant 70 and avoids a flattening due to deliquescence of the droplet form¬ ing encapsulant 70. The encapsulant 70 can for example be ar- ranged by dispensing above the retaining section 40.
Figure 4 shows a schematic side view of an optoelectronic de¬ vice 10. After the encapsulant 70 has been arranged above the retaining section 40 it is also arranged above the mounting area 22. The arrangement of the encapsulant 70 above the mounting area 22 can also be performed by a dispensing method. As the encapsulant 70 deposited above the mounting area 22 gets in contact with the encapsulant 70 arranged above the retaining section 40, the surface tension of the droplet forming encapsulant 70 which is arranged above the retaining section 40 is neutralized. Thereby, the encapsulant 70 ar¬ ranged above the mounting area 22 and the encapsulant 70 ar- ranged above the retaining section 40 are unified to form a cast embedding the optoelectronic semiconductor chips 30. The encapsulant 70 extends to the boundaries 63 of the plating 60, wherein the boundaries 63 are opposite of the mounting area 22. In the example shown in Figure 4, a height 72 of the encapsulant 70 arranged above the mounting area 22 equals to the sum of the height 62 of the plating 60,61, the height 33 of the optoelectronic semiconductor chips 30 and the height 91 of the wavelength-converting material 90. However, the thickness 72 of the encapsulant 70 can also deviate from the thickness 72 shown in Figure 4. For example, the encapsulant 70 can comprise a height 72 such that a surface 73 of the en¬ capsulant 70 is below a surface 92 of the wavelength- converting material 90. If the wavelength-converting material 90 is omitted, the encapsulant 70 can comprises a height 72 equal to the sum of the height 62 of the plating 60,61 and the height 33 of the optoelectronic semiconductor chips 30.
The encapsulant 70 arranged above the retaining section 40 and the encapsulant 70 arranged above the mounting area 22 can also comprise different materials, e.g. different curable materials. It is also possible that the encapsulant 70 com¬ prises different amounts of filler particles above the re¬ taining section 40 and above the mounting area 22. The optoelectronic semiconductor chips 30 and the encapsulant 70 can be arranged such that the surface 21 of the carrier 20 enclosed by the retaining section 40 is fully covered by the optoelectronic semiconductor chips 30 and the encapsulant 70. Advantageously, possibly arranged means for contacting the optoelectronic semiconductor chips 30 are not exposed.
Figure 5 shows a schematic cross-sectional side view of a part of an embodiment of the optoelectronic device 10. In this embodiment, the retaining section 40 comprises a dis¬ tance 82 to the optoelectronic semiconductor chips 30 which is bigger than a distance 81 between the optoelectronic semi- conductor chips 30. This embodiment has the advantage, that the surface 73 of the encapsulant 70 is formed especially flat.
The optoelectronic devices 10 shown in Figure 4 and Figure 5 can for example be arrays of light-emitting diodes. However, as indicated in Fig. 5 by cutting lines 100, individual opto¬ electronic semiconductor chips 30 embedded in the encapsulant 70 can be separated from each other by cutting the carrier 20 and the encapsulant 70 by any suitable method along the cut- ting lines 100. Such an individualized optoelectronic device 11 is shown in Figure 6.
The invention has been illustrated and described in more spe¬ cific detail on the basis of the preferred exemplary embodi- ments. Nevertheless, the invention is not restricted to the examples disclosed. Rather, other variations can be derived therefrom by the person skilled in the art, without departing from the scope of protection of the invention.
REFERENCE LIST optoelectronic device
individualized optoelectronic device carrier
surface
mounting area optoelectronic semiconductor chip
upper side of the optoelectronic semiconductor chip bottom side of the optoelectronic semiconductor chip height of the optoelectronic semiconductor chip retaining section groove
outer edge of the groove
inner edge of the groove plating
further plating
height of the platings
boundaries of the plating encapsulant
height of encapsulant arranged above the retaining sec¬ tion
height of encapsulant arranged above the mounting area surface of the encapsulant first distance
second distance wavelength-converting material
height of the wavelength-converting material
surface of the wavelength-converting material
cutting line

Claims

Method for producing an optoelectronic device (10), com¬ prising the following steps:
providing a carrier (20),
wherein the carrier (20) comprises a surface (21), wherein the surface (21) comprises a mounting area (22); forming a retaining section (40) at the surface (21), wherein the retaining section (40) encloses the mounting area (22) laterally,
wherein the retaining section (40) is designed to retain a 1iquid;
arranging at least one optoelectronic semiconductor chip (30) above the mounting area (22);
arranging an encapsulant (70) above the retaining section (40) ;
arranging the encapsulant (70) above the mounting area (22) ,
wherein the optoelectronic semiconductor chip (30) is at least partially embedded into the encapsulant (70) .
The method as claimed in claim 1,
wherein forming the retaining section (40) comprises forming a groove (50) at the surface (21) .
The method as claimed in claim 1,
wherein forming the retaining section (40) comprises arranging a plating (60) at the surface (21) .
The method as claimed in claims 2 and 3,
wherein the method comprises:
- arranging the plating (60) such that the plating (60) encloses the groove (50) laterally.
The method as claimed in claim 4 or both claims 2 and 3, wherein the method comprises:
- arranging the plating (60) at the mounting area (22) such that the groove (50) encloses the plating (60) lat- erally .
The method as claimed in one of the previous claims, wherein the optoelectronic semiconductor chip (30) and the encapsulant (70) are arranged such that the surface (21) enclosed by the retaining section (40) is fully cov¬ ered by the optoelectronic semiconductor chip (30) and the encapsulant (70).
The method as claimed in one of the claims 3 to 6, wherein the plating (60) is arranged together with a further plating (61),
wherein the further plating (61) is arranged at the mounting area (22),
wherein at least one optoelectronic semiconductor chip (30) is arranged above the further plating (61) .
The method as claimed in one of the claims 3 to 7, wherein the encapsulant (70) arranged above the retaining section (40) comprises a height (71) before arranging the encapsulant (70) above the mounting area (22) which is higher than a sum of the height (62) of the plating (60), a height (33) of the optoelectronic semiconductor chip (30) and a height (91) of a wavelength-converting material (90), wherein the wavelength-converting (90) material is arranged at least above one optoelectronic semiconduc¬ tor chip (30) .
An optoelectronic device (10)
with a carrier (20),
wherein the carrier (20) comprises a surface (21), wherein the surface (21) comprises a mounting area (22), wherein the mounting area (22) is enclosed laterally by a retaining section (40) formed at the surface (21), wherein at least one optoelectronic semiconductor chip (30) is arranged above the mounting area (22),
wherein an encapsulant (70) is arranged above the retain¬ ing section (40) and the mounting area (22), wherein the optoelectronic semiconductor chip (30) is at least partially embedded in the encapsulant (70) .
10. he optoelectronic device (10) as claimed in claim 9, wherein the retaining section (40) comprises a groove (50) formed at the surface (21) .
11. he optoelectronic device (10) as claimed in claim 9, wherein the retaining section (40) comprises a plating (60) arranged at the surface (21) .
12. The optoelectronic device (10) as claimed in claims 10 and 11,
wherein the plating (60) is arranged such that the plat¬ ing (60) encloses the groove (50) laterally.
13. The optoelectronic device (10) as claimed in one of the claims 10 to 12,
wherein the plating (60) is arranged at the mounting area (22) such that the groove (50) encloses the plating (60) laterally .
14. The optoelectronic device (10) as claimed in one of the previous claims 9 to 13,
wherein at least one further optoelectronic semiconductor chip (30) is arranged above the mounting area (22) .
15. The optoelectronic device (10) as claimed in claim 14, wherein the optoelectronic semiconductor chip (30) and the further optoelectronic semiconductor chip (30) are separated from each other by a first distance (81), wherein the retaining section (40) comprises a second distance (82) to the optoelectronic semiconductor chips (30) ,
wherein the second distance (82) is at least two times larger than the first distance (81) .
16. he optoelectronic device (10) as claimed in one of the previous claims 9 to 15,
wherein a further plating (61) is arranged at the mount¬ ing area (22 ) ,
wherein at least one optoelectronic semiconductor chip (30) is arranged at the further plating (61) .
17. he optoelectronic device (10) as claimed in claim 16, wherein a height (62) of the plating (60) equals to a height (62) of the further plating (61) .
18. The optoelectronic device (10) as claimed in one of the claims 9 to 17,
wherein a wavelength-converting material (90) is arranged at least above one optoelectronic semiconductor chip (30) .
The optoelectronic device (10) as claimed in claims 17 and 18,
wherein a height (72) of the encapsulant (70) arranged above the mounting area (22) equals to a sum of the height (62) of the plating (60), a height (33) of the op¬ toelectronic semiconductor chip (30) and a height (91) of the wavelength-converting material (90).
The optoelectronic device (10) as claimed in one of the claims 9 to 19,
wherein the encapsulant (70) arranged above the mounting area (22) is arranged such that the encapsualant (70) is not arranged above an upper side (31) of the optoelec¬ tronic semiconductor chip (30) .
PCT/EP2017/072744 2017-09-11 2017-09-11 Optoelectronic device and method for producing an optoelectronic decvice WO2019048066A1 (en)

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