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WO2018130409A1 - Three-level power module - Google Patents

Three-level power module Download PDF

Info

Publication number
WO2018130409A1
WO2018130409A1 PCT/EP2017/084358 EP2017084358W WO2018130409A1 WO 2018130409 A1 WO2018130409 A1 WO 2018130409A1 EP 2017084358 W EP2017084358 W EP 2017084358W WO 2018130409 A1 WO2018130409 A1 WO 2018130409A1
Authority
WO
WIPO (PCT)
Prior art keywords
power module
level power
semiconductor switches
substrate
topology
Prior art date
Application number
PCT/EP2017/084358
Other languages
French (fr)
Inventor
Ole MÜHLFELD
Guido Mannmeusel
Jörg BERGMANN
Original Assignee
Danfoss Silicon Power Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Danfoss Silicon Power Gmbh filed Critical Danfoss Silicon Power Gmbh
Publication of WO2018130409A1 publication Critical patent/WO2018130409A1/en

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/295—Organic, e.g. plastic containing a filler
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D
    • H01L25/072—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • the present disclosure relates to a power module, and more particularly, to a three-level power module.
  • a power module may be used for the controlled switching of high currents and can be used in power converters (such as inverters) to convert DC to AC or vice versa, or for converting between different voltages or frequencies of AC.
  • power converters such as inverters
  • inverters are used in motor controllers or interfaces between power generation or storage, or a power distribution grid.
  • a power module may be used in a "grid tie" inverter of a battery storage system. In such a battery storage system, current is supplied to a power supply grid either to stabilize the grid or to provide electrical power during times where the grid electric energy is expensive, i.e. in the morning and in the afternoon.
  • the batteries are recharged during night-time when grid energy cost is lower, or they can be recharged using solar power. Overall, the system helps the customer to reduce expenses for electrical energy.
  • the "grid tie” inverter connects the battery storage system to the grid and has the task to convert the DC voltage of the battery to AC voltage for the grid and vice versa.
  • a "three-level" power module comprising at least one substrate on which one or more semiconductor switches are mounted, wherein the one or more semiconductor switches are wide-bandgap semiconductors.
  • the term "three level” used here indicates that DC power is connected to the power module through connections carrying a positive voltage, a negative voltage and, in addition a third connection carrying an intermediate voltage (neutral), where the positive voltage is at a potential higher than that of the negative voltage, and the neutral connection is at a potential that is between the positive and negative voltages, and may be at zero potential in some embodiments.
  • inverter systems may use ⁇ 400 Volt, and a power supply to such an inverter comprises a positive voltage of +400V, a negative voltage of -400V, and also a neutral of OV.
  • the neutral may be tied to ground.
  • the SiC semiconductors comprise SiC-MOSFETs.
  • the power module comprises a Neutral-Point-Clamped-1 (NPC1 ) topology.
  • NPC1 Neutral-Point-Clamped-1
  • the NPC1 topology is a known topology for three-level inverter circuits and comprises four switches in series between the positive and negative DC power lines. It is further described below.
  • the power module comprises a Neutral-Point-Clamped-2 (NPC2) topology.
  • NPC2 topology is a known topology for three-level inverter circuits and comprises two switches in series between the positive and negative DC power lines, and the load connection comprising the connection between these switches.
  • two further switches connected as a bi-directional switch, lie between the load connection and the neutral power line. It is also further described below.
  • At least two of the semiconductor switches form a half-bridge circuit.
  • the NPC-2 topology circuit is arranged over a first substrate and a second substrate.
  • the first substrate holds two semiconductor switches that are connected in parallel between a positive terminal and a negative terminal of the three-level power module, and the connection between the two semiconductor switches is connected to a load terminal of the three-level power module; and the second substrate holds two semiconductor switches that are connected as a bi-directional switch between a neutral terminal and the load terminal of the three-level power module.
  • positive terminal used herein refers to a terminal of the power module that is connected to the positive potential of the power module.
  • negative terminal refers to a terminal of the power module that is connected to the negative potential of the power module
  • neutral terminal refers to a terminal of the power module that is connected to the neutral potential of the power module.
  • load terminal used herein refers to a terminal that is connected to a load of the power module.
  • each of the semiconductor switches comprises one or more semiconductor chips.
  • no discrete diode component are used.
  • the at least one substrate comprises a Direct Bonded Copper (DBC) substrate.
  • DBC Direct Bonded Copper
  • Such a substrate is formed by a copper/ceramic/copper sandwich, where a circuit structure may be created in the upper copper layer and which may be populated with semiconductor switches, capacitors and/or resistors as required to form a functioning circuit.
  • Fig. 1 shows a cross section view of a power module according to an embodiment of the present disclosure
  • Fig. 2 shows a perspective view of the power module according to the
  • Fig. 3 shows a view of a power module with lid placed according to an
  • Fig. 4 shows a symbolic representation of a power module with IGBT/Diode combination in an NPC1 three-level topology
  • Fig. 5 shows a symbolic representation of a power module with IGBT/Diode combination in an NPC2 three-level topology
  • Fig. 6 shows a symbolic representation of a power module with SiC-MOSFETs in an NPC1 three-level topology
  • Fig. 7 shows a symbolic representation of a power module with SiC-MOSFETs in an NPC2 three-level topology
  • Fig. 8 shows a top view of an exemplary power module according to an
  • first and second etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and similarly, a second element could be termed a first element, without departing from the scope of example embodiments.
  • the term “and/or” includes any and all combinations of one or more of the associated listed terms. The terminology used herein is for the purpose of describing particular
  • Fig. 1 shows a cross section view of a power module 100 according to an embodiment of the present disclosure
  • Fig. 2 shows a perspective view of the power module according to the embodiment of the present disclosure
  • the power module 100 according to an embodiment of the present disclosure comprises a copper baseplate 110 with two substrates 120 soldered on top of it.
  • Direct Bonded Copper (DBC) substrates are used in the power module 100.
  • the DBC substrates are formed by a sandwich of Cu 122 (for example, of 300 ⁇ ), Ceramics 124 (for example, AIN of 320 ⁇ ) and Cu 126 (for example, of 300 ⁇ ) where in the upper Cu layer 122 a circuit structure can be found that holds semiconductor switches 130, capacitors 150 and gate resistors 140.
  • Aluminum bond wires 160 are used for the top-side connection of the die and for
  • the power module 100 is encapsulated with a molded plastic frame 170 (holding the press-fit contact pins). It is filled with Silicone-gel 180. The frame is fixed by metal bushings 230. The power module 100 is closed by a plastic lid 300. Fig. 3 shows a view of the power module 100 with lid 300 in place.
  • the semiconductor switches, resistors and capacitors are soldered to the DBC substrate. Afterwards the substrate is pre-tested. The tested DBC is then soldered to a 3mm thick copper baseplate covered with nickel plating. Afterwards the plastic frame is mounted; this is done by bonding the frame to the baseplate using silicone glue. In addition, the frame and the base plate are fixed by metal bushings. Afterwards the pins and the substrates are connected in a second bonding step with bond wires. In the final step the module is filled with silicone-gel, the lid is mounted and the module is tested in regards to secure the electrical function. The soldering steps may be combined into a single soldering step in order to save process complexity and hence cost.
  • the power module is designed to fulfill two major characteristics: High power conversion efficiency and high power density. Factors as lifetime, cost and quality are also taken into account.
  • a three-level topology is used. By using a three-level topology, less external components (i.e. filters) are needed because the sine-waveform is reproduced better. At the same time, the overall system efficiency increases.
  • Fig. 4 shows a symbolic representation of a power module 400 with conventional Silicon technology (mainly IGBT/Diode combination) in a Neutral Point Clamped (NPC)1 three-level topology.
  • Fig. 5 shows a similar symbolic representation of a power module 500 with conventional Silicon technology (mainly IGBT/Diode combination) in an NPC2 three-level topology.
  • the configurations require the discrete diode components in accompany with each of the semiconductor switches T1-4.
  • high performance wide-bandgap semiconductors such as Silicon Carbide (SiC) semiconductor switches may be used, as they generally outperform standard silicon based components, i.e. Insulated Gate Bipolar
  • IGBT IniGBT
  • the wide-bandgap semiconductors e.g., SiC semiconductor switches
  • the wide-bandgap semiconductors for example SiC
  • MOSFETs Metal-Oxide-Semiconductor Field Effect Transistors
  • the three-level topology may make use of the MOSFET intrinsic body diode, and thus no additional Si or SiC freewheeling diode is needed as it is the case in IGBT based three-level power module.
  • SiC MOSFET needs less space on the substrate compared to equal rated IGBT. Therefore, higher power densities are possible.
  • Fig. 6 shows a symbolic representation of a power module 600 with
  • FIG. 7 shows a similar symbolic representation of a power module 700 with
  • Sic-MOSFETs in an NPC2 three-level topology As shown, no additional freewheeling diodes are required in either power module.
  • the numerals 1-24 in the figure denote pin reference numbers of the power module.
  • Fig. 7 also shows that the semiconductors in the power module 700 form an NPC-2 topology circuit, which is split over the two substrates, DBC1 and DBC2.
  • DBC1 holds a half-bridge circuit comprising T1 and T4, and DBC2 holds a bi-directional switch circuit comprising T2 and T3. That is, DBC1 holds two semiconductors that are connected in series between the positive and negative terminals of the power module, and the connection between T1 andT4 is connected to the load terminal of the power module.
  • DBC2 holds two
  • Fig. 8 shows a top view of an exemplary power module 800 according to an embodiment of the present disclosure.
  • T1-T4 are doubled compared with those shown in Fig. 7.
  • DBC1 holds T1 and T4
  • DBC2 holds T2 and T3.
  • each transistor in Fig. 7 is realized by two transistors in parallel in Fig. 8.
  • the bond wires ringed denote the connection between the two DBC substrates.
  • the numerals 1- 26 in the figure denote pin reference numbers of the power module.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The present disclosure provides a three-level power module comprising at least one substrate on which one or more semiconductor switches are mounted, wherein the one or more semiconductor switches are wide-bandgap semiconductors.

Description

THREE-LEVEL POWER MODULE
TECHNICAL FIELD
The present disclosure relates to a power module, and more particularly, to a three-level power module.
BACKGROUND
Semiconductor power modules are widely used in industry. For example, such a power module may be used for the controlled switching of high currents and can be used in power converters (such as inverters) to convert DC to AC or vice versa, or for converting between different voltages or frequencies of AC. Such inverters are used in motor controllers or interfaces between power generation or storage, or a power distribution grid. For example, a power module may be used in a "grid tie" inverter of a battery storage system. In such a battery storage system, current is supplied to a power supply grid either to stabilize the grid or to provide electrical power during times where the grid electric energy is expensive, i.e. in the morning and in the afternoon. The batteries are recharged during night-time when grid energy cost is lower, or they can be recharged using solar power. Overall, the system helps the customer to reduce expenses for electrical energy. The "grid tie" inverter connects the battery storage system to the grid and has the task to convert the DC voltage of the battery to AC voltage for the grid and vice versa.
"Two-level" topologies, where DC power is supplied in a 2-conductor system (positive and negative voltages) are commonly used in many currently available inverters. This topology has the drawback of reduced efficiency and non-ideal sinusoidal current shape on the output of the inverters, requiring significant filtering effort.
SUMMARY
It is an object of the present disclosure to provide a power module with enhanced efficiency.
In a first aspect, a "three-level" power module is provided, comprising at least one substrate on which one or more semiconductor switches are mounted, wherein the one or more semiconductor switches are wide-bandgap semiconductors. The term "three level" used here indicates that DC power is connected to the power module through connections carrying a positive voltage, a negative voltage and, in addition a third connection carrying an intermediate voltage (neutral), where the positive voltage is at a potential higher than that of the negative voltage, and the neutral connection is at a potential that is between the positive and negative voltages, and may be at zero potential in some embodiments. For example, inverter systems may use ±400 Volt, and a power supply to such an inverter comprises a positive voltage of +400V, a negative voltage of -400V, and also a neutral of OV. The neutral may be tied to ground.
In an embodiment, the SiC semiconductors comprise SiC-MOSFETs.
In an embodiment, the power module comprises a Neutral-Point-Clamped-1 (NPC1 ) topology. The NPC1 topology is a known topology for three-level inverter circuits and comprises four switches in series between the positive and negative DC power lines. It is further described below.
In an embodiment, the power module comprises a Neutral-Point-Clamped-2 (NPC2) topology. The NPC2 topology is a known topology for three-level inverter circuits and comprises two switches in series between the positive and negative DC power lines, and the load connection comprising the connection between these switches. In addition, two further switches, connected as a bi-directional switch, lie between the load connection and the neutral power line. It is also further described below.
In an embodiment, at least two of the semiconductor switches form a half-bridge circuit.
In an embodiment, the NPC-2 topology circuit is arranged over a first substrate and a second substrate.
In an embodiment, the first substrate holds two semiconductor switches that are connected in parallel between a positive terminal and a negative terminal of the three-level power module, and the connection between the two semiconductor switches is connected to a load terminal of the three-level power module; and the second substrate holds two semiconductor switches that are connected as a bi-directional switch between a neutral terminal and the load terminal of the three-level power module.
The term "positive terminal" used herein refers to a terminal of the power module that is connected to the positive potential of the power module. Similarly, the "negative terminal" refers to a terminal of the power module that is connected to the negative potential of the power module, and the "neutral terminal" refers to a terminal of the power module that is connected to the neutral potential of the power module. The term "load terminal" used herein refers to a terminal that is connected to a load of the power module.
In an embodiment, each of the semiconductor switches comprises one or more semiconductor chips.
In an embodiment, no discrete diode component are used.
In an embodiment, the at least one substrate comprises a Direct Bonded Copper (DBC) substrate. Such a substrate is formed by a copper/ceramic/copper sandwich, where a circuit structure may be created in the upper copper layer and which may be populated with semiconductor switches, capacitors and/or resistors as required to form a functioning circuit.
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other objects, features and advantages will be more apparent from the following description of embodiments with reference to the figures, in which:
Fig. 1 shows a cross section view of a power module according to an embodiment of the present disclosure;
Fig. 2 shows a perspective view of the power module according to the
embodiment of the present disclosure;
Fig. 3 shows a view of a power module with lid placed according to an
embodiment of the present disclosure; Fig. 4 shows a symbolic representation of a power module with IGBT/Diode combination in an NPC1 three-level topology; Fig. 5 shows a symbolic representation of a power module with IGBT/Diode combination in an NPC2 three-level topology; Fig. 6 shows a symbolic representation of a power module with SiC-MOSFETs in an NPC1 three-level topology;
Fig. 7 shows a symbolic representation of a power module with SiC-MOSFETs in an NPC2 three-level topology; and
Fig. 8 shows a top view of an exemplary power module according to an
embodiment of the present disclosure.
DETAILED DESCRIPTION
The embodiments of the disclosure will be detailed below with reference to the drawings. It should be noted that the following embodiments are illustrative only, rather than limiting the scope of the disclosure.
References in the specification to "one embodiment," "an embodiment," etc.
indicate that the embodiment described may include a particular feature, structure, or characteristic, but it is not necessary that every embodiment includes the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
It shall be understood that although the terms "first" and "second" etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and similarly, a second element could be termed a first element, without departing from the scope of example embodiments. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed terms. The terminology used herein is for the purpose of describing particular
embodiments only and is not intended to be liming of example embodiments. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises", "comprising", "has", "having", "includes" and/or "including", when used herein, specify the presence of stated features, elements, and/or components etc., but do not preclude the presence or addition of one or more other features, elements, components and/ or combinations thereof. In the following description and claims, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skills in the art to which this disclosure belongs.
Fig. 1 shows a cross section view of a power module 100 according to an embodiment of the present disclosure, and Fig. 2 shows a perspective view of the power module according to the embodiment of the present disclosure. As shown, the power module 100 according to an embodiment of the present disclosure comprises a copper baseplate 110 with two substrates 120 soldered on top of it. Direct Bonded Copper (DBC) substrates are used in the power module 100. The DBC substrates are formed by a sandwich of Cu 122 (for example, of 300μηη), Ceramics 124 (for example, AIN of 320μηη) and Cu 126 (for example, of 300μηη) where in the upper Cu layer 122 a circuit structure can be found that holds semiconductor switches 130, capacitors 150 and gate resistors 140. Aluminum bond wires 160 are used for the top-side connection of the die and for
interconnection with pins 210, including signal pins and power pins of the power module 100. The two DBC substrates are connected via bond wires 220. The power module 100 is encapsulated with a molded plastic frame 170 (holding the press-fit contact pins). It is filled with Silicone-gel 180. The frame is fixed by metal bushings 230. The power module 100 is closed by a plastic lid 300. Fig. 3 shows a view of the power module 100 with lid 300 in place.
During assembly of the power module, first the semiconductor switches, resistors and capacitors are soldered to the DBC substrate. Afterwards the substrate is pre-tested. The tested DBC is then soldered to a 3mm thick copper baseplate covered with nickel plating. Afterwards the plastic frame is mounted; this is done by bonding the frame to the baseplate using silicone glue. In addition, the frame and the base plate are fixed by metal bushings. Afterwards the pins and the substrates are connected in a second bonding step with bond wires. In the final step the module is filled with silicone-gel, the lid is mounted and the module is tested in regards to secure the electrical function. The soldering steps may be combined into a single soldering step in order to save process complexity and hence cost.
The power module is designed to fulfill two major characteristics: High power conversion efficiency and high power density. Factors as lifetime, cost and quality are also taken into account.
In order to achieve high power conversion efficiency, a three-level topology is used. By using a three-level topology, less external components (i.e. filters) are needed because the sine-waveform is reproduced better. At the same time, the overall system efficiency increases.
Fig. 4 shows a symbolic representation of a power module 400 with conventional Silicon technology (mainly IGBT/Diode combination) in a Neutral Point Clamped (NPC)1 three-level topology. Fig. 5 shows a similar symbolic representation of a power module 500 with conventional Silicon technology (mainly IGBT/Diode combination) in an NPC2 three-level topology. As shown, there are additional freewheeling diodes D1 , D4, D5 and D6. The configurations require the discrete diode components in accompany with each of the semiconductor switches T1-4. In an embodiment, high performance wide-bandgap semiconductors, such as Silicon Carbide (SiC) semiconductor switches may be used, as they generally outperform standard silicon based components, i.e. Insulated Gate Bipolar
Transistors (IGBT). The wide-bandgap semiconductors (e.g., SiC semiconductor switches) have the characteristic to switch very fast, and therefore have lower switching losses than IGBTs. The wide-bandgap semiconductors, for example SiC
Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), have higher efficiency, and so the less cooling is needed compared with IGBTs. The three-level topology may make use of the MOSFET intrinsic body diode, and thus no additional Si or SiC freewheeling diode is needed as it is the case in IGBT based three-level power module. Moreover, the SiC MOSFET needs less space on the substrate compared to equal rated IGBT. Therefore, higher power densities are possible.
Fig. 6 shows a symbolic representation of a power module 600 with
SiC-MOSFETs in a Neutral Point Clamped (NPC)1 three-level topology. Fig. 7 shows a similar symbolic representation of a power module 700 with
Sic-MOSFETs in an NPC2 three-level topology. As shown, no additional freewheeling diodes are required in either power module. There are four semiconductors, T1-T4, and two substrates DBC1 and DBC2 inside the power module. No discrete diode component is used in accompany with each of the semiconductor T1-T4. The numerals 1-24 in the figure denote pin reference numbers of the power module.
Fig. 7 also shows that the semiconductors in the power module 700 form an NPC-2 topology circuit, which is split over the two substrates, DBC1 and DBC2. DBC1 holds a half-bridge circuit comprising T1 and T4, and DBC2 holds a bi-directional switch circuit comprising T2 and T3. That is, DBC1 holds two semiconductors that are connected in series between the positive and negative terminals of the power module, and the connection between T1 andT4 is connected to the load terminal of the power module. DBC2 holds two
semiconductors that are connected as a bi-directional switch between the neutral terminal and load terminal of the power module.
Fig. 8 shows a top view of an exemplary power module 800 according to an embodiment of the present disclosure. As shown, there are eight semiconductors, where T1-T4 are doubled compared with those shown in Fig. 7. DBC1 holds T1 and T4, and DBC2 holds T2 and T3. In other words, each transistor in Fig. 7 is realized by two transistors in parallel in Fig. 8. Similar as Fig. 7, the bond wires ringed denote the connection between the two DBC substrates. The numerals 1- 26 in the figure denote pin reference numbers of the power module. The disclosure has been described above with reference to embodiments thereof. It should be understood that various modifications, alternations and additions can be made by those skilled in the art without departing from the spirits and scope of the disclosure. Therefore, the scope of the disclosure is not limited to the above particular embodiments but only defined by the claims as attached.

Claims

1. A three-level power module comprising at least one substrate which one or more semiconductor switches are mounted, wherein the one or more semiconductor switches are wide-bandgap semiconductors.
2. The three-level power module of claim 1 , wherein the wide-bandgap semiconductors comprise Silicon Carbide (SiC) semiconductors.
3. The three-level power module of claim 2, wherein the SiC
semiconductors comprise SiC Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs).
4. The three-level power module of any of claims 1 to 3, wherein the
power module comprises a Neutral Point Clamped (NPC)-1 topology.
5. The three-level power module of any of claims 1 to 3, wherein the
power module comprises a NPC-2 topology.
6. The three-level power module of claim 5, wherein at least two of the semiconductor switches form a half-bridge circuit.
7. The three-level power module of claim 5, wherein the NPC-2 topology circuit is arranged over a first substrate and a second substrate.
8. The three-level power module of claim 7, wherein the first substrate holds two semiconductor switches that are connected in parallel between a positive terminal and a negative terminal of the three-level power module, and the connection between the two semiconductor switches is connected to a load terminal of the three-level power module; and the second substrate holds two semiconductor switches that are connected as a bi-directional switch between a neutral terminal and the load terminal of the three-level power module.
9. The three-level power module of any of claims 5 to 8, wherein each of the semiconductor switches comprises one or more
semiconductor chips.
10. The three-level power module any of claims 3 to 9, wherein no discrete diode components are used.
11 . The three-level power module of any of claims 1 to 10, wherein the at least one substrate comprises a Direct Bonded Copper (DBC) substrate.
PCT/EP2017/084358 2017-01-12 2017-12-22 Three-level power module WO2018130409A1 (en)

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