WO2018153192A1

WO2018153192A1 - Time synchronization method and apparatus

Info

Publication number: WO2018153192A1
Application number: PCT/CN2018/073569
Authority: WO
Inventors: 都美江; 罗彬�; 何力
Original assignee: 中兴通讯股份有限公司
Priority date: 2017-02-22
Filing date: 2018-01-22
Publication date: 2018-08-30
Also published as: CN108462548A; CN108462548B

Abstract

The present disclosure provides a time synchronization method and apparatus. The time synchronization method comprises: performing time synchronization of a network element according to a clock synchronization result determined by the network element by means of a clock synchronization algorithm.

Description

Time synchronization method and device

Cross-reference to related applications

The present application claims priority to Chinese Patent Application No. 201710097245.4, filed on Feb. 22,,,,,,,,,,

Technical field

The present disclosure relates to the field of synchronization, and in particular to a time synchronization method and apparatus.

Background technique

In the packet transmission network, the clock synchronization method of the synchronous Ethernet +1 588v2 is generally used to establish the synchronization of the system frequency between the devices through the synchronous Ethernet, and the time synchronization is implemented by the Precision Time Protocol (PTP). Since the clock includes frequency and/or time, clock synchronization includes frequency synchronization and/or time synchronization.

The source mastering mechanism of the time master synchronization network (Best Master Clock, BMC for short) is used to transmit time source quality information through the advertisement packet, and each time source in the system performs independent BMC operation. The BMC algorithm includes two decision algorithms: a time state decision algorithm and a port state decision algorithm.

However, the use of BMC algorithm for network construction is not only unable to perform real-time manual intervention, but with the increase of the number of network elements, there is a problem of high complexity and easy looping, which greatly affects the efficiency of time synchronization network establishment. . The stability of the network also affects the accuracy of synchronization. In the related art, the time synchronization BMC algorithm causes the time synchronization network to be inconsistent with the frequency synchronization network, which makes the time synchronization device and the main device clock frequency deviate, and cannot meet the sub-nanosecond time. The precision requirements for synchronization.

This section is background information related to the present disclosure, but the background information is not necessarily prior art.

Summary of the invention

The embodiments of the present disclosure provide a time synchronization method and apparatus to solve at least the problem of poor time synchronization accuracy and being susceptible to network topology changes in the related art.

According to an embodiment of the present disclosure, a time synchronization method is provided, including: performing time synchronization of the network element based on a clock synchronization result determined by a network element by a clock synchronization algorithm.

According to another embodiment of the present disclosure, a time synchronization apparatus is provided, including: a synchronization module, configured to perform time synchronization of the network element based on a clock synchronization result determined by a network element by a clock synchronization algorithm.

According to still another embodiment of the present disclosure, a storage medium is also provided. The storage medium is arranged to store program code for performing the following steps: time synchronization of the network element based on a clock synchronization result determined by the network element through a clock synchronization algorithm.

Through the disclosure, the time synchronization of the network element is performed based on the clock synchronization result determined by the network element through the clock synchronization algorithm. Therefore, the network can be quickly established, and the impact of the network topology change on the time synchronization is reduced, thereby solving the time synchronization precision. Problems that are poor and susceptible to changes in network topology can improve time accuracy and stability.

This section provides an overview of various embodiments and examples of the techniques described in this disclosure, but not all of all or all of the features of the disclosed technology.

DRAWINGS

The drawings described herein are provided to provide a further understanding of the present disclosure, which is a part of the present disclosure, and the description of the present disclosure and the description thereof are not intended to limit the disclosure. In the drawing:

1 is a block diagram showing the hardware structure of a mobile terminal according to a time synchronization method according to an embodiment of the present disclosure;

2 is a flow chart of a time synchronization method in accordance with an embodiment of the present disclosure;

3 is a structural block diagram of a time synchronization device according to an embodiment of the present disclosure;

4 is a block diagram of a clock synchronization network in accordance with an embodiment of the present disclosure;

FIG. 5 is a schematic diagram of an optional message description and interaction process according to an embodiment of the present disclosure; FIG.

6 is a schematic diagram of an optional clock decision algorithm (State Decision Algorithm, SDA for short) according to an embodiment of the present disclosure;

FIG. 7 is a schematic diagram of a working principle of a clock time-associated synchronization state machine (Finite State Machine, FSM for short).

detailed description

The present disclosure will be described in detail below with reference to the drawings in conjunction with the embodiments. It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict.

It is to be understood that the terms "first", "second", and the like in the specification and claims of the present disclosure are used to distinguish similar objects, and are not necessarily used to describe a particular order or order.

The processing flow of the method of synchronizing Ethernet +1588v2 clock synchronization adopted in the packet transfer network is roughly divided into two parts:

(1) Establishment of a 1588v2 time synchronization network: receiving and authenticating advertisement messages from other clock (time) ports; using the BMC algorithm to determine the recommended state of the outgoing port; completing the port data set according to the port state decision algorithm entering the recommended state decision point Update; according to the recommended status and "state decision event", the port state machine determines the actual state of the port, establishing a master-slave relationship.

(2) Time deviation measurement and time synchronization: After the time stamp message reply process, that is, the PTP synchronization message is continuously sent between the master device and the slave device to obtain an offset value (Offset), and the slave device can correct the local time value according to the Offset. The time to synchronize the master time with the local time.

Example 1

An application scenario of the embodiment of the present application is: the network element completes frequency synchronization by using the selected frequency synchronization algorithm, and then uses the result of the frequency synchronization algorithm operation to implement time synchronization of the network. The selected frequency synchronization algorithm is a Synchronization Status Message (SSM) in this solution. The principle of realizing the time synchronization of the network by using the result of the frequency synchronization algorithm is as follows: the master-slave relationship (that is, the port state) based on the SSM algorithm is passed through the protocol interaction mode (the middle section of the PLL in FIG. 6) Interlocking is locked on the network element (or locked on the network element port), and then based on this port state (calculated by SSM), the network time synchronization is implemented by the time synchronization algorithm. The foregoing time synchronization algorithm includes, but is not limited to, a Best Master Clock Algorithm (BMCA) in the embodiment of the present application. It should be noted that the “clock” core in the BMCA algorithm refers to “time”.

Based on the above scenario, the technical solution adopted in Embodiment 1 of the present application is as follows:

The method embodiment provided by this embodiment may be implemented in a mobile terminal, a computer terminal or the like. Taking a computer device as an example, FIG. 1 is a hardware block diagram of a computer device of a time synchronization method according to an embodiment of the present disclosure. As shown in FIG. 1, computer device 10 may include one or more (only one shown) processor 102 (processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) A memory 104 for storing data, and a transmission device 106 for communication functions. It will be understood by those skilled in the art that the structure shown in FIG. 1 is merely illustrative and does not limit the structure of the above electronic device. For example, computer device 10 may also include more or fewer components than those shown in FIG. 1, or have a different configuration than that shown in FIG.

The memory 104 can be used to store software programs and modules of application software, such as program instructions/modules corresponding to the time synchronization method in the embodiment of the present disclosure, and the processor 102 executes various programs by running software programs and modules stored in the memory 104. Functional application and data processing, that is, the above method is implemented. Memory 104 may include high speed random access memory and may also include non-volatile memory such as one or more magnetic storage devices, flash memory, or other non-volatile solid state memory. In some examples, memory 104 may include memory remotely located relative to processor 102, which may be connected to computer device 10 over a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

Transmission device 106 is for receiving or transmitting data via a network. The network specific examples described above may include a wireless network provided by a communication provider of computer device 10. In one example, the transmission device 106 includes a Network Interface Controller (NIC) that can be connected to other network devices through a base station to communicate with the Internet. In one example, the transmission device 106 can be a Radio Frequency (RF) module for communicating with the Internet wirelessly.

In the embodiment, a method for operating the computer device is provided. FIG. 2 is a flowchart of a time synchronization method according to an embodiment of the present disclosure. As shown in FIG. 2, the process includes the following steps:

Step S202: Acquire a clock synchronization result determined by the network element by using a clock synchronization algorithm. Optionally, the clock synchronization result includes: a port status of the designated port in the network element, where the port status includes: a primary port status and a slave port. status.

Optionally, the port status of the specified port in the network element is determined by: determining, according to the tracking state of the system clock of the network element, a port status of the designated port in the network element, where the tracking status includes: accepting an external Ethernet The network clock, that is, the above tracking status includes: accepting an external Ethernet clock and rejecting an external Ethernet clock.

Step S204, performing time synchronization based on the clock synchronization result.

As an optional embodiment of the present application, step S204 may be expressed as the following implementation manner, but is not limited thereto:

Determining whether the local data set of the network element belongs to the preset priority clock level range; if the determination result is no, triggering the following process: determining the designated port in the network element according to the tracking state of the system clock of the network element a first port state; performing time synchronization of the network element according to the first port state; and if the determination result is yes, comparing the optimal port data set determined by the designated port of the network element with the local data of the network element The priority of the set; determining the second port status of the designated port according to the comparison result; performing time synchronization of the network element according to the second port status. It should be noted that the first port state and the second port state may be the same port state, or the second port state may follow the first port state.

Optionally, the preset priority clock level range may be a high priority clock level range. For example, the priority data level range (Class ID) of the local data set may be any value from 0 to 127. The preset priority clock level range is adjustable and is not limited to values between 0 and 127. Based on the above-mentioned value range, in an optional embodiment, before step S202, whether the class ID is set to be between 1-127 may be determined according to actual needs (whether or not the network element is designated as the top network element). Value, where the top network element refers to the device whose local clock does not track the external clock.

Optionally, the process of determining the second port state of the specified port according to the comparison result may be implemented in the following manner, but is not limited thereto:

When the comparison result indicates that the priority of the local data set is higher than the optimal port data set, determining the port status of the designated port as the primary port status; and the comparison result indicates that the local data set has a lower priority In the case of the above-mentioned best port data set (Erbest), the port status of the above designated port is determined to be a passive port status.

Optionally, after determining the port state of the specified port as a passive port state, the method further includes: setting a source port ID in the Erbest to a parent port ID of the network element, where the parent port ID is And indicating a port corresponding to the specified port in the upstream device of the foregoing network element.

Optionally, the Erbest of the specified port is obtained by: obtaining the number of route hops experienced by the specified port after receiving the specified packet; and receiving the data received by the port of the source node corresponding to the minimum route hop count of the route hop count. Stored in the above Erbest.

Optionally, the foregoing local data set and/or the best port data set is used to store information required for time synchronization, including but not limited to: clock priority, clock level, clock type (eg, boundary clock, transparent transmission clock, etc.) ). The specific definition can be found in the related art, and will not be described here. The source of the best port data set Erbest can be obtained by related technologies, and details are not described herein again.

Optionally, the execution body of the foregoing steps may be a base station, a terminal, or the like, but is not limited thereto.

The following is a detailed description of the above solution in combination with a specific application scenario:

The first step is to complete the configuration of the time network with reference to the configuration of the clock source on the premise that the clock network is established. According to the configuration of the clock network LAN, time synchronization configuration is performed on the same network element port to establish a correct virtual local area network. The ports in the direction of the primary ring are configured as a unified virtual LAN in the primary direction. The ports in the direction of the standby ring are configured as a unified virtual LAN in the standby direction to ensure that the time synchronization is consistent with the clock synchronization network. The local area network allows the standard PTP packets of the same VLAN to run on the specified virtual network. That is, the PTP packets in the primary direction can only be transmitted in the primary clock ring. The PTP packets in the backup direction can only be in the backup clock ring. Transfer.

The second step is to be compatible with the standard PTP advertisement message, and use the information such as the port identifier of the clock node of the advertisement packet to perform the interaction of the time node information between the devices; wherein the advertisement message is transmitted in the specified virtual network, and the boundary clock is In a network composed of Boundary Clock (BC) devices, advertisement packets are only transmitted to neighboring devices. In a network that includes a Transport Clock (TC) device, the advertisement packet is transmitted to each device in the specified virtual network and transparently transmitted to each device.

The third step is to use the data set comparison algorithm of the BMC algorithm. The data set comparison algorithm 1 is omitted, that is, all clock nodes received by the default receiving end have the same priority, and only the topological relationship between the nodes is compared. The data set comparison algorithm 2 is used to traverse the number of experienced node hops of the received message on the port. The source node with the shortest topology distance is used as the best port of the local port (the data exists in Erbest), that is, the data set comparison algorithm 2 is used to compare the data sets carried in each advertisement packet received by the port, and determine Erbest. Provides data support for port decision algorithms.

In the fourth step, the state decision algorithm based on the clock source selection result is used to compare the PTP ports, and the port state is determined according to the SSM clock synchronization direction. If the Class ID of the local data set belongs to the number from 1 to 127, compare the local data set with Erbest. If the local data set is better, set the port to the master state. If the Erbest is better, set the port to the Passive port. If the Class ID of the local data set does not belong to the number between 1 and 127, the master/slave status of the port is controlled according to whether the device provides clock output or accepts input. If the port does not accept the external clock, it is set to the master state. If the port receives the external clock, it is set to the slave state. Even if the reference source clock is not configured, it is still set to the master state.

The port decision algorithm depends on the data set comparison algorithm 1 and the data set comparison algorithm 2 decision port state, except that the class ID of the local data set is 1 to 127. For the case where the Class ID of the local data set is not within the range of 1 to 127, the master-slave state of the clock source is completely used to determine the port state. For the top device, the Class ID of its local data set is a value from 1 to 127, so that it does not track the external device; for other devices, the Class ID of its local data set is set to a value other than 1 to 127, if not The tracking external clock is set to the master state, and is set to the slave state if the external clock is tracked. If the port is not configured with a synchronous timing source, it is still set to the active state. The port decision algorithm makes the top node not track the external network time, and also makes the time selection direction of the time node in the network consistent with the clock source selection direction.

In the fifth step, for the decision to be a slave port, the device port ID of the Erbest of the port is written to the parent port ID of the device, so that a logical master-slave relationship is established between the devices;

In the sixth step, the device establishes a connection between the devices by using the signaling packet, and the device that is the slave port initiates a link to the master port device. After receiving the packet, the master port interacts with the slave port to establish a link; for example, Node A and Node The interaction between signaling packets is completed between B and clock synchronization is performed. The time synchronization control is started after the clock is locked.

In the seventh step, the normal PTP time synchronization deviation measurement is performed after the link is completed, and the time deviation of the master-slave clock is corrected, that is, after the time synchronization link is established, the standard PTP protocol message response measurement time deviation is adjusted and the master-slave time is adjusted. .

Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, by hardware, but in many cases, the former is A better implementation. Based on such understanding, portions of the technical solutions of the present disclosure that contribute substantially or to the prior art may be embodied in the form of a software product stored in a storage medium (eg, ROM/RAM, disk, The optical disc includes a number of instructions for causing a terminal device (which may be a cell phone, a computer, a server, or a network device, etc.) to perform the methods described in various embodiments of the present disclosure.

Example 2

In this embodiment, a time synchronization device is also provided, which is used to implement the above-mentioned embodiments and preferred embodiments, and has not been described again. As used below, the term "module" may implement a combination of software and/or hardware of a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, hardware, or a combination of software and hardware, is also possible and contemplated.

FIG. 3 is a structural block diagram of a time synchronization apparatus according to an embodiment of the present disclosure. As shown in FIG. 3, the apparatus includes:

The obtaining module 30 is configured to obtain a clock synchronization result determined by the network element by using a clock synchronization algorithm. Optionally, the clock synchronization result includes: a port status of the designated port in the network element, where the port status includes: a primary port status And slave port status.

Optionally, the port status of the specified port in the network element is determined by: determining, according to the tracking state of the system clock of the network element, a port status of the designated port in the network element, where the tracking status includes: accepting an external Ethernet The network clock, that is, the above tracking status includes two states: accepting an external Ethernet clock and rejecting an external Ethernet clock.

The synchronization module 32 is connected to the acquisition module 30 for performing time synchronization based on the clock synchronization result.

Optionally, the synchronization module is configured to determine whether the local data set of the network element belongs to a preset priority clock level range; if the determination result is negative, triggering the following process: according to the system clock of the network element The tracking state determines the state of the first port of the designated port in the network element; performs time synchronization of the network element according to the first port state; and compares the maximum value determined by the designated port of the network element when the determination result is yes The priority of the local port data set and the local data set of the network element; determining the second port status of the designated port according to the comparison result; performing time synchronization of the network element according to the second port status.

As an optional implementation manner of the embodiment, the Erbest of the network element is a data set obtained by acquiring the number of route hops that the designated port receives the specified packet, and the minimum route hop of the route hop count. The data received by the port of the corresponding source node is stored in the above Erbest.

Optionally, the synchronization module 32 is further configured to determine, according to the comparison result, that the priority of the local data set is higher than the best port data set, determine a port status of the designated port as a primary port status; When the comparison result indicates that the priority of the local data set is lower than the optimal port data set, the port status of the designated port is determined to be a passive passive port status.

It should be noted that each of the above modules may be implemented by software or hardware. For the latter, the foregoing may be implemented by, but not limited to, the foregoing modules are all located in the same processor; or, the above modules are in any combination. The forms are located in different processors.

It should be noted that the preferred embodiment in this embodiment can be referred to the related description in Embodiment 1, and details are not described herein again.

Example 3

The time synchronization method provided in this embodiment includes the following processing steps:

Step 501: The clock node extracts an SSM optimal master clock according to the synchronization state information, where the SSM optimal master clock is used for the optimal master clock of the frequency synchronization;

Step 501 also includes:

As shown in Figure 4, the devices establish a clock synchronization network in the form of a ring network, completing the primary link (SEC1--SEC2------SEC6) and the backup link (SEC1--SEC6---- --SEC2) clock source configuration. The illustration only describes the configuration of a single ring. The large network is hierarchically configured according to the core layer, the aggregation layer, and the access layer. The meaning of the SEC or EEC in FIG. 4 identifies the network device in the embodiment of the present application, and satisfies the clock requirement of the three-level clock.

Step 502: The time virtual local area network shown in FIG. 4 is configured into different virtual local area networks according to the primary link and the backup link. One is to achieve two-way time configuration independent of each other. Second, each virtual local area network includes all devices in the ring to ensure the normal delivery of packets within the ring.

As shown in Figure 5, in the clock synchronization network, the device enters the listening state after power-on and initialization, and listens to the received PTP advertisement packet. According to the data set comparison algorithm and the port decision algorithm shown in FIG. 6, the Node A decision is in the master state and enters the pre-active state. In Figure 6, for the judgment of Class, the YES branch belongs to the content of the port decision algorithm of the original BMC standard, and the NO part is the modified content. If you decide the port by the content on the right side, you may encounter the problem that the top network element cannot decide, because the top network element does not track the devices in the network, and its clock needs special processing even if it is synchronized with the external clock source.

Step 601: The Node A periodically sends an advertisement packet, and the Node B updates the port data set after receiving the advertisement packet.

Step 602: Calculate the Erbest (Erbest) of the PTP port of the Node B according to the data set comparison algorithm 2;

As shown in Figure 6, the port status is determined for the port on which Erbest has been calculated. The Node B decision is in the Slave state and enters the uncalibrated state.

Step 701: For the top network element, it is not desirable to track the external time, and it is also necessary to provide time output for the nodes in the network. Then, the Class of its local data set (D0) needs to be set to a value within 1 to 127, and the level of the local data set can be appropriately increased so that its local data set is larger than the data set of the remaining nodes in the network. This will assume that the local data set is larger than the port best data set Erbest, then set the port as the primary state. Even if the value is smaller than the best data set Erbest of the external network port, the port is set to the transparent transmission state, and the external time is not tracked;

Step 702: For a common node in the network, or even a node that hangs the branch network, the Class of the D0 needs to be set to a value other than 1 to 127, so that if the port tracks the external clock, it is set according to the port decision algorithm. Slave port; if the port does not track the best master clock, it is set to the master port. Set to the primary port even if the reference source clock is not configured.

As shown in Figure 7, the state machine of the standard PTP does not change. It is only because the SSM decides the PTP port state decision algorithm (SDA), and the condition of the original BMC decision is modified into the state machine of the SSM decision in the text description. FSM).

Step 603: After completing the port decision algorithm, the Node A enters the master state, and the Node B enters the uncalibrated state after completing the port decision algorithm, and the Node B actively sends a signaling packet to the Node A to establish a link. After detecting the selection of the clock source, the Node B sends a Source Selected signaling packet to the Node A. After receiving the packet, the Node A notifies the Node B to perform the PLL START signaling packet of the phase-locked loop tracking. After detecting the phase-locked loop lock, the Node A sends a PLL LOCKED signaling message to the Node A. After receiving the packet locked by the phase-locked loop, the Node A sends a TimeLock ModeOn to the Node B, and the Node B establishes the Node A after receiving the packet. Node B's time synchronization link links into the Slave state.

Step 604: Normally send PTP event synchronization message completion time synchronization. According to the standard execution mode, the master sends a Sync event message to the slave (the time required to carry the estimated message transmission), and the device that enables the two-step method is further You need to send a FollowUp packet (with the current system time). After receiving the Sync packet, the slave sends a DelayReq event packet to the Master. The Master then sends a DelayResp packet to the slave. After collecting the T1, T2, T3, and T4 timestamps, the Slave device calculates the time offset offset between the slave device and the master device according to the formula, adjusts the local time, and completes the time synchronization. During the time synchronization message exchange, the advertisement message is also periodically sent, and the time synchronization network is adjusted according to the change of the received data information. If the data set changes, the content is changed according to the contents of steps 601-603, and then continuously Step 604 is repeated to modify the slave time to complete the time tracking of the master device.

Compared with the related technologies, the foregoing solution provided by the embodiment improves the network construction efficiency of the time network, avoids the network looping, saves the time of the network establishment time, improves the precision of the time synchronization, and the like.

The existing 4G technology requires a time synchronization transmission of 1.5us. With the development of next-generation mobile network technology and Pre5G, high-density networking is required, and the requirements of 3GPP are once again highlighted. With the development of high-real-time applications such as indoor positioning and augmented reality (AR), higher requirements are also placed on time synchronization, and time synchronization of sub-nanoseconds has become an urgent problem to be solved. Therefore, it is necessary to adjust the original PTP network time synchronization source selection algorithm to achieve rapid network construction and reduce the impact of network topology changes on time synchronization. The clock-to-phase synchronization is eliminated to eliminate the master-slave clock frequency deviation, improving the accuracy of time synchronization.

Example 4

Embodiments of the present disclosure also provide a storage medium. Optionally, in this embodiment, the foregoing storage medium may be configured to store program code for performing time synchronization of the network element based on a clock synchronization result determined by the network element by a clock synchronization algorithm.

Optionally, in this embodiment, the foregoing storage medium may include, but not limited to, a USB flash drive, a Read-Only Memory (ROM), a Random Access Memory (RAM), a mobile hard disk, and a magnetic memory. A variety of media that can store program code, such as a disc or a disc.

For example, the specific examples in this embodiment may refer to the examples described in the foregoing embodiments and the optional embodiments, and details are not described herein again.

It will be apparent to those skilled in the art that the various modules or steps of the present disclosure described above can be implemented by a general-purpose computing device that can be centralized on a single computing device or distributed across a network of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device such that they may be stored in the storage device by the computing device and, in some cases, may be different from the order herein. The steps shown or described are performed, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps thereof are fabricated as a single integrated circuit module. As such, the disclosure is not limited to any specific combination of hardware and software.

The above description is only a preferred embodiment of the present disclosure, and is not intended to limit the disclosure, and various changes and modifications may be made to the present disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and scope of the present disclosure are intended to be included within the scope of the present disclosure.

Industrial applicability

The time synchronization method provided by the embodiment of the present disclosure performs time synchronization of the network element based on a clock synchronization result determined by the network element by using a clock synchronization algorithm. Therefore, fast network construction can be implemented, and network topology change is reduced to generate time synchronization. The effect is to solve the problem that the time synchronization precision is not good and is susceptible to the network topology change, and the effect of improving time precision and stability is achieved.

Claims

A time synchronization method, including:

The time synchronization of the network element is performed based on a clock synchronization result determined by the network element by a clock synchronization algorithm.
The method of claim 1, wherein the clock synchronization result comprises: a port status of a designated port in the network element, wherein the port status comprises: a primary port status and a secondary port status.
The method of claim 2, wherein the port status of the designated port in the network element is determined by determining a port status of the designated port in the network element according to a tracking status of a system clock of the network element, where The tracking status includes accepting an external Ethernet clock and rejecting an external Ethernet clock.
The method according to any one of claims 1 to 3, wherein the time synchronization of the network element is performed based on a clock synchronization result determined by a network element by a clock synchronization algorithm, including:

Determining whether the local data set of the network element belongs to a preset priority clock level range;

If the determination result is negative, the following process is triggered: determining a first port status of the designated port in the network element according to a tracking state of the system clock of the network element; performing the network according to the first port status Time synchronization of yuan;

If the result of the determination is yes, compare the priority of the best port data set determined by the designated port of the network element with the local data set of the network element; and determine the second port of the designated port according to the comparison result. Status: performing time synchronization of the network element according to the second port status.
The method of claim 4, wherein determining the second port status of the designated port based on the comparison result comprises:

Determining, in a case where the comparison result indicates that the priority of the local data set is higher than the optimal port data set, determining a port status of the designated port as a primary port status; indicating, in the comparison result, the local In the case where the priority of the data set is lower than the optimal port data set, the port status of the designated port is determined to be a passive passive port status.
A time synchronization apparatus includes a processor and a memory storing the processor-executable instructions, when the instructions are executed by the processor, performing the following operations:

The time synchronization of the network element is performed based on a clock synchronization result determined by the network element by a clock synchronization algorithm.
A storage medium is provided to store a computer program, the computer program being executed by the processor to implement the following method steps: performing time synchronization of the network element based on a clock synchronization result determined by a network element through a clock synchronization algorithm.