WO2017121477A1

WO2017121477A1 - Phased antenna array device

Info

Publication number: WO2017121477A1
Application number: PCT/EP2016/050621
Authority: WO
Inventors: Vlad Lenive; Ulrik Imberg; Zargham BAGHCHEHSARAEI; Xiaohong Chen; Esa Myllyvainio; Xiang WEI
Original assignee: Huawei Technologies Co., Ltd.
Priority date: 2016-01-14
Filing date: 2016-01-14
Publication date: 2017-07-20
Also published as: CN108463923A

Abstract

The present invention provides a phased antenna array device (100) and its fabrication method (400). The device 100 comprises a first dielectric layer (D1), and at least one die (101) embedded into the first dielectric layer (D1). The die (101) is configured to output phase-shifted signals for driving antenna elements. The device (100) also comprises a second dielectric layer (D2), which is provided on the first dielectric layer (D1). Further, an interconnection structure (102) is formed in a first metal layer (M1), which is provided between the first dielectric layer (D1) and the second dielectric layer (D2). Additionally, a plurality of first antenna elements (103) formed in a second metal layer (M2) is provided on the surface of the second dielectric layer (D2). These first antenna elements (103) are connected via the interconnection structure (102) to the at least one die (101).

Description

PHASED ANTENNA ARRAY DEVICE

TECHNICAL FIELD The present invention relates to a phased antenna array device, and a fabrication method of such a device. In particular, the phased antenna array device is manufactured, preferably on a full reticle wafer, by employing a reconstituted wafer process or an embedded wafer level package process. BACKGROUND

Phased antenna arrays are one of the key concepts in RF engineering, and are used, for instance, for electronic beam- steering, sophisticated beam-forming techniques, and RF processing before a receiver. However, state of the art phased antenna array devices all suffer from two main drawbacks, which are complexity in assembly and costly manufacturing.

So far, the most developed technology for fabricating a phased antenna array device is a modular design approach. The modular approach allows reducing associated costs and providing controlled assembly techniques. However, the modular approach is used only for production of phased antenna array devices in small quantities, particularly for noncommercial applications like space and defence markets. The main idea of the modular approach is splitting the entire device design into multiple identical modules, which can be produced in larger quantities, and can then be respectively assembled together.

Technological development of integrated circuit (IC) manufacturing has opened the way for integrating phased antenna arrays in silicon devices. This approach works well only to some extent. The main issue of this approach arises from inherent physical limitations. The first physical limitation is that the size of a silicon die is typically restricted to a few square millimetres only, because for larger silicon dies, cost per die becomes prohibitive. However, the physical distance needed between individual elements of a phased antenna array is linked to the wavelength, which is to be transmitted and received by the array. Typically this distance is about half the used wavelength or less, and additionally depends on the scanning range. Therefore, this approach is not practical for traditional RF and microwave bands, since silicon dies are too small for the used wavelengths. The second physical limitation lies in the physical properties of silicon at high frequencies, at which excessive RF losses are the limiting factor to the noise figure of received signals, and to the dissipated power of transmitted signals. In summary, the above-described silicon- integrated phased antenna array devices have only limited practical applications, namely when a wavelength of only some mm is used.

In recent years, advances in IC packaging techniques became another technology vehicle for economically manufacturing phased antenna array devices. This approach uses one or more silicon dies that are integrated into a polymer-based package. Nowadays, reliable connections between pads on silicon dies and layout realized in layers of the package are possible. For example, reliable connections can be achieved by using BGA soldering.

The above-described conventional approaches, however, suffer all from a number of problems. In particular, the approaches based on IC technologies all face the not resolvable contradiction between array size and IC package dimensions. Further, also standard IC package sizes are in contradiction with array size limitations set by the low GHz frequency range. Moreover, it is still technologically problematic - and rather costly - to have more than one silicon die attached, for instance by 'flip-chip', to an IC package. Other problems of this conventional solutions include: The requirement for a separate technological step for placing and connecting IC dies to the package, limitations to only 2D structures for the antenna elements, lack of control over mode conversion effects, lack of control over boundary conditions inside the array stack (which lead to a limitation of the overall stack size), difficulties in controlling inter-element coupling of antenna elements, and difficulties in controlling coupling to an application board and/or external equipment.

SUMMARY In view of the above-mentioned problems and disadvantages, the present invention aims to improve the conventional phased antenna array devices, and their productions methods. The present invention has thereby the object to reduce manufacturing complexity and production costs of such devices. Device production should also be more reliable than for conventional phased antenna array devices. The present invention also aims at the possibility of using more than one silicon die integrated into a device. Another important goal of the present invention is to remove the above-mentioned size limitations of, for instance, standard IC packages. Moreover, the present invention intends to provide more efficient devices, particularly devices with less RF loss.

The object of the present invention is achieved by the solution provided in the enclosed independent claims. Advantageous implementations of the present invention are further defined in the dependent claims. In particular, embodiment of the present invention employ recent advances of IC packaging technologies, which offer new possibilities for addressing the problems of conventional phased antenna array devices. Preferably, embodiments of the present invention applies reconstituted wafer techniques of IC packaging for manufacturing phased antenna array devices. These techniques allow for a substantial reduction in manufacturing complexity and production costs.

A first aspect of the present invention provides a phased antenna array device, comprising a first dielectric layer, at least one die embedded into the first dielectric layer, the die being configured to output phase-shifted signals for driving antenna elements, a second dielectric layer provided on the first dielectric layer, an interconnection structure formed in a first metal layer provided between the first dielectric layer and the second dielectric layer, a plurality of first antenna elements formed in a second metal layer on the surface of the second dielectric layer, the first antenna elements being connected via the interconnection structure to the at least one die.

The phased antenna array device according to the first aspect does not require any standard IC packaging, but can, for instance be provided on a full reticle wafer. The device of the first aspect does therefore not suffer the above-mentioned size limitations of standard IC packaging.

The complete phased antenna array device is integrated, i.e. it is produced in one manufacturing process. This stands, for instance, in stark contrast to conventional devices, in which a die is flip-chip-bonded to an IC package that provides the antenna elements. For such a conventional device more than one manufacturing process is needed. Accordingly, the device of the first aspect can be manufactured with less complexity and thus also cheaper.

Further, with the phased antenna array device of the first aspect, multiple dies, for instance multiple silicon dies or multiple IC-chips, can be integrated into the first dielectric layer. Thereby, no flip-chip-bonding is needed. The integration of the at least on die into the dielectric layer further helps to reduce thermal stress on the dies during manufacturing, and accordingly improves device reliability and reduces cost per device. In a first implementation form of the device according to the first aspect, the phased antenna array device further comprises a third dielectric layer provided on the first dielectric layer opposite to the second dielectric layer, a fourth dielectric layer provided on the third dielectric layer, a second interconnection structure formed in a third metal layer provided between the third dielectric layer and the fourth dielectric layer, a plurality of second antenna elements formed in a fourth metal layer on the surface of the fourth dielectric layer, the second antenna elements being connected via the second interconnection structure to the at least one die.

The use of first (typically 'front' side) and second (typically 'back' side) antenna elements allow for an efficient usage of both sides of the device, which may be the two sides of a full reticle wafer. That is, antenna elements can be placed both on the front side and the back side of the device. This allows for creating 3D antenna arrays, which may be used to realize specific RF functions requiring such a 3D antenna configuration.

Examples of RF functions requiring 3D configuration are: low loss phase compensators used to equalize the length of feeding lines, mode suppression, and mode generation.

Additionally, less RF loss is expected in comparison with planar 2D structures, which are typically based on strip-lines or co-planar waveguides.

In a second implementation form of the device according to the first implementation form of the first aspect, the phased antenna array device further comprises at least one interposer embedded into the first dielectric layer, the interposer being configured to connect the at least one die to the second interconnection structure. Interposers can advantageously be used as building blocks of non-planar, i.e. 3D structures. Thereby, the limitations of conventional structures and devices using only 2D antenna arrays are eliminated. The at least one interposer is preferably based or implemented based on functional materials to realize the specific RF functions mentioned above. It is also possible to stack silicon dies with specialized interposers used for thermal management.

Interposers can also be combined with embedded wafer level package metal stacks for realizing, for instance, frequency selective structures, band gap structures and metamaterials, i.e. smart materials engineered to have specific properties, and made preferably from assemblies of multiple elements fashioned from composite materials.

In a third implementation form of the device according to the second implementation form of the first aspect, the phased antenna array device further comprises a third interconnection structure formed in a fifth metal layer provided between the first dielectric layer and the third dielectric layer, the third interconnection structure connecting the at least one interposer to the second interconnection structure.

The interconnection structure may be designed to function as the above-mentioned wafer level package metal stack for functionally combining with the at least one interposer.

In a fourth implementation form of the device according to any of the first to third implementation forms of the first aspect, the phased antenna array device further comprises, a metamaterial structure formed in the third metal layer, the metamaterial structure being designed to control boundary conditions at the surface of the fourth dielectric layer presented to the second antenna elements.

In a fifth implementation form of the device according to the fourth implementation form of the first aspect, the metamaterial structure comprises an array of separators.

Metamaterials are smart materials engineered to have specific tailored properties. An up- to-date definition of metamaterials and examples thereof are, for instance, described in 'Filippo Capolino, Theory and Phenomena of Metamaterials. Metamaterials Handbook, CRC Press, 2009' . With the design of the metamaterial structure, the boundary conditions presented to the antenna elements can advantageously be changed and controlled. Also inter-element coupling, for instance, between different antenna elements, can be controlled with such a structure. Thereby, the device of the present invention may function more efficiently and with less RF loss.

In a sixth implementation form of the device according to the first aspect as such or according to any of the previous implementation forms of the first aspect, the phased antenna array device further comprises at least one active or passive component embedded into the first dielectric layer, the component being connected to the at least one die and the antenna elements.

The at least one component integrated alongside the (active) die within the first dielectric layer can carry out specific functions for improving the efficiency of the device, for instance by amplifying signals within the device, preventing mode conversion of signals, maintaining integrity of propagations modes etc. Also RF loss of the device can be reduced.

In a seventh implementation form of the device according to the sixth implementation form of the first aspect, at least one component is a functional material, preferably a ceramic, ferrite or nano material.

Functional materials are designed to make use of their natural or engineered functionalities to respond to changes in electrical and magnetic fields, physical and chemical environment, etc. Examples of electronic and RF functional materials are ferrite, composite absorbers, high frequency dielectrics, and magneto-dielectrics, nano- ceramic materials. With such functional materials embedded into the device of the present invention, for instance, electrical and/or thermo-mechanical properties of the device can be achieved. In combination with active dies, wafer-integrated high-quality devices become possible.

In an eighth implementation form of the device according to the sixth or seventh implementation form of the first aspect, at least one component is configured to correct a phase of the phase-shifted signals, and/or to prevent a mode conversion of the phase- shifted signals. Thus, the additional component serves to maintain the integrity of propagation modes of the signals exchanged within the device. Thus, transmission loss can be reduced.

In a ninth implementation form of the device according to any of the sixth to eighth implementation forms of the first aspect, at least one component is configured to support propagation mode transformations of the phase shifted-signals and/or to create left handed propagation properties for the phase shifted-signals.

For instance, the at least one component can be an integrated metamaterial maintaining the left-handedness. Thereby, specific signaling properties and less signal loss can be achieved.

In a tenth implementation form of the device according to the first aspect as such or according to any of the previous implementation forms of the first aspect, the phased antenna array device further comprises at least one further layer configured to isolate antenna elements from each other at radio frequencies, or to isolate the device from an external application board or electronic equipment.

For instance, additional metal layers may be used to provide the isolation between the array and the application board. This improves the efficiency of the device, and lowers its RF loss.

In an eleventh implementation form of the device according to the first aspect as such or according to any of the previous implementation forms of the first aspect, the phased antenna array device further comprises at least one field effect transistor configured to amplify signals transmitted at radio frequency within the device.

Due to the amplified internal signals, the efficiency of the device as a whole can be increased.

In a twelfth implementation form of the device according to the first aspect as such or according to any of the previous implementation forms of the first aspect, the phased antenna array device is obtained by a reconstituted wafer process or an embedded wafer level package process. By applying these techniques, the device can be produced in an integrated manner. That is in a single process. Accordingly, manufacturing complexity is significantly reduced, and production costs are reduced. In a thirteenth implementation form of the device according to the first aspect as such or according to any of the previous implementation forms of the first aspect, the phased antenna array device is provided on a full reticle wafer.

Providing the device on a full wafer, for instance 300 mm or 400 mm, removes the size limitations for RF frequencies, which are for instance disadvantageously presented by silicon dies or of standard IC packages for building phased antenna array devices.

A second aspect of the present invention provides a method of fabricating a phased antenna array device, the fabrication method comprising the steps of: providing a first dielectric layer, wherein at least one die is embedded into the first dielectric layer, the die being configured to output phase- shifted signals for driving antenna elements, providing a first metal layer on the first dielectric layer, forming an interconnection structure in the first metal layer, providing a second dielectric layer on the first dielectric layer and the first metal layer, providing a second metal layer on the surface of the second dielectric layer, and forming at least two first antenna elements in the second metal layer, wherein the first antenna elements are connected via the interconnection structure to the at least one die.

In a first implementation form of the method according to the second aspect, the method further comprises the steps of: providing a third dielectric layer on the first dielectric layer opposite to the second dielectric layer, providing a fourth dielectric layer on the third dielectric layer, forming a second interconnection structure in a third metal layer provided between the third dielectric layer and the fourth dielectric layer, forming a plurality of second antenna elements in a fourth metal layer on the surface of the fourth dielectric layer, wherein the second antenna elements are connected via the second interconnection structure to the at least one die.

In a second implementation form of the method according to the first implementation form of the second aspect, the method further comprises embedding at least one interposer into the first dielectric layer, wherein the interposer connects the at least one die to the second interconnection structure.

In a third implementation form of the method according to the second implementation form of the second aspect, the method further comprises the steps of: forming a third interconnection structure in a fifth metal layer provided between the first dielectric layer and the third dielectric layer, wherein the third interconnection structure connects the at least one interposer to the second interconnection structure. In a fourth implementation form of the method according to any of the first to third implementation forms of the second aspect, the method further comprises the steps of: forming a metamaterial structure in the third metal layer, wherein the metamaterial structure controls boundary conditions at the surface of the fourth dielectric layer presented to the second antenna elements.

In a fifth implementation form of the method according to the fourth implementation form of the second aspect, the metamaterial structure comprises an array of separators.

In a sixth implementation form of the method according to the second aspect as such or according to any of the previous implementation forms of the second aspect, the method further comprises the steps of: embedding at least one active or passive component into the first dielectric layer, wherein the component is connected to the at least one die and the antenna elements. In a seventh implementation form of the method according to the sixth implementation form of the second aspect, at least one component is a functional material, preferably a ceramic, ferrite or nano material.

In an eighth implementation form of the method according to the sixth or seventh implementation form of the second aspect, at least one component is configured to correct a phase of the phase-shifted signals, and/or to prevent a mode conversion of the phase-shifted signals. In a ninth implementation form of the method according to any of the sixth to eighth implementation forms of the second aspect, at least one component is configured to support propagation mode transformations of the phase shifted- signals and/or to create left handed propagation properties for the phase shifted- signals.

In a tenth implementation form of the method according to the second aspect as such or according to any of the previous implementation forms of the second aspect, the method further comprises the step of: providing at least one further layer to isolate antenna elements from each other at radio frequencies, or to isolate the phased antenna array device from an external application board or electronic equipment.

In an eleventh implementation form of the method according to the second aspect as such or according to any of the previous implementation forms of the second aspect, the method further comprises the step of: providing at least one field effect transistor configured to amplify signals transmitted at radio frequency within the phased antenna array device.

In a twelfth implementation form of the method according to the second aspect as such or according to any of the previous implementation forms of the second aspect, the method obtains the phased antenna array device by using a reconstituted wafer process or an embedded wafer level package process.

In a thirteenth implementation form of the method according to the second aspect as such or according to any of the previous implementation forms of the second aspect, the method provides the phased antenna array device on a full reticle wafer.

The production method according to the second aspect produces a phased antenna array device with all the advantages described above. Thus, the fabrication method allows reducing manufacturing complexity and production costs.

It has to be noted that all devices, elements, units and means described in the present application could be implemented in the software or hardware elements or any kind of combination thereof. All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be full formed by eternal entities is not reflected in the description of a specific detailed element of that entity which performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements, or any kind of combination thereof.

BRIEF DESCRIPTION OF THE DRAWINGS

The above described aspects and implementation forms of the present invention will be explained in the following description of specific embodiments in relation to the enclosed drawings, in which: Fig. 1 shows a phased antenna array device according to an embodiment of the present invention.

Fig. 2 shows a phased antenna array device according to a further embodiment of the present invention.

Fig. 3 shows a phased antenna array device according to a further embodiment of the present invention.

Fig. 4 shows a fabrication method of a phased antenna array device according to a furhter embodiment of the present invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Fig. 1 shows a phased antenna array device 100 according to an embodiment of the present invention. The phased antenna array device 100 comprises a first dielectric layer Dl. At least one die 101 (e.g. a silicon die or chip 101) is embedded into the first dielectric layer Dl. The at least one die 101 integrated into the dielectric layer Dl is at least configured to output phase-shifted signals for driving two or more antenna elements. Preferably, the at least one die 101 is a silicon die, which implements Rx and/or Tx modules into the device 100, and which act as commutative switches to feed antenna elements.

The phased antenna array device 100 comprises also a second dielectric layer D2, which is provided on the first dielectric layer Dl, i.e. on a surface thereof. Advantageously, all dielectric layers in devices 100 according to embodiments of the present invention may be made by employing Wafer Level Chip Scale Package (WLCSP) technology, or Re- Distribution Layer (RDL) technology, with efficient use of PBO-based dielectric compounds (e.g. Polybenzoxazoles wafer films), polyimides, or lowered stress epoxies and silicones. Between the two dielectric layers Dl and D2, a first metal layer Ml is provided. In this metal layer Ml, an interconnection structure 102 is formed. The interconnection structure 102 is preferably patterned, for instance, by using lithographic techniques, into the first metal layer Ml. Advantageously, all metal layers in devices 100 according to embodiments of the present invention may be made of electroless copper platings with via openings through platings prior to the first metal layer Ml, as well as to each subsequent metal layer.

Further, in the phased antenna array device 100, a plurality of first antenna elements 103 are formed in a second metal layer M2, which is provided on the surface of the second dielectric layer D2. The first antenna elements 103 are preferably patterned, for instance, by using lithographic techniques, into the second metal layer M2. The first antenna elements 103 are connected via the interconnection structure to the at least one die 101. The at least one die 101 can thus provide the phase- shifted signals to the first antenna elements 103, in order to drive the device 100 as a phase shifted antenna array.

Fig. 2 shows a phased antenna array device 200 according to a further embodiment of the present invention. The embodiment shown in Fig. 2 bases on the embodiment described above with reference to Fig. 1. The phased antenna array device 200 shown in Fig. 2 comprises, in addition to the elements of the embodiment of Fig.l, a third dielectric layer D3, which is provided on the first dielectric layer Dl and opposite to the second dielectric layer D2. That is, the third dielectric layer D3 and the second dielectric layer D2 are provided on opposite surfaces of the first dielectric layer Dl . Preferably, as shown in Fig. 2, the second dielectric layer D2 faces a front side of the at least one die 101 within the first dielectric layer Dl, while the third dielectric layer D3 faces the back side of said die 101.

Further, a fourth dielectric layer D4 is provided on the third dielectric layer D3, i.e. on a surface thereof. Between the third and fourth dielectric layers D3 and D4 is provided a third metal layer M4, in which a second interconnection structure 202 is formed. The second interconnection structure 202 is preferably patterned, for instance, by using lithographic techniques, into the third metal layer M4. The device 200 includes a plurality of second antenna elements 203, which are formed in a fourth metal layer M5 on the surface of the fourth dielectric layer D4. The second antenna elements 203 are preferably patterned, for instance, by using lithographic techniques, into the fourth metal layer M5. The second antenna elements 203 are connected via the second interconnection structure 202 to the at least one die 101.

The phased antenna array device 200 also comprises at least one interposer 201, which is embedded into the first dielectric layer Dl . The at least one interposer 201 integrated into the first dielectric layer Dl connects the at least one die 101 to the second interconnection structure 202, and thus also to the second antenna elements 203. That is, the at least one interposer 201 is a component used for providing a vertical connectivity between the dielectric layers D1/D2 and D3/D4, respectively. The at least one interposer 201 can also carry out RF functions like filtering, mode suppression, mode generation etc. The second antenna elements 203 realized at metal layer M5 are fed through the at least one interposer 201.

Preferably, in the device 200, as shown in Fig. 2 a fifth metal layer M3 is provided between the first dielectric layer Dl and the third dielectric layer D3. In this fifth metal layer M3, a third interconnection structure 204 is formed. The third interconnection structure 204 is preferably patterned, for instance, by using lithographic techniques, into the fifth metal layer M3. The third interconnection structure 204 connects the at least one interposer 201 to the second interconnection structure 202, and thus to the second antenna elements 203. In the first specific embodiment, apart from the at least one die 101 and preferably the at least one interposer 201, there are other inclusions integrated in the first dielectric layer Dl. Namely, at least one active or passive component 205 is embedded into the first dielectric layer Dl. The component 205 is at least connected to the at least one die 101 and to the first and/or second antenna elements 103, 203, respectively.

The at least one component 205 may constitute singulated functional material (e.g. ceramic, ferrite, nano-material), a pre-manufactured passive module, a balun, an LTCC wafer, a MEMS etc. Advantageously, the at least one component 205 may be configured to correct a phase of the phase-shifted signals, and/or to prevent a mode conversion of the phase-shifted signals. Further advantageously, the at least one component 205 may be configured to support propagation mode transformations of the phase shifted-signals and/or to create left handed propagation properties for the phase shifted-signals. Fig. 3 shows a phased antenna array device 300 according to a further embodiment of the present invention. The further embodiment in Fig. 3 bases on the two embodiments described with reference to Figs. 1 and 2, respectively.

In the phased antenna array device 300, a metamaterial structure 301 is formed, i.e. is preferably patterned e.g. by lithographic techniques, in the third metal layer M4. That is, the third metal layer M4 is used to realize the metamaterial structure 301. The metamaterial structure 301 is designed, in order to control boundary conditions at the surface of the fourth dielectric layer D4 presented to the second antenna elements 203. Specifically, in Fig. 3 a cross section of the wafer-level phased antenna array device 300 with metamaterial separators is shown. The presence of the metamaterial separator removes wavelength-related limitations to the overall cross section of the device stack.

Fig. 4 shows a basic embodiment of a method according to the present invention, particularly a method 400 of fabricating a phased antenna array device 100 as shown in Fig. 1. The fabrication method 400 comprises a first step 401 of providing a first dielectric layer Dl, wherein at least one die 101 is embedded into the first dielectric layer Dl. The at least one die 101 is at least configured to output phase-shifted signals for driving antenna elements. In a second step 402, a first metal layer Ml is provided on the first dielectric layer Dl. In a third step 403, an interconnection structure 102 is provided in the first metal layer Ml . In a fourth step 404, a second dielectric layer D2 is provided on the first dielectric layer Dl and the first metal layer Ml, respectively. In a fifth step 405, a second metal layer M2 is provided on the surface of the second dielectric layer D2, and in a sixth step 406, at least two first antenna elements 103 are formed in the second metal layer M2. Thereby, the first antenna elements 103 are connected via the interconnection structure 102 to the at least one die 101.

In summary, the present invention provides a novel phased antenna array device and accordingly a new fabrication method 400. With the device and the method 400, a substantial reduction in manufacturing complexity and in production cost is achieved, particularly, when the present invention also applies reconstituted wafer techniques of IC packaging for manufacturing the phased antenna array device. The reason is, that with wafer sizes currently being at 300 mm, and being planned to increase even to 400 mm in the next few years, the technique allows integrating phased antenna array devices without the conventional limitations of standard IC package sizes. At the same time, it is also possible to benefit from advanced design rules of embedded wafer level packaging technology.

The present invention has been described in conjunction with various embodiments as examples as well as implementations. However, other variations can be understood and effected by those persons skilled in the art and practicing the claimed invention, from the studies of the drawings, this disclosure and the independent claims. In the claims as well as in the description the word "comprising" does not exclude other elements or steps and the indefinite article "a" or "an" does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in the mutual different dependent claims does not indicate that a combination of these measures cannot be used in an advantageous implementation.

Claims

1. Phased antenna array device (100), comprising: a first dielectric layer (Dl), at least one die (101) embedded into the first dielectric layer (Dl), the die (101) being configured to output phase-shifted signals for driving antenna elements, a second dielectric layer (D2) provided on the first dielectric layer (Dl), an interconnection structure (102) formed in a first metal layer (Ml) provided between the first dielectric layer (Dl) and the second dielectric layer (D2), a plurality of first antenna elements (103) formed in a second metal layer (M2) on the surface of the second dielectric layer (D2), the first antenna elements (103) being connected via the interconnection structure (102) to the at least one die (101).

2. Phased antenna array device (100) according to claim 1, further comprising: a third dielectric layer (D3) provided on the first dielectric layer (Dl) opposite to the second dielectric layer (D2), a fourth dielectric layer (D4) provided on the third dielectric layer (D3), a second interconnection structure (202) formed in a third metal layer (M4) provided between the third dielectric layer (D3) and the fourth dielectric layer (D4), a plurality of second antenna elements (203) formed in a fourth metal layer (M5) on the surface of the fourth dielectric layer (D4), the second antenna elements (203) being connected via the second interconnection structure (202) to the at least one die (101).

3. Phased antenna array device (100) according to claim 2, further comprising: at least one interposer (201) embedded into the first dielectric layer (Dl), the interposer (201) being configured to connect the at least one die (101) to the second interconnection structure (202).

4. Phased antenna array device (100) according to claim 3, further comprising: a third interconnection structure (204) formed in a fifth metal layer (M3) provided between the first dielectric layer (Dl) and the third dielectric layer (D3), the third interconnection structure (204) connecting the at least one interposer (201) to the second interconnection structure (202).

5. Phased antenna array device (100) according to one of the claims 2 to 4, further comprising: a metamaterial structure (301) formed in the third metal layer (M4), the metamaterial structure (301) being designed to control boundary conditions at the surface of the fourth dielectric layer (D4) presented to the second antenna elements (203).

6. Phased antenna array device (100) according to claim 5, wherein the metamaterial structure (301) comprises an array of separators.

7. Phased antenna array device (100) according to one of the claims 1 to 6, further comprising: at least one active or passive component (205) embedded into the first dielectric layer (Dl), the component (205) being connected to the at least one die and the antenna elements (103, 203).

8. Phased antenna array device (100) according to claim 7, wherein the at least one component (205) is a functional material, preferably a ceramic, ferrite or nano material.

9. Phased antenna array device (100) according to claim 7 or 8, wherein the at least one component (205) is configured to correct a phase of the ph; shifted signals, and/or to prevent a mode conversion of the phase-shifted signals.

Phased antenna array device (100) according to one of the claims 7 to 9, wherein the at least one component (205) is configured to support propagation mode transformations of the phase shifted- signals and/or to create left handed propagation properties for the phase shifted-signals.

11. Phased antenna array device (100) according to one of the claims 1 to 10, further comprising: at least one further layer configured to isolate antenna elements (103, 203) from each other at radio frequencies, or to isolate the device (100) from an external application board or electronic equipment.

12. Phased antenna array device (100) according to one of the claims 1 to 11, further comprising: at least one field effect transistor configured to amplify signals transmitted at radio frequency within the device (100).

13. Phased antenna array device (100) according to one of the claims 1 to 12 obtained by a reconstituted wafer process or an embedded wafer level package process.

14. Phased antenna array device (100) according to one of the claims 1 to 13, the device (100) being provided on a full reticle wafer.

15. Method (400) of fabricating a phased antenna array device (100), the fabrication method comprising the steps of providing (401) a first dielectric layer (Dl), wherein at least one die (101) is embedded into the first dielectric layer (Dl), the die (101) being configured to output phase- shifted signals for driving antenna elements, providing (402) a first metal layer (Ml) on the first dielectric layer (Dl), forming (403) an interconnection structure (102) in the first metal layer (Ml), providing (404) a second dielectric layer (D2) on the first dielectric layer (Dl) and the first metal layer (Ml), providing (405) a second metal layer (M2) on the surface of the second dielectric layer (D2), and forming (406) at least two first antenna elements (103) in the second metal layer (M2), wherein the first antenna elements (103) are connected via the interconnection structure (102) to the at least one die (101).