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WO2017113299A1 - 一种背电极异质结太阳能电池及其制备方法 - Google Patents

一种背电极异质结太阳能电池及其制备方法 Download PDF

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WO2017113299A1
WO2017113299A1 PCT/CN2015/100133 CN2015100133W WO2017113299A1 WO 2017113299 A1 WO2017113299 A1 WO 2017113299A1 CN 2015100133 W CN2015100133 W CN 2015100133W WO 2017113299 A1 WO2017113299 A1 WO 2017113299A1
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amorphous silicon
film layer
type amorphous
silicon film
deposition source
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PCT/CN2015/100133
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English (en)
French (fr)
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薛黎明
杨武保
陆钧
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中海阳能源集团股份有限公司
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Priority to PCT/CN2015/100133 priority Critical patent/WO2017113299A1/zh
Priority to CN201580085420.7A priority patent/CN108521832A/zh
Publication of WO2017113299A1 publication Critical patent/WO2017113299A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the invention belongs to the field of new energy, and particularly relates to a back electrode heterojunction solar cell and a preparation method thereof.
  • Crystal silicon battery is the current mainstream product.
  • a variety of new solar cells based on crystalline silicon cells have been developed.
  • heterojunction cells and back electrode cells are among the most efficient and most photovoltaic.
  • the positive and negative electrodes are located on the front and back sides of the crystalline silicon substrate, that is, the front gate line and the back gate line need to be prepared.
  • the process is relatively simple, the process accuracy is high, otherwise the product yield is good. It will be greatly reduced; when using a conventional amorphous silicon solar cell process to prepare a heterojunction cell, precise and strict masking means and cleaning control are required; the gate line processing in the heterojunction cell requires the use of professional low-temperature silver paste. It has become the main factor restricting the development of heterojunction cells; finally, the use of front gate lines inevitably reduces photovoltaic efficiency.
  • the simple back electrode battery can be used to prepare the back electrode with the positive and negative electrodes on the back side of the crystalline silicon substrate by diffusion, the manufacturing process is particularly complicated, and the process precision is particularly high, which makes the development of the electrode severely constrained; On the other hand, there are serious pollution discharge problems in the process, and there are few companies that can produce back electrode batteries.
  • the present invention aims to provide a high-efficiency solar cell in which a back electrode heterojunction is integrated and a preparation method thereof.
  • the present invention provides a back electrode heterojunction solar cell comprising: a crystalline silicon substrate, a heterojunction portion and a back electrode portion, the front surface of the crystalline silicon substrate is formed with a light trapping layer, and the light trapping layer An anti-reflection film is deposited on the back of the crystalline silicon substrate, and the heterojunction portion includes an intrinsic amorphous silicon film layer, a P-type amorphous silicon film layer and an N-type amorphous silicon film layer.
  • the amorphous silicon film layer is deposited on the back surface of the crystalline silicon substrate, and the P-type amorphous silicon film layer and the N-type amorphous silicon film layer are deposited on the intrinsic amorphous silicon film layer, and the P-type amorphous silicon film layer and the N A conductive film is deposited on the amorphous silicon film layer, and a back electrode portion is deposited on the conductive film.
  • a back electrode heterojunction solar cell wherein the crystalline silicon substrate is a P-type crystalline silicon substrate, an N-type crystalline silicon substrate or an intrinsic crystalline silicon substrate.
  • the P-type amorphous silicon film layer comprises a P-type amorphous silicon film line and a P-type amorphous silicon collector film line
  • the N-type amorphous silicon film layer comprises N Type amorphous silicon film line and N type amorphous silicon collector film line, P type amorphous silicon collector film line and N type amorphous silicon collector film line respectively and P type amorphous silicon film line and N type amorphous The silicon film line is vertically connected.
  • the P-type amorphous silicon film line or the N-type amorphous silicon film line is pre-designed on the intrinsic amorphous silicon film layer by using a point deposition source or a linear deposition source.
  • the geometric deposition scans form the same film line pattern.
  • the film line pattern comprises a linear type or a curved type
  • the film line pattern is unequal in width
  • the P-type amorphous silicon collector film line and the N-type amorphous silicon collector film line are respectively distributed on both sides of the intrinsic amorphous silicon film layer on the crystalline silicon substrate
  • a first electrode lead region and a second electrode lead region are formed on the conductive film on the P-type amorphous silicon film layer and the N-type amorphous silicon film layer, respectively.
  • a back electrode heterojunction solar cell wherein the back electrode portion comprises a positive electrode lead and a negative electrode lead, wherein the positive electrode lead is located at the first electrode lead region and the negative electrode lead is located at the second electrode lead region, or The electrode lead is located in the second electrode lead region and the negative electrode lead is located in the first electrode lead region.
  • the invention provides a preparation method of a back electrode heterojunction solar cell, comprising the following steps:
  • Step one performing a texturing process on the front side of the crystalline silicon substrate by using an etching technique to prepare a light trapping layer;
  • Step 2 depositing an antireflection film on the light trap layer by PVD, CVD or surface oxidation treatment;
  • Step 3 on the back side of the crystalline silicon substrate, first depositing an intrinsic amorphous silicon film layer by PECVD;
  • Step 4 depositing a P-type amorphous silicon film layer and the N-type amorphous silicon film layer respectively on the intrinsic amorphous silicon film layer by using a point deposition source or a linear deposition source according to a pre-designed geometric pattern, wherein a P-type amorphous silicon film layer and an N-type amorphous silicon film layer are deposited on the intrinsic amorphous silicon film layer, such that the intrinsic amorphous silicon film layer, the P-type amorphous silicon film layer, and the N-type amorphous silicon The film layer forms a heterojunction portion;
  • Step 5 depositing a conductive film on the P-type amorphous silicon film layer and the N-type amorphous silicon film layer respectively by using a point deposition source or a linear deposition source;
  • Step 6 depositing a back electrode portion on the conductive film of the P-type amorphous silicon film layer and the N-type amorphous silicon film layer.
  • the spot deposition source is deposited on the surface of the intrinsic amorphous silicon film layer, the P-type amorphous silicon film layer or the N-type amorphous silicon film layer A desired film line pattern with linear features.
  • the spot deposition source is formed by using an electron beam, an ion beam, a laser beam or a micro heat source, and then the reaction material is evaporated by a linear scanning method.
  • the linear deposition source realizes a desired single linear thin film pattern by a fixed crystalline silicon substrate under a fixed condition, and the linear deposition source passes the moving crystal under a fixed condition.
  • the silicon substrate achieves the desired multi-linear film pattern.
  • the linear deposition source is formed by using an electron beam, an ion beam, a plasma beam or a fine heat source, and then, the reaction is performed while the linear deposition source is fixed.
  • the process conditions for forming a point deposition source film layer and a linear deposition source to form a linear deposition source film layer include a point deposition source or a linear deposition source.
  • the working pressure range is 0.1Pa-10kPa
  • the output energy density ranges from 1mW/cm 2 -1W/mm 2
  • the particle energy range is 100k-10 4 k
  • the particle composition is required for film deposition including Si, N, a matching particle of B, H and Ar, the distance between the point deposition source and the crystalline silicon substrate is not more than 1 m;
  • the working gas comprises hydrogen, silane and argon, and the flow ratio of hydrogen, silane and argon is: 100: (1-20): (0-100), the working pressure of the working gas is 0.1 Pa-10 kPa.
  • the working gas includes hydrogen gas. , silane, argon and doping gas, the doping gas comprises borane and / or phosphine, wherein the flow ratio of hydrogen, silane and argon is: 100: (1-20): (0-100), doped
  • the flow ratio of the heterogas to the silane is (0.1-10):100, and the working pressure of the working gas is 0.1 Pa-10 kPa.
  • the invention discloses a back electrode heterojunction solar cell and a preparation method thereof, and the back electrode heterojunction is integrated to have a back electrode with positive and negative electrodes on the back side of the crystalline silicon substrate, and has a heterojunction.
  • the preparation of the back electrode is realized by the method of coating and printing, so that on the one hand, the process of manufacturing the heterojunction cell is simple, the disadvantage of the conventional heterojunction cell having the front gate line is overcome; on the other hand, the back electrode is maintained.
  • the battery has no advantage of the front gate line, and overcomes the disadvantages of the complicated manufacturing process of the conventional back electrode battery.
  • FIG. 1 is a cross-sectional view of a back electrode heterojunction solar cell disclosed in the present invention
  • FIG. 2 is a schematic view showing a film line pattern of a P-type amorphous silicon film line and an N-type amorphous silicon film line on an intrinsic amorphous silicon film layer of a back electrode heterojunction solar cell according to the present invention
  • FIG. 3 is a schematic diagram of a film line pattern of a P-type amorphous silicon film line and an N-type amorphous silicon film line on another intrinsic amorphous silicon film layer of a back electrode heterojunction solar cell according to the present invention
  • FIG. 4 is a schematic diagram of a film line pattern of a P-type amorphous silicon film line and an N-type amorphous silicon film line on another intrinsic amorphous silicon film layer of a back electrode heterojunction solar cell according to the present invention.
  • FIG. 1 is a cross-sectional view of a back electrode heterojunction solar cell disclosed in the present invention.
  • the present invention provides a back electrode heterojunction solar cell including: crystalline silicon. a substrate 01, a heterojunction portion 02 and a back electrode portion (not shown), a front surface of the crystalline silicon substrate 01 is formed with a light trapping layer 03, and an antireflection film 04 is deposited on the light trapping layer 03, a heterojunction
  • the portion 02 is located on the back of the crystalline silicon substrate 01, and the heterojunction portion 02 includes an intrinsic amorphous silicon film layer 05, a P-type amorphous silicon film layer 06, and an N-type amorphous silicon film layer 07, an intrinsic amorphous silicon film.
  • the layer 05 is deposited on the back surface of the crystalline silicon substrate 01, and the P-type amorphous silicon film layer 06 and the N-type amorphous silicon film layer 07 are intermittently deposited on the intrinsic amorphous silicon film layer 05, and the P-type amorphous silicon film layer 06
  • a conductive film 08 is deposited on the N-type amorphous silicon film layer 07, and a back electrode portion is deposited on the conductive film 08.
  • the invention further discloses a back electrode heterojunction solar cell, wherein the crystalline silicon substrate 01 is a P-type crystalline silicon substrate, an N-type crystalline silicon substrate or an intrinsic crystalline silicon substrate, when the crystalline silicon substrate
  • the heterojunction portion 02 may not include the intrinsic amorphous silicon film layer 05, that is, the P-type amorphous silicon film layer 06 and the N-type amorphous silicon film layer 07 may be directly
  • the spacer is deposited on an intrinsic crystalline silicon substrate.
  • FIG. 2, 3 and 4 are respectively a P-type amorphous silicon film line and an N-type amorphous silicon film line on three intrinsic amorphous silicon film layers of a back electrode heterojunction solar cell disclosed in the present invention.
  • the P-type amorphous silicon film layer 06 comprises a P-type amorphous silicon film line 09 and P
  • the amorphous silicon collector film line 10 and the N-type amorphous silicon film layer 07 include an N-type amorphous silicon film line 11 and an N-type amorphous silicon collector film line 12, and a P-type amorphous silicon collector film line 10
  • the N-type amorphous silicon collector film line 12 is vertically connected to the P-type amorphous silicon film line 09 and the N-type amorphous silicon film line 11, respectively.
  • the P-type amorphous silicon film line 09 or the N-type amorphous silicon film line 11 utilizes a point deposition source Or a linear deposition source is formed on the intrinsic amorphous silicon film layer 05 by a pre-designed geometric pattern to form the same film line pattern.
  • the film line pattern includes a straight line or a curved line, and the width of the film line pattern may be equal.
  • the linear film line pattern widths may not be equal, for example, may be triangles, and the linear film line pattern widths may not be equal, for example, as shown in FIG.
  • the film line pattern when the width of the film line pattern is not equal, the closer the film line pattern is to the collector film line, the larger the width, such a design is advantageous for obtaining maximum photovoltaic efficiency.
  • the intrinsic amorphous silicon The first electrode lead region and the second electrode lead region (not shown) are formed on both sides of the film layer 05 on the conductive film 08 on the P-type amorphous silicon film layer 06 and the N-type amorphous silicon film layer 07, respectively. .
  • a back electrode heterojunction solar cell wherein the back electrode portion comprises a positive electrode lead and a negative electrode lead, wherein the positive electrode lead is located at the first electrode lead region and the negative electrode lead is located at the second electrode lead region, or The electrode lead is located in the second electrode lead region and the negative electrode lead is located in the first electrode lead region (not shown).
  • the invention provides a preparation method of a back electrode heterojunction solar cell, comprising the following steps:
  • Step 1 the surface of the crystalline silicon substrate 01 is subjected to a texturing process using an etching technique to prepare a light trapping layer 03;
  • Step 2 depositing an anti-reflection film 04 on the light trap layer 03 by PVD, CVD or surface oxidation treatment;
  • Step 3 on the back side of the crystalline silicon substrate 01, first depositing an intrinsic amorphous silicon film layer 05 by PECVD;
  • Step 4 depositing a P-type amorphous silicon film layer 06 and the N-type amorphous silicon film layer on the intrinsic amorphous silicon film layer 05 by using a point deposition source or a linear deposition source according to a pre-designed geometry. 07, wherein a P-type amorphous silicon film layer 06 and an N-type amorphous silicon film layer 07 are intermittently deposited on the intrinsic amorphous silicon film layer 05, such that the intrinsic amorphous silicon film layer 05, the P-type amorphous silicon film Layer 06 and N-type amorphous silicon film layer 07 form a heterojunction portion 05;
  • Step 5 depositing a conductive film 08 on the P-type amorphous silicon film layer 06 and the N-type amorphous silicon film layer 07 by using a point deposition source or a linear deposition source;
  • Step 6 depositing a back electrode portion on the conductive film 08 of the P-type amorphous silicon film layer 06 and the N-type amorphous silicon film layer 07.
  • the spot deposition source is deposited on the surface of the intrinsic amorphous silicon film layer 05, the P-type amorphous silicon film layer 06 or the N-type amorphous silicon film layer 07 A desired film line pattern with linear features.
  • the spot deposition source is formed by using an electron beam, an ion beam, a laser beam or a fine heat source, and then the reaction gas generated by evaporating the reaction material by linear scanning is used.
  • the reaction gas is directly ionized and the film material is deposited to a corresponding position to form a dot-like deposition source film layer having a width ranging from micrometer to millimeter.
  • the linear deposition source realizes the desired single linear film pattern by fixing the crystalline silicon substrate 01 under fixed conditions, and linear The deposition source achieves the desired multi-linear film pattern by moving the crystalline silicon substrate 01 under fixed conditions.
  • the linear deposition source is formed by using an electron beam, an ion beam, a plasma beam or a micro heat source, and then, after the linear deposition source is fixed, the reaction material is evaporated.
  • the process conditions for forming a point deposition source film layer and a linear deposition source to form a linear deposition source film layer include a working pressure of a point deposition source or a linear deposition source. , the output energy density, the ion energy, the ion composition, and the distance between the point deposition source and the crystalline silicon substrate 01;
  • the working pressure range is 0.1Pa-10kPa
  • the output energy density ranges from 1mW/cm 2 -1W/mm 2
  • the particle energy range is 100k-10 4 k
  • the particle composition is required for film deposition including Si, N, a matching particle of B, H and Ar
  • the distance between the spot deposition source and the crystalline silicon substrate 01 is not more than 1 m;
  • the working gas in the process of depositing the intrinsic amorphous silicon film layer 05, includes hydrogen, silane and argon, hydrogen, silane and argon.
  • the gas flow ratio is: 100: (1-20): (0-100), and the working gas has a working pressure of 0.1 Pa-10 kPa.
  • the working gas includes hydrogen gas, Silane, argon and doping gas
  • the doping gas comprises borane and/or phosphine, wherein the flow ratio of hydrogen, silane and argon is: 100: (1-20): (0-100), doping
  • the flow ratio of gas to silane is (0.1-10):100, and the working pressure of the working gas is 0.1 Pa-10 kPa.
  • Embodiment 1 is a diagrammatic representation of Embodiment 1:
  • the N-type crystalline silicon substrate is subjected to a velvet treatment to obtain a light-trapping layer, and on the surface of the velvet-treated surface, an anti-reflection film is deposited by a vacuum coating technique.
  • the antireflection film may be MgF 2 , SiO 2 or SiC.
  • the intrinsic amorphous silicon film layer is deposited by PECVD on the back surface of the crystalline silicon substrate.
  • a P-type amorphous silicon film line was obtained by linear scanning deposition using an electron gun with a focused spot of 1000 ⁇ m on the surface on which the intrinsic amorphous silicon film layer was deposited.
  • the pitch between the P-type amorphous silicon film lines was 1060 ⁇ m, and the line head of the P-type amorphous silicon film line was 3.2 mm from the edge of the crystalline silicon substrate.
  • a P-type amorphous silicon collector film line thicker than the P-type amorphous silicon film is deposited.
  • the P-type amorphous silicon collector film line is in communication with the front P-type amorphous silicon film line to form a P-type amorphous silicon film layer.
  • the N-type amorphous silicon film line is deposited by the same method, wherein the distance between the N-type amorphous silicon film line and the P-type amorphous silicon film line is 30 micrometers, and the N-type amorphous silicon collector film line is located relative to the P-type
  • the other side of the crystalline silicon substrate of the amorphous silicon collector film line is in communication with all of the N-type amorphous silicon film lines to form a linear N-type amorphous silicon film layer.
  • the electron beam source is also used to deposit the conductive film because the previous N-type amorphous silicon collector film line is located relative to the P-type amorphous silicon collector electrode.
  • the first electrode lead region and the second electrode lead region are respectively formed on the conductive film of the P-type amorphous silicon collector film line and the N-type amorphous silicon collector film line.
  • a positive electrode lead and a negative electrode lead are respectively deposited in the above two electrode lead regions to form a back electrode portion, and thus the back electrode heterojunction solar cell of the present invention is obtained.
  • the material of the conductive film may be Ag.
  • the conductive film may be directly used as a positive electrode lead and a negative electrode lead of the back electrode portion, and when the conductive film is present, the internal resistance of the battery may be reduced, which is advantageous for improvement. Photovoltaic performance.

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Abstract

一种背电极异质结太阳能电池及其制备方法，其中背电极异质结太阳能电池包括：晶硅基片（01）、异质结部分（02）和背电极部分，晶硅基片的正面形成有陷光层（03）、陷光层上沉积有增透膜（04），异质结部分位于晶硅基片的背部，包括本征非晶硅膜层（05）、P型非晶硅膜层（06）和N型非晶硅膜层（07），P型非晶硅膜层和N型非晶硅膜层上沉积有导电膜（08），背电极部分沉积于导电膜上，将背电极异质结一体化，一方面具有异质结电池制造中工艺较为简单的优点，克服了常规异质结电池存在正面栅线的缺点；另一方面保持了背电极电池没有正面栅线的优点，克服了常规背电极电池制造工艺复杂的特点。

Description

一种背电极异质结太阳能电池及其制备方法 技术领域
本发明属于新能源领域，具体涉及一种背电极异质结太阳能电池及其制备方法。
背景技术
晶硅电池是当前的主流产品，为进一步提高晶硅电池的光伏效率，研发出多种基于晶硅电池的新的太阳能电池，其中，异质结电池和背电极电池是其中光伏效率最高、最有市场化前景的新一代高效太阳能电池。
单纯的异质结电池，正、负电极位于晶硅基片的正、背两面，即需要制备正面栅线和背面栅线，虽然工艺过程比较简单，但是工艺精确性要求高，否则产品良率会大幅度下降；采用常规非晶硅太阳能电池工艺制备异质结电池时，需要精确严格的掩膜手段及清洗控制；异质结电池中的栅线加工，因为需要使用专业的低温银浆，其成为制约异质结电池发展的主要因素；最后，正面栅线的使用，不可避免的降低光伏效率。
单纯的背电极电池虽然可以通过扩散的方式制备正、负电极均位于晶硅基片背面的背电极，但是其制作工艺过程特别复杂、工艺精度要求特别高，使得其发展受到严重约束；另一方面，工艺过程中存在严重污染排放问题，目前能够生产背电极电池的企业少之又少。
发明内容
本发明旨在提供一种背电极异质结一体化的高效太阳能电池及其制备方法。
为了解决上述问题，本发明提供了一种背电极异质结太阳能电池，包括：晶硅基片、异质结部分和背电极部分，晶硅基片的正面形成有陷光层，陷光层上沉积有增透膜，异质结部分位于晶硅基片的背部，异质结部分包括本征非晶硅膜层、P型非晶硅膜层和N型非晶硅膜层，本征非晶硅膜层沉积于晶硅基片的背面，P型非晶硅膜层和N型非晶硅膜层间隔沉积于本征非晶硅膜层，及P型非晶硅膜层和N型非晶硅膜层上沉积有导电膜，背电极部分沉积于导电膜上。
根据上述一种背电极异质结太阳能电池，其中，晶硅基片为P型晶硅基片、N型晶硅基片或本征型晶硅基片。
根据上述一种背电极异质结太阳能电池，其中，P型非晶硅膜层包括P型非晶硅膜线和P型非晶硅集电极膜线，及N型非晶硅膜层包括N型非晶硅膜线和N型非晶硅集电极膜线，P型非晶硅集电极膜线和N型非晶硅集电极膜线分别与P型非晶硅膜线和N型非晶硅膜线垂直联通。
根据上述一种背电极异质结太阳能电池，其中，P型非晶硅膜线或N型非晶硅膜线利用点状沉积源或线性沉积源在本征非晶硅膜层上以预先设计的几何图形沉积扫描形成相同的膜线图形。
根据上述一种背电极异质结太阳能电池，其中，所述膜线图形包括直线型或曲线型，膜线图形宽度不相等时，膜线图形越靠近集电极膜线，宽度越大。
根据上述一种背电极异质结太阳能电池，其中，P型非晶硅集电极膜线和N型非晶硅集电极膜线分别分布于晶硅基片上的本征非晶硅膜层的两边以分别在P型非晶硅膜层和N型非晶硅膜层上的导电膜上形成第一电极引线区和第二电极引线区。
根据上述一种背电极异质结太阳能电池，其中，背电极部分包括正电极引线和负电极引线，其中，正电极引线位于第一电极引线区及负电极引线位于第二电极引线区，或正电极引线位于第二电极引线区及负电极引线位于第一电极引线区。
本发明提供了一种背电极异质结太阳能电池的制备方法，包括以下步骤：
步骤一：在晶硅基片的正面利用腐蚀技术进行制绒处理，制备陷光层；
步骤二：在陷光层上利用PVD、CVD或表面氧化处理方法沉积增透膜；
步骤三：在晶硅基片的背面，首先利用PECVD沉积本征非晶硅膜层；
步骤四：在本征非晶硅膜层上利用点状沉积源或线性沉积源，依照预先设计的几何图形，分别沉积P型非晶硅膜层和所述N型非晶硅膜层，其中，P型非晶硅膜层和N型非晶硅膜层间隔沉积在本征非晶硅膜层上，这样本征非晶硅膜层、P型非晶硅膜层和N型非晶硅膜层形成了异质结部分；
步骤五：利用点状沉积源或线性沉积源，在P型非晶硅膜层和N型非晶硅膜层上面分别沉积导电膜；及
步骤六：在P型非晶硅膜层和N型非晶硅膜层的导电膜上沉积形成背电极部分。
根据上述一种背电极异质结太阳能电池的制备方法，其中，点状沉积源在本征非晶硅膜层、P型非晶硅膜层或N型非晶硅膜层表面扫描沉积实现所需的具有线性特征的膜线图形。
根据上述一种背电极异质结太阳能电池的制备方法，其中，点状沉积源是采用电子束、离子束、激光束或微细热源形成的，然后通过线性扫描的方法，将反应材料蒸发后产生的反应气体或直接将反应气体电离并获得膜层材料沉积到相应的位置以形成点状沉积源膜层，点状沉积源膜层的宽度在微米级至毫米级范围内变化。
根据上述一种背电极异质结太阳能电池的制备方法，其中，线性沉积源在固定条件下通过固定晶硅基片实现所需的单线性薄膜图形，及线性沉积源在固定条件下通过移动晶硅基片实现所需的多线性薄膜图形。
根据上述一种背电极异质结太阳能电池的制备方法，其中，线性沉积源是采用电子束、离子束、等离子体束或微细热源形成的，然后，在线性沉积源固定不动下，将反应材料蒸发后产生的反应气体或直接将反应气体电离并获得膜层材料沉积到相应的位置以形成线性沉积源膜层，线性沉积源膜层的宽度在微米级至毫米级范围内变化。
根据上述一种背电极异质结太阳能电池的制备方法，其中，点状沉积源形成点状沉积源膜层及线性沉积源形成线性沉积源膜层的工艺条件包括点状沉积源或线性沉积源的工作压强、输出的能量密度、离子能量、离子组成及点状沉积源距离晶硅基片的间距；
其中，工作压强范围为0.1Pa-10kPa，输出的能量密度范围为1mW/cm2-1W/mm2，粒子能量范围为100k-104k，粒子组成为薄膜沉积所需的包括Si、N、B、H及Ar的配合粒子，点状沉积源距离晶硅基片的间距不超过1m；
其中，粒子能量的动能分量越小越有利于减小粒子对衬底表面的冲击，及在不影响工作气体充分混合均匀分布在衬底表面的条件下，点状沉积源距离晶硅基片的间距越小越有利于点状沉积源膜层的形成。
根据上述一种背电极异质结太阳能电池的制备方法，其中，本征非晶硅膜沉积过程中，工作气体包括氢气、硅烷和氩气，氢气、硅烷和氩气的流量比为：100:(1-20)：(0-100)，工作气体的工作压强为0.1Pa-10kPa。
根据上述一种背电极异质结太阳能电池的制备方法，其中，利用点状沉积源或线性沉积源，沉积P型非晶硅膜层和N型非晶硅膜层过程中，工作气体包括氢气、硅烷、氩气和掺杂气体，掺杂气体包括硼烷和/或磷烷，其中，氢气、硅烷和氩气的流量比为：100:(1-20)：(0-100)，掺杂气体与硅烷的流量比为(0.1-10)：100，工作气体的工作压强为0.1Pa-10kPa。
有益效果
本发明公开了一种背电极异质结太阳能电池及其制备方法，将背电极异质结一体化，使其具有正、负电极均在晶硅基片背面的背电极，同时具有异质结通过镀膜、印刷的方法实现背电极的制备，这样，一方面具有异质结电池制造中工艺较为简单的优点，克服了常规异质结电池存在正面栅线的缺点；另一方面保持了背电极电池没有正面栅线的优点，克服了常规背电极电池制造工艺复杂的缺点。
附图说明
图1是本发明公开的一种背电极异质结太阳能电池的剖面图；
图2是本发明公开的一种背电极异质结太阳能电池的一种本征非晶硅膜层上P型非晶硅膜线和N型非晶硅膜线的膜线图形示意图；
图3是本发明公开的一种背电极异质结太阳能电池的另一种本征非晶硅膜层上P型非晶硅膜线和N型非晶硅膜线的膜线图形示意图；
图4是本发明公开的一种背电极异质结太阳能电池的另一种本征非晶硅膜层上P型非晶硅膜线和N型非晶硅膜线的膜线图形示意图。
具体实施方式
下面结合附图和具体实施例对本发明作进一步详细描述，但不作为对本发明的限定。
图1是本发明公开的一种背电极异质结太阳能电池的剖面图，如图1所示，本发明提供了一种背电极异质结太阳能电池，包括：晶硅 基片01、异质结部分02和背电极部分(图中未示出)，晶硅基片01的正面形成有陷光层03，陷光层03上沉积有增透膜04，异质结部分02位于晶硅基片01的背部，异质结部分02包括本征非晶硅膜层05、P型非晶硅膜层06和N型非晶硅膜层07，本征非晶硅膜层05沉积于晶硅基片01的背面，P型非晶硅膜层06和N型非晶硅膜层07间隔沉积于本征非晶硅膜层05，及P型非晶硅膜层06和N型非晶硅膜层07上沉积有导电膜08，背电极部分沉积于导电膜08上。
本发明进一步公开了一种背电极异质结太阳能电池，其中，晶硅基片01为P型晶硅基片、N型晶硅基片或本征型晶硅基片，当晶硅基片01为本征型晶硅基片时，异质结部分02可以不包括本征非晶硅膜层05，即此时P型非晶硅膜层06和N型非晶硅膜层07可以直接间隔沉积于本征型晶硅基片。
图2、图3和图4分别是本发明公开的一种背电极异质结太阳能电池的三种本征非晶硅膜层上P型非晶硅膜线和N型非晶硅膜线的膜线图形示意图，如图2、图3和图4所示，根据上述一种背电极异质结太阳能电池，其中，P型非晶硅膜层06包括P型非晶硅膜线09和P型非晶硅集电极膜线10，及N型非晶硅膜层07包括N型非晶硅膜线11和N型非晶硅集电极膜线12，P型非晶硅集电极膜线10和N型非晶硅集电极膜线12分别与P型非晶硅膜线09和N型非晶硅膜线11垂直联通。
如图2、图3和图4所示，根据上述一种背电极异质结太阳能电池，其中，P型非晶硅膜线09或N型非晶硅膜线11利用点状沉积源 或线性沉积源在本征非晶硅膜层05上以预先设计的几何图形沉积扫描形成相同的膜线图形，进一步地，膜线图形包括直线型或曲线型，膜线图形的宽度可以相等，例如可以是图1和图2所示的膜线图形，也可以不相等，直线型膜线图形宽度不相等的例如可以是三角形，直线型膜线图形宽度不相等的例如可以是图3所示的膜线图形，膜线图形宽度不相等时，膜线图形越靠近集电极膜线，宽度越大，这样的设计有利于获得最大光伏效率。
根据上述一种背电极异质结太阳能电池，其中，P型非晶硅集电极膜线10和N型非晶硅集电极膜线12分别分布于晶硅基片01上的本征非晶硅膜层05的两边以分别在P型非晶硅膜层06和N型非晶硅膜层07上的导电膜08上形成第一电极引线区和第二电极引线区(图中未示出)。
根据上述一种背电极异质结太阳能电池，其中，背电极部分包括正电极引线和负电极引线，其中，正电极引线位于第一电极引线区及负电极引线位于第二电极引线区，或正电极引线位于第二电极引线区及负电极引线位于第一电极引线区(图中未示出)。
本发明提供了一种背电极异质结太阳能电池的制备方法，包括以下步骤：
步骤一：在晶硅基片01的正面利用腐蚀技术进行制绒处理，制备陷光层03；
步骤二：在陷光层03上利用PVD、CVD或表面氧化处理方法沉积增透膜04；
步骤三：在晶硅基片01的背面，首先利用PECVD沉积本征非晶硅膜层05；
步骤四：在本征非晶硅膜层05上利用点状沉积源或线性沉积源，依照预先设计的几何图形，分别沉积P型非晶硅膜层06和所述N型非晶硅膜层07，其中，P型非晶硅膜层06和N型非晶硅膜层07间隔沉积在本征非晶硅膜层05上，这样本征非晶硅膜层05、P型非晶硅膜层06和N型非晶硅膜层07形成了异质结部分05；
步骤五：利用点状沉积源或线性沉积源，在P型非晶硅膜层06和N型非晶硅膜层07上面分别沉积导电膜08；及
步骤六：在P型非晶硅膜层06和N型非晶硅膜层07的导电膜08上沉积形成背电极部分。
根据上述一种背电极异质结太阳能电池，其中，点状沉积源在本征非晶硅膜层05、P型非晶硅膜层06或N型非晶硅膜层07表面扫描沉积实现所需的具有线性特征的膜线图形。
根据上述一种背电极异质结太阳能电池，其中，点状沉积源是采用电子束、离子束、激光束或微细热源形成的，然后通过线性扫描的方法，将反应材料蒸发后产生的反应气体或直接将反应气体电离并获得膜层材料沉积到相应的位置以形成点状沉积源膜层，点状沉积源膜层的宽度在微米级至毫米级范围内变化。
根据上述一种背电极异质结太阳能电池，其中，线性沉积源在固定条件下通过固定晶硅基片01实现所需的单线性薄膜图形，及线性 沉积源在固定条件下通过移动晶硅基片01实现所需的多线性薄膜图形。
根据上述一种背电极异质结太阳能电池，其中，线性沉积源是采用电子束、离子束、等离子体束或微细热源形成的，然后，在线性沉积源固定不动下，将反应材料蒸发后产生的反应气体或直接将反应气体电离并获得膜层材料沉积到相应的位置以形成线性沉积源膜层，线性沉积源膜层的宽度在微米级至毫米级范围内变化。
根据上述一种背电极异质结太阳能电池，其中，点状沉积源形成点状沉积源膜层及线性沉积源形成线性沉积源膜层的工艺条件包括点状沉积源或线性沉积源的工作压强、输出的能量密度、离子能量、离子组成及点状沉积源距离晶硅基片01的间距；
其中，工作压强范围为0.1Pa-10kPa，输出的能量密度范围为1mW/cm2-1W/mm2，粒子能量范围为100k-104k，粒子组成为薄膜沉积所需的包括Si、N、B、H及Ar的配合粒子，点状沉积源距离晶硅基片01的间距不超过1m；
其中，粒子能量的动能分量越小越有利于减小粒子对衬底表面的冲击，及在不影响工作气体充分混合均匀分布在衬底表面的条件下，点状沉积源距离晶硅基片01的间距越小越有利于点状沉积源膜层的形成。
根据上述一种背电极异质结太阳能电池，其中，本征非晶硅膜层05沉积过程中，工作气体包括氢气、硅烷和氩气，氢气、硅烷和氩 气的流量比为：100:(1-20)：(0-100)，工作气体的工作压强为0.1Pa-10kPa。
根据上述一种背电极异质结太阳能电池，其中，利用点状沉积源或线性沉积源，沉积P型非晶硅膜层06和N型非晶硅膜层07过程中，工作气体包括氢气、硅烷、氩气和掺杂气体，掺杂气体包括硼烷和/或磷烷，其中，氢气、硅烷和氩气的流量比为：100:(1-20)：(0-100)，掺杂气体与硅烷的流量比为(0.1-10)：100，工作气体的工作压强为0.1Pa-10kPa。
实施例一：
N型晶硅基片，迎光面经过制绒处理得到陷光层，在经过制绒处理的表面，利用真空镀膜技术沉积增透膜。增透膜可以是MgF2、SiO2或SiC。
在晶硅基片背光面，利用PECVD沉积本征非晶硅膜层。利用聚焦斑点为1000微米的电子枪，在沉积有本征非晶硅膜层的表面，线性扫描沉积得到P型非晶硅膜线。P型非晶硅膜线之间的间距为1060微米，P型非晶硅膜线的线头距离晶硅基片边缘为3.2mm。
利用聚集斑点为3mm的电子束源，与P型非晶硅膜线垂直、距离晶硅基片边缘0.2mm，沉积比P型非晶硅膜线宽的P型非晶硅集电极膜线，该P型非晶硅集电极膜线与前面的P型非晶硅膜线联通，形成P型非晶硅膜层。
同样方法沉积N型非晶硅膜线，其中，N型非晶硅膜线与P型非晶硅膜线的间距为30微米，N型非晶硅集电极膜线位于相对于P型 非晶硅集电极膜线的晶硅基片的另一边，与所有N型非晶硅膜线联通，形成线性N型非晶硅膜层。
在P型非晶硅膜层、N型非晶硅膜层表面，同样利用电子束源，沉积导电膜，由于之前的N型非晶硅集电极膜线位于相对于P型非晶硅集电极膜线的晶硅基片的另一边，因此，在P型非晶硅集电极膜线和N型非晶硅集电极膜线的导电膜上分别形成第一电极引线区和第二电极引线区，最后，在上述两个电极引线区内分别沉积正电极引线和负电极引线形成背电极部分，这样就获得了本发明中的背电极异质结太阳能电池。
另外，上述导电膜的材质也可以为Ag，此时，导电膜即可直接作为背电极部分的正电极引线和负电极引线使用，存在导电膜时，可以减小电池的内电阻，有利于提高光伏性能。
以上所述，仅是本发明较佳的实施方式，并非对本发明的技术方案做任何形式上的限制。凡是依据本发明的技术实质对以上实施例做任何简单修改，形式变化和修饰，均落入本发明的保护范围。

Claims (15)

  1. 一种背电极异质结太阳能电池，其特征在于：所述太阳能电池包括：晶硅基片、异质结部分和背电极部分，所述晶硅基片的正面形成有陷光层，所述陷光层上沉积有增透膜，所述异质结部分位于所述晶硅基片的背部，所述异质结部分包括本征非晶硅膜层、P型非晶硅膜层和N型非晶硅膜层，所述本征非晶硅膜层沉积于所述晶硅基片的背面，所述P型非晶硅膜层和所述N型非晶硅膜层间隔沉积于所述本征非晶硅膜层，及所述P型非晶硅膜层和所述N型非晶硅膜层上沉积有导电膜，所述背电极部分沉积于所述导电膜上。
  2. 根据权利要求1所述的一种背电极异质结太阳能电池，其特征在于：所述晶硅基片为P型晶硅基片、N型晶硅基片或本征型晶硅基片。
  3. 根据权利要求1所述的一种背电极异质结太阳能电池，其特征在于：所述P型非晶硅膜层包括P型非晶硅膜线和P型非晶硅集电极膜线，及所述N型非晶硅膜层包括N型非晶硅膜线和N型非晶硅集电极膜线，所述P型非晶硅集电极膜线和所述N型非晶硅集电极膜线分别与所述P型非晶硅膜线和所述N型非晶硅膜线垂直联通。
  4. 根据权利要求3所述的一种背电极异质结太阳能电池，其特征在于：所述P型非晶硅膜线或所述N型非晶硅膜线利用点状沉积源或线性沉积源在本征非晶硅膜层上以预先设计的几何图形沉积扫描形成相同的膜线图形。
  5. 根据权利要求4所述的一种背电极异质结太阳能电池，其特征在于：所述膜线图形包括直线型或曲线型，所述膜线图形宽度不相等时，膜线图形越靠近集电极膜线，宽度越大。
  6. 根据权利要求3所述的一种背电极异质结太阳能电池，其特征在于：所述P型非晶硅集电极膜线和所述N型非晶硅集电极膜线分别分布于所述晶硅基片上的本征非晶硅膜层的两边以分别在P型非晶硅膜层和N型非晶硅膜层上的导电膜上形成第一电极引线区和第二电极引线区。
  7. 根据权利要求1所述的一种背电极异质结太阳能电池，其特征在于：所述背电极部分包括正电极引线和负电极引线，其中，所述正电极引线位于第一电极引线区及所述负电极引线位于第二电极引线区，或所述正电极引线位于第二电极引线区及所述负电极引线位于第一电极引线区。
  8. 一种背电极异质结太阳能电池的制备方法，其特征在于：所述方法包括以下步骤：
    步骤一：在晶硅基片的正面利用腐蚀技术进行制绒处理，制备陷光层；
    步骤二：在陷光层上利用PVD、CVD或表面氧化处理方法沉积增透膜；
    步骤三：在晶硅基片的背面，首先利用PECVD沉积本征非晶硅膜层；
    步骤四：在本征非晶硅膜层上利用点状沉积源或线性沉积源，依照预先设计的几何图形，分别沉积P型非晶硅膜层和所述N型非晶硅膜层，其中，P型非晶硅膜层和N型非晶硅膜层间隔沉积在本征非晶硅膜层上，这样本征非晶硅膜层、P型非晶硅膜层和N型非晶硅膜层形成了异质结部分；
    步骤五：利用点状沉积源或线性沉积源，在P型非晶硅膜层和N型非晶硅膜层上面分别沉积导电膜；及
    步骤六：在P型非晶硅膜层和N型非晶硅膜层的导电膜上沉积形成背电极部分。
  9. 根据权利要求8所述的一种背电极异质结太阳能电池的制备方法，其特征在于：所述点状沉积源在本征非晶硅膜层、P型非晶硅膜层或N型非晶硅膜层表面扫描沉积实现所需的具有线性特征的膜线图形。
  10. 根据权利要求9所述的一种背电极异质结太阳能电池的制备方法，其特征在于：所述点状沉积源是采用电子束、离子束、激光束或微细热源形成的，然后通过线性扫描的方法，将反应材料蒸发后产生的反应气体或直接将反应气体电离并获得膜层材料沉积到相应的位置以形成点状沉积源膜层，所述点状沉积源膜层的宽度在微米级至毫米级范围内变化。
  11. 根据权利要求8所述的一种背电极异质结太阳能电池的制备方法，其特征在于：所述线性沉积源在固定条件下通过固定晶硅基片 实现所需的单线性薄膜图形，及所述线性沉积源在固定条件下通过移动晶硅基片实现所需的多线性薄膜图形。
  12. 根据权利要求11所述的一种背电极异质结太阳能电池的制备方法，其特征在于：所述线性沉积源是采用电子束、离子束、等离子体束或微细热源形成的，然后，在线性沉积源固定不动下，将反应材料蒸发后产生的反应气体或直接将反应气体电离并获得膜层材料沉积到相应的位置以形成线性沉积源膜层，所述线性沉积源膜层的宽度在微米级至毫米级范围内变化。
  13. 根据权利要求8所述的一种背电极异质结太阳能电池的制备方法，其特征在于：所述点状沉积源形成点状沉积源膜层及所述线性沉积源形成线性沉积源膜层的工艺条件包括点状沉积源或线性沉积源的工作压强、输出的能量密度、离子能量、离子组成及点状沉积源距离晶硅基片的间距；
    其中，所述工作压强范围为0.1Pa-10kPa，所述输出的能量密度范围为1mW/cm2-1W/mm2，粒子能量范围为100k-104k，所述粒子组成为薄膜沉积所需的包括Si、N、B、H及Ar的配合粒子，所述点状沉积源距离晶硅基片的间距不超过1m；
    其中，所述粒子能量的动能分量越小越有利于减小粒子对衬底表面的冲击，及在不影响工作气体充分混合均匀分布在衬底表面的条件下，点状沉积源距离晶硅基片的间距越小越有利于点状沉积源膜层的形成。
  14. 根据权利要求8所述的一种背电极异质结太阳能电池的制备方法，其特征在于：所述本征非晶硅膜沉积过程中，工作气体包括氢气、硅烷和氩气，氢气、硅烷和氩气的流量比为：100:(1-20)：(0-100)，上述工作气体的工作压强为0.1Pa-10kPa。
  15. 根据权利要求8所述的一种背电极异质结太阳能电池的制备方法，其特征在于：利用所述点状沉积源或所述线性沉积源，沉积所述P型非晶硅膜层和所述N型非晶硅膜层过程中，工作气体包括氢气、硅烷、氩气和掺杂气体，所述掺杂气体包括硼烷和/或磷烷，其中，氢气、硅烷和氩气的流量比为：100:(1-20)：(0-100)，掺杂气体与硅烷的流量比为(0.1-10)：100，上述工作气体的工作压强为0.1Pa-10kPa。
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