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WO2017181505A1 - 基于阵列波导光栅路由器的全光缓存器 - Google Patents

基于阵列波导光栅路由器的全光缓存器 Download PDF

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Publication number
WO2017181505A1
WO2017181505A1 PCT/CN2016/084937 CN2016084937W WO2017181505A1 WO 2017181505 A1 WO2017181505 A1 WO 2017181505A1 CN 2016084937 W CN2016084937 W CN 2016084937W WO 2017181505 A1 WO2017181505 A1 WO 2017181505A1
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Prior art keywords
optical
buffer
waveguide grating
arrayed waveguide
grating router
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PCT/CN2016/084937
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English (en)
French (fr)
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何建军
吴月
陈阳
郎婷婷
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浙江大学
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Publication of WO2017181505A1 publication Critical patent/WO2017181505A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005—Switch and router aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005—Switch and router aspects
    • H04Q2011/0007—Construction
    • H04Q2011/0011—Construction using wavelength conversion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005—Switch and router aspects
    • H04Q2011/0007—Construction
    • H04Q2011/002—Construction using optical delay lines or optical buffers or optical recirculation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
    • H04Q11/0005—Switch and router aspects
    • H04Q2011/0007—Construction
    • H04Q2011/0032—Construction using static wavelength routers (e.g. arrayed waveguide grating router [AWGR] )

Definitions

  • the invention relates to an all-optical buffer, in particular to an all-optical buffer based on an arrayed waveguide grating router for all-optical buffer technology.
  • All-optical buffer technology is the basis for implementing all-optical digital packet switching network. It delays buffering signals in the optical domain, avoiding the exchange of photoelectric light, effectively improving the throughput of the nodes of the all-optical packet switching network and reducing the loss.
  • the packet rate effectively solves the competition conflict of different customer request responses, and has many advantages such as large capacity, fast response, more stability, more security, anti-electromagnetic interference, small size, and light weight. Therefore, all-optical buffer technology has become a research hotspot in this field.
  • optical buffer based on fiber delay lines Mainly can be divided into two categories: optical buffer based on fiber delay lines and optical buffer based on slow light effect.
  • the optical buffer technology based on the fiber delay line mainly realizes the optical buffer by changing the length of the optical fiber and using the optical opening light, which can be further divided into a positive feedback optical buffer and a negative feedback optical buffer, and the positive feedback optical buffer technology passes through the same optical packet only once. Delayed fiber optics, while negative feedback optical buffering technology allows light to circulate in the time-delay fiber.
  • the optical buffering technology based on the slow light effect achieves the effect of finally changing the speed of the optical transmission group by different methods, thereby realizing the slow light effect and realizing the optical buffer.
  • the structure is complex, the control operation is complex; the optical buffer design based on slow light effect has a complicated structure, the slow light control range is small, the difficulty is large, and the buffer optical bandwidth is also greatly limited. Most of the existing schemes only buffer the light waves of a certain wavelength, which is inefficient.
  • the present invention provides an all-optical buffer based on an arrayed waveguide grating router, which solves the above problems.
  • the invention comprises an arrayed waveguide grating router, a first fiber delay line, a wavelength converter, a semiconductor optical amplifier, a second fiber delay line, a label processing and a buffer console;
  • the arrayed waveguide grating router is (N+1) ⁇ (N+1) router, one of the input ports of the arrayed waveguide raster router serves as an input of the all-optical buffer, one of the output ports serves as an output of the all-optical buffer, and the remaining inputs Both the port and the output port are used for the loop connection of the optical buffer ring;
  • the remaining output ports of the arrayed waveguide grating router are respectively connected to the respective input ends of the wavelength converter via the respective first fiber delay lines, and the output ends of the wavelength converter are connected.
  • the semiconductor optical amplifiers, the output terminals of the semiconductor optical amplifiers are respectively connected to the remaining input ports of the arrayed waveguide grating router via respective second optical fiber delay lines.
  • N composite optical packet signals with transmission wavelengths ranging from ⁇ 1 to ⁇ N enter from one input port of the arrayed waveguide grating router, are wavelength-multiplexed into N different wavelength optical packet signals, and are output from the remaining N output ports.
  • the first fiber delay line array enters the wavelength converter for wavelength conversion, and then is amplified by the semiconductor optical amplifier, and finally transmitted to the remaining N input ports of the arrayed waveguide grating through the second fiber delay line array, thereby forming N-way independent optical buffer ring.
  • the wavelength converter is connected with a buffer console, and the optical signals of the remaining N output ports of the arrayed waveguide raster router are processed by the label to extract the optical packet length, source, destination and other information and stored in the cache console, and the wavelength converter controls the wavelength converter pair.
  • the optical packet signal undergoes wavelength conversion, and the number of buffers of the optical packet signal in the optical buffer ring and the buffer output are realized by changing the wavelength, and the required optical packet signal is routed through the arrayed waveguide raster router and processed from the final output port. Output.
  • the arrayed waveguide raster router has N+1 input ports and N+1 input ports, wherein a pair of input ports and output ports serve as ports for input and output of all-optical buffers, and the remaining N The symmetrical port and output port are used as the connection ports for the optical cache ring.
  • N pairs of ports form an N-way optical buffer ring, and each optical packet signal is buffered in the optical buffer ring of the respective path.
  • Label processing uses optical label switching technology to extract optical packet signal length, source, destination and other information stored in the cache console.
  • the cache console uses the field programmable gate array FPGA to calculate the buffer time required for each optical packet signal and control the wavelength converter. Wavelength conversion is performed on the arriving optical signal.
  • the composite optical packet signal after changing the wavelength by the wavelength converter passes through the arrayed waveguide grating router, or enters the buffer loop again, or is output from the final output port of the arrayed waveguide grating router.
  • the optical packet length t of the composite optical packet signal of the path buffer ring satisfies the following formula:
  • v is the propagation speed of the optical signal in the fiber delay line
  • T wc is the conversion time of the wavelength converter
  • L 1 is the length of the first fiber delay line of the path buffer ring
  • L 2 is the channel ring of the channel The length of the two fiber delay lines.
  • the length of the fiber delay line of each cache ring is designed according to the specific situation and does not necessarily need to be equal.
  • the propagation time of the light in the first fiber delay line satisfies:
  • T wc is the response time of the wavelength converter.
  • interval T interval between two optical signals in each incoming optical packet signal satisfies:
  • T wc is the conversion time of the wavelength converter.
  • the arrayed waveguide grating router and the wavelength converter are integrated on the same substrate by a hybrid integrated method.
  • the present invention uses the semiconductor optical amplifier 4 to optically amplify the signal light to compensate for the loss of the optical signal during transmission and conversion, whereby the optical signal of the present invention is infinitely buffered in the buffer ring.
  • the optical buffer of the invention adopts an arrayed waveguide grating router and N wavelength converters, and the N semiconductor optical amplifiers simultaneously realize different buffer time control of light signals of N wavelengths, and has compact structure, high efficiency and energy saving, and avoids a large number of other control units. Uses such as light opening, polarization controllers, optocouplers, etc.
  • the invention simultaneously performs independent buffer control on multi-channel wavelength signals to maximize the optimization of the buffer time design of different optical packets between the same channel and different channels, and the buffer time can be theoretically unlimited, and the cache "read and write” operation is free, the capacity is large, and the rate is high. High and flexible.
  • the arrayed waveguide grating router and the wavelength converter of the invention are integrated on the same substrate by the integrated optical method, and have the advantages of good stability, small size and light weight.
  • Figure 1 is a schematic structural view of a solution of the present invention
  • FIG. 3 is a schematic diagram showing the working principle of a 4 ⁇ 4 arrayed waveguide grating router
  • FIG. 4 is a structural diagram of a four-channel arrayed waveguide grating router.
  • arrayed waveguide grating router 1, first light delay line, 3, wavelength converter, 4, semiconductor optical amplifier, 5, second fiber delay line, 6, label processing, 7, cache console , 8, input waveguide, 9, input star coupler, 10, array waveguide, 11, output star coupler, 12 output waveguide.
  • the present invention includes an arrayed waveguide grating router (AWGR) 1, a first fiber delay line (FDL1) 2, a wavelength converter (WC) 3, a semiconductor optical amplifier (SOA) 4, and a second fiber delay.
  • the semiconductor optical amplifier (SOA) 4 and the second optical delay line (FDL2) 5 are connected to form a buffer ring, and the label processing (LP) 6 and the buffer console (WC) 3 constitute a control unit.
  • a composite optical packet signal having a wavelength range of ⁇ 1 to ⁇ N enters from an input channel of an arrayed waveguide grating router (AWGR) 1, and is divided into N paths by a wave decomposition multiplexing function of the arrayed waveguide grating router (AWGR) 1.
  • the wavelength independent optical packet signals are output from the N output ports of the arrayed waveguide raster router (AWGR) 1 into the N first fiber delay lines (FDL1) 2 to continue to propagate.
  • the light propagating in the first fiber delay line (FDL1) 2 is extracted by the label processing (LP) 6 using the optical label switching technology to extract the optical packet signal length, source, destination, etc., and is fed back to the field programmable gate array (FPGA).
  • the Cache Console (BM) 7 analyzes the cache time required for each wavelength optical packet signal by the cache console.
  • the wavelength converter (WC) is controlled by the buffer console (BM) 7. 3 Converting the wavelength into a specific desired wavelength, after changing the wavelength of each signal through the wavelength converter (WC) 3, entering N second fiber delay lines (FDL2) 4, supplemented by a semiconductor optical amplifier (SOA) 5
  • SOA semiconductor optical amplifier
  • the re-entered optical signal is output according to the specific changed wavelength condition, or directly from the specific output port of the arrayed waveguide raster router (AWGR) 1, jumps out of the buffer ring, or re-enters from the buffer output port of the arrayed waveguide raster router (AWGR) 1.
  • the first light delay line (FDL1) 2 enters the respective buffer ring. Because of the optical amplification function of the semiconductor optical amplifier (SOA) 4, the buffered optical energy loss is supplemented, and theoretically, an infinite loop buffer of the optical signal can be achieved.
  • the invention mainly utilizes the wavelength routing principle of the arrayed waveguide grating router, and achieves the final buffering effect by changing the wavelength of each buffer channel.
  • a schematic diagram of the wavelength routing of a 4-channel arrayed waveguide grating router is shown in FIG.
  • the four wavelengths ⁇ 1 , ⁇ 2 , ⁇ 3 and ⁇ 4 input from the input ports #1i, #2i, #3i and #4i are respectively from the output ports #1o, #2o, #3o And #4o output.
  • the four wavelengths input by the same port are cyclically arranged in the order of ⁇ 1 , ⁇ 2 , ⁇ 3 , and ⁇ 4 from the bottom to the top of the four output ports.
  • N symmetric input and output channels can be selected as the buffer input and output channels and a pair of output input and output channels.
  • the length of the first fiber delay line 2 used is L 1
  • the length of the second fiber delay line 5 is L 2
  • the longest optical packet length of each independent wavelength optical packet signal is t.
  • the embodiment of the present invention selects a simple four-channel arrayed waveguide grating router 1 to explain the specific wavelength conversion:
  • Table 1 shows the input ports #1o, #2o, and #3o as buffer input ports, output ports #1o, #2o, and #3o as symmetric cache output ports, ports #4i and #4o as specific total inputs. The case of each wavelength conversion with the output port.
  • the material silicon oxynitride is selected, and a buried silica strip waveguide is used to coat SiO 2 with a refractive index of n 1 and a core layer of SiON having a refractive index of n 2 .
  • a square structure of 3 um x 3 um is used in which the SiON of the core layer is 1.5 um wide and 1 um high, and the entire design size is 3000 um x 1450 um.
  • the effective refractive index n1 of SiO2 is 1.455.
  • the SiON is a mixed material, and the refractive index varies according to the ratio.
  • the SiON material with the refractive index n2 of 1.6 is designed, and the finite difference method (FDM) is adopted.
  • the specific design parameters are shown in Table 2.
  • Figure 4 shows a detailed design of the four-channel arrayed waveguide grating router of the above design, including the input waveguide 8, the input star coupler 9, the array waveguide 10, the output star coupler 11 and the output waveguide 12, and the input waveguide 8 in turn After being input to the star coupler 9, the arrayed waveguide 10, and the output star coupler 11, the output waveguide 12 is connected.
  • the core device used in the all-optical buffer of the invention is: arrayed waveguide grating router, wavelength converter, semiconductor optical amplifier size in the order of mm or less, all using semiconductor materials, which can be integrated by hybrid integration method On the same substrate, it has the characteristics of small size, good stability and light weight.
  • the response time of the wavelength converter can reach the order of ns. It has the advantage of fast response.
  • the invention simultaneously performs independent buffer control on multi-channel wavelength signals, maximizes optimization of buffer time design of different optical packets between different channels and different channels, and has large buffer "read and write" capacity and good flexibility.
  • the semiconductor optical amplifier in the buffer ring is used to supplement the optical signal loss in time, and the buffer time can theoretically be infinite.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Optical Communication System (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)

Abstract

一种基于阵列波导光栅路由器（1）的全光缓存器。阵列波导光栅路由器（1）其中一输入口和输出口分别作为总输入和输出端，其余的输入口和输出口均用于连接；阵列波导光栅路由器（1）其余输出端口经第一光纤延时线（2）与波长转换器（3）的输入端连接，波长转换器（3）的输出端经半导体光放大器（4）、各自的第二光纤延时线（5）后与阵列波导光栅路由器（1）其余的各个输入端口连接；复合光包信号从总输入端口进入，经波分复用为不同波长后从其余输出端口输出进行波长转换，信号放大后传输到阵列波导光栅路由器（1）其余输入端口，形成光缓存环，实现了多波长的不同缓存时间控制，高效节能，缓存时间可无限，并且提高了系统的稳定性，具有尺寸小，质量轻，灵活性好，抗电磁干扰等优点。

Description

基于阵列波导光栅路由器的全光缓存器 技术领域
本发明涉及了一种全光缓存器，特别是涉及了全光缓存技术的一种基于阵列波导光栅路由器的全光缓存器。
背景技术
全光缓存技术是实现全光数字分组交换网的基础，在光域对信号进行延时缓存，避免了光电光的交换，有效的提高了全光包交换网络的节点的吞吐量，降低了丢包率，有效解决了不同客户请求响应的竞争冲突，具有容量大、响应速度快、更稳定、更安全、抗电磁干扰、体积小、质量轻等诸多优点。因此，全光缓存技术已经成为该领域的研究热点。
国内外现有的技术资料中，提供了很多关于实现全光缓存的设计。主要可以分为两大类：基于光纤延时线的光缓存和基于慢光效应的光缓存。基于光纤延时线的光缓存技术主要是通过改变光纤的长度结合使用光开光实现光缓存，其中又可以分为正反馈光缓存和负反馈光缓存，正反馈光缓存技术同一光包仅一次通过延时光纤，而负反馈光缓存技术可以实现光在延时光纤中循环。基于慢光效应的光缓存技术通过不同的方法达到最终改变光传输群速度的效果，从而实现慢光效应，实现光缓存。有通过受激布里渊散射效应和受激拉曼散射效应改变群折射率从而改变群速的方案；也有通过电磁感应透明技术实现光缓存的方案；还有通过特殊的耦合共振结构减小群速实现光缓存的方案等等。众多以上方案中，基于光纤延时线的光缓存技术大量使用光开关，而且延时受限于光纤的长度，虽然有基于负反馈的光缓存的设计存在，但是该方案大量使用波分复用器，半导体光放大器，偏振控制器等器件，结构复杂，控制操作复杂；基于慢光效应的光缓存设计结构复杂，慢光时间调控范围小，难度大，缓存光带宽也受到了很大的限制；现有的方案大多数只针对某一波长的光波进行缓存，效率较低。
发明内容
为了克服上述现有技术的不足，本发明提供了一种基于阵列波导光栅路由器的全光缓存器，解决了上述存在的问题。
本发明所采用的技术方案是：
本发明包括阵列波导光栅路由器、第一光纤延时线、波长转换器、半导体光放大器、第二光纤延时线、标签处理和缓存控制台；阵列波导光栅路由器为 (N+1)×(N+1)路由器，阵列波导光栅路由器其中一个输入端口作为所述全光缓存器的输入端，其中一个输出端口作为所述全光缓存器的输出端，其余的输入端口和输出端口均用于光缓存环的环路连接；阵列波导光栅路由器其余的输出端口分别经各自的第一光纤延时线与波长转换器的各个输入端连接，波长转换器的输出端连接半导体光放大器，半导体光放大器输出端经各自的第二光纤延时线后分别与阵列波导光栅路由器其余的各个输入端口连接。
信道中传输波长范围为λ1～λN的N个复合光包信号从阵列波导光栅路由器一个输入端口进入，经波分复用为N个不同波长的光包信号后从其余N个输出端口输出经第一光纤延时线阵列进入到波长转换器进行波长转换，再经半导体光放大器进行信号放大，最后经第二光纤延时线阵列传输到阵列波导光栅路由器其余N个输入端口进入，从而形成N路相互独立的光缓存环。
波长转换器连接有缓存控制台，阵列波导光栅路由器其余N个输出端口的光信号经标签处理提取光包长度、源、目的地等信息存储在缓存控制台，由缓存控制台控制波长转换器对经过的光包信号进行波长转换，通过改变波长实现光包信号在光缓存环中的缓存圈数与缓存输出，所需输出的光包信号经阵列波导光栅路由器路由处理后从最终的一个输出端口输出。
对于N个不同波长的光包信号，阵列波导光栅路由器具有N+1个输入端口和N+1个输入端口，其中一对输入端口和输出端口作为全光缓存器输入输出用的端口，其余N对相对称的输入端口和输出端口作为光缓存环用的连接端口。
N对端口形成N路光缓存环，每一路光包信号均在各自路的光缓存环中缓存。
标签处理利用光标签交换技术提取光包信号长度、源、目的地等信息存储在缓存控制台，缓存控制台采用现场可编程门阵列FPGA计算各个光包信号所需要的缓存时间并控制波长转换器对到达的光信号进行波长转换。
经波长转换器改变波长后的所述复合光包信号在经过阵列波导光栅路由器后，或者再次进入缓存环，或者从阵列波导光栅路由器的最终输出端口输出。
对于每一路缓存环，该路缓存环的复合光包信号的光包长度t满足以下公式：
t≤(L1+L2)/v-Twc,
其中，v为光信号在光纤延时线中的传播速度,Twc为波长转换器的转换时间，L1为该路缓存环第一光纤延时线的长度，L2为该路缓存环第二光纤延时线的长度。
各个缓存环的光纤延时线长度根据具体情况设计，并不一定需要相等。
对于每一路缓存环，所述的第一光纤延时线中光的传播时间满足：
Tf1≥Twc，即L1/v≥Twc
其中，Twc为波长转换器的响应时间。
输入的每路光包信号中两个光信号之间的间隔时间Tinterval满足：
Tinterval≥Twc
其中，Twc为波长转换器的转换时间。
阵列波导光栅路由器和波长转换器通过混合集成的方法集成在同一衬底上。
本发明对于单个缓存环，所设计结构单波长的最短缓存时间T0为：T0＝Tf1+Tf2，其中Tf1为第一光纤延时线2中光的传播时间，Tf2为第二光纤延时线5中光的传播时间，忽略光信号在阵列波导光栅路由器1以及半导体光放大器4中的传输时间。
由此本发明对于单个波长的具体缓存时间T为最短缓存时间的整数倍，即：T＝mT0，m＝0,1,2….
本发明采用半导体光放大器4对信号光进行光放大，弥补传输以及转换过程中光信号的损耗，由此本发明的光信号在缓存环里无限缓存。
本发明的有益效果是：
本发明的光缓存器通过一个阵列波导光栅路由器以及N个波长转换器，N个半导体光放大器同时实现N个波长的光波信号的不同缓存时间控制，结构紧凑，高效节能，避免了大量其他控制单元的使用，比如光开光、偏振控制器、光耦合器等等。
本发明同时对多路波长信号进行独立缓存控制，最大化优化同一信道以及不同信道间不同光包的缓存时间设计，缓存时间理论上可以无限制，缓存“读写”操作自由，容量大，速率高，灵活性好。
本发明的阵列波导光栅路由器、波长转换器通过集成光学的方法集成在同一块衬底上，具有稳定性好，尺寸小，质量轻等优点。
附图说明
图1为本发明方案的结构示意图；
图2为缓存光包长度计算说明图；
图3为4×4阵列波导光栅路由器工作原理示意图；
图4为四通道阵列波导光栅路由器的结构图。
图中：1、阵列波导光栅路由器，2、第一光线延时线，3、波长转换器，4、半导体光放大器，5、第二光纤延时线，6、标签处理，7、缓存控制台， 8、输入波导，9、输入星型耦合器，10、阵列波导，11、输出星型耦合器，12输出波导。
具体实施方式
下面结合附图及具体实施例对本发明作进一步详细说明。
如图1所示，本发明包括阵列波导光栅路由器(AWGR)1、第一光纤延时线(FDL1)2、波长转换器(WC)3、半导体光放大器(SOA)4、第二光纤延时线(FDL2)5、标签处理(LP)6、缓存控制台(BM)7，由上述阵列波导光栅路由器(AWGR)1、第一光线延时线(FDL1)2、波长转换器(WC)3、半导体光放大器(SOA)4、第二光纤延时线(FDL2)5连接构成缓存环，由标签处理(LP)6、缓存控制台(WC)3构成控制单元。
波长范围为λ1到λN的复合光包信号从阵列波导光栅路由器(AWGR)1的一个输入通道进入，经过阵列波导光栅路由器(AWGR)1的波分解复用功能，将被分为N路波长独立的光包信号从阵列波导光栅路由器(AWGR)1的N个输出端口输出进入N条第一光纤延时线(FDL1)2中继续传播。在第一光纤延时线(FDL1)2中传播的光利用光标签交换技术经标签处理(LP)6提取光包信号长度、源、目的地等信息反馈给基于现场可编程门阵列(FPGA)的缓存控制台(BM)7，由缓存控制台分析计算出各波长光包信号需要的缓存时间。当在第一光线延时线(FDL1)2中的N路光信号传输一段时间之后达到各自连接的波长转换器(WC)3时，由缓存控制台(BM)7控制波长转换器(WC)3将波长转变成特定的所需波长，经过波长转换器(WC)3改变波长的各路信号之后进入N条第二光纤延时线(FDL2)4，在经过半导体光放大器(SOA)5补充信号光的损耗之后通过第二光纤延时线(FDL2)4连接的阵列波导光栅路由器(AWGR)1的N个输入端口再次进入阵列波导光栅路由器(AWGR)1。再次进入的光信号根据具体改变的波长条件，或直接从阵列波导光栅路由器(AWGR)1的特定输出端口输出，跳出缓存环，或者从阵列波导光栅路由器(AWGR)1的缓存用输出端口再次进入第一光线延时线(FDL1)2，进入各自的缓存环，因为半导体光放大器(SOA)4的光放大功能，补充缓存光能量损耗，理论上可以达到光信号的无限循环缓存。
本发明主要利用阵列波导光栅路由器的波长路由原理，通过改变各个缓存通道的波长，达到最终的缓存效果。图3中示出了4通道阵列波导光栅路由器的波长路由原理图。从图中可以看出，从输入端口#1i、#2i、#3i和#4i输入的4个波长λ1、λ2、λ3和λ4，分别从输出端口#1o、#2o、#3o和#4o输出。并且，同一端口输入的4个波长，在4个输出端口从下到上始终按照λ1、λ2、λ3和λ4顺序循环排列。通过观察我们可以看出，在端口#1i输入的波长为λ4的光信号在 对称输出端口#1o口输出，也就是说，如果连接#1i和#1o构成环形，波长为λ4的光信号将在其中循环传输，同理推论#2i与#2o，#3i与#3o，#4i与#4o端口均可以构成缓存环，达到光缓存的目的。同理推导通过合理设计波长转换机制，对于N+1通道的阵列波导光栅路由器，可选取N个对称输入输出通道作为缓存用输入输出通道以及一对输出用输入输出通道。
对于单个缓存环，所用的第一光纤延时线2的长度为L1，第二光纤延时线5的长度为L2；所适用的每个独立波长光包信号的最长光包长度为t。
如图2(a)所示，对单个光包信号而言，当光包的包头进入第一光纤延时线2时，必须确保波长波长转换器3有足够的时间响应，即L1/v≥Twc。当同一光包信号再次进入波长转换器3时，必须确保包尾信号已经离开波长转换器3，即t必须满足：t≤(L1+L2)/v-Twc。其中，v为光包信号在光纤延时线中的传播速度。综上得：t≤(L1+L2)/v-Twc,L1/v≥Twc。
如图2(b)所示，对于两个光包#1，#2而言，必须确保当#1的包尾离开波长转换器3时，有足够的时间供#2进行进行波长响应，即，光包信号之间的时间间隔Tinterval必须满足：Tinterval≥Twc。
为了方便说明，本发明实施例选用简单的四通道阵列波导光栅路由器1对波长转换具体的情况加以说明：
表1给出了将输入端口#1o、#2o和#3o作为缓存用输入端口，输出端口#1o、#2o和#3o作为对称缓存用输出端口，端口#4i与#4o作为特定的总输入与输出端口的情况下的各波长转换情况。
表1 4x4AWGR波长转换规律
Figure PCTCN2016084937-appb-000001
以下，给出在本发明中的关键器件阵列波导光栅路由器的一个具体设计案例。为方便说明，采用设计四通道阵列波导光栅。
选用材料氮氧化硅，采用掩埋型二氧化硅条形波导，包层折射率为n1的SiO2，芯层的为折射率为n2的SiON。在本发明中，采用3um×3um的正方形 结构，其中芯层的SiON宽1.5um，高1um，整个设计尺寸为3000um×1450um。在光波长为1550um时，SiO2的有效折射率n1为1.455，SiON为混合材料，折射率根据配比有不同的变化，这里采用折射率n2为1.6的SiON材料进行设计，通过有限差分方法(FDM)计算得芯层的有效折射率为neff＝1.500874，平板区有效折射率为ns＝1.539289。设计所用的光波长为λi＝λc+(i-8)Δλ，其中λc＝1.55um，i＝1,2,3,4。具体的设计参数如表2所示。
表2四通道AWGR主要设计参数
参数 符号 取值
通道数 Nch 4
通道间隔 Δλ 10nm
中心波长 λc 1550nm
最小弯曲半径 R 500μm
阵列波导间距 da 3μm
输出波导间距 do 10μm
阵列波导长度差 ΔL 37.18μm
衍射级次 m 36
阵列波导数目 NWG 45
平板区长度 LFPR 120.06μm
自由光谱范围 FSR 40nm
图4给出了以上设计的四通道阵列波导光栅路由器的具体设计图，包括输入波导8、输入星型耦合器9、阵列波导10、输出星型耦合器11和输出波导12，输入波导8依次经输入星型耦合器9、阵列波导10、输出星型耦合器11后与输出波导12连接。
本发明所设计全光缓存器的所采用的核心器件：阵列波导光栅路由器、波长转换器、半导体光放大器尺寸在mm量级甚至更小，均采用半导体材料，可通过混合集成的方法将其集成在同一块衬底上，具有尺寸小，稳定性好、质量轻等特点。其中现有的技术中，波长转换器的响应时间已经可以达到ns量级， 具有响应速度快的优点。本发明同时对多路波长信号进行独立缓存控制，最大化优化同一信道以及不同信道间不同光包的缓存时间设计，缓存“读写”容量大，灵活性好。缓存环中采用半导体光放大器及时补充光信号损耗，缓存时间理论上可以无限。
以上结合附图详细描述了本发明一种基于波长路由的光缓存器的实施方式。注意，以上实施案例是用来解释说明本发明的，而不是对本发明进行限制，在本发明的精神和权利要求的保护范围内，对本发明做出的任何修改和改变，都将落入本发明的保护范围。

Claims (8)

  1. 一种基于阵列波导光栅路由器的全光缓存器，其特征在于：
    包括阵列波导光栅路由器(1)、第一光纤延时线(2)、波长转换器(3)、半导体光放大器(4)、第二光纤延时线(5)和缓存控制台(7)；所述阵列波导光栅路由器(1)为(N+1)×(N+1)路由器，阵列波导光栅路由器(1)其中一个输入端口作为所述全光缓存器的输入端，其中一个输出端口作为所述全光缓存器的输出端，其余的输入端口和输出端口均用于光缓存环的环路连接；
    阵列波导光栅路由器(1)其余的输出端口分别经各自的第一光纤延时线(2)与波长转换器(3)的各个输入端连接，波长转换器(3)的输出端连接半导体光放大器(4)，半导体光放大器(4)输出端经各自的第二光纤延时线(5)后分别与阵列波导光栅路由器(1)其余的各个输入端口连接；
    信道中传输波长范围为λ1～λN的N个复合光包信号从阵列波导光栅路由器(1)一个输入端口进入，经波分复用为N个不同波长的光包信号后从其余N个输出端口输出经第一光纤延时线阵列(2)进入到波长转换器(3)进行波长转换，再经半导体光放大器(4)进行信号放大，最后经第二光纤延时线阵列(5)传输到阵列波导光栅路由器(1)其余N个输入端口进入，从而形成N路相互独立的光缓存环；
    波长转换器(3)连接有缓存控制台(7)，阵列波导光栅路由器(1)其余N个输出端口的光信号经标签处理(6)提取光包长度、源、目的地等信息后存储在缓存控制台(7)，由缓存控制台(7)控制波长转换器(8)对经过的光包信号进行波长转换，通过改变波长实现光包信号在光缓存环中的缓存圈数与缓存输出，所需输出的光包信号经阵列波导光栅路由器(1)路由处理后从最终的一个输出端口输出。
  2. 根据权利要求1所述的一种基于阵列波导光栅路由器的全光缓存器，其特征在于：对于N个不同波长的复合光包信号，阵列波导光栅路由器(1)具有N+1个输入端口和N+1个输出端口，其中一对输入端口和输出端口作为全光缓存器输入输出用的端口，其余N对相对称的输入端口和输出端口作为光缓存环用的连接端口。
  3. 根据权利要求1所述的一种基于阵列波导光栅路由器的全光缓存器，其特征在于：通过标签处理(6)利用光标签交换技术提取光包信号长度、源、目的地等信息存储在缓存控制台(7)，
    标签处理(6)后的不同波长的光包信号传送到缓存控制台(7)，缓存控 制台(7)采用现场可编程门阵列(FPGA)，计算各个光包信号所需要的缓存时间并控制波长转换器(3)对到达的光信号进行波长转换。
  4. 根据权利要求1所述的一种基于阵列波导光栅路由器的全光缓存器，其特征在于：经波长转换器(3)改变波长后的所述光包信号在经过阵列波导光栅路由器(1)后，或者再次进入缓存环，或者从阵列波导光栅路由器(1)的最终输出端口输出。
  5. 根据权利要求1所述的一种基于阵列波导光栅路由器的全光缓存器，其特征在于：对于每一路缓存环，该路缓存环的光包信号的光包长度t满足以下公式：
    t≤(L1+L2)/v-Twc
    其中，v为光信号在光纤延时线中的传播速度,Twc为波长转换器的转换时间，L1为该路缓存环第一光纤延时线(2)的长度，L2为该路缓存环第二光纤延时线(5)的长度。
  6. 根据权利要求1或5所述的一种基于阵列波导光栅路由器的全光缓存器，其特征在于：对于每一路缓存环，所述的第一光纤延时线(2)中光的传播时间满足：
    Tf1≥Twc，即L1/v≥Twc
    其中，Twc为波长转换器的转换时间。
  7. 根据权利要求1所述的一种基于阵列波导光栅路由器的全光缓存器，其特征在于：所述输入的每路光包信号中相邻两个光包信号各个光信号之间的间隔时间Tinterval满足：
    Tinterval≥Twc
    其中，Twc为波长转换器的转换时间。
  8. 根据权利要求1所述的一种基于阵列波导光栅路由器的全光缓存器，其特征在于：所述的阵列波导光栅路由器(1)和波长转换器(2)通过混合集成的方法集成在同一衬底上。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2386459Y (zh) * 1999-07-29 2000-07-05 许学锋 光脉冲信号的缓存装置
JP2003249956A (ja) * 2002-02-26 2003-09-05 Kddi Corp パス制御手段を有する光交換機
CN101344614A (zh) * 2008-09-04 2009-01-14 上海交通大学 全光网络中快速动态可配置光分组缓存器
CN104317000A (zh) * 2014-10-16 2015-01-28 浙江大学 模块化可扩展的波长和空间全光路由器
CN205726199U (zh) * 2016-04-18 2016-11-23 浙江大学 一种基于阵列波导光栅路由器的全光缓存器

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100487201B1 (ko) * 2003-02-04 2005-05-04 삼성전자주식회사 전기 버퍼를 이용한 대용량 광 라우터
CN101672952A (zh) * 2008-09-12 2010-03-17 赵芳芳 多级环状光纤延迟线缓存结构
CN101621718A (zh) * 2009-08-04 2010-01-06 复旦大学 基于n×n光开关矩阵的可调谐多环路多进制的光缓存器
CN102411985B (zh) * 2011-09-13 2014-08-20 北京交通大学 一种光纤双环可擦除光信息存储装置及存储方法
CN102801613B (zh) * 2012-07-11 2015-04-08 武汉邮电科学研究院 光学堆栈装置及基于该装置的光学队列装置
CN102843294A (zh) * 2012-08-21 2012-12-26 重庆邮电大学 一种基于fdl环的反馈共享光缓存装置和缓存方法
CN102882811B (zh) * 2012-09-10 2016-04-13 西安电子科技大学 基于阵列波导光栅的数据中心光互连网络系统及通信方法
CN102841479A (zh) * 2012-10-07 2012-12-26 电子科技大学 一种基于瞬态啁啾跃变的全光波长转换集成芯片
CN103685078A (zh) * 2013-12-11 2014-03-26 南京大学 基于光纤延时线的全光共享缓存路由器及其工作方法
CN103986521B (zh) * 2014-05-26 2016-05-18 桂林电子科技大学 一种高可再生性的时分复用光纤光栅传感网络
CN104297853B (zh) * 2014-10-16 2018-02-27 浙江大学 模块化的波长和空间全光路由器

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2386459Y (zh) * 1999-07-29 2000-07-05 许学锋 光脉冲信号的缓存装置
JP2003249956A (ja) * 2002-02-26 2003-09-05 Kddi Corp パス制御手段を有する光交換機
CN101344614A (zh) * 2008-09-04 2009-01-14 上海交通大学 全光网络中快速动态可配置光分组缓存器
CN104317000A (zh) * 2014-10-16 2015-01-28 浙江大学 模块化可扩展的波长和空间全光路由器
CN205726199U (zh) * 2016-04-18 2016-11-23 浙江大学 一种基于阵列波导光栅路由器的全光缓存器

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