WO2017010142A1

WO2017010142A1 - Power conversion device

Info

Publication number: WO2017010142A1
Application number: PCT/JP2016/062969
Authority: WO
Inventors: 健治 ▲高▼橋; 敏川村
Original assignee: 三菱電機株式会社
Priority date: 2015-07-14
Filing date: 2016-04-26
Publication date: 2017-01-19
Also published as: CN107710585A; DE112016002716T5; DE112016002716B4; US20180102715A1; JP6180696B2; US10862404B2; CN107710585B; JPWO2017010142A1

Abstract

In power conversion devices, when pulse width modulation is performed using asymmetric ramp waves as carrier signals, harmonics are generated. In order to suppress such harmonics, the present invention performs a correction in advance so as to distort an instruction value, determines a gate signal for a switching operation on the basis of the instruction value after the correction and an asymmetric carrier signal, and performs pulse width modulation, thereby obtaining distortion-less output voltage or output current.

Description

Power converter

The present invention relates to a power converter using a semiconductor device as a switching element, and more particularly to a power converter using an asymmetric waveform signal as a carrier signal.

Conventionally, there are various power converters that convert input power into output power of any form by switching semiconductor devices such as insulated gate bipolar transistors (IGBTs), metal oxide semiconductor field effect transistors (MOSFETs), and thyristors. It is used for various purposes.
In this power converter, if distortion is included in the input / output power, it may cause noise and vibration of the devices, and therefore, measures have been taken to suppress the distortion of the input / output power. As one of these, a pulse width modulation method is used, and control is performed at high speed so that the output is as close to a sine wave as possible. In addition, here, a method called a carrier comparison method is used to generate a switching signal.

This carrier comparison method determines a switching signal by comparing a carrier signal or a high-frequency signal called a carrier wave with a command value based on voltage or current, and specifically, the command value is larger than the carrier signal. In this case, the switching signal is “high”, and when it is small, the switching signal is “low”.

A symmetric triangular wave is usually used for this carrier signal. This “symmetric triangle wave” is a symmetrical triangle wave waveform in which the signal decrease period required to monotonously decrease from the maximum value to the minimum value and the signal increase period until the monotone increase from the minimum value to the maximum value are equal. .
The reason for using the symmetric triangular wave is that the latter has more low-order harmonics than the former because of the comparison between the harmonic component of the symmetric triangular wave and the harmonic component of the asymmetric triangular wave.

However, since the circuit configuration for generating an asymmetric triangular wave is simpler than the circuit configuration for generating a symmetric triangular wave, instead of the symmetric triangular wave, a triangular wave waveform in which the signal increasing period and the signal decreasing period are not equal, that is, the “asymmetric triangular wave” However, when an asymmetric triangular wave is used as a carrier signal, low-order harmonics cause distortion of the output. Therefore, as in the content proposed in Patent Document 1, the asymmetric triangular wave is used. However, the asymmetrical triangular wave is not used as it is as a comparison signal with the command value, but the sawtooth waveform signal is corrected and adjusted to a symmetric triangular wave. The asymmetric triangular wave is not used as it is as a carrier signal.

Japanese Patent No. 3326790

In the conventional power converter, since a problem of harmonics is assumed when an asymmetrical waveform signal is used as a carrier signal, it is considered natural to use a symmetrical triangular wave as a carrier signal. A power converter that uses this signal as a carrier signal has not been studied.
An object of the present invention is to provide a power conversion device that uses an asymmetric waveform signal as a carrier signal and can suppress harmonics of an output waveform.

The power conversion device of the present invention is a power conversion circuit that performs power conversion by switching operation of a semiconductor device, a signal reduction period required for a carrier signal to change from a maximum value to a minimum value, and a change from a minimum value to a maximum value An asymmetric carrier signal generating means for generating a carrier signal having an asymmetric waveform having different signal increase periods required for the command, a command value generating means for generating a command value, the asymmetric carrier signal from the asymmetric carrier signal generating means and the command value generating means Command value correcting means for correcting the command value based on the asymmetric carrier signal and outputting a corrected command value, and the corrected command value from the command value correcting means and the asymmetric carrier Comparing means for determining a gate signal of the switching operation of the power conversion circuit by comparing with a signal .

According to the power conversion device of the present invention, an output waveform with small distortion can be obtained by correcting the command value so that the harmonic signal of the order to be removed is superimposed and then performing pulse width modulation with the asymmetric carrier signal. Is possible. For this reason, even if an asymmetrical waveform signal is used as a carrier signal, harmonics in the waveform of the output power of the power converter can be suppressed.

It is a block diagram which shows the power converter device of Embodiment 1 of this invention. It is a block diagram which shows the structure of the power converter device of the comparative example with respect to Embodiment 1 of this invention. It is a signal waveform diagram which shows the operation state of the power converter device of Embodiment 1 of this invention. It is a wave form diagram which shows the operation state of the power converter device of the comparative example with respect to Embodiment 1 of this invention. It is a figure which shows the carrier spectrum at the time of using the signal of a sawtooth waveform as a carrier signal in the power converter device of Embodiment 1 of this invention. It is the figure which compared the Fourier coefficient of the symmetrical triangular wave and the asymmetrical triangular wave. It is a block diagram of the power converter device which concerns on Embodiment 2 of this invention. It is a block diagram of the power converter device which concerns on Embodiment 3 of this invention. It is explanatory drawing of the amplitude spectrum of the harmonic reference means of the power converter device which concerns on Embodiment 3 of this invention. It is explanatory drawing which shows the effect of the harmonic voltage distortion correction | amendment means of the power converter device which concerns on Embodiment 3 of this invention. It is a block diagram of the power converter device of Embodiment 4 of this invention. It is a block diagram of the power converter device of Embodiment 5 of this invention. It is a block diagram of the power converter device of Embodiment 6 of this invention. It is a block diagram of the power converter device which concerns on Embodiment 7 of this invention. It is explanatory drawing explaining the principle of the phase current restoration method which concerns on Embodiment 7 of this invention.

Embodiment 1 FIG.
Hereinafter, a power converter according to Embodiment 1 of the present invention will be described with reference to FIG.
FIG. 1 is a schematic configuration diagram of the power conversion apparatus 110 according to the first embodiment, and illustrates a configuration of a carrier comparison method that realizes pulse width modulation control.
The power conversion device 110 includes a power conversion circuit 3 that uses a semiconductor device as a switching element. A comparison unit 5 is connected to the power conversion circuit 3, and a switching operation is performed from the comparison unit 5 to the power conversion circuit 3. A gate signal for controlling is supplied.

The comparison means 5 generates a gate signal by the carrier comparison method, and the comparison means 5 is connected to the asymmetric carrier signal generation means 4 and the command value correction means 16. The command value correcting means 16 is connected to a command value generating means 15 for supplying a command value having a desired waveform. A command value signal having a desired waveform is supplied from the command value generating means 15 to the command value correcting means 16, and the command value correcting means 16 corrects the command value signal to generate a corrected command value signal. This correction is performed according to the state of the asymmetric triangular wave generated by the asymmetric carrier signal generating means 4.

FIG. 2 shows a schematic configuration of the prior art in order to clarify the difference between the first embodiment of the present invention and the prior art. The configuration shown in FIG. 2 is a power conversion device that realizes conventional pulse width modulation control. In the figure, the same or corresponding parts are denoted by the same reference numerals. As shown in the figure, the difference from the present invention is the configuration connected to the comparison means 5. That is, in the one shown in FIG. 2, the comparison means 5 is connected to the symmetric carrier signal generation means 140 and the command value generation means 15, and a symmetric triangular wave signal is supplied from the symmetric carrier signal generation means 140 as a carrier signal. The signal is supplied as it is from the command value generating means 15.

As is apparent from a comparison between FIG. 1 and FIG. 2, in the present invention, a signal having an asymmetric waveform is used as the carrier signal, and the command value signal is corrected in accordance with the state of the asymmetric carrier signal. A command value signal is generated, and the corrected command value signal and the carrier signal are compared.

The operation state of the first embodiment shown in FIG. 1 is represented by a signal waveform diagram as shown in FIG.
FIG. 3A shows the state of a signal. In the figure, a is a carrier signal, which is an asymmetric triangular wave signal. b is a command value signal of a desired voltage waveform. c represents a corrected command value signal in which the second harmonic of the asymmetric triangular wave signal a is superimposed on the command value signal b. A stepped waveform in FIG. 3A represents a signal obtained by zero-order holding the corrected command value signal c. FIG. 3B shows an output signal (gate signal) obtained by performing pulse width modulation control using the asymmetric triangular wave signal a and the corrected command value signal c shown in FIG. FIG. 3 (c) shows the result of frequency analysis of the output signal shown in FIG. 3 (b). As shown here, the correction of the command value signal results in almost no second harmonic spectrum. I'm not standing. In this example, modulation is performed after superimposing only the second harmonic on the command value. However, if it is desired to suppress harmonics of other orders, the harmonics of that order may be superimposed on the command value. Of course, it is possible to simultaneously superimpose two or more harmonics having different orders. In this method, the amplitude and phase of the superimposed harmonics are extremely important, but it is not so difficult to obtain them.

The signal state in the comparative example shown in FIG. 2 is shown in FIG. 4 as in FIG.
FIG. 4A shows the state of a signal, and a0 is a carrier signal, which is a symmetric triangular wave signal. b is a command value signal of a desired voltage waveform. Note that the stepped waveform in FIG. 4A represents a signal obtained by zero-order holding the corrected command value signal c. FIG. 4B shows an output signal (gate signal) obtained by performing pulse width modulation control using the symmetrical triangular wave signal a0 and the command value signal b shown in FIG. 4A. FIG. 4 (c) shows the result of frequency analysis of the output signal shown in FIG. 4 (b). As shown here, although the output waveform includes the spectrum of the carrier wave, The spectrum hardly stands. This is because the symmetrical triangular wave does not have an even-order spectrum.

FIG. 5 shows the result of frequency analysis of the output signal when pulse width modulation control is performed on this symmetrical triangular wave signal using a sawtooth waveform signal which is a kind of asymmetric triangular wave as a carrier signal. As shown in FIG. 5, in the case of a sawtooth waveform signal, the second harmonic (2f) spectrum is used even though the carrier frequency and the amplitude and frequency of the command value are the same as those shown in FIG. Is significantly increased, and the third harmonic (3f) spectrum is also increased. When the carrier frequency and the command value frequency approach each other, or when the degree of modulation, which is the ratio of the carrier amplitude and the command value amplitude, increases, these harmonic spectra increase.

As can be understood from the first embodiment and the comparative example, depending on the signal used for the carrier signal, harmonics exist, and noise and other problems occur due to the harmonics. Therefore, a carrier with less harmonics is used. In contrast to the configuration shown in the comparative example, the first embodiment suppresses the influence of harmonics by correcting the command value signal even for carrier signals in which harmonics exist. Obviously, the output voltage signal can be generated.

Fig. 6 shows the difference in harmonic components between symmetric and asymmetric triangle waves. Here, the Fourier coefficients of a symmetric triangular wave and three types of asymmetric triangular waves are compared. The ratio of signal increase period and signal decrease period is 1: 1 (symmetric triangle wave) (1), 1: 3 (2), 1: 9 (3), 1: infinity (sawtooth waveform) (4) Comparing the spectrums of the waveforms, it can be seen that the spectrum of the fundamental wave is larger and the harmonic spectrum is smaller when the waveform is more symmetrical. For this reason, it is usually preferable to use a symmetric triangular wave signal for the carrier signal, unless the frequency of the command value signal is sufficiently lower than the frequency of the carrier signal. However, knowing the presence of harmonic components in advance, assuming that the carrier signal has this harmonic, correct the command value signal and use the corrected command value signal to reduce the effects of harmonics. A suppressed output voltage signal can be obtained. As a result, the degree of freedom in design is increased, and the cost of the circuit configuration can be reduced.

Embodiment 2
Next, a specific configuration for correcting the command value signal will be described as a second embodiment.
FIG. 7 is a configuration diagram of the power conversion device according to the second embodiment. In FIG. 7, the same or corresponding parts as those in the configuration shown in FIG. In FIG. 7, a voltage type single-phase inverter is shown as the power conversion device 110. The power conversion device 110 includes a power conversion circuit 3, a control device 100 for the power conversion circuit 3, and a host controller 103. The host controller 103 transmits a command value of voltage or current to the control device 100 of the power conversion circuit 3. When the load 1 is a motor, the host controller 103 may give a speed command or a position command to the control device 100. The power converter 110 operates based on this command value.

The control device 100 of the power conversion circuit includes, as hardware, an asymmetric carrier signal generation unit 4, a comparison unit 5, a processor 101, and a memory 102. Although not shown, the memory 102 includes a volatile storage device such as a random access memory and a non-volatile auxiliary storage device such as a flash memory. Although not shown, the memory 102 may include a volatile storage device such as a random access memory, and an auxiliary storage device such as a hard disk instead of the nonvolatile auxiliary storage device. The processor 101 executes a program input from the memory 102. Since the memory 102 includes an auxiliary storage device and a volatile storage device, a program is input to the processor 101 from the auxiliary storage device via the volatile storage device. In addition, the processor 101 may output data such as a calculation result to the volatile storage device of the memory 102, or may store the data in the auxiliary storage device via the volatile storage device.

Although not shown here, this apparatus may further include a current detection means for detecting a current flowing through the power conversion circuit and a voltage detection means for detecting a voltage applied to the power conversion circuit. Numerical values acquired by these current detection means and voltage detection means may be transmitted to the processor 101 and the memory 102.

The asymmetric carrier signal generating means 4 generates an asymmetric carrier signal. A signal carrier period that is monotonically decreasing from the maximum value to the minimum value is not equal to a signal increasing period until the signal is monotonously increasing from the minimum value to the maximum value. It is out. A typical example of an asymmetric triangular wave is a sawtooth waveform.
The processor 101 determines a corrected voltage command obtained by correcting the voltage command to suppress harmonics generated by the asymmetric carrier signal. That is, it corresponds to the command value correcting means 16 shown in the first embodiment, and although not shown, information on the asymmetric carrier signal generated from the asymmetric carrier signal generating means 4 is obtained, and the corrected voltage command is obtained. Is to determine.

The comparison means 5 compares the asymmetric carrier signal with the corrected voltage command and determines the gate signal of the power conversion circuit 3. In this embodiment, since the power conversion circuit 3 is a single-phase inverter circuit, the semiconductor switches 3a and 3b are complementarily switched in order to convert the DC voltage of the power source 2 into an arbitrary voltage and apply it to the load 1. To do. In many cases, the input / output interface of the processor does not have the ability to drive a large-capacity semiconductor switch. In this case, the gate driver circuit 3c is used. In FIG. 7, the semiconductor switches 3a and 3b are IGBTs, but this is not intended to limit the invention, and power transistors and FETs may be used.

Embodiment 3
FIG. 8 is a diagram showing the configuration of the power conversion apparatus according to Embodiment 3 of the present invention. The power conversion circuit control device 100 includes an asymmetric carrier signal generation unit 4, a comparison unit 5, and a harmonic voltage distortion correction unit 6. The harmonic voltage distortion correction unit 6 shown in FIG. 8 is realized by a processor 101 that executes a program stored in the memory 102 shown in FIG. 7 or a processing circuit such as a system LSI (not shown). In addition, a plurality of processors 101 and a plurality of memories 102 may cooperate to execute the above function, or a plurality of processing circuits may cooperate to execute the above function. Further, the above-described functions may be executed in cooperation with a combination of a plurality of processors 101 and a plurality of memories 102 and a plurality of processing circuits.

The harmonic voltage distortion correction means 6 shown in FIG. 8 includes a subtractor 6a and harmonic reference means 6b that refers to harmonics generated by the asymmetric carrier signal from the voltage command, and corrects the voltage command by subtracting the harmonic signal. The post voltage command is determined and corresponds to the command value correcting means 16 shown in the first embodiment. As described in the previous embodiment, the voltage command value is corrected by receiving information on the asymmetric carrier signal. The post-correction voltage command is determined.
It has already been explained that when a sinusoidal command value signal is directly pulse-width modulated using an asymmetric carrier signal, the harmonics contained in the output signal increase when the frequency of the command value signal approaches the frequency of the carrier signal. However, this can be explained mathematically as follows.

When the voltage command Vref is given as shown in Expression (1) and modulation is performed using an asymmetric carrier signal, the voltage Vload applied to the load 1 can be expressed as shown in Expression (2).

Where Vf is the amplitude of the voltage command, ω is the angular frequency of the voltage command, θ1 is the phase of the voltage command, exp is an exponential function with the number of Napiers as the base, j is a complex number, V2h and V3h are second harmonics and The amplitude of the third harmonic, θ2 and θ3 represent the phases of the second and third harmonics, and Vcarrier represents the sum of the voltages of the carrier spectrum.

By performing pulse width modulation after distorting the command value signal in advance, it is possible to remove harmonics contained in the output signal, and the voltage command value is corrected as in equation (3), This corrected command value Vref2 is modulated by an asymmetric carrier signal. In the equation (3), the second harmonic component is corrected. As a result, the second harmonic component is removed from the voltage Vload applied to the load 1 as shown in the equation (4).

Here, the amplitude V2h and the phase θ2 of the second harmonic are determined based on a voltage that will be applied to the load 1 when correction is not performed.

FIG. 9 is an explanatory diagram for explaining the amplitude spectrum of the harmonic reference means 6b shown in the power conversion apparatus according to Embodiment 3 of the present invention. This is an example of the calculation result of the amplitude spectrum of the second harmonic generated when the sine wave signal is subjected to pulse width modulation with a certain asymmetric carrier signal. For example, when the frequency of the carrier signal is 5 kHz and the modulation factor, which is the amplitude ratio between the sine wave signal and the carrier signal, and the frequency of the sine wave signal are changed, the second harmonic component included in the pulse width modulation control signal is It changes as shown in FIG.
In the calculation of FIG. 9, the algorithm of the fast Fourier transform is used. However, when the fast Fourier transform is performed, the harmonic amplitude spectrum and phase spectrum are obtained at the same time. Therefore, the obtained harmonic signal is subtracted from the voltage command for correction. By obtaining the calculation results as shown in FIG. 9 by computer simulation, the third embodiment corrects the voltage command value signal based on the calculation results shown in FIG.

The harmonic reference means 6b in FIG. 8 is a lookup table in which, for example, the calculation result shown in FIG. 9 is stored in a storage device such as the memory 102 shown in the second embodiment. The harmonic component generated by the asymmetric carrier signal based on the frequency and the modulation rate is referred to, and the harmonic component is output to the subtractor 6a as a correction signal. In the subtractor 6a, a correction signal, that is, the harmonic component is subtracted from the voltage command value to correct the voltage command value in advance. As a result, harmonic distortion is removed from the voltage applied to the load 1 by performing pulse width modulation on the corrected voltage command using the asymmetric carrier signal.

FIG. 10 is an explanatory diagram showing the effect of the harmonic voltage distortion correction means 6 of the power converter 110 according to Embodiment 3 of the present invention, and summarizes the results of Fourier transform of the output signal when the present invention is implemented. Is. In FIG. 9, the second harmonic distortion exceeding 10% of the magnitude of the fundamental wave amplitude is generated depending on the conditions. However, by implementing the present invention, the second harmonic distortion of the output signal is reduced to about 1%. It can be suppressed.

As described above, in the third embodiment of the present invention, even if an asymmetric triangular wave is used for the carrier signal, the harmonics of the output waveform can be suppressed, and the problem relating to the harmonics, which is a demerit of the asymmetric carrier signal, can be achieved by a very simple means. Can be solved. Although a simple sine wave signal is pulse-width modulated with an asymmetric carrier signal here, a voltage-type three-phase inverter circuit uses a third harmonic signal as a sine wave signal in order to improve voltage utilization. Superimposition can be performed, and if the harmonic spectrum is recalculated and the command value signal is corrected, an effective response can be made.

In the third embodiment, it has been described that the harmonic spectrum is calculated in advance and stored in the look-up table in order to correct the voltage command. The harmonic spectrum may be calculated in real time inside the two processors 101. In the case where the frequency of the asymmetric carrier signal or the ratio between the signal increase period and the signal decrease period is frequently changed, the amount of data to be stored in the memory 102 increases. It may be better to calculate.

Embodiment 4
FIG. 11 is a configuration diagram of a power conversion device 110 according to the fourth embodiment of the present invention. As a difference from the third embodiment, the harmonic voltage distortion correction means 6 includes a subtractor 6a, a comparison means 6d that performs pulse width modulation of the voltage command using an asymmetric carrier signal, and a pulse train generated by the comparison means 6d. This is composed of harmonic calculation means 6c for calculating a harmonic spectrum by Fourier transform. In the harmonic voltage distortion correction means 6, the corrected voltage command is determined by subtracting the harmonic signal from the voltage command.
As an example of a method for calculating a harmonic spectrum, there is a method in which a pulse obtained as a result of pulse width modulation is actually subjected to Fourier transform. In addition, there are calculation methods using complex double Fourier series and switching functions. Actually, harmonics can be obtained more easily by actually Fourier-transforming the pulse, so that the harmonic calculation means 6c simply calculates and outputs the harmonics.

Here, the output of the asymmetric carrier signal generating means 4 and the voltage command are compared in the comparing means 6d to obtain the output of the pulse width modulation, and the harmonics are calculated in the harmonic calculating means 6c based on this output signal. A harmonic signal is calculated, and a subtractor 6a subtracts the calculated harmonic signal from the voltage command signal to generate a corrected command signal. In the third embodiment, the harmonics are set by using the harmonic reference means 6b, whereas here the harmonics are calculated by calculating in real time in the harmonic calculation means 6c. . For this reason, even if the carrier signal waveform is frequently changed, the amount of data to be stored can be reduced.

Embodiment 5
In the second to fourth embodiments, the configuration of the feedforward control is shown, but it is also possible to suppress the harmonic distortion due to the asymmetric carrier signal by the feedback control.
FIG. 12 is a configuration diagram of a power conversion apparatus according to Embodiment 5 of the present invention. In FIG. 12, the current detection means 7 is newly provided, and the harmonic current distortion caused by the asymmetric carrier signal is extracted by the harmonic extraction means 6e from the detected current or detection voltage obtained by the current detection means 7, and based on this. In this configuration, the voltage command is corrected. As a specific harmonic extraction method, a method using Fourier transform can be used.

Instead of the current detection means 7, a voltage detection means may be provided. Of course, both the current detection means 7 and the voltage detection means may be provided, and the voltage command may be corrected using both the voltage and current of the power conversion circuit 3. The correction value is determined by the control means 6f provided in the harmonic voltage distortion correction means 6, which is constituted by, for example, a PID controller. The PID controller is a type of controller that automatically adjusts the control amount y so that the deviation e between the command value r and the detected value x becomes zero, where e is the deviation. The control formula of the PID controller is generally expressed by formula (5) and formula (6).

Here, Kp is a proportional gain, KI is an integral gain, and KD is a differential gain. In the PID controller, the speed of convergence to the command value and the stability change by changing the gain. Various methods for adjusting the gain have been proposed.

For example, when the cosine component I2c and the sine component I2s of the second harmonic contained in the current flowing through the load 1 are found by the current detection means 7 and the harmonic extraction means 6e (this is the second harmonic contained in the current). The configuration method of the control means 6f (corresponding to the fact that the amplitude and phase are known) will be described in detail. Although it is desirable that both of these second harmonics are zero, in correcting the voltage command, what kind of second harmonic is superimposed on the voltage command becomes a problem.

If the impedance of the load 1 is known, it is easy to reversely calculate the second harmonic voltage to be superimposed. However, when the impedance is unknown or when the impedance fluctuates due to a disturbance factor such as temperature fluctuation, such a measure cannot be taken.
In such a case, it is preferable to determine the correction voltage using two PID controllers. The first PID controller is for setting the cosine component I2c of the second harmonic current to zero, and determines the cosine component of the second harmonic voltage to be superimposed. The second PID controller is for setting the sine component I2s to zero, and determines the sine component of the second harmonic voltage to be superimposed. If the cosine component and sine component are known, the amplitude V2h and the phase θ2 of the second harmonic shown in the equation (3) can be calculated. Then, the same correction as in the second and third embodiments may be applied. .
This method is effective even when there is a disturbance factor that increases harmonic distortion in addition to the asymmetric carrier signal, because the command value is manipulated so as to reduce the harmonic distortion while detecting current and voltage. is there.

Embodiment 6
In the second and third embodiments, feedforward compensation and feedback compensation have been described separately, but it is of course possible to use both feedforward compensation and feedback compensation.
FIG. 13 is a configuration diagram of the power conversion device according to the sixth embodiment of the present invention. In FIG. 13, the current detection means 7 and the harmonic voltage distortion correction means 6 are provided, and the harmonic voltage distortion correction means 6 includes a harmonic reference means 6b, a harmonic extraction means 6e, and a control means 6f. Both the feedforward compensation described in the third embodiment and the feedback compensation described in the fifth embodiment are performed. That is, as described in the third embodiment, since the command signal can be corrected more reliably by using the two control systems in combination based on the command signal, the harmonics are more effective. It becomes possible to reduce it.

Embodiment 7
FIG. 14 is a diagram showing a configuration of a power conversion device according to Embodiment 7 of the present invention.
In the seventh embodiment, the power converter for performing pulse width modulation using the asymmetric carrier signal described in the first to sixth embodiments is used, and one shunt current detection is further performed. . For this reason, the multiphase power conversion circuit 31 is a DC-AC converter capable of supplying DC power and multiphase AC power bidirectionally, and DC bus current detection means 7b for detecting a DC bus current flowing on the DC bus side. And a phase current restoring unit 8 for restoring the multiphase AC current flowing from the DC-AC converter switching pattern and the DC bus current to the multiphase AC side.
That is, as shown in FIG. 14, the first voltage command creating means 9 creates the first voltage command based on the separately supplied current command and frequency command. In the first voltage command, the harmonic voltage distortion correction means 6 corrects the voltage distortion due to the harmonic and sets the corrected first voltage command.
On the other hand, the second voltage command creating means 10 outputs a second voltage command in which a current detection waiting time necessary for restoring the polyphase alternating current is secured.

Then, in alternately outputting the corrected first voltage command and the second voltage command prepared for reliably restoring the current, the longer one of the signal increase period and the signal decrease period of the asymmetric carrier signal The first voltage command is output in the first period, and the second voltage command in which the current detection waiting time necessary for restoring the polyphase alternating current is secured is output in the shorter period. Yes.
It is the role of the first voltage command described above to control the power supplied to the load, but the final output voltage of the inverter is determined by a time average that takes into account both the first voltage command and the second voltage command. Is done. In many cases, the vector directions of the first voltage command and the second voltage command do not match, so the longer the period during which the second voltage command is output, the smaller the maximum voltage that the inverter can output. To do.
In the seventh embodiment, by using an asymmetric carrier signal, the output period of the second voltage command is shortened as much as possible, and the utilization factor of the power supply voltage is improved.

In the seventh embodiment, in order to drive the multiphase motor 1b to a desired state using the multiphase motor 1b as a load, the switching operation of the multiphase power conversion circuit 31 is controlled by the gate driver circuit 3c, and a direct current is applied. The phase current flowing through the multiphase motor 1b is restored from the DC bus current detected by the bus current detection means 7b and the gate signal of the multiphase power conversion circuit 31. The phase current is restored by the phase current restoration unit 8.

The first voltage command is a command signal for controlling the amplitude and frequency of the phase current of the multiphase motor 1b to desired values, and is determined by the first voltage command creating means 9 based on the current command and the frequency command. The This determination can be made by a general current control method such as vector control. This first voltage command is corrected by the harmonic voltage distortion correction means 6 to generate a corrected first voltage command. The voltage command selection unit 11 selects which of the corrected first voltage command and second voltage command is transmitted to the comparison unit 5.

When the corrected first voltage command is sent to the comparison means 5, the gate signal is determined based on the asymmetric carrier signal from the asymmetric carrier signal generation means 4, and the multiphase power conversion circuit 31 operates to operate the multiphase motor. Power is supplied to 1b and driven.
When the second voltage command is sent to the comparison unit 5, a command for detecting the DC bus current is issued from the comparison unit 5 to the multiphase power conversion circuit 31 and the phase current restoring unit 8.

Next, a basic mechanism of phase current restoration in the seventh embodiment will be described.
The upper and lower switches of the voltage-type three-phase inverter basically operate in a complementary manner. That is, in the multiphase power conversion circuit 31, when the upper switch is on, the lower switch is off, and when the lower switch is on, the upper switch is off. The current path of the voltage-type three-phase inverter is determined by the gate signal. For example, when the gate signal on the upper side of the u phase is on and the gate signals on the upper side of the v phase and the upper side of the w phase are off, the inverter However, the current flowing in the DC bus section of the inverter is equal to the u-phase current of the three-phase motor. Therefore, if the DC bus current is detected while outputting the voltage vector V1, the value of the u-phase current can be obtained. In addition, when the gate signal on the upper side of the u-phase and the upper side of the v-phase is on and the gate signal on the upper side of the w-phase is off, the inverter outputs a voltage vector V2, but the current flowing in the DC bus section of the inverter is three-phase. It becomes equal to the w-phase current of the motor.

Therefore, if the DC bus current is detected while the voltage vector V2 is being output, the value of the w-phase current can be obtained. In the voltage-type three-phase inverter, there are eight combinations of switch states. Of these, six types of combinations can detect the current of any phase. The combination of switches that cannot detect the phase current is a combination in which the gate signals on the u-phase upper side, the v-phase upper side, and the w-phase upper side are all the same. There are two types. The voltage vectors output at this time are called V0 and V7, respectively, but when V0 or V7 is output, the phase current flowing through the motor circulates in the motor, so basically the current flows through the DC bus of the inverter. Does not flow. If the phase current for two phases can be restored, the current of the other phase can be calculated according to Kirchhoff's current law. By utilizing this fact and detecting the DC bus current with good timing, it is possible to detect all three-phase phase currents flowing through the motor with a single current sensor.

FIG. 15 is an explanatory diagram for explaining the principle of the phase current restoring method according to the seventh embodiment of the present invention. In this embodiment, the first voltage command Vu1 *, Vv1 *, Vw1 * after correction by applying harmonic voltage distortion correction to the first voltage command for current control and the second voltage suitable for current detection. Control is performed while appropriately selecting the voltage commands Vu2 *, Vv2 *, and Vw2 *.
In FIG. 15, since the signal decrease period of the asymmetric carrier signal is shorter than the signal increase period, the second voltage commands Vu2 *, Vv2 *, Vw2 * are output in the signal decrease period, and the first in the signal increase period. Voltage commands Vu1 *, Vv1 *, and Vw1 * are output.

When the signal increase period is shorter than the signal decrease period, the second voltage commands Vu2 *, Vv2 *, Vw2 * are output during the signal increase period, and the first voltage commands Vu1 *, Vv1 * are output during the signal decrease period. , Vw1 * is output.
In FIG. 15, the voltage vector of the inverter changes in the order of V1, V2, V7, V2, and V1. In order to restore the three-phase current, it is necessary to continue outputting voltage vectors other than V0 and V7 for a predetermined period. Here, the waiting time required for current detection is Tw. Note that it is possible to determine how long Tw should be set from the waveform of the DC bus current.

The corrected first voltage commands Vu1 *, Vv1 *, and Vw1 * are almost determined by the convenience of current control. In FIG. 15, when the output period of V1 in the signal increase period is t1 and the output period of V2 is t2, both t1 and t2 are not necessarily larger than the waiting time Tw, so the second voltage command Vu2 * , Vv2 *, Vw2 * and the asymmetric carrier signal are appropriately set to fix the voltage vector during the waiting time Tw.

In the signal decrease period of FIG. 15, the voltage vector is first fixed to V1, and the DC bus current is detected after a waiting time necessary for current detection has elapsed. As described above, when outputting V1, the DC bus current is equal to the u-phase current iu. After the first DC bus current detection is completed, the voltage vector is changed to V2, and a waiting time necessary for current detection elapses in this state. After the waiting time elapses, the DC bus current is detected again. The DC bus current when V2 is output is equal to the w-phase current iw. If the u-phase current iu and the w-phase current iw are known, the v-phase current iv can be obtained by Kirchhoff's current law (iu + iv + iw = 0).
As described above, the first voltage command is obtained by a general control method, and the correction of the harmonic distortion can be performed by the method described up to the sixth embodiment.

What is important in this embodiment is how to set the second voltage command.
As described above, the final output voltage of the inverter is determined by a time average taking into account both the first voltage command and the second voltage command. If the second voltage command is a high-frequency voltage signal having an average value of zero, the output voltage is approximately equal to the first voltage command, but in that case, two disadvantages arise. One is that the maximum voltage that can be output decreases by the period during which the second voltage command is output. The other is that application of a high-frequency voltage may cause problems such as torque pulsation, vibration, and noise. In order to avoid such a disadvantage, in this embodiment, the second voltage command is determined as follows without being concerned with the average value of the second voltage command being zero.
First, the magnitude relationship between the first voltage commands Vu1 *, Vv1 *, and Vw1 * is examined. Then, the second voltage command is set to the maximum value of the carrier signal, the intermediate value of the carrier signal, and the minimum value of the carrier signal in order of the phase in which the first voltage command is large. For example, in the case of FIG. 15, the first voltage command is the u-phase, the next largest is the v-phase, and the smallest is the w-phase, so the second u-phase voltage command Vu2 * is the carrier The maximum value of the signal, the second v voltage command Vv2 * is the intermediate value of the carrier signal, and the second w-phase voltage command Vw2 * is the minimum value of the carrier signal.
When the second voltage command is determined in this way, the phase difference between the vectors of the first voltage command and the second voltage command becomes small. Thereby, since the fall of the maximum voltage by a 2nd voltage command is suppressed small, a power supply voltage can be utilized effectively. Since no high frequency voltage is applied, problems such as torque pulsation, vibration, and noise hardly occur.

In this method, since the average value of the second voltage command is not zero, a slight error occurs between the first voltage command and the final output voltage, but it is easy to correct this error. This error may be calculated and added in the opposite direction to the first voltage command. This error is calculated by calculating the difference between the second voltage command Vu2 *, Vv2 *, Vw2 * and the first voltage command Vu1 *, Vv1 *, Vw1 * for each phase. It can be obtained by multiplying the time for outputting the second voltage command and dividing by the time for outputting the second voltage command.

Also, if the time during which the second voltage command is output is relatively shorter than the time during which the corrected first voltage command is output by actively utilizing the asymmetric carrier signal, the error itself is reduced. Therefore, in some cases, error correction becomes unnecessary.
Next, a method for determining an asymmetric carrier signal will be described. First, the frequency fc of the carrier signal is determined from the viewpoint of heat generation of the inverter. The period Tc of the carrier signal is obtained by Tc = 1 / fc. It is preferable to set the shorter of the signal increase period and the signal decrease period to the same value as 2Tw or slightly longer than 2Tw. In FIG. 15, the signal decrease period is set to approximately 2 Tw, and the signal increase period is set to approximately Tc−2Tw.
The second voltage command and asymmetric carrier signal setting method described in this embodiment is performed in order to reliably and easily restore the phase current, and to minimize the deviation of the current detection timing and the control delay. It is.

Suppose that control is started from the moment when the carrier signal reaches the maximum value, the DC bus current is detected twice at almost the shortest timing to restore the three-phase current. Since the voltage command is normally updated at the top of the carrier signal, it is necessary to finish the control calculation by the next timing when the carrier signal becomes the maximum, but if the three-phase current is restored at the shortest timing in this way, It is easy to secure time for performing the control calculation. Therefore, since control can be performed without using the current before one sampling, it is not necessary to increase the control delay accordingly. Moreover, since the deviation of the current detection timing can be suppressed as much as possible, the current restoration error can also be suppressed. Furthermore, as described above, shortening the output time of the second voltage commands Vu2 *, Vv2 *, and Vw2 * also has an effect of improving the voltage utilization rate of the inverter. In addition, in this embodiment, Since the average value of the second voltage command is not zero, a larger voltage can be output. Thereby, it is possible to improve the rotational speed-torque characteristics of the multiphase motor.

From these facts, in this case, it seems better that there is a difference in the length of the signal increase period and the signal decrease period of the carrier signal. However, when an asymmetric carrier signal is used, low-order harmonics are noticeable when the motor frequency and the carrier signal frequency approach each other. The greater the difference between the signal increase period and the signal decrease period, the more serious the problem of low-order harmonics.
Further, the present invention can be easily implemented by a general computer. The present invention provides a motor drive system that can be used in combination with a one-shunt current restoration technique using an asymmetric carrier signal and has low vibration and noise with an inexpensive apparatus configuration. In addition, since it is possible to suppress harmonics due to the asymmetric triangular wave without increasing the frequency of the carrier signal, the switching loss is reduced and the heat dissipation component can be downsized.

In the seventh embodiment, the multiphase motor 1b is described as a three-phase motor, and the multiphase power conversion circuit 31 is described as a voltage-type three-phase inverter. However, the same applies to motors and power conversion circuits having four or more phases. I can do it without problems. In FIG. 14, the harmonic voltage distortion correction means 6 corrects only the first voltage command, but similarly corrects the second voltage command in addition to the first voltage command. You may do it.

Further, within the scope of the present invention, the present invention can freely combine the embodiments, and can arbitrarily change or omit any component of the embodiments.

Claims

A power conversion circuit that performs power conversion by switching operation of a semiconductor device, a signal decrease period required for the carrier signal to change from the maximum value to the minimum value and a signal increase period required for the change from the minimum value to the maximum value are different An asymmetric carrier signal generating means for generating an asymmetric carrier signal, a command value generating means for generating a command value, the asymmetric carrier signal from the asymmetric carrier signal generating means and the command value of the command value generating means, Is corrected based on the asymmetric carrier signal and outputs a corrected command value, and the power conversion circuit compares the corrected command value from the command value correction means with the asymmetric carrier signal. A power conversion device comprising comparison means for determining a gate signal of the switching operation.
The command value correction unit is a harmonic voltage distortion correction unit that corrects a command value of the output of the power conversion circuit using a harmonic generated by the asymmetric carrier signal, and the harmonic voltage distortion correction unit includes The power converter according to claim 1, wherein second harmonics are suppressed among the harmonics.
3. The harmonic voltage distortion correction unit includes a subtracter, and the subtracter subtracts the harmonic from the command value and outputs the corrected command value to the comparison unit. Power converter.
The harmonic voltage distortion correction means includes harmonic reference means for outputting a correction signal with reference to a harmonic component generated by the asymmetric carrier signal based on the command value, and using the correction signal, the command value The power conversion device according to claim 3, wherein the corrected command value is output after correcting the correction.
The harmonic voltage distortion correction means includes harmonic calculation means for calculating a harmonic from the command value and the asymmetric carrier signal, and outputs the corrected command value by subtracting the calculated harmonic signal from the command value. The power conversion device according to claim 3, wherein:
Detection means for detecting the output of the power conversion circuit, harmonic extraction means for extracting harmonic distortion caused by the asymmetric carrier signal from the detection value obtained from the detection means, and a correction signal by the output of the harmonic extraction means The power converter according to claim 3, further comprising a control unit that sets
The harmonic voltage distortion correction means includes harmonic reference means for outputting a correction signal with reference to a harmonic component generated by the asymmetric carrier signal based on the command value, and using the correction signal, the command value And the first correction signal is set, the correction signal set by the control means is set as the second correction signal, and the first correction signal and the second correction signal are used to The power conversion device according to claim 6, wherein the command value is corrected and the corrected command value is output.
The power conversion circuit is a multiphase power conversion circuit capable of supplying DC power and multiphase AC power bidirectionally,
The command value generating means generates a first command as a command value,
DC bus current detection means provided in the multiphase power conversion circuit, switching current of the multiphase power conversion circuit and phase current flowing to the multiphase AC side from the DC bus current detected by the DC bus current detection means are restored. A phase current restoring unit that outputs, a second command creating unit that outputs a second command for restoring the phase current, and any one of the corrected command value and the second command from the command value correcting unit Voltage command selection means for selecting whether to send a command to the comparison means, the voltage command selection means is the second of the signal increase period and the signal decrease period of the asymmetric carrier signal in the shorter period The power converter according to claim 1, wherein a command is output.