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WO2016156659A1 - Ald-deposited graphene on a conformal seed layer - Google Patents

Ald-deposited graphene on a conformal seed layer Download PDF

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Publication number
WO2016156659A1
WO2016156659A1 PCT/FI2015/050233 FI2015050233W WO2016156659A1 WO 2016156659 A1 WO2016156659 A1 WO 2016156659A1 FI 2015050233 W FI2015050233 W FI 2015050233W WO 2016156659 A1 WO2016156659 A1 WO 2016156659A1
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WO
WIPO (PCT)
Prior art keywords
layer
ald
graphene
transition metal
electronic product
Prior art date
Application number
PCT/FI2015/050233
Other languages
French (fr)
Inventor
Juhana Kostamo
Timo Malinen
Wei-Min Li
Original Assignee
Picosun Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Picosun Oy filed Critical Picosun Oy
Priority to PCT/FI2015/050233 priority Critical patent/WO2016156659A1/en
Priority to TW105106309A priority patent/TW201708600A/en
Publication of WO2016156659A1 publication Critical patent/WO2016156659A1/en

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523—Pulsed gas flow or change of composition over time
    • C23C16/45525—Atomic layer deposition [ALD]
    • C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45536—Use of plasma, radiation or electromagnetic fields
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • C23C16/0281—Deposition of sub-layers, e.g. to promote the adhesion of the main coating of metallic sub-layers
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/26—Deposition of carbon only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02491—Conductive materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02527—Carbon, e.g. diamond-like carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1606—Graphene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/305—Sulfides, selenides, or tellurides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C23C16/342—Boron nitride
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02568—Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds

Definitions

  • the present invention generally relates to atomic layer deposition techniques in which material is deposited onto a substrate surface.
  • Atomic Layer Deposition is a special chemical deposition method based on sequential introduction of at least two reactive precursor species to at least one substrate in a reaction space.
  • Plasma enhanced ALD is an ALD method in which additional reactivity to the substrate surface is delivered in the form of plasma-produced species.
  • a deposition method comprising:
  • ALD atomic layer deposition
  • a direct method of depositing graphene by ALD on the electronic product, or a substrate is provided (in contrast to methods in which graphene is transferred from a foil).
  • the transition metal ALD layer deposited on the electronic product (or substrate) has a similar crystal lattice as graphene providing a seed layer to catalyze the deposition of graphene.
  • a conformal graphene ALD layer is deposited directly on a conformal seed layer deposited on a substrate that has a three-dimensional structure resulting in the graphene layer also to form a three-dimensional surface.
  • a complete device can be produced by ALD without any transfer step of graphene.
  • the deposition is "on an electronic product" although the electronic product would be unfinished or only in progress when the depositions are performed.
  • electronic product herein refers to various products in the field of electronics, optoelectronics and photonics, microelectromechanical systems (MEMS), nanoelectromechanical systems (NEMS), sensors, detectors and similar.
  • a conformal graphene layer of a desired thickness is deposited onto a conformal seed layer.
  • the transition metal ALD layer is a noble metal ALD layer. In certain example embodiments, the transition metal ALD layer is a copper layer. In certain example embodiments, the transition metal ALD layer is a platinum layer.
  • said depositing a transition metal ALD layer comprises depositing a conformal three-dimensional layer and said depositing a graphene ALD layer comprises depositing a further conformal three-dimensional layer.
  • a conformal three-dimensional layer of graphene herein means that the graphene ALD layer follows a three-dimensional surface (although the crystal structure of graphene as such may remain a two-dimensional crystal structure).
  • the thickness of the graphene ALD layer may be one sheet (i.e., a monolayer) or multiple layers.
  • said graphene layer is deposited by PEALD (plasma-enhanced ALD).
  • PEALD plasma-enhanced ALD
  • the graphene grows conformally onto the transition metal seed layer.
  • said transition metal ALD layer is deposited by thermal ALD or by PEALD.
  • the transition metal grows conformally onto the electronic product.
  • an ALD layer of other 2D material such as M0S2, WS2 and/or BN is deposited by an ALD method onto the deposited graphene ALD layer.
  • the other 2D material layer may have different propertied compared to graphene. In certain example embodiments, this layer is semiconducting.
  • multiple layers of said other material is deposited by an ALD method.
  • the other 2D material layer(s) may be deposited by thermal ALD or PEALD.
  • a further graphene ALD layer is deposited onto said ALD layer(s) of other 2D material layer(s) by an ALD method, such as by thermal ALD or PEALD.
  • the further graphene ALD layer forms an electrode. Accordingly, in certain example embodiments, a complete transistor stack or structure is produced directly on a substrate. This is performed without separate transfer of graphene (from a foil or similar).
  • the depositions herein may form a manufacturing phase of the electronic product.
  • the deposition can be scaled up to high aspect ratios.
  • said electronic product is selected from the group comprising: a nanodevice, an integrated circuit (IC) device, a microelectromechanical systems (MEMS) device, a nanoelectromechanical systems (NEMS) device, a photonic device, a display, a memory, and a sensor.
  • IC integrated circuit
  • MEMS microelectromechanical systems
  • NEMS nanoelectromechanical systems
  • the electronic product may be, for example, a transistor, such as a two- dimensional field effect transistor, or a three-dimensional transistor such as a FinFET (Fin-shaped Field Effect Transistor) or HEMT (High Electron Mobility Transistor), a nanowire or quantum dot transistor, a nano-sized memory, an OLED (Organic Light-Emitting Diode) display or an electrochromic display.
  • a transistor such as a two- dimensional field effect transistor, or a three-dimensional transistor such as a FinFET (Fin-shaped Field Effect Transistor) or HEMT (High Electron Mobility Transistor), a nanowire or quantum dot transistor, a nano-sized memory, an OLED (Organic Light-Emitting Diode) display or an electrochromic display.
  • a transistor such as a two- dimensional field effect transistor, or a three-dimensional transistor such as a FinFET (Fin-shaped Field Effect Transistor) or HEMT (High Electron Mobility Transistor
  • said deposited graphene ALD layer forms an electrode of the electronic product. In certain example embodiments, said deposited graphene ALD layer forms a transistor channel of the electronic product. Accordingly, in certain example embodiments, said deposited graphene ALD layer provides an electrode, or a transistor channel, for the electronic product. In certain example embodiments, said deposited graphene ALD layer forms a heat dissipation layer.
  • the presented embodiments thus can be used to realise a high- mobility device and/or to form a structure effectively dissipating heat on a surface of an electronic product or device.
  • graphene can be used as a flexible transparent conductive electrode on a display, such as an OLED or electrochromic display, or graphene can be used as an electrode, for example, for in a nanosized memory.
  • an electronic product comprising:
  • transition metal ALD layer deposited by an ALD (atomic layer deposition) method on the electronic product
  • the transition metal ALD layer is a copper layer or a platinum layer.
  • said transition metal ALD layer is a conformal three-dimensional layer and said graphene ALD layer is a further conformal three- dimensional layer.
  • said graphene ALD layer is an ALD layer deposited by PEALD (plasma-enhanced ALD).
  • said transition metal ALD layer is an ALD layer deposited by thermal ALD or by PEALD.
  • said electronic product is selected from the group comprising: a nanodevice, an integrated circuit (IC) device, a microelectromechanical systems (MEMS) device, a photonic device, a display, a memory, and a sensor.
  • IC integrated circuit
  • MEMS microelectromechanical systems
  • said deposited graphene ALD layer provides a channel of a transistor. In certain example embodiments, said deposited graphene ALD layer provides an electrode.
  • a device comprising the electronic product of the second example aspect or of any of its embodiments.
  • an ALD reactor comprising a control system configured to cause the ALD reactor to perform the method of the first example aspect or of any of its embodiments.
  • a method comprising producing a two-dimensional transistor by an ALD method in an ALD reactor comprising:
  • Said other 2D material may be, for example, M0S2, WS2, or BN.
  • Said different properties may be, for example, semiconductive properties.
  • a complete 2D transistor structure with the graphene layers functioning as electrodes is produced.
  • Different non-binding example aspects and embodiments of the present invention have been illustrated in the foregoing. The above embodiments are used merely to explain selected aspects or steps that may be utilized in implementations of the present invention. Some embodiments may be presented only with reference to certain example aspects of the invention. It should be appreciated that corresponding embodiments may apply to other example aspects as well. Any appropriate combinations of the embodiments may be formed. BRIEF DESCRIPTION OF THE DRAWINGS
  • Fig. 1 shows a flow chart of a method in accordance with an example embodiment
  • FIG. 2-5 show depictive sectional views of electronic products in accordance with certain example embodiments
  • Fig. 6 shows an ALD reactor in accordance with an example embodiment
  • Fig. 7 shows an ALD reactor control system in accordance with an example embodiment
  • Fig. 8 shows a flow chart of a method in accordance with another example embodiment.
  • Fig. 1 shows a flow chart of a method in accordance with an example embodiment.
  • a conformal transition metal seed layer is deposited by ALD onto an electronic product (or electronic component).
  • the transition metal seed layer is deposited directly onto a surface of the electronic product in an ALD reactor, and it is conformal to the surface.
  • the layer may be a three-dimensional layer. Accordingly, the layer may be conformal to said surface in three dimensions.
  • the transition metal seed layer is a copper layer.
  • the transition metal seed layer is a platinum layer. These materials have been demonstrated excellent growth on a three-dimensional surface. In other embodiments, another transition metal is used.
  • a graphene layer of desired thickness is deposited directly onto the transition metal seed layer.
  • the graphene layer conforms to the transition metal seed layer. Accordingly, when the transition metal seed layer is a three- dimensional layer, also the graphene layer becomes a three-dimensional layer.
  • the graphene layer may be deposited in the same ALD reactor or in a further ALD reactor.
  • the depositions may form manufacturing steps of the product.
  • the transition metal seed layer is deposited, for example, by thermal ALD or plasma-enhanced ALD (PEALD).
  • PEALD plasma-enhanced ALD
  • the graphene layer is preferable deposited by PEALD.
  • the source materials (precursors) used are known to a skilled person.
  • Fig. 2 shows rough examples of integrated circuit (IC) devices which can be formed by using the presented method.
  • a stacked capasitor or a transistor 10A, such as a FinFET is shown on a substrate on the right side of the dotted line interface, and a trench capacitor or micro channel 10B is shown on a substrate on the left side.
  • a three-dimensional conformal transition metal seed layer 1 1 is deposited and thereon a graphene layer 12.
  • the deposited graphene ALD layer may form a transistor channel of a high mobility transistor, such as a HEMT (High Electron Mobility Transistor).
  • HEMT High Electron Mobility Transistor
  • FIG. 3 shows a schematic view of a transistor 30 with a gate 32, gate dielectric 31 on top of the gate 32, source S and drain D electrodes on the gate dielectric and a graphene channel between the electrodes S and D.
  • the channel is formed by first depositing the transition metal seed layer 1 1 on top of the gate dielectric 31 and then depositing the graphene layer 12 on the transition metal seed layer by the presented method.
  • the transistor 30 is otherwise manufactured in a conventional manner.
  • Fig. 4 shows another application of the presented method. A layered structure of a display 40 is formed by using the presented method.
  • the structure contains the following layers: a first electrode layer 41 , a first insulator layer 42, a light emitting layer such as a phosphor layer 43, a second insulator layer 44, a thin transition metal seed layer 1 1 and a thin graphene layer 12.
  • the structure is sandwiched between the first electrode layer 41 and the thin graphene layer 12 providing a second electrode.
  • the thin transition metal seed layer 1 1 and the thin graphene layer 12 are, in an embodiment, so thin that they are transparent layers in the range of visible light.
  • the first electrode layer 41 may be transparent or non- transparent depending on the implementation.
  • the layers 41 -44 are manufactured in a conventional manner.
  • the transition metal seed layer 1 1 is deposited by ALD on top of the manufactured structure, and the graphene layer 12 on top of the transition metal seed layer 1 1 in the described manner.
  • Fig. 5 shows a rough example of a graphene-based optical modulator 50 which has a first graphene containing layer 51 A parallel with a second graphene containing layer 51 B.
  • the first layer 51 A is connected to a first electrode 52 and the second layer 51 B to a second electrode 53.
  • the layers 51 A and 51 B are separated by an intermediate layer 56 and they overlap on the area of a waveguide 55.
  • the first layer 51 A is manufactured by first depositing a thin transition metal seed layer 1 1 on the waveguide 55 and a base dielectric layer 54 and then depositing a graphene layer 12 directly on the transition metal seed layer 1 1 in the described manner.
  • the second layer 51 B is manufactured by first depositing a thin transition metal seed layer 1 1 on the intermediate layer 56 and then depositing a graphene layer 12 directly on the transition metal seed layer 1 1 in the described manner.
  • Both graphene containing layers 51 A and 51 B (and layers 12) form a three- dimensional surface conformally following the underneath structure.
  • Fig. 6 shows an ALD reactor for depositing the described layers 1 1 and 12.
  • the ALD reactor comprises a reaction chamber 60 wherein a substrate 10 (e.g., a set of electronic products) can be loaded in an appropriate manner (for example, can be integrated to a production line when side-loaded so that a production line can travel via the ALD reactor).
  • a plasma source 65 (here: remote plasma source) is in fluid communication via an in-feed part 64 with the reaction chamber 60.
  • the in-feed part 64 is a widening in-feed part having a form widening towards the reaction chamber 60.
  • a plasma source precursor in-feed line 61 travels via the plasma source 65 and the in-feed part 64 into the reaction chamber 60.
  • Thermal ALD in-feed lines 62 and 63 enter the reaction chamber 60 from the sides.
  • the lines 62 and 63 may travel via a reaction chamber lid or similar (not shown).
  • Reaction residue from the reaction chamber 60 is pumped via a vacuum pump 66 into exhaust.
  • the ALD reactor shown in Fig. 6 is configured to deposit the transition metal seed layer 1 1 onto the substrate by thermal ALD or by PEALD, and graphene by PEALD.
  • precursors flow into the reaction chamber 60 via the thermal ALD lines 62 and 63.
  • the reaction chamber 60 is heated by a heating arrangement 67 surrounding the reaction chamber 60.
  • radicals are formed by the plasma source 65 from precursor vapor flowing along in-feed line 61 though the plasma source 65.
  • the formed radicals (and/or formed other excited species) flow into the reaction chamber 60 via the in-feed part 64.
  • the deposition process comprising ALD deposition of the transition metal seed layer 1 1 and graphene layer 12 is controlled by a control system.
  • the described ALD reactor is a computer-controlled system.
  • a computer program stored into a memory of the system comprises instructions, which upon execution by at least one processor of the system cause the ALD reactor to operate as instructed.
  • the instructions may be in the form of computer- readable program code.
  • Fig. 7 shows a rough block diagram of an ALD reactor control system 700.
  • HMI human machine interface
  • the control box 702 comprises a general purpose programmable logic control (PLC) unit.
  • PLC general purpose programmable logic control
  • the control box 702 comprises at least one microprocessor for executing control box software comprising program code stored in a memory, dynamic and static memories, I/O modules, A D and D/A converters and power relays.
  • the control box 702 sends electrical power to pneumatic controllers of in-feed line valves (not shown in Fig. 6) of the ALD reactor, and has two-way communication with in-feed line mass flow controllers (not shown in Fig. 6), and controls the operation of the plasma source and radical generation, as well as otherwise controls the operation of the ALD reactor.
  • the control box 702 may measure and relay probe readings from the ALD reactor to the HMI terminal 706.
  • a dotted line 716 indicates an interface line between the ALD reactor parts and the control box 702.
  • a complete 2D transistor is produced. First a seed layer is deposited on a substrate. A graphene layer is then directly deposited on the seed layer without further transfer the graphene layer. Other 2D material(s), such as M0S2, or WS2, or BN, having different properties, such as semiconductive properties, is deposited on top of graphene, and a complete 2D transistor is finalized by further depositing a top graphene layer as an electrode.
  • M0S2, or WS2, or BN having different properties, such as semiconductive properties
  • Fig. 8 shows a flowchart of the transistor direct deposition method.
  • a transition metal seed layer is deposited by an ALD method on a substrate.
  • a graphene ALD layer of desired thickness is deposited by an ALD method on the seed layer.
  • 2D semiconducting material is deposited on the graphene layer by an ALD method.
  • a further graphene ALD layer is deposited on said 2D layer by an ALD method to complete the transistor structure.

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Abstract

A deposition method, comprising depositing a transition metal ALD layer by an ALD (atomic layer deposition) method on an electronic product in an ALD reactor, and depositing a graphene ALD layer (12) on top of the transition metal ALD layer by an ALD method using the transition metal ALD layer as a seed layer (11). The electronic product may be a product, such as a transistor (30) with a gate (32) and a gate dielectric (31).

Description

ALD-DEPOSITED GRAPHENE ON A CONFORMAL SEED LAYER
FIELD OF THE INVENTION
The present invention generally relates to atomic layer deposition techniques in which material is deposited onto a substrate surface.
BACKGROUND OF THE INVENTION
This section illustrates useful background information without admission of any technique described herein representative of the state of the art.
Atomic Layer Deposition (ALD) is a special chemical deposition method based on sequential introduction of at least two reactive precursor species to at least one substrate in a reaction space. Plasma enhanced ALD (PEALD) is an ALD method in which additional reactivity to the substrate surface is delivered in the form of plasma-produced species. SUMMARY
According to a first example aspect of the invention there is provided a deposition method, comprising:
depositing a transition metal ALD layer by an ALD (atomic layer deposition) method on an electronic product in an ALD reactor; and
depositing a graphene ALD layer on top of the transition metal ALD layer by an ALD method using the transition metal ALD layer as a seed layer.
A direct method of depositing graphene by ALD on the electronic product, or a substrate, is provided (in contrast to methods in which graphene is transferred from a foil). In certain example embodiments, the transition metal ALD layer deposited on the electronic product (or substrate) has a similar crystal lattice as graphene providing a seed layer to catalyze the deposition of graphene. In certain example embodiments, a conformal graphene ALD layer is deposited directly on a conformal seed layer deposited on a substrate that has a three-dimensional structure resulting in the graphene layer also to form a three-dimensional surface. A complete device can be produced by ALD without any transfer step of graphene.
It should be noted that herein the deposition is "on an electronic product" although the electronic product would be unfinished or only in progress when the depositions are performed. The term electronic product herein refers to various products in the field of electronics, optoelectronics and photonics, microelectromechanical systems (MEMS), nanoelectromechanical systems (NEMS), sensors, detectors and similar.
In certain example embodiments, a conformal graphene layer of a desired thickness is deposited onto a conformal seed layer.
In certain example embodiments, the transition metal ALD layer is a noble metal ALD layer. In certain example embodiments, the transition metal ALD layer is a copper layer. In certain example embodiments, the transition metal ALD layer is a platinum layer.
In certain example embodiments, said depositing a transition metal ALD layer comprises depositing a conformal three-dimensional layer and said depositing a graphene ALD layer comprises depositing a further conformal three-dimensional layer. A conformal three-dimensional layer of graphene herein means that the graphene ALD layer follows a three-dimensional surface (although the crystal structure of graphene as such may remain a two-dimensional crystal structure).
Depending on the embodiment, the thickness of the graphene ALD layer may be one sheet (i.e., a monolayer) or multiple layers.
In certain example embodiments, said graphene layer is deposited by PEALD (plasma-enhanced ALD). The graphene grows conformally onto the transition metal seed layer.
In certain example embodiments, said transition metal ALD layer is deposited by thermal ALD or by PEALD. The transition metal grows conformally onto the electronic product.
In certain example embodiments, an ALD layer of other 2D material, such as M0S2, WS2 and/or BN is deposited by an ALD method onto the deposited graphene ALD layer. The other 2D material layer may have different propertied compared to graphene. In certain example embodiments, this layer is semiconducting. In certain example embodiments, multiple layers of said other material is deposited by an ALD method. The other 2D material layer(s) may be deposited by thermal ALD or PEALD. In certain example embodiments, a further graphene ALD layer is deposited onto said ALD layer(s) of other 2D material layer(s) by an ALD method, such as by thermal ALD or PEALD. In certain example embodiments, the further graphene ALD layer forms an electrode. Accordingly, in certain example embodiments, a complete transistor stack or structure is produced directly on a substrate. This is performed without separate transfer of graphene (from a foil or similar).
The depositions herein may form a manufacturing phase of the electronic product. The deposition can be scaled up to high aspect ratios. In certain example embodiments, said electronic product is selected from the group comprising: a nanodevice, an integrated circuit (IC) device, a microelectromechanical systems (MEMS) device, a nanoelectromechanical systems (NEMS) device, a photonic device, a display, a memory, and a sensor. The electronic product may be, for example, a transistor, such as a two- dimensional field effect transistor, or a three-dimensional transistor such as a FinFET (Fin-shaped Field Effect Transistor) or HEMT (High Electron Mobility Transistor), a nanowire or quantum dot transistor, a nano-sized memory, an OLED (Organic Light-Emitting Diode) display or an electrochromic display. Examples of photonic devices are for example detectors, modulators and Terahertz devices. In certain example embodiments, the sensor is a touch sensor.
In certain example embodiments, said deposited graphene ALD layer forms an electrode of the electronic product. In certain example embodiments, said deposited graphene ALD layer forms a transistor channel of the electronic product. Accordingly, in certain example embodiments, said deposited graphene ALD layer provides an electrode, or a transistor channel, for the electronic product. In certain example embodiments, said deposited graphene ALD layer forms a heat dissipation layer. The presented embodiments thus can be used to realise a high- mobility device and/or to form a structure effectively dissipating heat on a surface of an electronic product or device. By the presented embodiments graphene can be used as a flexible transparent conductive electrode on a display, such as an OLED or electrochromic display, or graphene can be used as an electrode, for example, for in a nanosized memory.
According to a second example aspect of the invention there is provided an electronic product, comprising:
a transition metal ALD layer deposited by an ALD (atomic layer deposition) method on the electronic product; and
a graphene ALD layer on top of the transition metal ALD layer deposited by an ALD method using the transition metal ALD layer as a seed layer.
In certain example embodiments, the transition metal ALD layer is a copper layer or a platinum layer.
In certain example embodiments, said transition metal ALD layer is a conformal three-dimensional layer and said graphene ALD layer is a further conformal three- dimensional layer.
In certain example embodiments, said graphene ALD layer is an ALD layer deposited by PEALD (plasma-enhanced ALD). In certain example embodiments, said transition metal ALD layer is an ALD layer deposited by thermal ALD or by PEALD.
In certain example embodiments, said electronic product is selected from the group comprising: a nanodevice, an integrated circuit (IC) device, a microelectromechanical systems (MEMS) device, a photonic device, a display, a memory, and a sensor.
In certain example embodiments, said deposited graphene ALD layer provides a channel of a transistor. In certain example embodiments, said deposited graphene ALD layer provides an electrode.
According to a third example aspect of the invention there is provided a device comprising the electronic product of the second example aspect or of any of its embodiments.
According to a fourth example aspect of the invention there is provided an ALD reactor, comprising a control system configured to cause the ALD reactor to perform the method of the first example aspect or of any of its embodiments.
According to a yet further example aspect of the invention there is provided a method comprising producing a two-dimensional transistor by an ALD method in an ALD reactor comprising:
depositing a transition metal ALD seed layer on a substrate;
depositing a graphene ALD layer on the seed layer;
depositing an ALD layer of other 2D material with different properties on the graphene ALD layer; and
depositing a further graphene ALD layer on top of the ALD layer of other 2D material.
Said other 2D material may be, for example, M0S2, WS2, or BN. Said different properties may be, for example, semiconductive properties. A complete 2D transistor structure with the graphene layers functioning as electrodes is produced. Different non-binding example aspects and embodiments of the present invention have been illustrated in the foregoing. The above embodiments are used merely to explain selected aspects or steps that may be utilized in implementations of the present invention. Some embodiments may be presented only with reference to certain example aspects of the invention. It should be appreciated that corresponding embodiments may apply to other example aspects as well. Any appropriate combinations of the embodiments may be formed. BRIEF DESCRIPTION OF THE DRAWINGS
The invention will now be described, by way of example only, with reference to the accompanying drawings, in which:
Fig. 1 shows a flow chart of a method in accordance with an example embodiment;
Fig. 2-5 show depictive sectional views of electronic products in accordance with certain example embodiments;
Fig. 6 shows an ALD reactor in accordance with an example embodiment;
Fig. 7 shows an ALD reactor control system in accordance with an example embodiment; and
Fig. 8 shows a flow chart of a method in accordance with another example embodiment.
DETAILED DESCRIPTION
Fig. 1 shows a flow chart of a method in accordance with an example embodiment. In step 1 , a conformal transition metal seed layer is deposited by ALD onto an electronic product (or electronic component). The transition metal seed layer is deposited directly onto a surface of the electronic product in an ALD reactor, and it is conformal to the surface. The layer may be a three-dimensional layer. Accordingly, the layer may be conformal to said surface in three dimensions. In certain example embodiments, the transition metal seed layer is a copper layer. In other embodiments, the transition metal seed layer is a platinum layer. These materials have been demonstrated excellent growth on a three-dimensional surface. In other embodiments, another transition metal is used.
In step 2, a graphene layer of desired thickness is deposited directly onto the transition metal seed layer. The graphene layer conforms to the transition metal seed layer. Accordingly, when the transition metal seed layer is a three- dimensional layer, also the graphene layer becomes a three-dimensional layer. The graphene layer may be deposited in the same ALD reactor or in a further ALD reactor.
The depositions may form manufacturing steps of the product. The transition metal seed layer is deposited, for example, by thermal ALD or plasma-enhanced ALD (PEALD). The graphene layer is preferable deposited by PEALD. The source materials (precursors) used are known to a skilled person.
Fig. 2 shows rough examples of integrated circuit (IC) devices which can be formed by using the presented method. A stacked capasitor or a transistor 10A, such as a FinFET is shown on a substrate on the right side of the dotted line interface, and a trench capacitor or micro channel 10B is shown on a substrate on the left side. In the manufacturing phase of these devices, a three-dimensional conformal transition metal seed layer 1 1 is deposited and thereon a graphene layer 12. The deposited graphene ALD layer may form a transistor channel of a high mobility transistor, such as a HEMT (High Electron Mobility Transistor). Fig. 3 shows a schematic view of a transistor 30 with a gate 32, gate dielectric 31 on top of the gate 32, source S and drain D electrodes on the gate dielectric and a graphene channel between the electrodes S and D. The channel is formed by first depositing the transition metal seed layer 1 1 on top of the gate dielectric 31 and then depositing the graphene layer 12 on the transition metal seed layer by the presented method. The transistor 30 is otherwise manufactured in a conventional manner. Fig. 4 shows another application of the presented method. A layered structure of a display 40 is formed by using the presented method. The structure contains the following layers: a first electrode layer 41 , a first insulator layer 42, a light emitting layer such as a phosphor layer 43, a second insulator layer 44, a thin transition metal seed layer 1 1 and a thin graphene layer 12. The structure is sandwiched between the first electrode layer 41 and the thin graphene layer 12 providing a second electrode. The thin transition metal seed layer 1 1 and the thin graphene layer 12 are, in an embodiment, so thin that they are transparent layers in the range of visible light. The first electrode layer 41 may be transparent or non- transparent depending on the implementation.
The layers 41 -44 are manufactured in a conventional manner. The transition metal seed layer 1 1 is deposited by ALD on top of the manufactured structure, and the graphene layer 12 on top of the transition metal seed layer 1 1 in the described manner.
Fig. 5 shows a rough example of a graphene-based optical modulator 50 which has a first graphene containing layer 51 A parallel with a second graphene containing layer 51 B. The first layer 51 A is connected to a first electrode 52 and the second layer 51 B to a second electrode 53. The layers 51 A and 51 B are separated by an intermediate layer 56 and they overlap on the area of a waveguide 55.
The first layer 51 A is manufactured by first depositing a thin transition metal seed layer 1 1 on the waveguide 55 and a base dielectric layer 54 and then depositing a graphene layer 12 directly on the transition metal seed layer 1 1 in the described manner. And, the second layer 51 B is manufactured by first depositing a thin transition metal seed layer 1 1 on the intermediate layer 56 and then depositing a graphene layer 12 directly on the transition metal seed layer 1 1 in the described manner.
Both graphene containing layers 51 A and 51 B (and layers 12) form a three- dimensional surface conformally following the underneath structure.
Fig. 6 shows an ALD reactor for depositing the described layers 1 1 and 12. The ALD reactor comprises a reaction chamber 60 wherein a substrate 10 (e.g., a set of electronic products) can be loaded in an appropriate manner (for example, can be integrated to a production line when side-loaded so that a production line can travel via the ALD reactor). A plasma source 65 (here: remote plasma source) is in fluid communication via an in-feed part 64 with the reaction chamber 60. In an embodiment, the in-feed part 64 is a widening in-feed part having a form widening towards the reaction chamber 60. A plasma source precursor in-feed line 61 travels via the plasma source 65 and the in-feed part 64 into the reaction chamber 60. Thermal ALD in-feed lines 62 and 63 enter the reaction chamber 60 from the sides. The lines 62 and 63 may travel via a reaction chamber lid or similar (not shown). Reaction residue from the reaction chamber 60 is pumped via a vacuum pump 66 into exhaust. The ALD reactor shown in Fig. 6 is configured to deposit the transition metal seed layer 1 1 onto the substrate by thermal ALD or by PEALD, and graphene by PEALD. During thermal ALD, precursors flow into the reaction chamber 60 via the thermal ALD lines 62 and 63. The reaction chamber 60 is heated by a heating arrangement 67 surrounding the reaction chamber 60. During PEALD, radicals are formed by the plasma source 65 from precursor vapor flowing along in-feed line 61 though the plasma source 65. The formed radicals (and/or formed other excited species) flow into the reaction chamber 60 via the in-feed part 64.
The deposition process comprising ALD deposition of the transition metal seed layer 1 1 and graphene layer 12 is controlled by a control system. In an example embodiment, the described ALD reactor is a computer-controlled system. A computer program stored into a memory of the system comprises instructions, which upon execution by at least one processor of the system cause the ALD reactor to operate as instructed. The instructions may be in the form of computer- readable program code. Fig. 7 shows a rough block diagram of an ALD reactor control system 700. In a basic system setup process parameters are programmed with the aid of software and instructions are executed with a human machine interface (HMI) terminal 706 and downloaded via Ethernet bus 704 to a control box 702. In an embodiment, the control box 702 comprises a general purpose programmable logic control (PLC) unit. The control box 702 comprises at least one microprocessor for executing control box software comprising program code stored in a memory, dynamic and static memories, I/O modules, A D and D/A converters and power relays. The control box 702 sends electrical power to pneumatic controllers of in-feed line valves (not shown in Fig. 6) of the ALD reactor, and has two-way communication with in-feed line mass flow controllers (not shown in Fig. 6), and controls the operation of the plasma source and radical generation, as well as otherwise controls the operation of the ALD reactor. The control box 702 may measure and relay probe readings from the ALD reactor to the HMI terminal 706. A dotted line 716 indicates an interface line between the ALD reactor parts and the control box 702.
In a yet further example, a complete 2D transistor is produced. First a seed layer is deposited on a substrate. A graphene layer is then directly deposited on the seed layer without further transfer the graphene layer. Other 2D material(s), such as M0S2, or WS2, or BN, having different properties, such as semiconductive properties, is deposited on top of graphene, and a complete 2D transistor is finalized by further depositing a top graphene layer as an electrode. A reference is made to the preceding embodiments as to the details of depositing the layers.
Fig. 8 shows a flowchart of the transistor direct deposition method. In step 1 , a transition metal seed layer is deposited by an ALD method on a substrate. In step 2, a graphene ALD layer of desired thickness is deposited by an ALD method on the seed layer. In step 3, 2D semiconducting material is deposited on the graphene layer by an ALD method. Finally, in step 4, a further graphene ALD layer is deposited on said 2D layer by an ALD method to complete the transistor structure. Without limiting the scope and interpretation of the patent claims, certain technical effects of one or more of the example embodiments disclosed herein are listed in the following: A technical effect is an industrial high-volume manufacturing method of electronic products with high mobility requirements. Another technical effect is an improved method of depositing graphene for electronic devices. It is no longer necessary to first grow graphene on a foil and only then transfer it on a device. Another technical effect is producing a transistor or another electronic product directly on a three-dimensional substrate.
The foregoing description has provided by way of non-limiting examples of particular implementations and embodiments of the invention a full and informative description of the best mode presently contemplated by the inventors for carrying out the invention. It is however clear to a person skilled in the art that the invention is not restricted to details of the embodiments presented above, but that it can be implemented in other embodiments using equivalent means without deviating from the characteristics of the invention.
Furthermore, some of the features of the above-disclosed embodiments of this invention may be used to advantage without the corresponding use of other features. As such, the foregoing description should be considered as merely illustrative of the principles of the present invention, and not in limitation thereof. Hence, the scope of the invention is only restricted by the appended patent claims.

Claims

Claims
1 . A deposition method, comprising:
depositing a transition metal ALD layer by an ALD (atomic layer deposition) method on an electronic product in an ALD reactor; and
depositing a graphene ALD layer on top of the transition metal ALD layer by an ALD method using the transition metal ALD layer as a seed layer.
2. The method of claim 1 , wherein the transition metal ALD layer is a copper layer or a platinum layer.
3. The method of claim 1 or 2, wherein said depositing a transition metal ALD layer comprises depositing a conformal three-dimensional layer and said depositing a graphene ALD layer comprises depositing a further conformal three-dimensional layer.
4. The method of any preceding claim, wherein said graphene layer is deposited by PEALD (plasma-enhanced ALD).
5. The method of any preceding claim, wherein said transition metal ALD layer is deposited by thermal ALD or by PEALD.
6. The method of any preceding claim, wherein said electronic product is selected from the group comprising: a nanodevice, an integrated circuit (IC) device, microelectromechanical systems (MEMS) device, a nanoelectromechanical systems (NEMS) device, a photonic device, a display, a memory, and a sensor .
7. The method of any preceding claim, wherein said deposited graphene ALD layer provides an electrode, or a transistor channel, for the electronic product.
8. The method of any preceding claim, comprising forming a transistor structure by: depositing a layer or multiple layers of other 2D material on the graphene ALD layer by an ALD method; and
depositing a further graphene ALD layer on said layer or multiple layers of other 2D material.
9. An electronic product, comprising:
a transition metal ALD layer deposited by an ALD (atomic layer deposition) method on the electronic product; and
a graphene ALD layer on top of the transition metal ALD layer deposited by an ALD method using the transition metal ALD layer as a seed layer.
10. The electronic product of claim 9, wherein the transition metal ALD layer is a copper layer or a platinum layer.
1 1 . The electronic product of claim 9 or 10, wherein said transition metal ALD layer is a conformal three-dimensional layer and said graphene ALD layer is a further conformal three-dimensional layer.
12. The electronic product of any preceding claim 9-1 1 , said graphene ALD layer being an ALD layer deposited by PEALD (plasma-enhanced ALD).
13. The electronic product of any preceding claim 9-12, said transition metal ALD layer being an ALD layer deposited by thermal ALD or by PEALD.
14. The electronic product of any preceding claim 9-13, wherein said electronic product is selected from the group comprising: a nanodevice, an integrated circuit (IC) device, microelectromechanical systems (MEMS) device, a nanoelectromechanical systems (NEMS) device, a photonic device, a display, a memory, and a sensor.
15. The electronic product of any preceding claim 9-14, said deposited graphene ALD layer providing a channel of a transistor, or an electrode.
16. A device comprising the electronic product of any of the claims 9-15.
17. An ALD reactor, comprising a control system configured to cause the ALD reactor to perform the method of any preceding claim 1 -8.
PCT/FI2015/050233 2015-04-01 2015-04-01 Ald-deposited graphene on a conformal seed layer WO2016156659A1 (en)

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