WO2016058176A1

WO2016058176A1 - Reconfigurable ethernet phys

Info

Publication number: WO2016058176A1
Application number: PCT/CN2014/088813
Authority: WO
Inventors: Hongchun YU; Guangming Yin; James Qian ZHANG
Original assignee: Qualcomm Incorporated
Priority date: 2014-10-17
Filing date: 2014-10-17
Publication date: 2016-04-21

Abstract

A reconfigurable Ethernet physical layer (PHY) is operable in at least a first mode and a second mode. The PHY includes signal processing circuitry to process communications of a first type or a second type during the first mode of operation, and to process multiple communications of the second type during the second mode of operation. A plurality of transceivers is coupled to the signal processing circuitry. Each transceiver of the plurality of transceivers includes a transmitting element and a receiving element. A switching element selectively couples the plurality of transceivers to a first set of communications channels or a second set of communications channels based on the mode of operation. Specifically, a number of communications channels in the second set of communications channels is greater than a number of transceivers of the plurality of transceivers.

Description

RECONFIGURABLE ETHERNET PHYS

TECHNICAL FIELD

The present embodiments relate generally to Ethernet PHYs, and specifically to configuring an Ethernet PHY to handle multiple concurrent communications.

BACKGROUND OF RELATED ART

A twisted pair is a physical communication medium having two balanced conductors (e. g. , wires) that can be used to carry current (e. g. , data signals) . Having two balanced conductors allows the twisted pair to be used for transmitting differential signals, while the twisting of the two conductors helps cancel electromagnetic interference. Because each conductor of a twisted pair carries a complementary data signal, the “pair” of conductors may correspond with a single communications channel of a corresponding transmission medium (e. g. , a Category 5 Ethernet cable) . Due to their relatively inexpensive cost to manufacture, twisted-pair cables are widely used in modern high-speed differential signal transmission applications.

A conventional gigabit Ethernet physical layer chip (PHY) comprises a 1000Base-T transceiver, a 100Base-T (or 100Base-TX) transceiver, and a 10Base-T transceiver. The PHY may be connected to a Category 5 (e. g. , Cat-5) cable consisting of four twisted pairs. When the PHY operates at 1000Mbps, the 1000Base-T transceiver uses all four twisted pairs to transmit and receive data (e. g. , with each twisted pair being used for full-duplex communications) . However, when the PHY operates at 100Mbps (or 10Mbps) , the 100Base-T (or 10Base-T) transceiver uses only two of the four twisted pairs of a corresponding Cat-5 cable (e. g. , with one twisted pair being used to transmit data and the other twisted pair being used to receive data) , while the remaining two twisted pairs are left unused. Moreover, a number of the internal digital signal processing components and transceivers (which are fully utilized in Gigabit mode) are left idle when operating the PHY in 100Base-T and/or 10Base-T modes.

SUMMARY

This Summary is provided to introduce in a simplified form a selection of concepts that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

A reconfigurable Ethernet physical layer (PHY) is operable in at least a first mode and a second mode. The PHY includes signal processing circuitry to process communications of a first type or a second type during the first mode of operation, and to process multiple communications of the second type during the second mode of operation. A plurality of transceivers is coupled to the signal processing circuitry. Each transceiver of the plurality of transceivers includes a transmitting element and a receiving element. A switching element selectively couples the plurality of transceivers to a first set of communications channels or a second set of communications channels based on the mode of operation. For some embodiments, a number of communications channels in the second set of communications channels are greater than a number of transceivers of the plurality of transceivers.

The first set of communications channels may be a subset of the second set of communications channels. For example, the number of communications channels in the first set may be equal to a number of transceivers of the plurality of transceivers. Furthermore, the number of communications channels in the second set may be double the number of communications channels in the first set. For some embodiments, the first set of communications channels may correspond with a single Ethernet cable, and the second set of communications channels may correspond with two or more Ethernet cables.

For some embodiments, the first type of communications may correspond with a 1000Base-T Ethernet standard, whereas the second type of communications may correspond with at least one of a 100Base-T or a 10Base-T Ethernet standard. For example, the signal processing circuitry may include circuitry for processing the multiple communications of the second type, concurrently, during the second mode of operation. The switching element may couple the plurality of transceivers to the first set of communications channels during the first mode of operation, and may couple the plurality of transceivers to the second set of communications channels during the second mode of operation.

During the first mode of operation, the switching element may couple each transceiver of the plurality of transceivers to a respective communications channel in the first set of communications channels. During the second mode of operation, the switching element may couple the transmitting element of at least one transceiver of the plurality of transceivers to a first communications channel in the second set of communications channels. The switching element may further couple the receiving element of the at least one transceiver to a second communications channel in the second set of communications channels.

For some embodiments, the signal processing circuitry may include a plurality of physical coding sublayers (PCSs) . Specifically, at least one PCS of the plurality of PCSs is coupled to each transceiver of the plurality of transceivers. For example, a PCS encoder and decoder may be coupled to each of the transceivers. Moreover, each PCS encoder may include 10Base-T and 100Base-T encoding elements, and each PCS decoder may include 10Base-T and 100Base-T decoding elements.

The reconfigurable Ethernet PHY disclosed herein utilizes the signal processing circuitry included in conventional Gigabit PHYs to allow for multiple concurrent communications when operating in a “Multi-PHY Mode. ” For example, by utilizing both the transmitting element and the receiving element of each transceiver (e. g. , of the four transceivers included in a Gigabit PHY) when transmitting and receiving data at symbol rates less than 1000Mbps (e. g. , 10Mbps or 100Mbps) , the reconfigurable Ethernet PHY may be configured for up to four simultaneous 10Base-T and/or 100Base-T communications.

BRIEF DESCRIPTION OF THE DRAWINGS

The present embodiments are illustrated by way of example and are not intended to be limited by the figures of the accompanying drawings, where:

FIG. 1 shows a block diagram of a reconfigurable Ethernet physical layer (PHY) in accordance with some embodiments.

FIG. 2 is a more detailed block diagram of the reconfigurable Ethernet PHY shown in FIG. 1.

FIG. 3 shows a block diagram of a signal processing component of a reconfigurable Ethernet PHY, in accordance with some embodiments.

FIG. 4 shows a block diagram of a portion of an analog front end (AFE) of a reconfigurable Ethernet PHY, in accordance with some embodiments.

FIG. 5 shows a block diagram of a communications device within which the present embodiments may be implemented.

FIG. 6 shows an illustrative flow chart depicting an example operation for selectively coupling a reconfigurable Ethernet PHY to one or more sets of communications channels, in accordance with some embodiments.

FIG. 7 shows an illustrative flow chart depicting a method of operating a reconfigurable Ethernet PHY in accordance with some embodiments.

DETAILED DESCRIPTION

In the following description, numerous specific details are set forth such as examples of specific components, circuits, and processes to provide a thorough understanding of the present disclosure. Also, in the following description and for purposes of explanation, specific nomenclature is set forth to provide a thorough understanding of the present embodiments. However, it will be apparent to one skilled in the art that these specific details may not be required to practice the present embodiments. In other instances, well-known circuits and devices are shown in block diagram form to avoid obscuring the present disclosure. The term “coupled” as used herein means connected directly to or connected through one or more intervening components or circuits. Any of the signals provided over various buses described herein may be time-multiplexed with other signals and provided over one or more common buses. Additionally, the interconnection between circuit elements or software blocks may be shown as buses or as single signal lines. Each of the buses may alternatively be a single signal line, and each of the single signal lines may alternatively be buses, and a single line or bus might represent any one or more of a myriad of physical or logical mechanisms for communication between components. As used herein, “100Base-T” may generally refer to any Ethernet standard of the “Fast Ethernet” family, including, for example, the 100Base-TX Ethernet standard. The present embodiments are not to be construed as limited to specific examples described herein but rather to include within their scope all embodiments defined by the appended claims.

FIG. 1 shows a block diagram of a reconfigurable Ethernet physical layer (PHY) 100 in accordance with some embodiments. The reconfigurable Ethernet PHY 100 includes signal processing circuitry 110, a number of transceivers 120 (1) -120 (4) , and a switching element 130 coupled to a number of primary communications channels 101 and to a number of secondary communications channels 102. The signal processing circuitry 110 may include digital circuitry for encoding/decoding, filtering, recovering, converting, and/or otherwise processing data to be transmitted and/or received via the PHY 100. Furthermore, each of the transceivers 120 (1) -120 (4) may include analog circuitry for transmitting and receiving data signals via the communications channels 101 and/or the communications channels 102. For some embodiments, each individual communications channel may correspond with a twisted pair conductor. More specifically, the set of primary communications channels 101 may correspond with a conventional Ethernet cable (e. g. , Cat-5 or Cat-6) consisting of four twisted pairs (e. g. , four communications channels) . Furthermore, the secondary communications channels 102 may include two or more additional communications channels (e. g. , provided by one or more additional Ethernet cables) .

The switching element 130 selectively couples the transceivers 120 (1) -120 (4) to the communications channels 101 and/or 102 based on a mode select (M_Sel) signal. Specifically, the reconfigurable Ethernet PHY 100 may be operable in a first mode or a second mode based on a desired symbol rate (e. g. , 1000Mbps or 10/100Mbps) , Ethernet standard (e. g. , 1000Base-T or 10/100Base-T) , and/or the number of shared or simultaneous communications. For example, during a first mode of operation, the PHY 100 may be configured for gigabit communications (e. g. , based on the 1000Base-T Ethernet standard) or Fast Ethernet communications (e. g. , based on the 100Base-T or 10Base-T Ethernet standards) with a single device. The first mode may therefore be referred to as the “Traditional PHY Mode. ” For some embodiments, the switching element 130 may couple each of the transceivers 120 (1) -120 (4) to a respective one of the primary communications channels 101 when the M_Sel signal indicates the Traditional PHY Mode of operation. More specifically, when operating in Traditional PHY Mode, the switching element 130 may couple the PHY 100 to a single Ethernet cable (e. g. , as described in greater detail below) .

During the second mode of operation, the PHY 100 may be configured for multiple concurrent 10Mbps and/or 100Mbps communications (e. g. , based on the 10Base-T and/or 100Base-T Ethernet standards) . Accordingly, the second mode of operation may be referred to as the “Multi-PHY Mode. ” As described above, a conventional Gigabit Ethernet PHY typically uses only two communications channels to transmit and receive data at 10/100Mbps symbol rates (e. g. , one channel is used for transmitting and another channel is used for receiving) . This causes a number of the transceivers 120 (1) -120 (4) , and portions of the signal processing circuitry 110, to go unused. For some embodiments, the switching element 130 may increase the number of communications channels available to the PHY 100 when operating in Multi-PHY Mode, for example, by coupling the transceivers 120 (1) -120 (4) to a combination of the primary communications channels 101 and the secondary communications channels 102. More specifically, when the M_Sel signal indicates the Multi-PHY Mode of operation, the switching element 130 may couple the PHY 100 to two or more Ethernet cables (e. g. , as described in greater detail below) .

Accordingly, the switching element 130 may selectively couple the PHY 100 (e. g. , transceivers 120 (1) -120 (4) ) to a first set of communications channels (e. g. , primary communications channels 101) or a second set of communications channels (e. g. , primary communications channels 101 and secondary communications channels 102) based on whether the PHY 100 is operating in the first mode (e. g. , Traditional PHY Mode) or the second mode (e. g. , Multi-PHY Mode) . Furthermore, the switching element 130 may enable the PHY 100 to process multiple concurrent communications (e. g. , with multiple devices) at 10Mbps and/or 100Mbps symbol rates with little modification to the existing hardware and/or software of a conventional Gigabit Ethernet PHY device.

FIG. 2 is a more detailed block diagram of the reconfigurable Ethernet PHY shown in FIG. 1. The reconfigurable Ethernet PHY 200, which is one embodiment of reconfigurable PHY 100 of FIG. 1, includes signal processing circuitry 210 and an analog front end (AFE) comprising a number of transceivers 220 (1) -220 (4) and a switching element 230. Further, the signal processing circuitry (SPC) 210 includes a number of physical coding sublayers (PCSs) 212-216 and DSP modules 218 (1) -218 (4) . More specifically, each PCS may encode and/or decode data according to a particular Ethernet standard (e. g. , 1000Base-T, 100Base-T, or 10Base-T) . For example, the 1000Base-T PCS 212 may encode and decode data according to the 1000Base-T Ethernet standard (e. g. , at 1000Mbps symbol rates) , the 100Base-T PCSs 214 (1) -214 (4) may encode and decode data according to the 100Base-T Ethernet standard (e. g. , at 100Mbps symbol rates) , and the 10Base-T PCSs 216 (1) -216 (4) may encode and decode data according to the 10Base-T Ethernet standard (e. g. , at 10Mbps symbol rates) .

The PHY 200 may further include one or more auto-negotiation modules and/or PHY training control modules (not shown for simplicity) . The auto-negotiation module (s) may enable the PHY 200 to advertise and negotiate a link operational mode with one or more PHYs of other devices. For example, the auto-negotiation module (s) may determine a link speed (e. g. , 10Mbps, 100Mbps, or 1000Mbps) and duplex configuration (e. g. , half duplex or full duplex) that is supported by both devices (e. g. , on either side of the link) . More specifically, an auto-negotiation operation may be performed for each device coupled to the PHY 200 (e. g. , as described in greater detail below) . For example, a separate auto-negotiation module and PHY training control module (e. g. , up to four total) may be provided for each “lane” of communications within the PHY 200. For some embodiments, the auto-negotiation module (s) may be included as part of the physical coding sublayers 212, 214 (1) -214 (4) , and/or 216 (1) -216 (4) . For other embodiments, each of the auto-negotiation module (s) may be provided as a separate sublayer in the PHY 200.

Each of the transceivers 220 (1) -220 (4) is coupled to a respective one of the DSP modules 218 (1) -218 (4) . The DSP modules 218 (1) -218 (4) may include circuitry for filtering, recovering, converting, or otherwise processing data to be transmitted and/or received via the PHY 200. For some embodiments, each of the DSP modules 218 (1) -218 (4) may further include digital signal processing circuitry that is commonly found in conventional Gigabit Ethernet PHYs. Each DSP module 218 is further coupled to a corresponding 100Base-T PCS 214 and a corresponding 10Base-T PCS 216. For example: DSP module 218 (1) is coupled to 100Base-T PCS 214 (1) and to 10Base-T PCS 216 (1) ； DSP module 218 (2) is coupled to 100Base-T PCS 214 (2) and to 10Base-T PCS 216 (2) ； DSP module 218 (3) is coupled to 100Base-T PCS 214 (3) and to 10Base-T PCS 216 (3) ； and DSP module 218 (4) is coupled to 100Base-T PCS 214 (4) and to 10Base-T PCS 216 (4) . The 1000Base-T PCS 212 is coupled to each of the DSP modules 218 (1) -218 (4) . Furthermore, DSP module 218 (2) may be selectively coupled to the 100Base-T PCS 214 (1) and/or the 10Base-T PCS 216 (1) to provide a complementary (transmit or receive) data path to the DSP module 218 (1) when operating in Traditional PHY Mode.

The switching element 230 selectively couples the transceivers 220 (1) -220 (4) to a number of primary connection terminals 201 (1) -201 (4) and/or secondary connection terminals 202 (1) -202 (4) based on the M_Sel signal. Each of the connection terminals 201 (1) -201 (4) and 202 (1) 2-202 (4) couples to a respective twisted pair. Thus, although not shown (for simplicity) , each connection terminal may further comprise two electrical contact pads (e. g. , one for each wire or conductor of a corresponding twisted pair) . Further, the primary connection terminals 201 (1) -201 (4) and the secondary connection terminals 202 (1) -202 (4) are grouped in pairs, such that each “connection pair” (e. g. , 201 (1) /202 (1) , 201 (2) /202 (2) , 201 (3) /202 (3) , and 201 (4) /202 (4) ) may be coupled to a different device when operating in Multi-PHY Mode. For example, when operating in Traditional PHY Mode, the primary connection terminals 201 (1) -201 (4) may be coupled to the four twisted pairs of a single Cat-5 Ethernet cable, respectively, while the secondary connection terminals 202 (1) -202 (4) are disabled (e. g. , left unused) . When operating in Multi-PHY Mode, each connection pair may be coupled to two twisted pairs of a different Ethernet cable. For example, terminals 201 (1) and 202 (1) may be coupled to a first Ethernet cable, terminals 201 (2) and 202 (2) may be coupled to a second Ethernet cable, terminals 201 (3) and 202 (3) may be coupled to a third Ethernet cable, and terminals 201 (4) and 202 (4) may be coupled to a fourth Ethernet cable.

As described above, the reconfigurable Ethernet PHY 200 may be operable in a Traditional PHY Mode or a Multi-PHY Mode based on a desired symbol rate (e. g. , 1000Mbps or 10/100 Mbps) , Ethernet standard (e. g. , 1000Base-T or 10/100Base-T) , and/or number of shared or simultaneous communications. When operating in Traditional PHY Mode, the switching element 230 may couple each of the transceivers 220 (1) -220 (4) to a respective one of the primary connection terminals 201 (1) -201 (4) . For example, transceiver 220 (1) may be coupled to terminal 201 (1) , transceiver 220 (2) may be coupled to terminal 201 (2) , transceiver 220 (3) may be coupled to terminal 201 (3) , and transceiver 220 (4) may be coupled to terminal 201 (4) . As described above, each of the connection terminals 201 (1) -201 (4) may be further coupled to a respective communications channel (e. g. , twisted pair of an Ethernet cable) . During the Traditional PHY Mode, each of the transceivers 220 (1) -220 (4) is configured to both transmit and receive data via its respective communications channel.

For example, when processing 1000Base-T communications, outgoing data may be encoded by the 1000Base-T PCS 212 into four concurrent data streams. Each data stream is further filtered and/or converted to an analog data signal by a respective one of the DSP modules 218 (1) -218 (4) . The analog data signals are then sent to the transceivers 230 (1) -230 (4) to be transmitted via the communications channels coupled to terminals 201 (1) -201 (4) , respectively. Similarly, incoming data may be received by the transceivers 230 (1) -230 (4) via respective communications channels coupled to terminals 201 (1) -201 (4) . The data signals received via terminals 201 (1) -201 (4) are sent to the DSP modules 218 (1) -218 (4) , respectively, to be filtered and/or converted to a digital data stream. The four data streams are then sent to the 1000Base-T PCS 212 to be decoded and combined into a single input stream.

Furthermore, when processing 100Base-T and/or 10Base-T communications in Traditional PHY Mode, outgoing data may be encoded by the 100Base-T PCS 214 (1) or the 10Base-T PCS 216 (1) (e. g. , as determined through auto-negotiation) into a single data stream. The data stream may be filtered and/or converted to an analog data signal by the DSP module 218 (1) . The analog data signal is then sent to the transceiver 220 (1) to be transmitted via a communications channel coupled to terminal 201 (1) . Incoming data may be received by transceiver 220 (2) via a communications channel coupled to terminal 201 (2) . The received data signal is sent to the DSP module 218 (2) to be filtered and/or converted to a digital data stream. The digital data stream is then sent to the 100Base-T PCS 214 (1) or the 10Base-T PCS 216 (1) to be decoded in order to recover the original data that was transmitted by a corresponding link partner.

For some embodiments, the PHY 200 may include both a medium dependent interface (MDI) and a medium dependent interface crossover (MDI-X) . For example, the PHY 200 may determine (e. g. , through auto-negotiation) whether to select the MDI or MDI-X configuration for a given link (e. g. , to match the transmit wires on one device to the receive wires on another device, and vice-versa) . Specifically, when operating in MDI-X configuration, outgoing data may be encoded by the 100Base-T PCS 214 (1) or the 10Base-T PCS 216 (1) into a single data stream which filtered and/or converted to an analog signal by the DSP module 218 (2) . The analog data signal is then sent to the transceiver 220 (2) to be transmitted via a communications channel coupled to terminal 201 (2) . Incoming data may be received by transceiver 220 (1) via a communications channel coupled to terminal 201 (1) and forwarded to the DSP module 218 (1) to be filtered and/or converted to a digital data stream. The digital data stream is then sent to the 100Base-T PCS 214 (1) or the 10Base-T PCS 216 (1) to be decoded in order to recover the original data that was transmitted by a corresponding link partner.

When operating in Multi-PHY Mode, the switching element 230 may couple the transceivers 220 (1) -220 (4) to a combination of the primary connection terminals 201 (1) -201 (4) and the secondary connection terminals 202 (1) -202 (4) . More specifically, the switching element 230 enables the PHY 200 to be coupled to two or more Ethernet cables (e. g. , and corresponding devices) , concurrently, when operating in Multi-PHY Mode. For example, the switching element 230 may couple each of the transceivers 220 (1) -220 (4) to a respective connection pair (e. g. , 201 (1) /202 (1) , 201 (2) /202 (2) , 201 (3) /202 (3) , and/or 201 (4) /202 (4) ) to enable the PHY 200 to simultaneously communicate with up to four separate devices. More specifically, the PHY 200 may simultaneously communicate with a first device via terminals 201 (1) and 202 (1) , a second device via terminals 201 (2) and 202 (2) , a third device via terminals 201 (3) and 202 (3) , and a fourth device via terminals 201 (4) and 202 (4) .

For example, outgoing data intended for a first device (e. g. , coupled to connection pair 201 (1) /202 (1) ) may be encoded by the 100Base-T PCS 214 (1) or the 10Base-T PCS 216 (1) into a transmit data stream. The transmit data stream is further filtered and/or converted to an analog data signal by the DSP module 218 (1) . The analog data signal is then sent to transceiver 220 (1) to be transmitted via a communications channel coupled to terminal 201 (1) . The transceiver 220 (1) may further receive incoming data from the first device, via a communications channel coupled to pad 202 (1) . The received data signal is sent to the DSP module 218 (1) to be filtered and/or converted to a digital data signal. Finally, the digital data signal is then sent to the 100Base-T PCS 214 (1) or the 10Base-T PCS 216 (1) to be decoded. It should be noted that the method of decoding should match the method of encoding. Thus, if the 100Base-T PCS 214 (1) is used for encoding outgoing data intended for the first device, then it should also be used for decoding incoming data received from the same device. Similarly, if the 10Base-T PCS 216 (1) is used for encoding outgoing data for the first device, it should also be used for decoding incoming data from that device.

While processing communications with the first device, the PHY 200 may also process communications with a second, third, and/or fourth device (e. g. , coupled to the connection pairs 201 (2) /202 (2) , 201 (3) /202 (3) , and 201 (4) /202 (4) , respectively) . More specifically, the PHY 200 may process communications for each additional device in a manner substantially similar to that of the first device (e. g. , as described above) . For example, outgoing data intended for a second device may be encoded by the 100Base-T PCS 214 (2) or the 10Base-T PCS 216 (2) , filtered and/or converted to an analog data signal by the DSP module 218 (2) , and sent to transceiver 220 (2) to be transmitted via a communications channel coupled to terminal 201 (2) . Incoming data from the second device may be received by the transceiver 220 (2) , via a communications channel coupled to pad 202 (2) , filtered and/or converted to a digital data signal by the DSP module 218 (2) , and sent to the 100Base-T PCS 214 (2) or the 10Base-T PCS 216 (2) to be decoded.

Similarly, outgoing data for a third device may be encoded by the 100Base-T PCS 214 (3) or the 10Base-T PCS 216 (3) , filtered and/or converted to an analog signal by the DSP module 218 (3) , and sent to transceiver 220 (3) to be transmitted via a communications channel coupled to terminal 201 (3) . Incoming data from the third device may be received by the transceiver 220 (3) , via a communications channel coupled to pad 202 (3) , filtered and/or converted to a digital data signal by the DSP module 218 (3) , and sent to the 100Base-T PCS 214 (3) or the 10Base-T PCS 216 (3) to be decoded. Outgoing data for a fourth device may be encoded by the 100Base-T PCS 214 (4) or the 10Base-T PCS 216 (4) , filtered and/or converted to an analog signal by the DSP module 218 (4) , and sent to transceiver 220 (4) to be transmitted via a communications channel coupled to terminal 201 (4) . Incoming data from the fourth device may be received by the transceiver 220 (4) , via a communications channel coupled to pad 202 (4) , filtered and/or converted to a digital data signal by the DSP module 218 (4) , and sent to the 100Base-T PCS 214 (4) or the 10Base-T PCS 216 (4) to be decoded.

It should be noted that specific configurations for the coupling of the connection terminals 201 (1) -201 (4) and 202 (1) -202 (4) to the transceivers 220 (1) -220 (4) have been described for exemplary purposes only. Rather, the present embodiments allow for the transceivers 220 (1) -220 (4) to be coupled to various different combinations of connections terminals and/or communications channels. Furthermore, the embodiments described herein are not limited to 4-transceiver configurations. For example, in other embodiments, the reconfigurable Ethernet PHY 200 may function as a multi-port Gigabit PHY (e. g. , having N ports) when operating in Traditional PHY Mode and may support up to 4*N Fast Ethernet connections and/or communications when operating in Multi-PHY Mode.

FIG. 3 shows a block diagram of a signal processing component 300 of a reconfigurable Ethernet PHY, in accordance with some embodiments. The signal processing component 300 represents a single lane or row of the signal processing circuitry 210. For example, the signal processing component 300 may embody the DSP module 218 (1) , the100Base-T PCS 214 (1) , and the 10Base-T PCS 216 (1) . More specifically, the signal processing component 300 includes a PCS encoder 301, a TX filter 302, and a digital-to-analog converter (DAC) 303 along a transmit path. The signal processing component 300 further includes interference cancellation circuitry 304, an analog-to-digital converter (ADC) 305, a timing recovery (TR) circuit 306, a feed-forward equalizer (FFE) 307, a feedback filter (FBF) 308, a slicer 309, and a PCS decoder 310. The TX filter 302, DAC 303, ADC 305, TR circuit 306, FFE 307, FBF 308, and slicer 309 are all well-known in the art and can be found in conventional Gigabit Ethernet PHYs.

The PCS encoder 301 may include multiple PCS encoding sub-modules (e. g. , 100Base-T and 10Base-T) to encode outgoing data based on a desired symbol rate and/or Ethernet standard. For example, during an auto-negotiation process, the reconfigurable Ethernet PHY may select a symbol rate (e. g. , 100Mbps or 10Mbps) to be used for subsequent data transmissions with another device. More specifically, the selected symbol rate may correspond to a rate that is supported by both the transmitting device and the receiving device. The PCS encoder 301 may then selectively activate one of the encoding sub-modules (e. g. , 100Base-T or 10Base-T) corresponding to the desired symbol rate. If the PHY is configured for gigabit communications (e. g. , when operating in Traditional PHY Mode) , a separate 1000Base-T PCS encoder (not shown for simplicity) may be used to encode all data for the corresponding PHY.

The interference cancellation circuitry 304 includes an Echo Canceller (EC) and a series of Near-End Crosstalk cancellers (NC1-NC3) . The interference cancellation circuitry 304 is typically used in gigabit Ethernet communications (e. g. , wherein bidirectional data is communicated across each individual channel) to improve the signal quality of each channel by suppressing or cancelling intrinsic noise and interference (e. g. , due to echo and/or crosstalk) . However, such circuitry may be unnecessary when operating a reconfigurable Ethernet PHY in Multi-PHY Mode since each communications channel (e. g. , twisted pair) may carry data in only one direction. Thus, for some embodiments, the interference cancellation circuitry 304 may be selectively activated and/or deactivated based on the M_Sel signal. For example, the interference cancellation circuitry 304 may be deactivated (e. g. , to conserve power) if the M_Sel signal specifies the Multi-PHY Mode of operation.

Furthermore, the TR circuit 306, FFE 307, and FBF 308 may be unnecessary for receiving and/or transmitting signals according to the 10Base-T Ethernet standard. Thus, for some embodiments, the TR circuit 306, FFE 307, and/or FBF 308 may be selectively activated and/or deactivated based on the symbol rate that is determined through auto-negotiation. For example, the TR circuit 306, FFE 307, and/or FBF 308 may be deactivated (e. g. , to conserve power) when the signal processing component 300 is configured for communications according to the 10Base-T Ethernet standard, and may be activated when the signal processing component 300 is configured for communications in accordance with either the 100Base-T Ethernet standard or the 1000Base-T Ethernet standard.

The PCS decoder 310 may include multiple PCS decoding sub-modules (e. g. , 100Base-T and 10Base-T) to decode received data based on a desired symbol rate and/or Ethernet standard. As described above, the reconfigurable Ethernet PHY may select a symbol rate (e. g. , 100Mbps or 10Mbps) during an auto-negotiation process. The PCS decoder 310 may then selectively activate one of the decoding sub-modules (e. g. , 100Base-T or 10Base-T) corresponding to the desired symbol rate. If the PHY is configured for gigabit communications (e. g. , when operating in Traditional PHY Mode) , a separate 1000Base-T PCS decoder (not shown for simplicity) may be used to decode all data from the corresponding PHY.

FIG. 4 shows a block diagram of a portion of an analog front end (AFE) 400 of a reconfigurable Ethernet PHY, in accordance with some embodiments. The AFE 400 represents a single lane or row of the AFE depicted in FIG. 2. For example, the AFE 400 may embody the transceiver 220 (1) and a portion of the switching element 230. More specifically, the AFE 400 includes a transceiver 410, comprising a transmitting (TX) element 412 and a receiving (RX) element 414, and a switching element 420. The TX element 412 receives a set of differential data signals from a DAC (e. g. , DAC 303 shown in FIG. 3) and outputs the signals to a communications channel. The RX element 414 receives a set of differential data signals from a communications channel and outputs the received signals to an ADC (e. g. , ADC 305 shown in FIG. 3) .

The switching element 420 selectively couples the transceiver 410 to a pair of primary connection pads 401 and/or a pair of secondary connection pads 402 based on the mode of operation of the corresponding PHY. For example, the switching element 420 may receive the M_Sel signal indicating the desired mode of operation. If the M_Sel signal indicates the Traditional PHY Mode (e. g. , the PHY is configured for 1000Base-T communications) , the switching element 420 may couple both the TX element 412 and the RX element 414 of the transceiver 410 to the primary connection pads 401. The primary connection pads 401 may further be coupled to a respective twisted pair (e. g. , a first communications channel) of an Ethernet cable. This enables the PHY to transmit and receive data over the same communications channel, as defined by the 1000Base-T standard.

If the M_Sel signal indicates the Multi-PHY Mode (e. g. , the PHY is configured for multiple 100Base-T and/or 10Base-T communications) , the switching element 420 may couple the RX element 414 to the secondary connection pads 402 (e. g. , while the TX element 412 remains coupled to the primary connection pads 401) . Alternatively, the switching element 420 may couple the TX element 412 to the secondary connection pads 402, while coupling the RX element 414 to the primary connection pads 401 (e. g. , to enable MDI/MDI-X compatibility) . The secondary connection pads 402 may further be coupled to a respective twisted pair (e. g. , a second communications channel) of the Ethernet cable. This enables the PHY to transmit data over one of the communications channels of the Ethernet cable while concurrently receiving data over another one of the communications channels. More specifically, this allows the PHY to process multiple concurrent communications in accordance with the 100Base-T and/or 10Base-T Ethernet standards.

FIG. 5 shows a block diagram of a communications device 500 within which some embodiments may be implemented. The communications device 500 may include a reconfigurable PHY device 510, a processor 520, and a memory 530. The reconfigurable PHY 510 may include a number of transceivers to transmit signals to and receive signals from other communications devices. For purposes of discussion herein, the reconfigurable PHY device 510 is shown in FIG. 5 as being coupled to the processor 520. For actual embodiments, the PHY device 510, processor 520, and/or memory 530 may be connected together using one or more buses (not shown for simplicity) .

Memory 530 may include a data store 532 that may be used to temporarily buffer data to be transmitted to and/or received. Furthermore, memory 530 may also include a non-transitory computer-readable medium (e. g. , one or more nonvolatile memory elements, such as EPROM, EEPROM, Flash memory, a hard drive, and so on) that can store the following software modules:

·a mode selection module 534 to determine whether the PHY 510 is to operate in a Traditional PHY Mode or a Multi-PHY Mode； and

·a connection management module 536 to configure the PHY 510 for multiple concurrent communications when operating in the Multi-PHY Mode.

Each software module includes instructions that, when executed by processor 520, causes communications device 500 to perform the corresponding functions. The non-transitory computer-readable medium of memory 530 thus includes instructions for performing all or a portion of the operations described below with respect to FIGS. 6-7.

Processor 520, which is shown in the example of FIG. 5 as coupled to the reconfigurable PHY device 510 and to memory 530, may be any suitable processor capable of executing scripts or instructions of one or more software programs stored in communications device 500 (e. g. , within memory 530) . For example, processor 520 may execute the mode selection module 534 to determine whether the PHY 510 is to operate in the Traditional PHY Mode or the Multi-PHY Mode. Processor 520 may also execute the connection management module 536 to configure the PHY 510 for multiple concurrent communications when operating in the Multi-PHY Mode.

FIG. 6 shows an illustrative flow chart depicting an exemplary operation 600 for selectively coupling a reconfigurable Ethernet PHY to one or more sets of communications channels, in accordance with some embodiments. For example, with reference to FIG. 5, the operation 600 may be implemented by the communications device 500 with respect to the reconfigurable PHY device 510. More specifically, the reconfigurable PHY device 510 may correspond to any reconfigurable Ethernet PHY described above with respect to FIGS. 1-4.

The communications device 500 may first determine whether the PHY 510 is operating in a first mode or a second mode (610) . For example, the first mode may correspond with a Traditional PHY Mode, wherein the PHY 510 may be configured for up to 1000Mbps communications with a single device (e. g. , based on the 10Base-T, 100Base-T, or 1000Base-T Ethernet standard) . The second mode may correspond with a Multi-PHY Mode, wherein the PHY 510 may be configured for 100Mbps and/or 10Mbps communications with multiple devices (e. g. , based on the 100Base-T and/or 10Base-T Ethernet standards, respectively) . For some embodiments, the processor 520, in executing the mode selection module 534, may select the Traditional PHY Mode of operation upon detecting data signals across all four communications channels (e. g. , the primary communications channels 101 shown in FIGS. 1 and 2) of an Ethernet cable, and/or upon detecting outgoing data to be encoded according to the 1000Base-T Ethernet standard. Alternatively, and/or in addition, the mode selection module 534, as executed by the processor 520, may select either the Traditional PHY Mode or the Multi-PHY Mode based on user input.

The communications device 500 then selectively couples a set of transceivers to a first set of communications channels or a second set of communications channels based on the mode of operation (620) . If the Traditional PHY Mode is selected, the processor 520 may assert or deassert an M_Sel signal to indicate the selection. For example, deassertion of the M_Sel signal may correspond with the Traditional PHY Mode being selected. With reference to FIG. 2, when operating in Traditional PHY Mode, the switching element 230 may couple each of the transceivers 220 (1) -220 (4) to a respective one of the primary connection terminals 201 (1) -201 (4) . Each of the primary connection terminals 201 (1) -201 (4) may be further coupled to a respective one of the first set of communications channels (e. g. , to enable communications with a single device) .

If the Multi-PHY Mode is selected, the processor 520 may correspondingly assert or deassert the M_Sel signal to indicate such selection. For example, assertion of the M_Sel signal may correspond with the Multi-PHY Mode being selected. Referring again to FIG. 2, when operating in Multi-PHY Mode, the switching element 230 may couple the transceivers 220 (1) -220 (4) to a combination of the primary connection terminals 201 (1) -201 (4) and the secondary connection terminals 202 (1) -202 (4) . Each connection pair (e. g. , 201 (1) /202 (1) , 201 (2) /202 (2) , 201 (3) /202 (3) , and 201 (4) /202 (4) ) may be further coupled to respective communications channels of the second set (e. g. , to enable concurrent communications with multiple devices) . For some embodiments, the first set of communications channels may be a subset of the second set of communications channels.

FIG. 7 shows an illustrative flow chart depicting a method 700 of operating a reconfigurable Ethernet PHY in accordance with some embodiments. For example, with reference to FIG. 5, the method 700 may be implemented by the communications device 500 with respect to the reconfigurable PHY device 510. More specifically, the reconfigurable PHY device 510 may correspond to any reconfigurable Ethernet PHY described above with respect to FIGS. 1-4.

The communications device 500 may first determine whether the PHY 510 is operating in a Traditional PHY Mode or a Multi-PHY Mode (710) . As described above, the PHY 510 may be configured for up to 1000Mbps communications with a single device when operating in Traditional PHY Mode, and may be configured for multiple concurrent 100Mbps and/or 10Mbps communications when operating in Multi-PHY Mode. For some embodiments, the processor 520, in executing the mode selection module 534, may select the Traditional PHY Mode of operation upon detecting data signals across all four communications channels (e. g. , the primary communications channels 101 shown in FIGS. 1 and 2) of an Ethernet cable, and/or upon detecting outgoing data to be encoded according to the 1000Base-T Ethernet standard. Alternatively, and/or in addition, the mode selection module 534, as executed by the processor 520, may select either the Traditional PHY Mode or the Multi-PHY Mode based on user input.

If the PHY 510 is configured to operate in Traditional PHY Mode (720) , the communications device 500 may determine a symbol rate to be used for subsequent communications with another device (730) . For example, the symbol rate (e. g. , 10Mbps, 100Mbps, or 1000Mbps) may be determined during an auto-negotiation process with the other communications device. More specifically, during auto-negotiation, the communications device 500 may determine the communications capabilities of the other device and select the highest symbol rate that is supported by both devices. The symbol rate may directly correlate with a PCS used to encode incoming and outgoing data. For example, with reference to FIG. 2, the 1000Base-T PCS 212 may be activated when the selected symbol rate is 1000Mbps, the 100Base-T PCS 214 (1) may be activated when the selected symbol rate is 100Mbps, and the 10Base-T PCS 216 (1) may be activated when the selected symbol rate is 10Mbps.

The communications device 500 may then couple a set of transceivers to a respective set of primary connection terminals (740) . For example, with reference to FIG. 2, the switching element 230 may couple each of the transceivers 220 (1) -220 (4) to a respective one of the primary connection terminals 201 (1) -201 (4) upon receiving an M_Sel signal indicating the Traditional PHY Mode. More specifically, the switching element may couple both the TX element and the RX element of each transceiver to a respective communications channel via a corresponding connection pad (e. g. , as described above with respect to FIG. 4) . This enables the PHY to both transmit and receive data (e. g. , in full-duplex operation) over each communications channel when processing communications in accordance with the 1000Base-T Ethernet standard. When the selected symbol rate is 100Mbps and/or 10Mbps, the PHY may transmit outgoing data using the TX element of one transceiver (e. g. , transceiver 220 (1) coupled to connection terminal 201 (1) ) and receive incoming data using the RX element of another transceiver (e. g. , transceiver 220 (2) coupled to connection terminal 201 (2) ) .

If the PHY is configured to operate in Multi-PHY Mode (720) , the communications device 500 may subsequently disable the 1000Base-T PCS (750) . For example, when operating in Multi-PHY Mode, the PHY 510 may process multiple concurrent communications based on the 100Base-T and/or 10Base-T Ethernet standard. However, the 1000Base-T Ethernet standard typically utilizes most, if not all, of the resources of the PHY 510 to communicate with a single device. Therefore, the PHY 510 may disable communications in accordance with the 1000Base-T Ethernet standard when operating in Multi-PHY Mode.

The communications device 500 may further disable interference cancellation for the reconfigurable PHY 510 (760) . As described above, interference cancellation is typically used in gigabit Ethernet communications to improve the signal quality of each communications channel by suppressing or cancelling interference due to echo and/or crosstalk. However, since gigabit Ethernet communications are disabled when the PHY 510 is operating in Multi-PHY Mode, the interference cancellation circuitry may also be deactivated to conserve power. For example, with reference to FIG. 3, the interference cancellation circuitry 304 (which includes an EC and a series of NCs) may be deactivated in response to an asserted M_Sel signal (e. g. , indicating the Multi-PHY Mode of operation) .

The communications device 500 may then determine respective symbol rates for each of the active connections (770) . For example, the processor 520, in executing the connection module 536, may identify one or more other devices connected to or otherwise in communication with the communications device 500. For some embodiments, the processor 520 may determine the respective symbol rate (e. g. , 100Mbps or 10Mbps) associated with each active connection through an auto-negotiation process with a corresponding device. As described above, the communications device 500 may select, for each active connection, the highest symbol rate that is supported by the communications device 500 and another device in communication with the device 500.

The symbol rate may directly correlate with a PCS used to encode incoming and outgoing data for each lane of the PHY 510. For example, with reference to FIG. 2, either the 100Base-T PCS 214 (1) or the 10Base-T PCS 216 (1) may be activated depending on whether the symbol rate for communications with a first device (e. g. , via the connection pair 201 (1) /202 (1) ) is 100Mbps or 10Mbps, respectively. If applicable, one of the 100Base-T PCS 214 (2) or the 10Base-T PCS 216 (2) may be activated depending on whether the symbol rate for communications with a second device (e. g. , via the connection pair 201 (2) /202 (2) ) is 100Mbps or 10Mbps, respectively. Similarly, one of the 100Base-T PCS 214 (3) or the 10Base-T PCS 216 (3) may be activated depending on whether the symbol rate for communications with a third device (e. g. , via the connection pair 201 (3) /202 (3) ) is 100Mbps or 10Mbps, respectively. Further, one of the 100Base-T PCS 214 (4) or the 10Base-T PCS 216 (4) may be activated depending on whether the symbol rate for communications with a fourth device (e. g. , via the connection pair 201 (4) /202 (4) ) is 100Mbps or 10Mbps, respectively.

Finally, the communications device 500 may selectively couple the set of transceivers to the set of primary connection terminals and a set of secondary connection terminals (780) . For example, with reference to FIG. 2, the switching element 230 may couple the transceivers 220 (1) -220 (4) to a combination of the primary connection terminals 201 (1) -201 (4) and the secondary connection terminals 202 (1) -202 (4) upon receiving an M_Sel signal indicating the Multi-PHY Mode. More specifically, the switching element may couple the TX element of each transceiver 220 (1) -220 (4) to a respective one of the primary connection terminals 201 (1) -201 (4) , while coupling the RX element of each transceiver 220 (1) -220 (4) to a respective one of the secondary connection terminals 202 (1) -202 (4) (e. g. , as described above with respect to FIGS. 2 and 4) . Moreover, each connection pair (e. g. , 201 (1) /202 (1) , 201 (2) /202 (2) , 201 (3) /202 (3) , 201 (4) /202 (4) ) may be coupled to a different Ethernet cable. This allows the PHY to process multiple concurrent communications (e. g. , with multiple devices) in accordance with 10Base-T and/or 100Base-T Ethernet standards.

In the foregoing specification, the present embodiments have been described with reference to specific exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader scope of the disclosure as set forth in the appended claims. For example, the method steps depicted in the flow charts of FIGS. 6-7 may be performed in other suitable orders, multiple steps may be combined into a single step, and/or some steps may be omitted. The specification and drawings are, accordingly, to be regarded in an illustrative sense rather than a restrictive sense.

Claims

A reconfigurable Ethernet physical layer (PHY) that is operable in at least a first mode and a second mode, the reconfigurable Ethernet PHY comprising:

signal processing circuitry to process communications of a first type or a second type during the first mode of operation, and to process multiple communications of the second type during the second mode of operation；

a plurality of transceivers coupled to the signal processing circuitry, wherein each transceiver of the plurality of transceivers includes a transmitting element and a receiving element； and

a switching element to selectively couple the plurality of transceivers to a first set of communications channels or a second set of communications channels based on whether the reconfigurable Ethernet PHY is operating in the first mode or the second mode, wherein a number of communications channels in the second set of communications channels is greater than a number of transceivers of the plurality of transceivers.
The reconfigurable Ethernet PHY of claim 1, wherein the first set of communications channels is a subset of the second set of communications channels.
The reconfigurable Ethernet PHY of claim 1, wherein a number of communications channels in the first set is equal to a number of transceivers of the plurality of transceivers.
The reconfigurable Ethernet PHY of claim 3, wherein a number of communications channels in the second set is double the number of communications channels in the first set.
The reconfigurable Ethernet PHY of claim 1, wherein the first set of communications channels corresponds with a single Ethernet cable, and wherein the second set of communications channels corresponds with two or more Ethernet cables.
The reconfigurable Ethernet PHY of claim 1, wherein the first type of communications corresponds with a 1000Base-T Ethernet standard, and wherein the second type of communications corresponds with at least one of a 100Base-T or a 10Base-T Ethernet standard.
The reconfigurable Ethernet PHY of claim 6, wherein the signal processing circuitry includes circuitry for processing the multiple communications of the second type, concurrently, during the second mode of operation.
The reconfigurable Ethernet PHY of claim 7, wherein the switching element couples the plurality of transceivers to the first set of communications channels during the first mode of operation, and wherein the switching element couples the plurality of transceivers to the second set of communications channels during the second mode of operation.
The reconfigurable Ethernet PHY of claim 1, wherein during the first mode of operation, the switching element couples each transceiver of the plurality of transceivers to a respective communications channel in the first set of communications channels.
The reconfigurable Ethernet PHY of claim 1, wherein during the second mode of operation:

the switching element couples the transmitting element of at least one transceiver of the plurality of transceivers to a first communications channel in the second set of communications channels； and

the switching element couples the receiving element of the at least one transceiver to a second communications channel in the second set of communications channels.
The reconfigurable Ethernet PHY of claim 1, wherein the signal processing circuitry includes a plurality of physical coding sublayers (PCSs) , wherein at least one PCS of the plurality of PCSs is coupled to each transceiver of the plurality of transceivers.
A method of operating a reconfigurable Ethernet physical layer (PHY) , the method comprising:

determining whether the PHY is operating in a first mode or a second mode, wherein the PHY is configured for communications of a first type or a second type when operating in the first mode, and wherein the PHY is configured for multiple communications of the second type when operating in the second mode； and

selectively coupling a plurality of transceivers to a first set of communications channels or a second set of communications channels based on whether the reconfigurable Ethernet PHY is operating in the first mode or the second mode, wherein a number of communications channels in the second set of communications channels is greater than a number of transceivers of the plurality of transceivers.
The method of claim 12, wherein the first set of communications channels is a subset of the second set of communications channels.
The method of claim 12, wherein a number of communications channels in the first set is equal to a number of transceivers of the plurality of transceivers.
The method of claim 14, wherein a number of communications channels in the second set is double the number of communications channels in the first set.
The method of claim 12, wherein the first type of communications corresponds with a 1000Base-T Ethernet standard, and wherein the second type of communications corresponds with at least one of a 100Base-T or a 10Base-T Ethernet standard.
The method of claim 12, further comprising:

processing the multiple communications of the second type, concurrently, when operating in the second mode.
The method of claim 17, wherein selectively coupling the plurality of transceivers to the first set of communications channels or the second set of communications channels comprises:

coupling the plurality of transceivers to the first set of communications channels when operating in the first mode； and

coupling the plurality of transceivers to the second set of communications channels when operation in the second mode.
The method of claim 12, wherein selectively coupling the plurality of transceivers to the first set of communications channels or the second set of communications channels comprises, during the first mode of operation:

coupling each transceiver of the plurality of transceivers to a respective communications channel in the first set of communications channels.
The method of claim 12, wherein selectively coupling the plurality of transceivers to the first set of communications channels or the second set of communications channels comprises, during the second mode of operation:

coupling a transmitting element of at least one transceiver of the plurality of transceivers to a first communications channel in the second set of communications channels； and

coupling a receiving element of the at least one transceiver to a second communications channel in the second set of communications channels.
A reconfigurable Ethernet physical layer (PHY) comprising:

means for determining whether the PHY is operating in a first mode or a second mode, wherein the PHY is configured for communications of a first type or a second type when operating in the first mode, and wherein the PHY is configured for multiple communications of the second type when operating in the second mode； and

means for selectively coupling a plurality of transceivers to a first set of communications channels or a second set of communications channels based on whether the reconfigurable Ethernet PHY is operating in the first mode or the second mode, wherein the second set includes a greater number of communications channels than the first set.
The reconfigurable Ethernet PHY of claim 21, wherein the first set of communications channels is a subset of the second set of communications channels.
The reconfigurable Ethernet PHY of claim 21, wherein a number of communications channels in the first set is equal to a number of transceivers of the plurality of transceivers.
The reconfigurable Ethernet PHY of claim 23, wherein a number of communications channels in the second set is double the number of communications channels in the first set.
The reconfigurable Ethernet PHY of claim 21, wherein the first type of communications corresponds with a 1000Base-T Ethernet standard, and wherein the second type of communications corresponds with at least one of a 100Base-T or a 10Base-T Ethernet standard.
The reconfigurable Ethernet PHY of claim 21, further comprising:

means for processing the multiple communications of the second type, concurrently, when operating in the second mode.
The reconfigurable Ethernet PHY of claim 21, wherein the means for selectively coupling the plurality of transceivers to the first set of communications channels or the second set of communications channels is to:

couple the plurality of transceivers to the first set of communications channels when operating in the first mode； and

couple the plurality of transceivers to the second set of communications channels when operation in the second mode.
The reconfigurable Ethernet PHY of claim 21, wherein the means for selectively coupling the plurality of transceivers to the first set of communications channels or the second set of communications channels is to, during the first mode of operation:

couple each transceiver of the plurality of transceivers to a respective communications channel in the first set of communications channels.
The reconfigurable Ethernet PHY of claim 21, wherein the means for selectively coupling the plurality of transceivers to the first set of communications channels or the second set of communications channels comprises is to, during the second mode of operation:

couple a transmitting element of at least one transceiver of the plurality of transceivers to a first communications channel in the second set of communications channels； and

couple a receiving element of the at least one transceiver to a second communications channel in the second set of communications channels.
A computer-readable storage medium containing program instructions that, when executed by a processor provided within a communications device, causes the communications device to:

determine whether an Ethernet physical layer (PHY) is operating in a first mode or a second mode, wherein the PHY is configured for communications of a first type or a second type when operating in the first mode, and wherein the PHY is configured for multiple communications of the second type when operating in the second mode； and

selectively couple a plurality of transceivers to a first set of communications channels or a second set of communications channels based on whether the Ethernet PHY is operating in the first mode or the second mode, wherein a number of communications channels in the second set of communications channels is greater than a number of transceivers of the plurality of transceivers.