WO2015166001A1 - Optoelektronischer halbleiterchip und verfahren zur herstellung eines optoelektronischen halbleiterchips - Google Patents
Optoelektronischer halbleiterchip und verfahren zur herstellung eines optoelektronischen halbleiterchips Download PDFInfo
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- WO2015166001A1 WO2015166001A1 PCT/EP2015/059407 EP2015059407W WO2015166001A1 WO 2015166001 A1 WO2015166001 A1 WO 2015166001A1 EP 2015059407 W EP2015059407 W EP 2015059407W WO 2015166001 A1 WO2015166001 A1 WO 2015166001A1
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- WIPO (PCT)
- Prior art keywords
- layer sequence
- semiconductor layer
- semiconductor chip
- contact elements
- radiation
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 250
- 230000005693 optoelectronics Effects 0.000 title claims abstract description 39
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 230000005855 radiation Effects 0.000 claims abstract description 68
- 230000005670 electromagnetic radiation Effects 0.000 claims abstract description 10
- 239000010409 thin film Substances 0.000 claims abstract description 5
- 239000010410 layer Substances 0.000 claims description 244
- 239000000758 substrate Substances 0.000 claims description 36
- 238000000034 method Methods 0.000 claims description 22
- 239000000463 material Substances 0.000 claims description 21
- 238000007788 roughening Methods 0.000 claims description 16
- 239000011159 matrix material Substances 0.000 claims description 15
- 230000007547 defect Effects 0.000 claims description 9
- 238000005498 polishing Methods 0.000 claims description 6
- 239000011241 protective layer Substances 0.000 claims description 6
- FGUUSXIOTUKUDN-IBGZPJMESA-N C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 Chemical compound C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 FGUUSXIOTUKUDN-IBGZPJMESA-N 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 239000012780 transparent material Substances 0.000 claims description 2
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 238000009413 insulation Methods 0.000 description 7
- 238000004382 potting Methods 0.000 description 6
- -1 Nitride compound Chemical class 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000002310 reflectometry Methods 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229920003023 plastic Polymers 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 230000000087 stabilizing effect Effects 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 125000002524 organometallic group Chemical group 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- NPNMHHNXCILFEF-UHFFFAOYSA-N [F].[Sn]=O Chemical compound [F].[Sn]=O NPNMHHNXCILFEF-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 230000001427 coherent effect Effects 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 235000011007 phosphoric acid Nutrition 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000002522 swelling effect Effects 0.000 description 1
- 238000007704 wet chemistry method Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- H01L33/0093—
-
- H01L33/08—
-
- H01L33/20—
-
- H01L33/405—
-
- H01L33/62—
-
- H01L27/1214—
Definitions
- An optoelectronic semiconductor chip is specified.
- An object to be solved is to provide a semiconductor chip having a plurality of radiation-emitting pixels
- Another object to be solved is to provide a method for producing such a semiconductor chip, which is particularly simple and inexpensive.
- Semiconductor layer sequence with a top side and a bottom side opposite the top side.
- the semiconductor layer sequence is preferably based on a III-V compound semiconductor material.
- the semiconductor material is, for example, a
- Nitride compound semiconductor such as Al n In] __ n _ m Ga m N, or a phosphide such as Al n In] __ n _ m Ga m P, or also a Arsenidrivurgidurleitermaterial as Al n In] __ n _ m Ga m As, where each 0 ⁇ n ⁇ 1, 0 ⁇ m ⁇ 1 and n + m ⁇ 1.
- the semiconductor layer sequence such as Al n In] __ n _ m Ga m N, or a phosphide such as Al n In] __ n _ m Ga m P, or also a Arsenidimpldururleitermaterial as Al n In] __ n _ m Ga m As, where each 0 ⁇ n ⁇ 1, 0 ⁇ m ⁇ 1 and n + m ⁇ 1.
- the semiconductor layer sequence such as Al n In] __
- Components of the crystal lattice of the Semiconductor layer sequence that is, Al, As, Ga, In, N or P, indicated, although these may be partially replaced by small amounts of other substances and / or supplemented.
- the semiconductor layer sequence is preferably based on AlInGaN.
- the semiconductor layer sequence comprises at least one active layer which is used to generate an electromagnetic layer
- the active layer contains at least one pn junction and / or at least one quantum well structure.
- a radiation generated by the active layer in operation is in particular in the
- Spectral range between 400 nm and 800 nm inclusive.
- the contact elements have, for example, a metal, such as aluminum or silver or gold, or are formed from such.
- the semiconductor layer sequence for the intended operation is electrically contacted via the contact elements.
- Contact elements may be formed in plan view of the top of the semiconductor layer sequence, for example, round, square rectangular or hexagonal. According to at least one embodiment, the
- the semiconductor chip designed as a thin-film semiconductor chip.
- the semiconductor chip is thus free of a growth substrate onto which the semiconductor layer sequence has grown.
- the semiconductor chip has, for example, a carrier different from the growth substrate, to which the semiconductor layer sequence is applied, and which mechanically stabilizes the semiconductor layer sequence.
- the carrier By the carrier, the semiconductor chip, for example, self-supporting.
- the carrier may further comprise or be made of a metallic or a ceramic material
- the carrier is made of a glass material or a plastic material or has at least one of these materials.
- the carrier may also include or be formed from a semiconductor material such as silicon or germanium.
- the carrier contains electrical circuits, and / or is as
- the lower side of the semiconductor layer sequence is designed as a radiation output surface. This means that radiation which is generated in the active layer of the semiconductor layer sequence, partially or completely through the underside of the
- no carrier stabilizing the semiconductor chip is applied to the underside of the semiconductor layer sequence.
- the carrier stabilizing the semiconductor chip is therefore preferably arranged on the upper side of the semiconductor layer sequence.
- Contact elements individually and independently electrically controlled. That is, at least some, preferably all contact elements can be acted upon individually and independently of the other contact elements with electrical voltage.
- the active layer of the semiconductor layer sequence preferably emits only in an area in the immediate vicinity of the contact element electromagnetic radiation. This area is referred to here and below as an active area. Every active one
- Area can therefore be assigned a contact element, and vice versa.
- the contact elements have a lateral extent parallel to the direction of extension of the upper side of at most 50 ⁇ m, preferably at most 15 ⁇ m, particularly preferably at most 5 ⁇ m.
- the distance between two adjacent contact elements, at least for a part of the contact elements can be at most 20 .mu.m, preferably at most 10 .mu.m, particularly preferably at most 5 .mu.m.
- the lateral extent of an active region that is to say the extent parallel to the radiation decoupling surface
- the active region has a greater lateral extent, for example, by a maximum of 3 ym, preferably by at most 2 ym, more preferably by at most 1 ym greater lateral extent, than the associated
- Semiconductor layer sequence has a thickness of at most 3 ym, preferably at most 2 ym, more preferably at most 1.5 ym.
- the thickness of the semiconductor layer sequence can be understood here and below to mean the maximum, preferably the average thickness of the semiconductor layer sequence.
- the thickness can be defined as the distance between the upper side and the lower side of the semiconductor layer sequence.
- the optoelectronic semiconductor chip comprises a semiconductor layer sequence with an upper side and one of the upper side
- the semiconductor layer sequence has an active layer for the production
- the semiconductor chip is designed as a thin-film semiconductor chip.
- the underside of the semiconductor layer sequence forms a
- Semiconductor layer sequence has a thickness of at most 3 ym.
- the invention described here is based on the idea of a particularly simple semiconductor chip with a plurality of radiation-emitting pixels
- the active layer generates the
- each contact element a preferably only in the active region in the immediate vicinity of the contact element electromagnetic radiation. In this way, each contact element a
- Radiation emitting active region of the active layer are uniquely assigned. Each of these one
- the semiconductor layer sequence becomes
- the active region assigned to a contact element advantageously has a lateral which is at most a few micrometers larger
- the above-described invention dispenses with pixels that are detected by means of mesa trenches in the
- Radiation decoupling surface of the semiconductor layer sequence on a roughening with a roughness is less than or equal to 200 nm, preferably less than or equal to 100 nm, particularly preferably less than or equal to 50 nm.
- the radiation coupling-out surface is up to this roughening smooth. The roughness therefore preferably falls out very small, particularly preferably the radiation coupling-out surface is smooth.
- the roughness is a measure of the generated by the structures
- Variation of the surface height of the corresponding surface For example, for roughening, only structures that produce a small variation in surface height are counted.
- a "small variation” is, for example, a variation that is small in comparison to the lateral extent of the contact elements, for example at most 1/10 or 1/20 or 1/100 as large as the lateral extent of the contact elements Roughness of a surface that is often unintentional and difficult to control
- the roughness can be the mean roughness, that is, the roughness indicates the average distance of a measuring point on the surface to a central surface.
- the center surface intersects the actual profile of the surface such that the sum of the measured profile deviations, relative to the
- each light-emitting pixel for an external observer actually only appears approximately as large as the associated contact element or the associated active region.
- An adulteration of the pixel or an overlap of adjacent pixels is reduced by the low scattering at the radiation decoupling surface, which in turn causes the
- the top and / or the bottom is smooth except for the above roughening.
- Semiconductor layer sequence then forms, for example, a continuous layer without interruptions.
- the thickness of the semiconductor layer sequence may then be constant, for example with maximum thickness variations around the mean of the thickness of at most 10% or 5% or 1% or 0.1%.
- the active layer is formed along the entire lateral extent of the semiconductor chip contiguous and without interruptions. In the case of the semiconductor layer sequence of this embodiment, it is possible in particular to dispense with mesa trenches or mesial holes between two adjacent contact elements or between two adjacent active regions.
- Trenches for example, mesa trenches, in the
- the trenches extend, for example, from the top towards the bottom.
- the trenches are laterally adjacent, in particular
- each contact element is partially or completely surrounded by a trench.
- the trench can run continuously and uninterrupted around the corresponding contact element.
- the trenches in plan view form individual closed or partially open
- each contact element being surrounded by a unique mesh. It is possible in particular that all trenches are connected, so that a network of trenches is formed around the contact elements.
- the trenches penetrate the active layer and have bottom surfaces in the region of the semiconductor layer sequence that lies between the active layer
- Semiconductor layer sequence arranged in a matrix This can mean that the contact elements in a regular
- Pattern for example in the form of a grid, which can be carried out further as a square, rectangular or hexagonal grid, are arranged on top.
- the individual contact elements can, for example, represent pixels of a display, so that the semiconductor chip forms a microdisplay.
- a potting material is introduced laterally next to the contact elements, which partially or completely fills in interspaces between the contact elements.
- the potting material can for
- Potting material for example, has a reflectivity for the radiation emitted by the semiconductor layer sequence of at least 80%, wherein the reflectivity is a mean, emitted by the semiconductor chip
- Wavelength spectrum averaged reflectivity can act.
- the reflectivity can also be specified at a wavelength at which an intensity maximum of the radiation emitted by the semiconductor chip occurs.
- the potting material is a base material filled with reflective particles, such as 10 O 2, such as silicone or resin or plastic.
- a plurality of the contact elements is on the upper side
- the active matrix element is used for selective electrical control of the individual contact elements.
- the active matrix element is, for example, a A plurality of transistors, such as thin-film transistors, which have the same, preferably matrix-like arrangement as the contact elements.
- the transistors can
- a substrate for example a substrate, for example a substrate
- each transistor is a contact element and thus a pixel of
- each pixel of the semiconductor layer sequence is, for example, one-to-one power supply terminals on the
- the semiconductor chip can be used for example as a microdisplay, wherein the active matrix element ensures that each contact element or pixel of the microdisplay can be controlled individually.
- the specular material may be, for example, silver, aluminum or gold or a metal alloy thereof.
- Radiation decoupling surface of the semiconductor layer sequence attached another contact element for electrically contacting the semiconductor layer sequence.
- Semiconductor layer sequence is thus arranged between the contact elements and the further contact element in this case and is via the contact elements and the other
- the further contact element has preferably an electrically conductive transparent material, for example a transparent conductive oxide, in short TCO, such as indium tin oxide, ITO short, or fluorine-tin oxide or
- Aluminum-zinc oxide on or is formed from.
- the further contact element can partially or completely cover the radiation outcoupling surface.
- the further contact element extends continuously, coherently and
- the further contact element preferably covers several, in particular all, of the contact elements partially or completely.
- Radiation decoupling surface is, for example, at least 50 nm or 100 nm or 300 nm. Alternatively or additionally, the thickness is at most 5 ym or 1 ym or 500 nm.
- the further contact element does not form a stabilizing component in the semiconductor chip.
- the further contact element is not mechanically self-supporting in particular. Particular preference is given to the radiation output surface
- the further contact element is arranged on the edge of the semiconductor chip.
- the further contact element is arranged on the edge of the semiconductor chip.
- the further contact element simulates the mesh structure or grid structure of the trenches.
- the further contact element can then be
- Contact element has a metal such as Ag or AI, or consists thereof.
- the radiation decoupling surface is then free of contact elements, for example. In particular, the radiation decoupling surface along the entire
- Semiconductor layer sequence facing away from the contact elements each have a conductive protective layer, for example, zinc oxide or titanium formed.
- Contact elements on side surfaces which extend transversely to the top of the semiconductor layer sequence are preferably insulating layers, for
- the conductive protective layer and the insulating layers protect the contact elements, for example against external influences such as moisture ingress or oxidation. These are the conductive protective layer and / or the
- Insulation layers preferably form-fitting on the exposed, so not on the
- a conductive layer serving for protection is also applied to the insulating layer.
- a semiconductor layer adjoining the radiation coupling-out surface has defects, for example lattice dislocations.
- the defects arise, for example, when growing up
- Radiation decoupling surface adjacent semiconductor layer at most 5-10 ⁇ cm “ ⁇ , preferably at most 3-10 ⁇ cm " ⁇ particularly preferably at most 2-10 ⁇ cm ⁇ 2.
- a method for producing an optoelectronic semiconductor chip is specified.
- the method is suitable for example for the production of a semiconductor chip according to the above
- the method for producing an optoelectronic semiconductor chip comprises a step a) in which a growth substrate is provided.
- the growth substrate may be, for example, a substrate suitable for growing a III-V semiconductor layer sequence, such as a sapphire substrate.
- a semiconductor layer sequence in a step b) of the method, a semiconductor layer sequence,
- the semiconductor layer sequence has at least one active layer, which in the
- a plurality of individually and independently controllable contact elements are formed on the side of the semiconductor layer sequence facing away from the growth substrate.
- a carrier is applied to the sides of the contact elements facing away from the growth substrate.
- the support is, for example, a metallic support or a ceramic support or a semiconductor support or a printed circuit board or an active matrix element.
- the carrier can in particular serve for a mechanical stabilization of the finished semiconductor chip, so that the finished semiconductor chip is self-supporting.
- the growth substrate is detached from the semiconductor layer sequence. The detachment can take place, for example, by means of a laser liftoff process.
- the semiconductor layer sequence is removed in a further step f) until the maximum or average thickness of the semiconductor layer sequence is at most 3 ⁇ m, preferably at most 2 ⁇ m, particularly preferably at most 1 ⁇ m.
- the removal of the semiconductor layer sequence is preferably done by that of the original
- Semiconductor layer sequence for example, by means of a wet chemical process, for example by the etching using KOH or H3PO4, or by a dry chemical etching process, for example, with chlorine gas or argon, take place. Due to the etching processes, the side of the
- semiconductor layer sequence over which has been etched in particular provided with structures.
- these structures may, for example, serve as coupling-out structures for the light generated by the semiconductor layer sequence.
- Such coupling-out structures generate on the
- Radiation decoupling surface has a roughness of, for example, at least 500 nm, preferably at least 700 nm, more preferably at least 1 ym.
- Partial removal of the semiconductor layer sequence from the side facing away from the carrier of the semiconductor layer sequence Polishing a radiation decoupling surface formed.
- the structures produced by the removing method of the step f) are preferred on the
- Radiation decoupling surface removed. After polishing, a roughening remains on the radiation coupling-out surface, which has a roughness of at most 200 nm, preferably at most 100 nm, particularly preferably at most 50 nm
- step b) of the method first of all a buffer layer sequence is applied to the
- the active layer is then applied to the buffer layer sequence.
- the active layer can be applied directly to the buffer layer sequence. Alternatively, it is also possible that before the application of the active layer more
- the buffer layer sequence has, for example, the same compound semiconductor type as the semiconductor layer sequence.
- the buffer layer sequence can have several
- the buffer layer sequence serves to reduce the defect during growth and compensates for different thermal effects
- step f) the buffer layer sequence of the semiconductor layer sequence is partially or completely removed.
- the buffer layer sequence is in Generally only for the growing process of
- the buffer layer sequence After detachment of the growth substrate, the buffer layer sequence no longer has any indispensable functionality and can therefore be partially or completely removed in order to reduce the thickness of the semiconductor layer sequence.
- MOVPE organometallic gas phase epitaxy
- Sputtering processes can also be used to produce thin epitaxial layers with a low defect density.
- organometallic gas phase epitaxy is needed, can then be dispensed with. Consequently, in order to achieve a thin semiconductor layer sequence, no buffer layer sequence then has to be removed in a further step.
- an optoelectronic semiconductor chip described here and a method for producing an optoelectronic semiconductor chip will be explained in more detail with reference to the drawings by means of exemplary embodiments.
- the same reference numerals indicate the same elements in the individual figures. However, they are not
- Figures 1A to IC are schematic side views of
- Figures 1D and IE are schematic plan views
- FIGS. 2A to 2F are schematic side views of FIG.
- Figures 3A to 3D are plan views of different
- FIG. 1A shows a side view of an exemplary embodiment of an optoelectronic semiconductor chip 100.
- the semiconductor chip 100 has a semiconductor layer sequence 1 with an upper side 2 and an opposite one
- the semiconductor layer sequence 1 comprises, for example, a p-doped layer 11, an n-doped layer 13 and an active layer 12 arranged between the p-doped layer 11 and the n-doped layer 13 and used to generate electromagnetic radiation
- the semiconductor layer sequence 1 as well as the active layer 12 are along the entire lateral Expansion of the semiconductor chip 100, parallel to the bottom 3, formed contiguous, continuous and uninterrupted.
- Contact elements 20 are formed, for example, from silver and are preferably individually and independently electrically controllable.
- Contact element 20 has electromagnetic radiation within an active region 14.
- the active region 14 has, for example, a lateral extension that is at most 1 ⁇ m greater than the associated contact element 20.
- the active region 14 forms a luminous pixel when viewed from the top side 3 for an external observer. This has a similar lateral extent and a similar shape to the one energized
- Contact element 20 has. By the majority of arranged on the top 2 contact elements 20 which can be energized independently of each other, for example, a pixelated microdisplay is realized.
- the contact elements have a lateral extent parallel to the upper side 2 of the
- Semiconductor layer sequence 1, for example, 10 ym on.
- the distance between two adjacent contact elements is also 10 ym, for example.
- Semiconductor layer sequence 1 is 2 ym, for example.
- Radiation decoupling surface 3 in this case has a roughening with a roughness which is substantially smaller than the lateral dimensions of the contact elements 20.
- the roughness is for example at most 100 nm. The roughening is so small that the
- Radiation decoupling surface 3 appears smooth.
- Radiation decoupling surface 3 also another
- the further contact element 30 covers the entire
- electromagnetic radiation can be emitted, is the further contact element 30, for example, a
- the Insulation layers 23 also cover side surfaces of the electrically conductive layer 21.
- Insulation layer 23 are in Fig. 1A a form-fitting manner
- Insulation layers 23 encapsulate the contact elements 20. As a result, the contact elements 20 are protected, for example, from the entry of moisture and from oxidation.
- a carrier 5, for example an active matrix element 40 is applied to the plurality of contact elements 20, with which the individual contact elements 20 can be electrically controlled independently of the other contact elements 20.
- the active matrix element 40 for example, a plurality of transistors and
- the active matrix element 40 is preferably electrically conductively connected to the contact elements 20 via a solder material 24.
- Embodiment as shown in Figure 1A The only difference is that, in the case of FIG. 1A, the thickness of the semiconductor layer sequence 1 is approximately constant and does not have any intentionally introduced recesses, such as mesa trenches, on the upper side 2.
- trenches 7 are intentionally introduced between in each case two adjacent contact elements 20.
- the depth of the trenches 7 is selected so that the trenches 7 penetrate the active layer 12 and end with bottom surfaces in the n-doped layer 13.
- the width of the trenches 7 is so chosen that the trenches 7 starting from a
- Contact elements 20, in particular the trenches 7, can optionally with a potting material, such as a white
- Radiation decoupling surface 3 is mounted, but in the range of bottom surfaces of the trenches 7. In these areas, the further contact element 30 is, for example, in direct
- Radiation outcoupling surface 3 opposite side energized or contacted.
- the radiation decoupling surface 3 is exposed along the entire lateral extent of the semiconductor chip 100.
- Figure 1D shows an embodiment of a
- Optoelectronic semiconductor chip 100 in plan view of the top 2.
- the contact elements 20 are matrix-like, that is in particular regularly, on grid points of a
- the contact elements 20 themselves also each have a rectangular basic shape.
- the areas between the contact elements 20 may be formed, for example, by trenches 7 which form a grid around the
- each contact element 20 is uniquely associated with a mesh of the grid.
- the trenches 7 are formed interconnected.
- the further contact element 30 is disposed within the trenches 7.
- the further contact element 30 can the grid of the trenches 7 nachformen, so in particular run continuously and without interruption within the trenches 7. It is the further contact element 30 in Figure 1D, for example, integrally formed.
- FIG. 1E a top view of a
- a growth substrate 4 which is formed here for example of sapphire, a
- Buffer layer sequence 6 grown.
- the buffer layer sequence 6 is based, for example, on GaN. Due to the different thermal expansion coefficients and the
- Buffer layer sequence 6 for example in the form of
- Buffer layer sequence 6 is also an n-doped
- a semiconductor layer 13 applied. On the n-doped layer 13, a p-doped layer 11 is applied. Between the p-doped layer 11 and the n-doped layer 13, an active radiation generating layer 12 is formed.
- the buffer layer sequence 6, the n-doped layer 13, the active layer 12 and the p-doped layer 11 together form a semiconductor layer sequence 1.
- contact elements 20 are applied to an upper side 2 of the semiconductor layer sequence 1 facing away from the growth substrate 4.
- the contact elements 20 are
- contact elements 20 in FIG. 2B are applied with an electrically conductive layer 21, for example made of titanium.
- the electrically conductive layer 21 is then applied to the metallic layer.
- the individual contact elements 20 with the electrically conductive layers 21 can then be produced.
- Contact elements 20 a carrier 5, for example in the form of an active matrix element 40, arranged by means of a solder material 24.
- the active matrix element 40 covers a plurality of contact elements 20. Further, in the embodiment of FIG. 2D, the
- Growth substrate 4 is removed, whereby a bottom 3 of the semiconductor layer sequence 1 is exposed.
- the removal of the growth substrate 4 may, for example, via a
- Semiconductor layer sequence 1 for example, by means of a wet-chemical or dry chemical etching process removed from the bottom 3 of.
- structures which, for example, serve as coupling-out structures for the electromagnetic radiation generated in the active layer 12 are formed on the underside 3 of the semiconductor layer sequence 1.
- the present example the
- Semiconductor layer sequence 1 removed so far that the thickness of the semiconductor layer sequence is at most 2 ym.
- the entire buffer layer sequence 6 is removed.
- Top 2 and the bottom 3 also be reversed. Furthermore, in addition to or instead of the GaN-based
- Semiconductor materials can also be used GaP and / or GaAs.
- Semiconductor chips 100 are lit.
- the semiconductor chip has, for example, a side length of at most 10 mm and has a total of at least 100,000 pixels.
- the layer thickness of the semiconductor layer sequence is selected to be 7 ym.
- the radiation decoupling surface is virtually free of roughening, that is, the radiation decoupling surface is smooth.
- the roughness is for example the highest 50 nm.
- Figure 3C shows a similar picture as Figures 3B and 3D.
- the layer thickness of the semiconductor layer sequence is selected to 7 ym.
- Figure 3C is also the
- Radiation decoupling surface 3 provided with a roughening whose roughness is greater than 500 nm. Through the roughening For example, the pixels in Figure 3C are optically less distinguishable from each other than in Figures 3B and 3D.
- FIGS. 4 and 5 list simulated contrast ratios R of semiconductor chips specified here.
- Contrast ratio R is the ratio of
- the contrast ratio R is listed in the tables of FIGS. 4 and 5 for different pixel widths b, ie for different widths b of the contact elements 20, as well as for different distances a between the contact elements 20.
- the widths b and distances a are each given in ym.
- the contrast ratio R for certain thicknesses d of the semiconductor layer sequence 1 is listed.
- the table of FIG. 4 differs from the table of FIG. 5 in that values for semiconductor chips 100 with a roughly roughened radiation decoupling surface 3 are indicated in the table of FIG. 4, whereas the values in the table in FIG. 5 refer to semiconductor chips 100 a radiation decoupling surface 3 refer, which is polished and thus has no roughness.
- the invention described here is not by the
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Abstract
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US15/304,917 US10008487B2 (en) | 2014-04-29 | 2015-04-29 | Optoelectroic semiconductor chip and method of producing an optoelectronic semiconductor chip |
DE112015002045.4T DE112015002045A5 (de) | 2014-04-29 | 2015-04-29 | Optoelektronischer Halbleiterchip und Verfahren zur Herstellung eines optoelektronischen Halbleiterchips |
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DE102014105999.9 | 2014-04-29 | ||
DE102014105999.9A DE102014105999A1 (de) | 2014-04-29 | 2014-04-29 | Optoelektronischer Halbleiterchip und Verfahren zur Herstellung eines optoelektronischen Halbleiterchips |
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PCT/EP2015/059407 WO2015166001A1 (de) | 2014-04-29 | 2015-04-29 | Optoelektronischer halbleiterchip und verfahren zur herstellung eines optoelektronischen halbleiterchips |
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US (1) | US10008487B2 (de) |
DE (2) | DE102014105999A1 (de) |
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DE102016220915A1 (de) | 2016-10-25 | 2018-04-26 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung von optoelektronischen Halbleiterbauteilen und optoelektronisches Halbleiterbauteil |
DE102017108050B4 (de) | 2017-04-13 | 2022-01-13 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Halbleiterstrahlungsquelle |
WO2019125735A1 (en) | 2017-12-19 | 2019-06-27 | Kateeva, Inc. | Light-emitting devices with improved light outcoupling |
CN108962042B (zh) * | 2018-07-23 | 2021-04-02 | 上海天马微电子有限公司 | 显示面板及其制作方法 |
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US20140014894A1 (en) * | 2012-07-06 | 2014-01-16 | Invensas Corporation | High performance light emitting diode with vias |
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DE102007020291A1 (de) * | 2007-01-31 | 2008-08-07 | Osram Opto Semiconductors Gmbh | Optoelektronischer Halbleiterchip und Verfahren zur Herstellung einer Kontaktstruktur für einen derartigen Chip |
US8368100B2 (en) * | 2007-11-14 | 2013-02-05 | Cree, Inc. | Semiconductor light emitting diodes having reflective structures and methods of fabricating same |
US8207547B2 (en) * | 2009-06-10 | 2012-06-26 | Brudgelux, Inc. | Thin-film LED with P and N contacts electrically isolated from the substrate |
US9419181B2 (en) * | 2013-05-13 | 2016-08-16 | Infineon Technologies Dresden Gmbh | Electrode, an electronic device, and a method for manufacturing an optoelectronic device |
DE102014101896A1 (de) | 2014-02-14 | 2015-08-20 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines optoelektronischen Halbleiterbauteils sowie optoelektronisches Halbleiterbauteil |
-
2014
- 2014-04-29 DE DE102014105999.9A patent/DE102014105999A1/de not_active Withdrawn
-
2015
- 2015-04-29 WO PCT/EP2015/059407 patent/WO2015166001A1/de active Application Filing
- 2015-04-29 DE DE112015002045.4T patent/DE112015002045A5/de active Pending
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US20140014894A1 (en) * | 2012-07-06 | 2014-01-16 | Invensas Corporation | High performance light emitting diode with vias |
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Title |
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MASAHIRO WATANABE ET AL: "Over 1000 channel nitride-based micro-light-emitting diode arrays with tunnel junctions", JAPANESE JOURNAL OF APPLIED PHYSICS, vol. 53, no. 5S1, 7 April 2014 (2014-04-07), pages 05FL06, XP055200219, ISSN: 0021-4922, DOI: 10.7567/JJAP.53.05FL06 * |
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US20170179091A1 (en) | 2017-06-22 |
US10008487B2 (en) | 2018-06-26 |
DE112015002045A5 (de) | 2017-03-02 |
DE102014105999A1 (de) | 2015-10-29 |
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