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WO2013038980A1 - Substrate having buffer layer structure for growing nitride semiconductor layer - Google Patents

Substrate having buffer layer structure for growing nitride semiconductor layer Download PDF

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Publication number
WO2013038980A1
WO2013038980A1 PCT/JP2012/072704 JP2012072704W WO2013038980A1 WO 2013038980 A1 WO2013038980 A1 WO 2013038980A1 JP 2012072704 W JP2012072704 W JP 2012072704W WO 2013038980 A1 WO2013038980 A1 WO 2013038980A1
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layer
substrate
buffer layer
nitride semiconductor
flow rate
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PCT/JP2012/072704
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French (fr)
Japanese (ja)
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暢行 布袋田
信明 寺口
大輔 本田
伸之 伊藤
雅和 松林
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シャープ株式会社
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    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/60Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
    • C30B29/68Crystals with laminate structure, e.g. "superlattices"
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    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
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    • H01L21/02458Nitrides
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
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    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02502Layer structure consisting of two layers
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
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    • H01L21/02494Structure
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
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    • H01L21/02656Special treatments
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    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/015Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
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    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H10D30/4755High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
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    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503Nitride Group III-V materials, e.g. AlN or GaN

Definitions

  • the present invention relates to improvement of a substrate having a buffer layer structure for growing a nitride semiconductor layer, and more particularly to improvement of a buffer layer structure of the substrate.
  • An epitaxial wafer including a plurality of nitride semiconductor layers stacked on such an improved substrate can be preferably used for manufacturing a nitride semiconductor device such as a heterojunction field effect transistor.
  • a GaN substrate is expensive, so that it is on a substrate of a different material such as sapphire, SiC, or Si Conventionally, these nitride semiconductor layers have been crystal-grown.
  • a nitride semiconductor layer is grown by MOCVD (Metal Organic Vapor Deposition) on a substrate of a different material, strain based on the difference in crystal structure, lattice mismatch, thermal expansion coefficient, etc. between the substrate and the semiconductor layer Various buffer layer structures are used for relaxation.
  • MOCVD Metal Organic Vapor Deposition
  • Japanese Patent Laid-Open No. 2-229476 of Patent Document 1 teaches that an AlN layer is deposited as a buffer layer on a sapphire substrate at a relatively low substrate temperature of 400 ° C. or higher and 900 ° C. or lower.
  • Such a buffer layer deposited at a relatively low temperature is also called a low-temperature buffer layer.
  • the low-temperature buffer layer contains microcrystals and polycrystals in the amorphous matrix. Therefore, when the substrate temperature is increased to about 1000 ° C. or higher in order to grow a nitride semiconductor layer for a semiconductor device on the low-temperature buffer layer, the amorphous parent phase in the buffer layer is polycrystallized. It will contain a relatively large amount of dislocations inside. In the nitride semiconductor multilayer structure for devices grown on the buffer layer, a large amount of dislocations are introduced, the crystal quality varies, and cracks tend to occur.
  • Japanese Patent Application Laid-Open No. 2002-367917 of Patent Document 2 teaches that an AlN crystal layer is deposited on a sapphire substrate as a buffer layer at a relatively high substrate temperature of 1100 ° C. or more and 1250 ° C. or less.
  • a buffer layer deposited at a relatively high temperature is also referred to as a high temperature buffer layer.
  • Patent Document 3 also states that if the thickness of the buffer layer is increased, the substrate is likely to warp due to the difference in lattice constant between the substrate and the buffer layer, and the deposition temperature of the AlN buffer layer is further increased. It also states that if the height is increased, the surface of the buffer layer is more likely to become cloudy.
  • Patent Document 3 discloses that the temperature, pressure, and source gas during the deposition of the high-temperature AlN buffer layer are controlled in order to suppress the occurrence of white turbidity even when the high-temperature AlN buffer layer is formed thin. It teaches changing at least one of MOCVD conditions such as flow rate.
  • JP-A-2-229476 Japanese Patent Laid-Open No. 2002-367917 JP 2007-59850 A
  • An AlN crystal having a hexagonal wurtzite structure is a polar crystal in which Al atoms and N atoms are arranged asymmetrically along the c-axis.
  • the thickness of the AlN crystal layer is grown on the non-polar substrate in the c-axis direction, either the Al polarity where Al atoms exist stably on the surface or the N polarity where N atoms exist stably exists on the surface. grow up. This difference in polarity appears characteristically in the morphology of the crystal growth surface, while the Al polar surface is a highly flat surface, whereas the N polar surface is a remarkably uneven surface having hexagonal facets. Tend to be.
  • the AlN crystal layer is grown as a buffer layer without considering the polar face as in Patent Document 3, the surface of the AlN crystal layer in which the Al polar face and the N polar face are mixed is generated, and high surface flatness is obtained. I can't get it.
  • the mixture of the Al polar face and the N polar face is inherited into the nitride semiconductor multilayer structure for devices grown on the AlN buffer layer, and further deteriorates the surface flatness of the semiconductor multilayer structure.
  • the main object of the present invention is to provide a substrate having an improved buffer layer structure for growing a semiconductor laminated structure for a nitride semiconductor device.
  • the present inventors have not formed a high-temperature AlN buffer layer directly on the silicon substrate, but have a surface flatness compared to a conventional high-temperature AlN buffer layer by interposing an Al layer. As a result, it has been found that a novel buffer layer structure with significantly improved can be obtained.
  • a substrate having a buffer layer structure for growing a nitride semiconductor layer has an Al layer and an AlN crystal layer sequentially stacked on a (111) main surface of a Si single crystal substrate,
  • the Al layer has a thickness of 2 atomic layers or more and 10 atomic layers or less, and the surface of the AlN crystal layer has a (0001) plane orientation and an Al polar surface.
  • the Al layer preferably has a thickness of 2 atomic layers or more and 4 atomic layers or less.
  • the substrate according to the present invention may further have an AlGaN crystal layer on the AlN crystal layer.
  • the AlGaN crystal layer can also include a plurality of sub-layers in which the Al composition ratio is sequentially reduced.
  • a good Al polar surface can be obtained on the surface of the AlN crystal buffer layer by uniformly forming the Al layer on the Si substrate surface before growing the AlN crystal buffer layer. That is, since the surface of the AlN crystal buffer layer substantially includes only the Al polar face, it has high flatness.
  • FIG. 1 It is typical sectional drawing which shows an example of the laminated structure of the heterojunction field effect transistor which can be produced using the board
  • FIG. 1 is a schematic cross-sectional view showing an example of a laminated structure of heterojunction field effect transistors that can be manufactured using a substrate according to the present invention.
  • a Si substrate having a (111) main surface is used as the substrate 1.
  • the substrate is set in a chamber of an MOCVD (metal organic chemical vapor deposition) apparatus.
  • MOCVD metal organic chemical vapor deposition
  • the Si substrate 1 is heated to 1050 ° C., and the substrate surface is cleaned for 300 seconds in a hydrogen atmosphere with a chamber internal pressure of 13.3 kPa. Thereafter, an Al layer 2a and an AlN crystal buffer layer 2b are laminated on the Si substrate 1 under the conditions detailed in Examples described later.
  • TMA trimethylaluminum
  • TMG trimethylgallium
  • NH 3 flow rate 12.5 slm.
  • a Ga 0.3 N layer 3 is deposited to a thickness of 400 nm.
  • the superlattice multilayer buffer layer structure 6 may be omitted from the viewpoint of the manufacturing cost and manufacturing time of the heterojunction field effect transistor.
  • the GaN layer 8 is deposited to a thickness of 0.5 ⁇ m under a pressure of 90 kPa.
  • the deposition pressure is low, carbon contained in TMG is easily doped into the GaN layer, and when the deposition pressure is high, carbon tends to be hardly doped from TMG into the GaN layer.
  • an AlN characteristic improving layer 9 (1 nm thickness), an Al 0.2 Ga 0.8 N barrier layer 10 (20 nm thickness), and a GaN cap layer 11 (1 nm) under a pressure of 13.3 kPa.
  • An electron supply layer is deposited, including (thickness).
  • the Al composition ratio of the AlGaN layers 3, 4 and 5 was changed in the order of 0.7, 0.4 and 0.1.
  • the combination of composition ratios is not limited to this combination.
  • the number of AlGaN layers included in the composition gradient buffer layer structure and having different Al composition ratios is not limited to three, and can be any number. What is important is that the Al composition ratio gradually decreases from the lower surface to the upper surface of the composition gradient buffer layer structure.
  • the super lattice multi-layer buffer layer structure 6 is not limited to the repetition of the AlN layer / the Al 0.1 Ga 0.9 N layer,, for example the Al 0.1 Ga 0.9 N layer, has another composition ratio AlGaN It is also possible to replace it with a layer.
  • Comparative Example 1 In order to investigate the improvement effect of the substrate of the present invention, a substrate as Comparative Example 1 was produced using conventional technology.
  • the substrate of Comparative Example 1 has the Si substrate 1, the AlN crystal buffer layer 2b, and the composition gradient buffer layer structure 3-5 in FIG. 1, but does not have the Al layer 2a.
  • the AlN crystal buffer layer 2b is formed on the Si substrate 1 that has been surface-cleaned in the same manner as in the above-described embodiment.
  • the substrate temperature is 1050 ° C.
  • the pressure is 13.3 kPa
  • the TMA is 108.5 sccm.
  • the film was grown to a thickness of 200 nm under MOCVD conditions with a flow rate and NH 3 flow rate of 12.5 slm.
  • a composition gradient buffer layer structure 3-5 was formed on the AlN crystal buffer layer 2b in the same manner as in the above-described embodiment.
  • FIG. 2 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Comparative Example 1 obtained in this way.
  • the white line segment in this micrograph has shown the scale of 50 micrometers.
  • the surface of the substrate of Comparative Example 1 contained many fine convex defects, and the defect density was measured to be 4.4 ⁇ 10 7 pieces / cm 2 .
  • Comparative Example 2 In order to more reliably investigate the improvement effect of the substrate of the present invention, a substrate as Comparative Example 2 was further fabricated using the conventional technique.
  • the substrate of Comparative Example 2 has the Si substrate 1, the AlN crystal buffer layer 2b, and the composition gradient buffer layer structure 3-5 in FIG. 1, but has a silicon nitride layer instead of the Al layer 2a. .
  • the surface of the Si substrate 1 subjected to the surface cleaning process in the same manner as in the above-described embodiment is performed under the conditions of the substrate temperature of 1050 ° C., the pressure of 13.3 kPa, and the NH 3 flow rate of 12.5 slm. Nitrided for 40 seconds.
  • the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and 12.5 slm.
  • the film was grown to a thickness of 200 nm under MOCVD conditions with NH 3 flow rate, after which a compositionally graded buffer layer structure 3-5 was formed.
  • FIG. 3 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Comparative Example 2 obtained in this way.
  • the white line segment in this micrograph also shows the scale of 50 micrometers.
  • the surface of the substrate of Comparative Example 2 also contains many fine convex defects, and the defect density was measured to be 2.4 ⁇ 10 7 pieces / cm 2 . That is, in the substrate of Comparative Example 2, it can be seen that the defect density is reduced to about 1 ⁇ 2 compared to Comparative Example 1 due to the effect of nitriding the surface of the Si substrate 1.
  • Reference Example 1 In order to investigate the effective range of the present invention, a substrate as Reference Example 1 closely related to the present invention was also produced.
  • the substrate of Reference Example 1 includes the Si substrate 1, the Al layer 2a, the AlN crystal buffer layer 2b, and the composition gradient buffer layer structure 3-5 shown in FIG.
  • the Al layer 2a was deposited for 6 seconds under the conditions of a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, and a TMA flow rate of 27 sccm.
  • This deposition condition corresponds to the condition for depositing the Al layer 2a having an average thickness of one atomic layer on the surface of the Si substrate 1.
  • the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and NH 3 of 12.5 slm.
  • the film was grown to a thickness of 200 nm under flow rate MOCVD conditions, after which a compositionally graded buffer layer structure 3-5 was formed.
  • FIG. 4 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Reference Example 1 thus obtained.
  • the white line segment in this micrograph also shows a scale of 50 ⁇ m.
  • the surface of the substrate of Reference Example 1 also contains many fine convex defects, and the defect density measured was 1.2 ⁇ 10 8 / cm 2 . That is, in the substrate of Reference Example 1, the Al layer 2a corresponding to the average thickness of one atomic layer was deposited, but it can be seen that the defect density is increased rather than reduced as compared with Comparative Example 1. This is because, on average, the Al layer 2a corresponding to the thickness of one atomic layer is non-uniform, and the surface of the Si substrate is partially exposed. This non-uniformity rather increases the defect density. It is thought that I let you.
  • Example 1 A substrate according to Example 1 according to the present invention was prepared in a manner similar to Reference Example 1.
  • the substrate of Example 1 is different from that of Reference Example 1 only in that the deposition conditions for the Al layer 2a are changed.
  • the flow rate of TMA is increased from 27 sccm in Reference Example 1 to 54 sccm. That is, the TMA flow rate of 54 sccm corresponds to the condition for depositing the Al layer 2 a having an average thickness of two atomic layers on the surface of the Si substrate 1.
  • the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and NH 3 of 12.5 slm.
  • the film was grown to a thickness of 200 nm under flow rate MOCVD conditions, after which a compositionally graded buffer layer structure 3-5 was formed.
  • FIG. 5 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Example 1 obtained in this way.
  • the white line segment in this micrograph also shows a scale of 50 ⁇ m.
  • the fine convex defects were remarkably reduced on the surface of the substrate of Example 1, and the defect density measured was 1.1 ⁇ 10 5 / cm 2. It was. That is, in the substrate of Example 1, the defect density is drastically reduced to about 1/400 compared with Comparative Example 1 as an effect of depositing the Al layer 2a corresponding to the average thickness of the two atomic layers. .
  • the surface of the Si substrate 1 is covered with the Al layer 2a corresponding to the thickness of the two atomic layers on the average without being exposed, and the AlN crystal has a smooth surface of Al polarity on the Al layer 2a.
  • the buffer layer 2b has grown. That is, since the AlN crystal buffer layer 2b has an Al-polar smooth surface, it is considered that the defect density is drastically reduced also on the surface of the composition gradient buffer layer structure 3-5 grown thereon.
  • Example 2 A substrate according to Example 2 according to the present invention was further fabricated similar to Example 1.
  • the substrate of Example 2 is different from that of Example only in that the average deposition thickness of the Al layer 2a is changed.
  • the flow rate of TMA is further increased from 54 sccm in the first embodiment to 108 sccm. That is, the TMA flow rate of 108 sccm corresponds to the condition for depositing the Al layer 2 a having an average thickness of four atomic layers on the surface of the Si substrate 1.
  • the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and NH 3 of 12.5 slm.
  • the film was grown to a thickness of 200 nm under flow rate MOCVD conditions, after which a compositionally graded buffer layer structure 3-5 was formed.
  • FIG. 6 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Example 2 obtained in this way.
  • the white line segment in this micrograph also shows a scale of 50 ⁇ m.
  • fine convex defects were significantly reduced on the surface of the substrate of Example 2 as compared with Comparative Example 1, and the defect density was measured to find 1.9 ⁇ 10 5.
  • Pieces / cm 2 it can be seen that the defect density in the substrate of Example 2 does not change significantly as compared to Example 1, but rather increases slightly.
  • the thickness of the Al layer 2a is preferably a thickness of 10 atomic layers or less in order to avoid the adverse effects of the fine protrusions generated on the surface.
  • FIGS. 9 and 10 show graphs showing the cross-sectional shape of the surface irregularities along one scanning line in the AFM images of FIGS. 7 and 8, respectively. That is, the horizontal axis of these graphs represents the distance ( ⁇ m) parallel to the surface, and the vertical axis represents the distance (nm) in the direction perpendicular to the plane parallel to the surface.
  • the surface roughness can be measured from such a surface cross-sectional shape.
  • the RMS roughness average square root roughness
  • Ra arithmetic average roughness
  • a nitride semiconductor device in which the Al layer 2a, the composition gradient buffer layer 3-5, and the superlattice multilayer buffer layer structure 6 are omitted from the stacked structure shown in FIG. It was made. That is, in this nitride semiconductor device, the AlN crystal buffer layer 2b was deposited on the Si substrate 1 under the conditions described in Comparative Example 1. On the AlN crystal buffer layer 2b, the carbon-doped GaN layer 7, the undoped GaN channel layer 8, the AlN characteristic improving layer 9, the Al 0.2 Ga 0.8 N barrier layer 10, and the GaN cap layer 11 are described above. Deposited sequentially under the conditions described in the embodiment.
  • the electronic characteristics of the GaN channel layer 8 in the nitride semiconductor device according to the related art obtained in this way were obtained by using well-known hole measurement.
  • the sheet resistance Rs was 1240 ⁇ / ⁇
  • the sheet carrier concentration Ns was 4.6 ⁇ 10 12 cm ⁇ 2
  • the carrier mobility ⁇ was 1090 cm 2 / Vs.
  • nitride semiconductor device using the present invention was fabricated in a manner similar to the above-described conventional nitride semiconductor device.
  • This nitride semiconductor device utilizing the present invention is nitrided according to the above-described prior art only in that the diatomic Al layer 2a according to the first embodiment is interposed between the Si substrate 1 and the AlN crystal buffer layer 2b. It was different from physical semiconductor devices.
  • the electronic properties of the GaN channel layer 8 in this nitride semiconductor device using the present invention were also determined using well-known hole measurements.
  • the sheet resistance Rs was 748 ⁇ / ⁇
  • the sheet carrier concentration Ns was 5.03 ⁇ 10 12 cm ⁇ 2
  • the carrier mobility ⁇ was 1660 cm 2 / Vs.
  • the sheet resistance Rs is reduced, the carrier concentration Ns is increased, and the carrier concentration is increased in the channel layer in the nitride semiconductor device using the present invention as compared with the nitride semiconductor device according to the prior art.
  • the mobility ⁇ is increased and all the electronic characteristics are improved.
  • it is preferable that the carrier mobility ⁇ is remarkably improved.
  • the AlN crystal buffer layer surface is smoothened by uniformly forming an Al layer having a predetermined thickness on the substrate surface before the AlN crystal buffer layer is grown.
  • the smoothness of the surface of the nitride semiconductor layer grown on the AlN crystal buffer layer can be improved.

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Abstract

A substrate having a buffer layer structure for growing a nitride semiconductor layer, comprising an Al layer and an AlN crystal layer stacked sequentially on a (111) main surface of an Si single-crystal substrate, the Al layer having a thickness of two atomic layers to ten atomic layers, and the surface of the AlN crystal layer having a surface that is Al polar with the plane orientation of a (0001) surface.

Description

窒化物半導体層を成長させるためのバッファ層構造を有する基板Substrate having a buffer layer structure for growing a nitride semiconductor layer

 本発明は、窒化物半導体層を成長させるためのバッファ層構造を有する基板の改善に関し、特にその基板が有するバッファ層構造の改善に関する。そのように改善された基板上に積層された複数の窒化物半導体層を含むエピタキシャルウエハは、例えばヘテロ接合電界効果トランジスタのような窒化物半導体デバイスの作製に好ましく利用され得るものである。 The present invention relates to improvement of a substrate having a buffer layer structure for growing a nitride semiconductor layer, and more particularly to improvement of a buffer layer structure of the substrate. An epitaxial wafer including a plurality of nitride semiconductor layers stacked on such an improved substrate can be preferably used for manufacturing a nitride semiconductor device such as a heterojunction field effect transistor.

 ヘテロ接合電界効果トランジスタに必要な例えばGaNチャネル層とAlGaN障壁層との積層構造を含むエピタキシャルウエハを作製する場合、GaN基板が高価であることから、サファイア、SiC、Siなどの異種材料の基板上にそれらの窒化物半導体層を結晶成長させることが従来から行なわれている。 When an epitaxial wafer including a laminated structure of, for example, a GaN channel layer and an AlGaN barrier layer required for a heterojunction field effect transistor is manufactured, a GaN substrate is expensive, so that it is on a substrate of a different material such as sapphire, SiC, or Si Conventionally, these nitride semiconductor layers have been crystal-grown.

 異種材料の基板上に窒化物半導体層をMOCVD(有機金属気相堆積)で成長させる場合、基板と半導体層との間における結晶構造の相違、格子不整合、熱膨張係数差などに基づく歪を緩和するために、種々のバッファ層構造が用いられている。 When a nitride semiconductor layer is grown by MOCVD (Metal Organic Vapor Deposition) on a substrate of a different material, strain based on the difference in crystal structure, lattice mismatch, thermal expansion coefficient, etc. between the substrate and the semiconductor layer Various buffer layer structures are used for relaxation.

 例えば特許文献1の特開平2-229476号公報は、サファイア基材上に400℃以上900℃以下の比較的低い基板温度でAlN層をバッファ層として堆積させることを教示している。このように比較的低温で堆積されたバッファ層は、低温バッファ層とも呼ばれる。 For example, Japanese Patent Laid-Open No. 2-229476 of Patent Document 1 teaches that an AlN layer is deposited as a buffer layer on a sapphire substrate at a relatively low substrate temperature of 400 ° C. or higher and 900 ° C. or lower. Such a buffer layer deposited at a relatively low temperature is also called a low-temperature buffer layer.

 しかし、低温バッファ層は、非晶質の母相中に微結晶や多結晶を含んでいる。したがって、半導体デバイス用の窒化物半導体層を低温バッファ層上に結晶成長させるために基板温度を1000℃程度以上まで上昇させたとき、そのバッファ層内の非晶質の母相が多結晶化して内部に比較的多量の転位を含むことになる。そして、そのバッファ層上に成長させたデバイス用の窒化物半導体積層構造において、多量の転位が導入されると共に、結晶品質がばらついて、クラックが入りやすくなる傾向がある。 However, the low-temperature buffer layer contains microcrystals and polycrystals in the amorphous matrix. Therefore, when the substrate temperature is increased to about 1000 ° C. or higher in order to grow a nitride semiconductor layer for a semiconductor device on the low-temperature buffer layer, the amorphous parent phase in the buffer layer is polycrystallized. It will contain a relatively large amount of dislocations inside. In the nitride semiconductor multilayer structure for devices grown on the buffer layer, a large amount of dislocations are introduced, the crystal quality varies, and cracks tend to occur.

 他方、例えば特許文献2の特開2002-367917号公報は、サファイア基板上に1100℃以上1250℃以下の比較的高い基板温度でAlN結晶層をバッファ層として堆積させることを教示している。このように比較的高温で堆積されたバッファ層は、高温バッファ層とも呼ばれる。 On the other hand, for example, Japanese Patent Application Laid-Open No. 2002-367917 of Patent Document 2 teaches that an AlN crystal layer is deposited on a sapphire substrate as a buffer layer at a relatively high substrate temperature of 1100 ° C. or more and 1250 ° C. or less. Such a buffer layer deposited at a relatively high temperature is also referred to as a high temperature buffer layer.

 しかし、特許文献3の特開2007-59850号公報は、高温バッファ層上に成長させた窒化物半導体積層構造においてはクラックが発生しにくくなるが、そのバッファ層の表面において原子レベルでの平坦性を確保するためには、バッファ層の厚さを大きくしなければならないと述べている。実際に、特許文献2は、その発明の実施例において高温AlNバッファ層をかなり大きな2μmの厚さに堆積することを教示している。特許文献3はまた、バッファ層の厚さを大きくすれば基板とバッファ層との格子定数差に起因して基板に反りが発生しやすくなることも述べており、さらにAlNバッファ層の堆積温度を高くすればそのバッファ層の表面に白濁が発生しやすくなることも述べている。 However, in Japanese Patent Application Laid-Open No. 2007-59850 of Patent Document 3, cracks are less likely to occur in a nitride semiconductor multilayer structure grown on a high-temperature buffer layer, but flatness at the atomic level on the surface of the buffer layer. In order to ensure this, it is stated that the thickness of the buffer layer must be increased. In fact, U.S. Patent No. 6,057,031 teaches that in the embodiment of the invention, a high temperature AlN buffer layer is deposited to a fairly large 2 .mu.m thickness. Patent Document 3 also states that if the thickness of the buffer layer is increased, the substrate is likely to warp due to the difference in lattice constant between the substrate and the buffer layer, and the deposition temperature of the AlN buffer layer is further increased. It also states that if the height is increased, the surface of the buffer layer is more likely to become cloudy.

 このような問題に鑑み、特許文献3は、高温AlNバッファ層を薄く形成してもその表面に白濁が生じることを抑制するために、高温AlNバッファ層の堆積の途中で温度、圧力、原料ガス流量などのMOCVD条件の少なくともいずれかを変化させることを教示している。 In view of such a problem, Patent Document 3 discloses that the temperature, pressure, and source gas during the deposition of the high-temperature AlN buffer layer are controlled in order to suppress the occurrence of white turbidity even when the high-temperature AlN buffer layer is formed thin. It teaches changing at least one of MOCVD conditions such as flow rate.

特開平2-229476号公報JP-A-2-229476 特開2002-367917号公報Japanese Patent Laid-Open No. 2002-367917 特開2007-59850号公報JP 2007-59850 A

 六方晶系のウルツ鉱型構造を有するAlN結晶は、c軸に沿ってAl原子とN原子が非対称に配列した極性結晶である。無極性の基板上にAlN結晶層の厚さをc軸方向に成長させる場合、表面にAl原子が安定して存在するAl極性とN原子が安定して存在するN極性のいずれかの方位で成長する。このような極性の相違は結晶成長表面のモフォロジーに特徴的に表れ、Al極性面は平坦性の高い表面であるのに対して、N極性面は六角形状のファセットを有する凹凸の顕著な表面になる傾向にある。 An AlN crystal having a hexagonal wurtzite structure is a polar crystal in which Al atoms and N atoms are arranged asymmetrically along the c-axis. When the thickness of the AlN crystal layer is grown on the non-polar substrate in the c-axis direction, either the Al polarity where Al atoms exist stably on the surface or the N polarity where N atoms exist stably exists on the surface. grow up. This difference in polarity appears characteristically in the morphology of the crystal growth surface, while the Al polar surface is a highly flat surface, whereas the N polar surface is a remarkably uneven surface having hexagonal facets. Tend to be.

 したがって、特許文献3におけるように極性面を考慮せずにAlN結晶層をバッファ層として成長させれば、Al極性面とN極性面が混在したAlN結晶層の表面を生じ、高い表面平坦性が得られない。そして、そのAl極性面とN極性面の混在は、AlNバッファ層上に成長させられるデバイス用窒化物半導体積層構造内まで引き継がれ、半導体積層構造のさらなる表面平坦性の悪化を招く。 Therefore, if the AlN crystal layer is grown as a buffer layer without considering the polar face as in Patent Document 3, the surface of the AlN crystal layer in which the Al polar face and the N polar face are mixed is generated, and high surface flatness is obtained. I can't get it. The mixture of the Al polar face and the N polar face is inherited into the nitride semiconductor multilayer structure for devices grown on the AlN buffer layer, and further deteriorates the surface flatness of the semiconductor multilayer structure.

 上述のような課題に鑑み、本願発明は、窒化物半導体デバイス用の半導体積層構造を成長させるために改善されたバッファ層構造を有する基板を提供することを主要な目的としている。 In view of the problems as described above, the main object of the present invention is to provide a substrate having an improved buffer layer structure for growing a semiconductor laminated structure for a nitride semiconductor device.

 本発明者達は、鋭意検討を重ねた結果、シリコン基板上に直接に高温AlNバッファ層を形成するのではなくて、Al層を介在させることによって従来の高温AlNバッファ層に比べて表面平坦性が顕著に改善された新規なバッファ層構造が得られることを見出すに至った。 As a result of intensive studies, the present inventors have not formed a high-temperature AlN buffer layer directly on the silicon substrate, but have a surface flatness compared to a conventional high-temperature AlN buffer layer by interposing an Al layer. As a result, it has been found that a novel buffer layer structure with significantly improved can be obtained.

 本発明によれば、窒化物半導体層を成長させるためのバッファ層構造を有する基板は、Si単結晶基板の(111)主面上に順次積層されたAl層およびAlN結晶層を有し、そのAl層は2原子層以上で10原子層以下の厚さを有し、AlN結晶層の表面は(0001)の面方位とAl極性の表面を有していることを特徴としている。 According to the present invention, a substrate having a buffer layer structure for growing a nitride semiconductor layer has an Al layer and an AlN crystal layer sequentially stacked on a (111) main surface of a Si single crystal substrate, The Al layer has a thickness of 2 atomic layers or more and 10 atomic layers or less, and the surface of the AlN crystal layer has a (0001) plane orientation and an Al polar surface.

 なお、Al層は、2原子層以上で4原子層以下の厚さを有することが好ましい。本発明による基板は、AlN結晶層上に、AlGaN結晶層をさらに有していてもよい。また、そのAlGaN結晶層は、Al組成比が順次低減された複数のサブ層を含むこともできる。 The Al layer preferably has a thickness of 2 atomic layers or more and 4 atomic layers or less. The substrate according to the present invention may further have an AlGaN crystal layer on the AlN crystal layer. The AlGaN crystal layer can also include a plurality of sub-layers in which the Al composition ratio is sequentially reduced.

 上記のような本発明によれば、AlN結晶バッファ層を成長させる前にSi基板表面にAl層を均一に形成することによって、AlN結晶バッファ層の表面に良質なAl極性面が得られる。すなわち、そのAlN結晶バッファ層の表面は、実質的にAl極性面のみを含んでいるので、高い平坦性を有している。 According to the present invention as described above, a good Al polar surface can be obtained on the surface of the AlN crystal buffer layer by uniformly forming the Al layer on the Si substrate surface before growing the AlN crystal buffer layer. That is, since the surface of the AlN crystal buffer layer substantially includes only the Al polar face, it has high flatness.

本発明による基板を用いて作製し得るヘテロ接合電界効果トランジスタの積層構造の一例を示す模式的断面図である。It is typical sectional drawing which shows an example of the laminated structure of the heterojunction field effect transistor which can be produced using the board | substrate by this invention. 従来技術を利用して比較例1として作製された基板の表面の光学暗視野顕微鏡写真である。It is an optical dark-field micrograph of the surface of the board | substrate produced as the comparative example 1 using a prior art. 従来技術を利用して比較例2として作製された基板の表面の光学暗視野顕微鏡写真である。It is an optical dark-field micrograph of the surface of the board | substrate produced as the comparative example 2 using a prior art. 本発明に密接に関連する参考例1として作製された基板の光学暗視野顕微鏡写真である。It is an optical dark-field micrograph of the board | substrate produced as the reference example 1 closely related to this invention. 本発明の実施例1として作製された基板の光学暗視野顕微鏡写真である。It is an optical dark field microscope photograph of the board | substrate produced as Example 1 of this invention. 本発明の実施例2として作製された基板の光学暗視野顕微鏡写真である。It is an optical dark field micrograph of the board | substrate produced as Example 2 of this invention. 従来技術による比較例2における基板の表面のAFM(原子間力顕微鏡)像である。It is an AFM (atomic force microscope) image of the surface of the board | substrate in the comparative example 2 by a prior art. 本発明による実施例1における基板の表面のAFM像である。It is an AFM image of the surface of the board | substrate in Example 1 by this invention. 図7の比較例2におけるAFM像に関する一走査線上の表面凹凸形状を示すグラフである。It is a graph which shows the surface uneven | corrugated shape on one scanning line regarding the AFM image in the comparative example 2 of FIG. 図8の実施例1におけるAFM像に関する一走査線上の表面凹凸形状を示すグラフである。It is a graph which shows the surface uneven | corrugated shape on one scanning line regarding the AFM image in Example 1 of FIG.

 (実施形態)
 図1は、本発明による基板を用いて作製し得るヘテロ接合電界効果トランジスタの積層構造の一例を模式的断面図で示している。このようなヘテロ接合電界効果トランジスタの積層構造の作製方法の一例が、以下において説明される。基板1としては、(111)主面を有するSi基板が用いられる。まず、フッ酸系のエッチャントでSi基板1の表面酸化膜を除去した後に、MOCVD(有機金属気相堆積)装置のチャンバ内にその基板がセットされる。
(Embodiment)
FIG. 1 is a schematic cross-sectional view showing an example of a laminated structure of heterojunction field effect transistors that can be manufactured using a substrate according to the present invention. An example of a method for manufacturing such a stacked structure of heterojunction field effect transistors will be described below. As the substrate 1, a Si substrate having a (111) main surface is used. First, after removing the surface oxide film of the Si substrate 1 with a hydrofluoric acid-based etchant, the substrate is set in a chamber of an MOCVD (metal organic chemical vapor deposition) apparatus.

 MOCVD装置内ではSi基板1が1050℃に加熱され、チャンバ内圧力13.3kPaの水素雰囲気にて基板表面のクリーニングが300秒間行なわれる。その後、Si基板1上に、Al層2aとAlN結晶バッファ層2bが後述の実施例で詳述される条件下で積層される。 In the MOCVD apparatus, the Si substrate 1 is heated to 1050 ° C., and the substrate surface is cleaned for 300 seconds in a hydrogen atmosphere with a chamber internal pressure of 13.3 kPa. Thereafter, an Al layer 2a and an AlN crystal buffer layer 2b are laminated on the Si substrate 1 under the conditions detailed in Examples described later.

 その後、基板温度を1150℃に上昇させ、TMA(トリメチルアルミニウム)流量=90.0sccm、TMG(トリメチルガリウム)流量=12.7sccm、およびNH流量=12.5slmの条件下で、Al0.7Ga0.3N層3が400nmの厚さに堆積される。続いて、TMA流量=50.9sccm、TMG流量=22.1sccm、およびNH流量=12.5slmの条件下で、Al0.4Ga0.6N層4が400nmの厚さに堆積され、さらにTMA流量=16.4sccm、TMG流量=30.4、およびNH流量=12.5slmの条件下で、Al0.1Ga0.9N層5が400nmの厚さに堆積される。これによって、組成傾斜バッファ層構造3-5が形成される。 Thereafter, the substrate temperature is increased to 1150 ° C., and Al 0.7 is flown under the conditions of TMA (trimethylaluminum) flow rate = 90.0 sccm, TMG (trimethylgallium) flow rate = 12.7 sccm, and NH 3 flow rate = 12.5 slm. A Ga 0.3 N layer 3 is deposited to a thickness of 400 nm. Subsequently, an Al 0.4 Ga 0.6 N layer 4 is deposited to a thickness of 400 nm under the conditions of TMA flow rate = 50.9 sccm, TMG flow rate = 22.1 sccm, and NH 3 flow rate = 12.5 slm, Further, an Al 0.1 Ga 0.9 N layer 5 is deposited to a thickness of 400 nm under the conditions of TMA flow rate = 16.4 sccm, TMG flow rate = 30.4, and NH 3 flow rate = 12.5 slm. Thereby, the composition gradient buffer layer structure 3-5 is formed.

 Al0.1Ga0.9N層5上には、同じ基板温度の下で、AlN層(5nm厚)/Al0.1Ga0.9N(20nm厚)層の50周期の繰返しを含む超格子多層バッファ層構造6が堆積される。このとき、AlN層はTMA流量=102μmol/minおよびNH流量=12.5slmの条件下で堆積され、Al0.1Ga0.9N層はTMG流量=720μmol/min、TMA流量=80μmol/minおよびNH流量=12.5slmの条件下で堆積され得る。なお、超格子多層バッファ層構造6は、ヘテロ接合電界効果トランジスタの製造コストや製造時間などの観点から省略されてもよい。 On the Al 0.1 Ga 0.9 N layer 5, 50 cycles of AlN layer (5 nm thickness) / Al 0.1 Ga 0.9 N (20 nm thickness) layer are included under the same substrate temperature. A superlattice multilayer buffer layer structure 6 is deposited. At this time, the AlN layer is deposited under the conditions of TMA flow rate = 102 μmol / min and NH 3 flow rate = 12.5 slm, and the Al 0.1 Ga 0.9 N layer is TMG flow rate = 720 μmol / min, TMA flow rate = 80 μmol / min. It can be deposited under conditions of min and NH 3 flow rate = 12.5 slm. Note that the superlattice multilayer buffer layer structure 6 may be omitted from the viewpoint of the manufacturing cost and manufacturing time of the heterojunction field effect transistor.

 その後に基板温度が1100℃に下げられ、TMG流量=224μmol/minおよびNH流量=12.5slmの条件下で、GaN層7が13.3kPaの圧力下で1.0μmの厚さに堆積され、GaN層8が90kPaの圧力下で0.5μmの厚さに堆積される。ここで、堆積圧力が低い場合にTMGに含まれるカーボンがGaN層内にドープされやすく、堆積圧力が高い場合にTMGからGaN層内にカーボンがドープされにくい傾向にある。 Thereafter, the substrate temperature is lowered to 1100 ° C., and under the conditions of TMG flow rate = 224 μmol / min and NH 3 flow rate = 12.5 slm, the GaN layer 7 is deposited to a thickness of 1.0 μm under a pressure of 13.3 kPa. The GaN layer 8 is deposited to a thickness of 0.5 μm under a pressure of 90 kPa. Here, when the deposition pressure is low, carbon contained in TMG is easily doped into the GaN layer, and when the deposition pressure is high, carbon tends to be hardly doped from TMG into the GaN layer.

 そして、GaN層8上には、13.3kPaの圧力下で、AlN特性改善層9(1nm厚)、Al0.2Ga0.8N障壁層10(20nm厚)およびGaNキャップ層11(1nm厚)を含む電子供給層が堆積される。このとき、AlN層9はTMA流量=51μmol/minおよびNH流量=12.5slmの条件下で堆積され、AlGaN層10はTMG流量=46μmol/min、TMA流量=7μmol/minおよび、NH流量=12.5slmの条件下で堆積され、そしてGaN層11はTMG流量=58μmol/minおよびNH流量=12.5slmの条件下で堆積され得る。 On the GaN layer 8, an AlN characteristic improving layer 9 (1 nm thickness), an Al 0.2 Ga 0.8 N barrier layer 10 (20 nm thickness), and a GaN cap layer 11 (1 nm) under a pressure of 13.3 kPa. An electron supply layer is deposited, including (thickness). At this time, the AlN layer 9 is deposited under the conditions of TMA flow rate = 51 μmol / min and NH 3 flow rate = 12.5 slm, and the AlGaN layer 10 is TMG flow rate = 46 μmol / min, TMA flow rate = 7 μmol / min, and NH 3 flow rate. = 12.5 slm, and the GaN layer 11 can be deposited under conditions of TMG flow rate = 58 μmol / min and NH 3 flow rate = 12.5 slm.

 なお、以上の実施形態ではAlGaN層3、4および5のAl組成比が0.7、0.4および0.1の順に変化させられたが、組成傾斜バッファ層構造に含まれるAlGaN層におけるAl組成比の組合せはこの組合せに限定されるものではない。また、組成傾斜バッファ層構造に含まれて異なるAl組成比を有するAlGaN層の数も3層に限定されず、任意の数とすることができる。重要なことは、組成傾斜バッファ層構造の下面から上面に向かうにしたがってAl組成比が徐々に減少していくことである。さらに、超格子多層バッファ層構造6は、AlN層/Al0.1Ga0.9N層の繰返しに限定されず、例えばAl0.1Ga0.9N層は他の組成比を有するAlGaN層に置き換えることも可能である。 In the above embodiment, the Al composition ratio of the AlGaN layers 3, 4 and 5 was changed in the order of 0.7, 0.4 and 0.1. The combination of composition ratios is not limited to this combination. Also, the number of AlGaN layers included in the composition gradient buffer layer structure and having different Al composition ratios is not limited to three, and can be any number. What is important is that the Al composition ratio gradually decreases from the lower surface to the upper surface of the composition gradient buffer layer structure. Furthermore, the super lattice multi-layer buffer layer structure 6 is not limited to the repetition of the AlN layer / the Al 0.1 Ga 0.9 N layer,, for example the Al 0.1 Ga 0.9 N layer, has another composition ratio AlGaN It is also possible to replace it with a layer.

 (比較例1)
 本発明の基板の改善効果を調べるために、従来技術を利用して比較例1としての基板が作製された。この比較例1の基板は、図1におけるSi基板1、AlN結晶バッファ層2bおよび組成傾斜バッファ層構造3-5を有しているが、Al層2aを有していない。
(Comparative Example 1)
In order to investigate the improvement effect of the substrate of the present invention, a substrate as Comparative Example 1 was produced using conventional technology. The substrate of Comparative Example 1 has the Si substrate 1, the AlN crystal buffer layer 2b, and the composition gradient buffer layer structure 3-5 in FIG. 1, but does not have the Al layer 2a.

 すなわち、比較例1においては、上述の実施形態と同様に表面クリーニング処理されたSi基板1上に、AlN結晶バッファ層2bが、1050℃の基板温度、13.3kPaの圧力、108.5sccmのTMA流量、および12.5slmのNH流量のMOCVD条件下で200nmの厚さに成長させられた。その後、AlN結晶バッファ層2b上に上述の実施形態と同様に組成傾斜バッファ層構造3-5が形成された。 That is, in Comparative Example 1, the AlN crystal buffer layer 2b is formed on the Si substrate 1 that has been surface-cleaned in the same manner as in the above-described embodiment. The substrate temperature is 1050 ° C., the pressure is 13.3 kPa, and the TMA is 108.5 sccm. The film was grown to a thickness of 200 nm under MOCVD conditions with a flow rate and NH 3 flow rate of 12.5 slm. Thereafter, a composition gradient buffer layer structure 3-5 was formed on the AlN crystal buffer layer 2b in the same manner as in the above-described embodiment.

 図2は、こうして得られた比較例1の基板におけるAl0.1Ga0.9N層5の表面の光学暗視野顕微鏡写真を示している。なお、この顕微鏡写真中の白い線分は、50μmのスケールを示している。図2の写真から分かるように、比較例1の基板の表面は多くの微細な凸状欠陥を含んでおり、その欠陥密度を測定したところ4.4×10個/cmであった。 FIG. 2 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Comparative Example 1 obtained in this way. In addition, the white line segment in this micrograph has shown the scale of 50 micrometers. As can be seen from the photograph in FIG. 2, the surface of the substrate of Comparative Example 1 contained many fine convex defects, and the defect density was measured to be 4.4 × 10 7 pieces / cm 2 .

 (比較例2)
 本発明の基板の改善効果をより確実に調べるために、従来技術を利用して比較例2としての基板がさらに作製された。この比較例2の基板は、図1におけるSi基板1、AlN結晶バッファ層2bおよび組成傾斜バッファ層構造3-5を有しているが、Al層2aの代わりに窒化ケイ素層を有している。
(Comparative Example 2)
In order to more reliably investigate the improvement effect of the substrate of the present invention, a substrate as Comparative Example 2 was further fabricated using the conventional technique. The substrate of Comparative Example 2 has the Si substrate 1, the AlN crystal buffer layer 2b, and the composition gradient buffer layer structure 3-5 in FIG. 1, but has a silicon nitride layer instead of the Al layer 2a. .

 すなわち、比較例2においては、上述の実施形態と同様に表面クリーニング処理されたSi基板1の表面が、1050℃の基板温度、13.3kPaの圧力、12.5slmのNH流量の条件下で40秒間だけ窒化処理された。 That is, in the comparative example 2, the surface of the Si substrate 1 subjected to the surface cleaning process in the same manner as in the above-described embodiment is performed under the conditions of the substrate temperature of 1050 ° C., the pressure of 13.3 kPa, and the NH 3 flow rate of 12.5 slm. Nitrided for 40 seconds.

 この窒化処理された表面上には、比較例1の場合と同様に、AlN結晶バッファ層2bが、1050℃の基板温度、13.3kPaの圧力、108.5sccmのTMA流量、および12.5slmのNH流量のMOCVD条件下で200nmの厚さに成長させられ、その後に組成傾斜バッファ層構造3-5が形成された。 On this nitrided surface, as in Comparative Example 1, the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and 12.5 slm. The film was grown to a thickness of 200 nm under MOCVD conditions with NH 3 flow rate, after which a compositionally graded buffer layer structure 3-5 was formed.

 図3は、こうして得られた比較例2の基板におけるAl0.1Ga0.9N層5の表面の光学暗視野顕微鏡写真を示している。なお、この顕微鏡写真中の白い線分も、50μmのスケールを示している。図3の写真から分かるように、比較例2の基板の表面も多くの微細な凸状欠陥を含んでおり、その欠陥密度を測定したところ2.4×10個/cmであった。すなわち、比較例2の基板においては、Si基板1の表面を窒化処理した効果により、比較例1に比べて欠陥密度が約1/2に減少していることが分かる。 FIG. 3 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Comparative Example 2 obtained in this way. In addition, the white line segment in this micrograph also shows the scale of 50 micrometers. As can be seen from the photograph in FIG. 3, the surface of the substrate of Comparative Example 2 also contains many fine convex defects, and the defect density was measured to be 2.4 × 10 7 pieces / cm 2 . That is, in the substrate of Comparative Example 2, it can be seen that the defect density is reduced to about ½ compared to Comparative Example 1 due to the effect of nitriding the surface of the Si substrate 1.

 (参考例1)
 本発明の有効な範囲を調べるために、本発明に密接に関連する参考例1としての基板も作製された。この参考例1の基板は、図1におけるSi基板1、Al層2a、AlN結晶バッファ層2b、および組成傾斜バッファ層構造3-5を有している。
(Reference Example 1)
In order to investigate the effective range of the present invention, a substrate as Reference Example 1 closely related to the present invention was also produced. The substrate of Reference Example 1 includes the Si substrate 1, the Al layer 2a, the AlN crystal buffer layer 2b, and the composition gradient buffer layer structure 3-5 shown in FIG.

 このAl層2aは、1050℃の基板温度、13.3kPaの圧力、および27sccmのTMA流量の条件下で6秒間だけ堆積された。この堆積条件は、Si基板1の表面上に1原子層の平均厚さのAl層2aを堆積する条件に対応している。 The Al layer 2a was deposited for 6 seconds under the conditions of a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, and a TMA flow rate of 27 sccm. This deposition condition corresponds to the condition for depositing the Al layer 2a having an average thickness of one atomic layer on the surface of the Si substrate 1.

 このAl層2a上には、比較例1の場合と同様に、AlN結晶バッファ層2bが、1050℃の基板温度、13.3kPaの圧力、108.5sccmのTMA流量、および12.5slmのNH流量のMOCVD条件下で200nmの厚さに成長させられ、その後に組成傾斜バッファ層構造3-5が形成された。 On this Al layer 2a, as in Comparative Example 1, the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and NH 3 of 12.5 slm. The film was grown to a thickness of 200 nm under flow rate MOCVD conditions, after which a compositionally graded buffer layer structure 3-5 was formed.

 図4は、こうして得られた参考例1の基板におけるAl0.1Ga0.9N層5の表面の光学暗視野顕微鏡写真を示している。この顕微鏡写真中の白い線分も、50μmのスケールを示している。図4の写真から分かるように、参考例1の基板の表面も多くの微細な凸状欠陥を含んでおり、その欠陥密度を測定したところ1.2×10個/cmであった。すなわち、参考例1の基板においては、1原子層の平均厚さに対応するAl層2aを堆積したが、比較例1に比べて欠陥密度が低減されずにむしろ増大していることが分かる。この理由としては、平均すれば1原子層の厚さに対応するAl層2aが不均一であって、部分的にSi基板の表面が露出しており、この不均一性がむしろ欠陥密度を増大させたと考えられる。 FIG. 4 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Reference Example 1 thus obtained. The white line segment in this micrograph also shows a scale of 50 μm. As can be seen from the photograph in FIG. 4, the surface of the substrate of Reference Example 1 also contains many fine convex defects, and the defect density measured was 1.2 × 10 8 / cm 2 . That is, in the substrate of Reference Example 1, the Al layer 2a corresponding to the average thickness of one atomic layer was deposited, but it can be seen that the defect density is increased rather than reduced as compared with Comparative Example 1. This is because, on average, the Al layer 2a corresponding to the thickness of one atomic layer is non-uniform, and the surface of the Si substrate is partially exposed. This non-uniformity rather increases the defect density. It is thought that I let you.

 (実施例1)
 本発明による実施例1による基板が参考例1に類似して作製された。この実施例1の基板は、参考例1に比べて、Al層2aの堆積条件が変更されたことのみにおいてことなっている。
Example 1
A substrate according to Example 1 according to the present invention was prepared in a manner similar to Reference Example 1. The substrate of Example 1 is different from that of Reference Example 1 only in that the deposition conditions for the Al layer 2a are changed.

 すなわち、実施例1におけるAl層2aの堆積条件においては、TMAの流量が参考例1における27sccmから倍の54sccmに増大されている。すなわち、この54sccmのTMA流量は、Si基板1の表面上に2原子層の平均厚さのAl層2aを堆積する条件に対応している。 That is, under the deposition conditions of the Al layer 2a in Example 1, the flow rate of TMA is increased from 27 sccm in Reference Example 1 to 54 sccm. That is, the TMA flow rate of 54 sccm corresponds to the condition for depositing the Al layer 2 a having an average thickness of two atomic layers on the surface of the Si substrate 1.

 このAl層2a上には、参考例1の場合と同様に、AlN結晶バッファ層2bが、1050℃の基板温度、13.3kPaの圧力、108.5sccmのTMA流量、および12.5slmのNH流量のMOCVD条件下で200nmの厚さに成長させられ、その後に組成傾斜バッファ層構造3-5が形成された。 On this Al layer 2a, as in the case of Reference Example 1, the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and NH 3 of 12.5 slm. The film was grown to a thickness of 200 nm under flow rate MOCVD conditions, after which a compositionally graded buffer layer structure 3-5 was formed.

 図5は、こうして得られた実施例1の基板におけるAl0.1Ga0.9N層5の表面の光学暗視野顕微鏡写真を示している。この顕微鏡写真中の白い線分も、50μmのスケールを示している。図5の写真から分かるように、実施例1の基板の表面においては微細な凸状欠陥が顕著に減少しており、その欠陥密度を測定したところ1.1×10個/cmであった。すなわち、実施例1の基板においては、2原子層の平均厚さに対応するAl層2aを堆積した効果として、比較例1に比べて欠陥密度が約1/400に激減していることが分かる。 FIG. 5 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Example 1 obtained in this way. The white line segment in this micrograph also shows a scale of 50 μm. As can be seen from the photograph in FIG. 5, the fine convex defects were remarkably reduced on the surface of the substrate of Example 1, and the defect density measured was 1.1 × 10 5 / cm 2. It was. That is, in the substrate of Example 1, the defect density is drastically reduced to about 1/400 compared with Comparative Example 1 as an effect of depositing the Al layer 2a corresponding to the average thickness of the two atomic layers. .

 この理由としては、Si基板1の表面が露出されることなく平均して2原子層厚さに対応するAl層2aよって覆われ、そのAl層2a上にAl極性の平滑な表面を有するAlN結晶バッファ層2bが成長したからであると考えられる。すなわち、AlN結晶バッファ層2bがAl極性の平滑な表面を有するので、その上に成長させられた組成傾斜バッファ層構造3-5の表面においても欠陥密度が激減したと考えられる。 This is because the surface of the Si substrate 1 is covered with the Al layer 2a corresponding to the thickness of the two atomic layers on the average without being exposed, and the AlN crystal has a smooth surface of Al polarity on the Al layer 2a. This is presumably because the buffer layer 2b has grown. That is, since the AlN crystal buffer layer 2b has an Al-polar smooth surface, it is considered that the defect density is drastically reduced also on the surface of the composition gradient buffer layer structure 3-5 grown thereon.

 (実施例2)
 本発明による実施例2による基板が実施例1に類似してさらに作製された。この実施例2の基板は、実施例に比べて、Al層2aの平均堆積厚さが変更されたことのみにおいてことなっている。
(Example 2)
A substrate according to Example 2 according to the present invention was further fabricated similar to Example 1. The substrate of Example 2 is different from that of Example only in that the average deposition thickness of the Al layer 2a is changed.

 すなわち、実施例2におけるAl層2aの堆積条件においては、TMAの流量が実施例1の54sccmから108sccmへさらに増大されている。すなわち、この108sccmのTMA流量は、Si基板1の表面上に4原子層の平均厚さのAl層2aを堆積する条件に対応している。 That is, under the deposition conditions of the Al layer 2a in the second embodiment, the flow rate of TMA is further increased from 54 sccm in the first embodiment to 108 sccm. That is, the TMA flow rate of 108 sccm corresponds to the condition for depositing the Al layer 2 a having an average thickness of four atomic layers on the surface of the Si substrate 1.

 このAl層2a上には、実施例1の場合と同様に、AlN結晶バッファ層2bが、1050℃の基板温度、13.3kPaの圧力、108.5sccmのTMA流量、および12.5slmのNH流量のMOCVD条件下で200nmの厚さに成長させられ、その後に組成傾斜バッファ層構造3-5が形成された。 On this Al layer 2a, as in the case of Example 1, the AlN crystal buffer layer 2b has a substrate temperature of 1050 ° C., a pressure of 13.3 kPa, a TMA flow rate of 108.5 sccm, and NH 3 of 12.5 slm. The film was grown to a thickness of 200 nm under flow rate MOCVD conditions, after which a compositionally graded buffer layer structure 3-5 was formed.

 図6は、こうして得られた実施例2の基板におけるAl0.1Ga0.9N層5の表面の光学暗視野顕微鏡写真を示している。この顕微鏡写真中の白い線分も、50μmのスケールを示している。図6の写真から分かるように、実施例2の基板の表面においても微細な凸状欠陥が比較例1に比べて顕著に減少しており、その欠陥密度を測定したところ1.9×10個/cmであった。しかし、実施例2の基板における欠陥密度は、実施例1に比べて顕著な変化がなく、むしろ僅かに増大していることが分かる。 FIG. 6 shows an optical dark field photomicrograph of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrate of Example 2 obtained in this way. The white line segment in this micrograph also shows a scale of 50 μm. As can be seen from the photograph in FIG. 6, fine convex defects were significantly reduced on the surface of the substrate of Example 2 as compared with Comparative Example 1, and the defect density was measured to find 1.9 × 10 5. Pieces / cm 2 . However, it can be seen that the defect density in the substrate of Example 2 does not change significantly as compared to Example 1, but rather increases slightly.

 この理由としては、平均して4原子層の厚さに対応するAl層2aは完全にSi基板1の表面を覆って被覆漏れを生じることはないが、Al層の厚さが増大するにつれてその表面にAlの微小突起が生じ始めて、これが悪影響を及ぼし得ると考えられる。したがって、Al層2aの厚さは、その表面に生じる微小突起の悪影響を回避するために10原子層以下の厚さであることが好ましい。 The reason for this is that the Al layer 2a corresponding to the thickness of the four-atom layer on the average does not completely cover the surface of the Si substrate 1 and does not leak, but as the thickness of the Al layer increases, It is believed that Al microprotrusions begin to form on the surface, which can have an adverse effect. Therefore, the thickness of the Al layer 2a is preferably a thickness of 10 atomic layers or less in order to avoid the adverse effects of the fine protrusions generated on the surface.

 (比較例2と実施例1との比較)
 図7と図8は、それぞれ比較例2と実施例1の基板におけるAl0.1Ga0.9N層5の表面のAFM(原子間力顕微鏡)像を示している。これら図7と図8のAFM像においても、実施例1の基板の表面において微細な凸状欠陥が比較例2に比べて顕著に減少していることを確認することができる。
(Comparison between Comparative Example 2 and Example 1)
7 and 8 show AFM (atomic force microscope) images of the surface of the Al 0.1 Ga 0.9 N layer 5 on the substrates of Comparative Example 2 and Example 1, respectively. Also in these AFM images of FIGS. 7 and 8, it can be confirmed that fine convex defects on the surface of the substrate of Example 1 are significantly reduced as compared with Comparative Example 2.

 図9と図10は、それぞれ図7と図8のAFM像中の一走査線に沿った表面凹凸の断面形状を表すグラフを示している。すなわち、これらのグラフの横軸は表面に平行な距離(μm)を表し、縦軸は表面に平行な面に直交する方向の距離(nm)を表している。このような表面断面形状から、表面粗さを測定することができる。図7と図8のAFM像に関して表面粗さを測定したところ、それぞれに関してRMS粗さ(平均二乗根粗さ)が6.93nmと3.89nmであり、Ra(算術平均粗さ)が5.32nmと3.06nmであった。すなわち、実施例1の基板の表面粗さは比較例2に比べて顕著に改善されていることが分かる。 9 and 10 show graphs showing the cross-sectional shape of the surface irregularities along one scanning line in the AFM images of FIGS. 7 and 8, respectively. That is, the horizontal axis of these graphs represents the distance (μm) parallel to the surface, and the vertical axis represents the distance (nm) in the direction perpendicular to the plane parallel to the surface. The surface roughness can be measured from such a surface cross-sectional shape. When the surface roughness was measured for the AFM images of FIGS. 7 and 8, the RMS roughness (average square root roughness) was 6.93 nm and 3.89 nm, and Ra (arithmetic average roughness) was 5. They were 32 nm and 3.06 nm. That is, it can be seen that the surface roughness of the substrate of Example 1 is significantly improved as compared with Comparative Example 2.

 (Al層がデバイスの電子特性に及ぼす影響)
 Si基板1とAlNバッファ層2bとの間に介在するAl層2aがそのAlNバッファ層2b上に形成される窒化物半導体デバイスの電子特性に及ぼす影響が調べられた。
(Effect of Al layer on the electronic characteristics of the device)
The influence of the Al layer 2a interposed between the Si substrate 1 and the AlN buffer layer 2b on the electronic characteristics of the nitride semiconductor device formed on the AlN buffer layer 2b was examined.

 まず、従来技術による窒化物半導体デバイスとして、図1に示された積層構造のうちでAl層2a、組成傾斜バッファ層3-5および超格子多層バッファ層構造6が省略された窒化物半導体デバイスが作製された。すなわち、この窒化物半導体デバイスにおいては、比較例1に述べられた条件下で、Si基板1上にAlN結晶バッファ層2bが堆積された。そして、このAlN結晶バッファ層2b上に、カーボンドープGaN層7、アンドープGaNチャネル層8、AlN特性改善層9、Al0.2Ga0.8N障壁層10、およびGaNキャップ層11が、前述の実施形態で説明された条件下で順次堆積された。 First, as a nitride semiconductor device according to the prior art, a nitride semiconductor device in which the Al layer 2a, the composition gradient buffer layer 3-5, and the superlattice multilayer buffer layer structure 6 are omitted from the stacked structure shown in FIG. It was made. That is, in this nitride semiconductor device, the AlN crystal buffer layer 2b was deposited on the Si substrate 1 under the conditions described in Comparative Example 1. On the AlN crystal buffer layer 2b, the carbon-doped GaN layer 7, the undoped GaN channel layer 8, the AlN characteristic improving layer 9, the Al 0.2 Ga 0.8 N barrier layer 10, and the GaN cap layer 11 are described above. Deposited sequentially under the conditions described in the embodiment.

 こうして得られた従来技術による窒化物半導体デバイス中のGaNチャネル層8の電子特性が、周知のホール測定を利用して求められた。その結果、このチャネル層8において、シート抵抗Rsが1240Ω/□、シートキャリア濃度Nsが4.6×1012cm-2、そしてキャリア移動度μが1090cm/Vsであった。 The electronic characteristics of the GaN channel layer 8 in the nitride semiconductor device according to the related art obtained in this way were obtained by using well-known hole measurement. As a result, in this channel layer 8, the sheet resistance Rs was 1240Ω / □, the sheet carrier concentration Ns was 4.6 × 10 12 cm −2 , and the carrier mobility μ was 1090 cm 2 / Vs.

 次に、本発明を利用した窒化物半導体デバイスが、上記の従来技術による窒化物半導体デバイスに類似して作製された。本発明を利用したこの窒化物半導体デバイスは、Si基板1とAlN結晶バッファ層2bとの間に、実施例1による2原子層のAl層2aが介在させられたことのみにおいて上記従来技術による窒化物半導体デバイスと異なっていた。 Next, a nitride semiconductor device using the present invention was fabricated in a manner similar to the above-described conventional nitride semiconductor device. This nitride semiconductor device utilizing the present invention is nitrided according to the above-described prior art only in that the diatomic Al layer 2a according to the first embodiment is interposed between the Si substrate 1 and the AlN crystal buffer layer 2b. It was different from physical semiconductor devices.

 本発明を利用したこの窒化物半導体デバイス中のGaNチャネル層8の電子特性も、周知のホール測定を利用して求められた。その結果、このチャネル層8において、シート抵抗Rsが748Ω/□、シートキャリア濃度Nsが5.03×1012cm-2、そしてキャリア移動度μが1660cm/Vsであった。 The electronic properties of the GaN channel layer 8 in this nitride semiconductor device using the present invention were also determined using well-known hole measurements. As a result, in this channel layer 8, the sheet resistance Rs was 748Ω / □, the sheet carrier concentration Ns was 5.03 × 10 12 cm −2 , and the carrier mobility μ was 1660 cm 2 / Vs.

 以上から明らかなように、従来技術による窒化物半導体デバイスに比べて、本発明を利用した窒化物半導体デバイス中のチャネル層においては、シート抵抗Rsが低減され、キャリア濃度Nsが高められ、そしてキャリア移動度μが高められており、何れの電子特性も改善されていることが分かる。特に、キャリア移動度μが顕著に改善されていることが好ましい。 As is apparent from the above, the sheet resistance Rs is reduced, the carrier concentration Ns is increased, and the carrier concentration is increased in the channel layer in the nitride semiconductor device using the present invention as compared with the nitride semiconductor device according to the prior art. It can be seen that the mobility μ is increased and all the electronic characteristics are improved. In particular, it is preferable that the carrier mobility μ is remarkably improved.

 以上から明らかなように、本発明によれば、AlN結晶バッファ層を成長させる前に基板表面に所定厚さのAl層を均一に形成することによって、そのAlN結晶バッファ層の表面の平滑性を顕著に改善することができ、その結果としてAlN結晶バッファ層上に成長する窒化物半導体層の表面の平滑性をも改善することができる。 As is clear from the above, according to the present invention, the AlN crystal buffer layer surface is smoothened by uniformly forming an Al layer having a predetermined thickness on the substrate surface before the AlN crystal buffer layer is grown. As a result, the smoothness of the surface of the nitride semiconductor layer grown on the AlN crystal buffer layer can be improved.

 そして、そのように改善された表面平滑性を有する基板を利用することによって、その基板上に電子特性の改善された種々の窒化物半導体デバイスを作製することができる。 Then, by using the substrate having such improved surface smoothness, various nitride semiconductor devices having improved electronic properties can be produced on the substrate.

 1 Si基板、2a Al層、2b AlN結晶層、3 Al0.7Ga0.3N層、4 Al0.4Ga0.6N層、5 Al0.1Ga0.9N層、6 AlN/Al0.1Ga0.9N多層バッファ構造、7 カーボンドープGaN層、8 アンドープGaNチャネル層、9 AlN特性改善層、10 Al0.2Ga0.8N障壁層、11 GaNキャップ層。 1 Si substrate, 2a Al layer, 2b AlN crystal layer, 3 Al 0.7 Ga 0.3 N layer, 4 Al 0.4 Ga 0.6 N layer, 5 Al 0.1 Ga 0.9 N layer, 6 AlN / Al 0.1 Ga 0.9 N multilayer buffer structure, 7 carbon-doped GaN layer, 8 undoped GaN channel layer, 9 AlN characteristic improving layer, 10 Al 0.2 Ga 0.8 N barrier layer, 11 GaN cap layer .

Claims (4)

 窒化物半導体層を成長させるためのバッファ層構造を有する基板であって、
 Si単結晶基板の(111)主面上に順次積層されたAl層およびAlN結晶層を有し、
 前記Al層は2原子層以上で10原子層以下の厚さを有し、
 前記AlN結晶層の表面は(0001)の面方位とAl極性の表面を有していることを特徴とする基板。
A substrate having a buffer layer structure for growing a nitride semiconductor layer,
An Al layer and an AlN crystal layer sequentially stacked on the (111) main surface of the Si single crystal substrate;
The Al layer has a thickness of 2 atomic layers or more and 10 atomic layers or less,
The surface of the AlN crystal layer has a (0001) plane orientation and an Al polar surface.
 前記Al層は2原子層以上で4原子層以下の厚さを有することを特徴とする請求項1に記載の基板。 The substrate according to claim 1, wherein the Al layer has a thickness of 2 atomic layers or more and 4 atomic layers or less.  前記AlN結晶層上に積層されたAlGaN結晶層をさらに有することを特徴とする請求項1に記載の基板。 The substrate according to claim 1, further comprising an AlGaN crystal layer stacked on the AlN crystal layer.  前記AlGaN結晶層はAl組成比が順次低減された複数のサブ層を含むことを特徴とする請求項3に記載の基板。 The substrate according to claim 3, wherein the AlGaN crystal layer includes a plurality of sub-layers in which an Al composition ratio is sequentially reduced.
PCT/JP2012/072704 2011-09-15 2012-09-06 Substrate having buffer layer structure for growing nitride semiconductor layer WO2013038980A1 (en)

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