WO2012033923A2

WO2012033923A2 - Maintaining high pace rate charge balance

Info

Publication number: WO2012033923A2
Application number: PCT/US2011/050842
Authority: WO
Inventors: Robert Leichner; Jeffrey Berkman; Mark Zdeblick
Original assignee: Proteus Biomedical, Inc.
Priority date: 2010-09-08
Filing date: 2011-09-08
Publication date: 2012-03-15
Also published as: WO2012033923A3

Abstract

Disclosed are a charge balance apparatus and a method for balancing at least one pacing electrode electrically coupled to the charge balance circuit. The charge balance apparatus receives a pace waveform from a pulse generator and provides a balanced flow of charge to the at least one pacing electrode. A charge monitor circuit is electrically coupled to the at least one pacing electrode and measures a flow of charge through the at least one pacing electrode in a first direction. A logic circuit interrupts a flow of charge in a second direction when a measured flow of charge in the second direction is substantially equal to a measured flow of charge in the first direction.

Description

MAINTAINING HIGH PACE RATE CHARGE BALANCE

INTRODUCTION

[0001] Modern pacing systems employ a power source, an electronic pulse generator, and one or more electrodes for delivering a controlled electric stimulus to tissue for therapeutic and diagnostic treatments. Pacing systems include cardiac pacing systems and neurostimulating

systems, among others.

[0002] Cardiac pacing systems deliver a controlled rhythmic electric stimulus to the heart muscle to maintain an effective cardiac rhythm. In cardiac pacing systems, the electronic pulse generator is generally referred to as a pacemaker, a pace generator, a pace pulse generator, or simply a can. The electrical connection between the heart muscle and the pulse generator is provided by an

implantable electrode catheter commonly called a lead. The electrode leads are comprised of a lead body and one or more pacing electrodes, where the electrode leads are inserted into the various chambers of the heart. The pulse generator generates a pace waveform comprised of an

electrical pulse signal having a pace phase and a recover phase. The recover phase may include slow and fast recover phases .

[0003] Cardiac resynchronization therapy (CRT) systems are more sophisticated than basic pacemakers. In addition to a power source, a pulse generator, and one or more electrodes, CRT systems employ hermetically sealed

integrated circuits electrically coupled between the pulse generator and the pacing electrodes. Pacing and CRT electrodes may be referred to generally as pacing

electrodes .

[0004] Neurostimulating systems include pacing type pulse generators that are similar to those employed in pacemakers and CRT systems. Neurostimulating systems, however, are coupled to stimulation electrode elements specially designed for stimulating nerve tissue rather than heart muscle tissue. Relative to cardiac pacing

electrodes, however, the neurostimulation electrodes are generally much smaller in diameter, and are operated at higher frequencies and current densities.

[0005] Pacing electrodes comprise an anode portion and a cathode portion. During the pacing process, positive and negative electric charges flow out of and into the

respective anode and cathode pacing electrodes. If the flow of electric charges between the electrodes is not balanced, a net current will flow across the pacing

electrodes. The net current flow caused by the imbalance drives an electrochemical process that causes corrosion of the pacing electrodes. SUMMARY

[0006] In one aspect, a charge balance device is

provided to receive a pace waveform from a pulse generator and to balance a flow of charge to at least one pacing electrode. A charge monitor circuit is electrically coupled to at least one pacing electrode and measures a flow of charge through the at least one pacing electrode in a first direction. A logic circuit interrupts a flow of charge in a second direction when a measured flow of charge in the second direction is substantially equal to a

measured flow of charge in the first direction.

FIGURES

[0007] FIG. 1 illustrates a pacing system 100 that is operating in a charge balanced mode.

[0008] FIG. 1A illustrates a typical pace waveform generated by the pulse generator shown in FIG. 1 for use in electro stimulus applications.

[0009] FIG. 2 illustrates a pacing system that is operating in a charge imbalanced mode.

[0010] FIG. 3 illustrates an electrical conduction model of a lead integrated circuit . [0011] FIG. 4 is a graphical illustration of charge balance current flowing in a pacing system under both balanced and unbalanced operating conditions.

[0012] FIG. 5 illustrates one aspect of a pacing system comprising one aspect of a lead integrated circuit located between the pulse generator and the pacing electrodes.

[0013] FIG. 6 illustrates one aspect of a pacing system comprising a lead integrated circuit coupled between a pulse generator and a pacing electrode.

[0014] FIG. 7 illustrates one aspect of a pacing system comprising a lead integrated circuit coupled between a pulse generator and a pacing electrode.

[0015] FIG. 8 provides timing diagrams showing the relationship between a pace waveform, a capacitor voltage, a comparator output voltage, and a conduction state of switches in the charge balance circuit shown in FIG. 7.

[0016] FIG. 9 illustrates one aspect of a pacing system comprising a lead integrated circuit coupled between a pulse generator and a pacing electrode.

[0017] FIG. 10 provides timing diagrams showing the relationship between a pace waveform, a capacitor voltage, a comparator output voltage, and a conduction state of switches in the charge balance circuit shown in FIG. 9. [0018] FIG. 11 illustrates one aspect of a pacing system comprising a plurality of lead integrated circuits coupled in parallel, where the individual lead integrated circuits do not have integral charge balance circuits.

[0019] FIG. 12 illustrates one aspect of a method of charge balancing a pacing electrode.

DESCRIPTION

[0020] The present disclosure is directed generally to an apparatus and method for minimizing or eliminating the effects of corrosion by electrochemical processes in electro stimulus applications. In accordance with the disclosed aspects, the effects of corrosion by

electrochemical processes in electro stimulus applications may be minimized or eliminated by balancing the flow of positive and negative charges into and out of the

electrodes. An electrode is said to be "charge balanced" to the extent that the flow of positive and negative charge into and out of the electrode is equal.

[0021] Pace type pulse generators are designed to maintain charge balance between the anode and cathode electrodes to minimize currents driving electrode

corrosion. Pulse generator charge balancing can be

effective in trivial applications where the electrodes are relatively simple metallic elements placed into tissue with insulated wires connecting the electrodes to the pulse generator. Charge balancing becomes more complex and challenging, however, when additional circuit elements are coupled between the pulse generator and the electrodes. This challenge arises in part because the additional circuit elements may consume a small amount of charge during the pace phase of the pulse waveform delivered by the pulse generator to the electrodes. Since the pulse generator maintains charge balance between the anode and the cathode electrodes, a small amount of current equal to the current consumed by the circuit elements is induced to flow. If there is no return path for the induced current through the circuit element, the induced current flows across the electrodes and contributes to electrochemical corrosion of the electrodes.

[0022] FIG. 1 illustrates a pacing system 100 that is operating in a charge balanced mode. The pacing system 100 includes a pulse generator 102 configured for pacing applications and a pair of pacing electrodes 104a, 104b electrically coupled to the pulse generator 102 by

respective pacing leads 106a, 106b. As illustrated in FIG. 1, one pacing lead 106a is electrically coupled to the anode (+) of the pulse generator 102 and the other pacing lead 106b is coupled to the cathode (-) . In this

configuration, the pacing electrode 104a coupled to the anode may be referred to as an anode electrode and the pacing electrode 104b coupled to the cathode may be referred to as a cathode electrode. The flow of charge (Q) , or current, in the forward (positive) direction A and the reverse (negative) direction B is balanced by the pulse generator 102. Accordingly, the sum total flow of charge in the forward and reverse directions is zero both at the pulse generator 102 and at the electrodes 104a, 104b.

[0023] In other words, the flow of charge 108b ( T_Can) into the anode (+) of the pulse generator 102 equals the flow of charge 108a (Q⁺ _Can) into the cathode (-) of the pulse generator 102 and sums to zero. Similarly, the flow of charge 110a (Q⁺ _eiectrode) out of the anode electrode 104a that flows into the cathode electrode 104b equals the flow of charge 110b ( Teiectrode) out of the cathode electrode 104b that flows into the anode electrode 104a and also sums to zero. The sum of the flow of charge:

Qcan = Q⁺can + Q^~can = 0 (1) at the pulse generator 102 is equal to the sum of the flow of charge across the electrodes 104a, 104b:

Qelectrode Q electrode ^~^ Q electrode = 0 (2)

Accordingly, under these operating conditions, the pacing electrodes 104a, 104b are said to be "charge balanced."

[0024] FIG. 1A illustrates a typical pace waveform 120 generated by the pulse generator 102 shown in FIG. 1 for use in electro stimulus applications. The pace waveform 120 has essentially two phases, a pace phase 122 and a recover phase 124. The recover phase 124 further includes a fast recover phase 126 and a slow recover phase 128. The operation of such typical pace waveforms 120 is well known and will not be described in detail for the sake of

conciseness and clarity. Throughout the remainder of this specification, however, reference will be made to the pace waveform 120 in the context of the pace 122 and recover 124 phases for the purpose of describing the operation of various aspects of charge balancing circuits for use in electro stimulus applications.

[0025] FIG. 2 illustrates a pacing system 200 that is operating in a charge imbalanced mode. In the pacing system 200, a lead integrated circuit 202 (IC) is located between the pulse generator 102 and the pacing electrodes 104a, 104b. It will be appreciated that the lead IC 202 may be an implantable hermetically sealed integrated circuit of the type provided by Proteus Biomedical Inc. located at 2600 Bridge Parkway, Suite 101, Redwood City, CA 94065.

[0026] In a very general sense, the electrical

conduction aspect of the lead IC 202 may be modeled as an electrical network comprising linear and/or nonlinear electrical circuit elements. For example, the lead IC 202 may be modeled as a simple electrical network comprising linear and nonlinear circuit elements. In electric circuits, a linear element or device may be an electrical element with a linear relationship between current and voltage. Examples of linear elements include, without limitation, resistors, capacitors, inductors, transformers, and combinations thereof. In contrast, a nonlinear

element, or nonlinear device, is an electrical element or device which does not have a linear relationship between current and voltage. A diode is a simple example of a nonlinear circuit element. The current "I" through a diode is a nonlinear function of the voltage "V" across its terminals. Most semiconductor devices have nonlinear characteristics. Examples of nonlinear devices include, without limitation, transistors, diodes, and combinations thereof. Often, nonlinear elements may be employed to build or to approximate linear circuits. For example, an operational amplifier may be configured to behave like a linear amplifier, provided that its input voltages remain within certain limits.

[0027] As shown in FIG. 3, the electrical conduction of the lead IC 202 may be modeled as a simple combination of a nonlinear electrical element, such as an ideal diode 302, in series with a linear electrical element, such as a high value resistor 304. It will be appreciated that the lead IC 202 may be modeled using any suitable combination of linear and nonlinear circuit elements. Accordingly, the model shown in FIG. 3 is not limited in this context. [0028] The conduction aspects of the operation of lead IC 202 will now be described with reference to both FIGS. 2 and 3. During the positive cycle of the pulse generator 102, e.g., the pace phase 122 (FIG. 1A) , the lead IC 202 consumes a small amount of current. Accordingly, a small positive flow of charge 110a' flows into the lead IC 202 during the pace phase 122 of the pacing cycle. The current is consumed by the lead IC 202 and no structure is provided to generate a substantially equal reverse flow of charge 110b' (FIG. 2) to balance the forward flow of charge 110a'. Hence, the behavior of the lead IC 202 can be modeled as an ideal diode, where current is enabled to flow in the forward direction but is blocked in the reverse direction.

[0029] Because the pulse generator 102 maintains charge balance across the anode pacing lead 106a and the cathode pacing lead 106b lines, the small positive flow of charge 110a' flowing into the lead IC 202 is cancelled by an equal negative flow of charge 110b' across the pacing electrodes 104a, 104b, as shown in FIG. 2. The small negative flow of charge 110b' across the pacing electrodes 104a, 104b results in a small charge imbalance across the pacing electrodes 104a, 104b, which ultimately may lead to

electrochemical corrosion of the pacing electrodes 104a, 104b.

[0030] For clarity of disclosure, a graphical

illustration 400 of charge balance current flowing in a pacing system under both balanced and unbalanced operating conditions is provided in FIG. 4. The vertical axis represents current in nanoamps (nA) and the horizontal axis represents frequency in Hertz (Hz) . The current vs.

frequency measurements plotted on the graph 400 were made at a pacing voltage of about 7.5V.

[0031] Current vs. frequency curve 402 represents current flowing between the anode and the cathode of a pulse generator (e.g., the pulse generator 102 shown in FIG. 1 that generates the characteristic pace waveform 120 shown in FIG. 1A) . The magnitude of the current 402 measured across the pulse generator increases linearly from about 0 nA at 1 Hz to about -55 nA at 180 Hz.

[0032] Current vs. frequency curve 404 represents current flowing between simple positive and negative pacing electrodes (e.g., the pacing electrodes 104a, 104b shown in FIG. 1) . The magnitude of the current 404 measured across the pacing electrodes increase linearly from about 0 nA at 1 Hz to about -75 nA at 180 Hz, and is -2.7 nA in one measurement at about 30 Hz.

[0033] Current vs. frequency curve 406 represents current flowing between positive and negative pacing electrodes (e.g., pacing electrodes 104a, 104b shown in FIG. 2) with a lead IC (e.g., the lead IC 202 shown in FIG. 2) located between the pulse generator and the pacing electrodes. The magnitude of the current 406 measured across the pacing electrodes with a lead IC located between the pulse generator and the pacing electrodes increases linearly from about +5 nA at 1 Hz to about -488 nA at 180 Hz .

[0034] While the respective balanced and unbalanced pacing electrode currents 402, 404 may be insignificant at cardiac pace rates of about 1 Hz, these currents 402, 404 may reach relatively high levels as pace rates approach 180 Hz, which are practical in neurostimulation applications. A minimally balanced pulse generator for cardiac pacing applications generates electrode currents of about 100 nA, which is considered to be relatively high from a corrosion standpoint. To compound the problem, electrodes used in neurostimulation applications have a smaller cross- sectional area than pacing electrodes used in cardiac stimulation applications. The reduced cross-sectional area increases the current density of the neurostimulation electrodes resulting from lead charge imbalance.

Accordingly, in high pace rate neurostimulation

applications, the electrodes generally contend with higher charge densities and higher current flows, making them much more susceptible to electrochemical corrosion resulting from "charge imbalanced" electrodes.

[0035] FIG. 5 illustrates one aspect of a pacing system 500 comprising one aspect of a lead IC 502 located between the pulse generator 102 and the pacing electrodes 104a, 104b. For clarity of description of the aspect illustrated in FIG. 5, reference is also made to FIGS. 1A and 3 and corresponding portions of the description. The electrical network 300, which is simply modeled as an ideal diode 302 as shown in FIG. 3, represents a normal operation of the lead IC 502. The lead IC 502 consumes a small amount power and draws a flow of charge 110a' during the pace phase 122, e.g., the positive portion of the pace waveform 120, generated by the pulse generator 102. The pulse generator 102 maintains charge balance between the anode pacing lead 106a and the cathode pacing lead 106b. As a result, the pulse generator 102 forces an equal or near equal matching flow of charge 110b' to flow across the pacing electrodes 104a, 104b during the recover phase 124, e.g., the negative portion of the pace waveform 120.

[0036] In one aspect, an electrical network provides a reverse path for the flow of charge to balance the flow of charge in the forward path. The electrical network may be located within the lead IC 502 (integrated on-chip) or may be provided external to the lead IC 502 (off-chip) . In the aspect illustrated in FIG. 5, the electrical network 504 is shown schematically to be integrated within the lead IC 502 to provide a reverse path for charge flow. Accordingly, the flow of charge 110b' through the reverse path provided by the electrical network 504 rather than flowing through the pacing electrodes 104a, 104b and causing potential electrochemical corrosion of the pacing electrodes 104a, 104b. Accordingly, in one aspect, the electrical network 504 may be selected or configured to consume an equal, or substantially equal, amount of the flow of charge 110b' in the reverse direction (e.g., during the recover phase 124 of the pace waveform 120) as the lead IC 502 consumes in the forward direction (e.g., flow of charge 110a' consumed by the lead IC 502 during the pace phase 122 of the pace waveform 120 ) .

[ 0037 ] In various aspects, the reverse charge flow electrical network 504 may be implemented using linear circuit elements, nonlinear circuit elements, or

combinations of linear and nonlinear circuit elements. In the illustrated aspect, the reverse electrical network 504 comprises a combination of nonlinear 506 and linear 508 circuit elements, such as, for example, transistors, switches, diodes, operational amplifiers, comparators, threshold detectors, phase detectors, digital logic circuits, counters, resistors, capacitors. The electrical elements of the electrical network 504 may be selected and sized to achieve a balanced charge flow in the forward direction as well as in the reverse direction. In the illustrated aspect, for example, the linear circuit

elements 508 may be selected to allow an amount of negative flow of charge 110b' flow in the negative or reverse direction that is equal to an amount of positive or forward flow of charge 110a' into of the lead IC 502 in the

positive direction. Accordingly, due to the small value of positive flow of charge 110a', circuit elements such as resistors having a high value and capacitors having a low value may be selected.

[0038] It will be appreciated that the electrical network 504 having the functionality described in

connection with FIGS. 3 and 5 may take many forms and configurations. Accordingly, for completeness of

disclosure, several aspects of suitable electrical networks for a charge balance circuit to balance a flow of charge to at least one pacing electrode will now be described in connection with FIGS. 6-12 hereinbelow.

[0039] Accordingly, FIG. 6 illustrates one aspect of a pacing system 600 comprising a lead IC 602 coupled between the pulse generator 102 shown in FIG. 5 and the pacing electrode 104a. For clarity of description of the aspect illustrated in FIG. 6, reference is also made to FIG. 1A and corresponding portions of the description. In one aspect, the lead IC 602 comprises a charge balance circuit 604 to balance the charge of the pacing electrode 104a. The charge balance circuit 604 may be implemented with linear or nonlinear analog or digital circuits, or

combinations thereof. In the illustrated aspect, the charge balance circuit 604 comprises a charge monitor circuit 606, a pace pulse phase detector 608 to detect the phase of the waveform 120, a logic circuit 610, and a plurality of switches 612a, 612b, 612c, 612d. The charge balance circuit 604 is coupled in series with the pacing electrode 104a to be charge balanced.

[0040] It will be appreciated that the switches 612a- 612d may be implemented using any suitable technology. In one aspect, the switches 612a-612d may be implemented as solid state or semiconductor electronic devices such as diodes, transistors, alone or in combination where the conduction between input/output ports can be controlled by a signal applied to a control port. For example, the switches 612a-612d may be implemented by using

semiconductor techniques such as complementary metal oxide semiconductor (CMOS) technology, among others and may be formed as transistors such as filed effect transistors (FET) or CMOS switching devices, among others.

[0041] The charge monitor circuit 606 measures the forward flow of charge 108a, e.g., forward current supplied to the pacing electrode 104a, which eventually flows out of the pacing electrode 104a during the pace phase 122 of the pace waveform 120. The charge monitor circuit 606 also measures the reverse flow of charge 108b, e.g., reverse current flowing into the pacing electrode 104a, during the recover phase 124 of the pace waveform 120. [0042] The pace pulse phase detector 608 determines the phase of the pace waveform 120 and whether it is in the pace phase 122 or the recover phase 124 and outputs a signal indicative thereof to the logic circuit 610, or other devices within the charge monitor circuit 606, for example. The pace pulse phase detector 608 sets the initial state of (e.g., initializes) the charge monitor circuit 606, the logic circuit 610, and the switches 612a- 612d in accordance with the phase cycle of the pace

waveform 120.

[0043] The logic circuit 610 controls the operation of the switches 612a-612d based on the phase of the pace waveform 120 and the amount of forward and reverse charge measured by the charge monitor circuit 606. The outputs "a, b, c, d" of the logic circuit 610 control the

conduction state (e.g., open/non-conducting or

closed/conducting) of the corresponding switches 612a-612d by applying a control signal to corresponding switch control ports "a, b, c, d." The switches 612a-612d may be controlled individually or in any combination. In a very general sense, the logic circuit 610 interrupts (e.g., cuts off, arrests, stops, or prevents) the reverse flow of charge 108b once it is equal to the forward flow of charge 108a and thus charge balances the pacing electrode 104a. The amount of reverse charge flow 110b needed to charge balance the pacing electrode 104a is measured by the charge monitor circuit 606 and is equal to the amount of reverse charge that has to flow into the pacing electrode 104a to achieve charge balance.

[0044] In operation, during the pace phase 122 of the pace cycle, the pace pulse phase detector 608 detects the rising edge of the pace waveform 120 and the logic circuit 610 closes the switches 612a, 612b (e.g., sets these switches in a conduction state) and opens the switches 612c, 612d (e.g., sets these switches in a non-conduction state) . In accordance with this configuration, the switches 612a and 612b provide an electrical conductive path and the flow of charge 108a is routed from the anode of the pulse generator 102, through the first switch 612a, the charge monitor circuit 606, through the second switch 612b, and out to the electrode 104a. Thus, the switches 612a, 612b are in located in the electrical path of the forward flow of charge 118a. During the pace phase 122, the charge monitor 606 measures the amount of charge 108a flowing in the forward direction to the pacing electrode 104a. In one aspect, a digital counter may be used to measure the number of discrete units of charge that passed through the charge monitor circuit 606. At the end of the pace phase 122, the count accumulated by the counter would then be indicative of the charge that flowed through the charge monitor circuit 606 during the pace phase 122 cycle of the pace waveform 120. [0045] When the pace pulse phase detector 608 detects the falling edge of the pace waveform 120, the logic circuit 610 opens the switches 612a, 612b and closes the switches 612c, 612d. The charge monitor circuit 606 stores, records, or otherwise maintains the total amount of the flow of charge 108a measured in the forward direction (e.g., the count value of a counter may be indicative of the amount of charge) so that a comparison may be made while monitoring the flow of charge in the reverse

direction. During the recover phase 124, a negative flow of charge 108b flows in the reverse direction. The charge that flows into the pacing electrode 104a is routed through the third switch 612c, the charge monitor circuit 606, the fourth switch 612d, and back to the anode of the pulse generator 102. Thus, the switches 612c, 612d provide an electrical path for the reverse flow of charge 108b.

During the recover phase 124, the charge monitor circuit 606 measures the amount of charge flowing in the reverse direction and compares it to the total amount that was measured in the forward direction. When the amount of charge measured in the reverse direction is substantially equal to the amount of charge measured in the forward direction, the charge monitor circuit 606 sends a signal to the logic circuit 610 and responsive thereto, the logic circuit 610 sends a control signal via control outputs "a, b, c, d" to the corresponding control ports "a, b, c, d" of the switches 612a-612d and open at least the switches 612c, 612d in the reverse path to interrupt (e.g., stop, arrest, or prevent) any additional flow of charge in the reverse direction. It will be appreciated that in one aspect, all the switches 612a-d may be opened to interrupt current flow. Once the logic circuit interrupts the current flow in the reverse direction, an equal amount of charge has passed through the pacing electrode 104a in the forward direction as well as in the reverse direction and,

therefore, the pacing electrode 104a is said to be charge balanced .

[0046] Accordingly, during the recover phase 124 the charge balance circuit 604 enables an amount of the flow of charge 108b to flow through the pacing electrode 104a in the reverse direction that substantially matches the amount of the flow of charge 108a that flowed through though the pacing electrode 104a in the forward direction, thus charge balancing the pacing electrode 104a. Once the pacing electrode 104a is charge balanced, the logic circuit 610 may keep all the switches 612a-612d in the open state until the next rising edge of the pace waveform 120, e.g., the pace phase 122, is detected by the pace pulse phase

detector 608.

[0047] In various aspects, the charge balance circuit

604 may be integrated within the lead IC 602 as illustrated in FIG. 6 or may be provided external to the lead IC 602. In one aspect, the charge balance circuit 604 may be located within the pulse generator 102. Furthermore, if the lead IC 602 supports more than one pacing electrode 104a, a different charge balance circuit 604 may be used to charge balance each of the additional electrodes coupled to the lead IC 602. In general, if there are four pacing electrodes coupled to a lead IC 602, four charge balancing circuits 604 of the type described in connection with FIG. 6 may be employed to charge balance each one of the four pacing electrodes. Nevertheless, the aspects are not limited in this context and any suitable number of

electrodes may be balanced either internally or externally using aspects of the charge balance circuit 604.

[ 0048 ] FIG. 7 illustrates one aspect of a pacing system 700 comprising a lead IC 702 coupled between the pulse generator 102 shown in FIG. 5 and the pacing electrode 104a. For clarity of description of the aspect illustrated in FIG. 7, reference is also made to FIG. 1A and

corresponding portion of the description. In one aspect, the lead IC 702 comprises a charge balance circuit 704 to balance the charge of the pacing electrode 104a. In the illustrated aspect, the charge balance circuit 704

comprises a charge monitoring circuit utilizing a bipolar switched capacitor charge balancing technique. The bipolar switched capacitor circuit may be used to measure the amount of charge flowing through the charge balance circuit 704 during the pace phase 122 and recover phase 124 of the pace waveform 120 cycle, among other phases. The bipolar charge balance circuit 704 may be used in a pacing system comprising a lead IC 702 coupled between the pulse

generator 102 (not shown) and the pacing electrode 104a, such as the pacing systems 200, 500, 600 shown in

respective FIGS. 2, 5, and 6. The charge balance circuit 704 is for balancing the charge on an individual electrode 104a. A lead IC coupled to multiple electrodes would duplicate this function for each electrode individually.

[0049] In one aspect, the charge balance circuit 704 comprises a small value capacitor 706 electrically coupled to first (+) and second inputs (-) of a comparator 708, a digital counter 710, a first switch 712, a second switch 714, a logic circuit 716, and a pulse phase detector circuit 718. The charge balance circuit 704, including the capacitor 706, is coupled in series with the pulse

generator 102 (not shown) and the pacing electrode 104a to be charge balanced. The pace waveform 120 is applied to the input terminal of the capacitor 706. The alternating current (AC) flows to the pacing electrode 104a during the pace phase 122 of the pace waveform 120, the capacitor 706 charges to a voltage responsive to charge flowing

therethrough and increases according to equation (3) :

Q = CV = It (3) [0050] If the value of the capacitor 706 is selected to be small such that the time constant of the capacitor 706 is substantially smaller than the duration of the pace waveform 120 during the pace phase 122 or the recover phase 124, the voltage across the capacitor 706 will charge increase rapidly tending to saturate the charge balance circuit 704. The comparator 708, however, prevents saturation by monitoring the voltage across the capacitor 706 (V_CAP) . When the capacitor voltage V_CAP on the first input (+) of the comparator 708 exceeds a predetermined threshold voltage on the second input (-) of the comparator 708 the output of the comparator 708 (V_C0Mp) changes state and a signal is applied to control port "a" of the switch 712 to close the switch 712 and cause the capacitor 706 to quickly discharge. At this time, the output of the

comparator 708 also is applied to the count input of the counter 710 to cause the counter 710 to register a count in a first direction. Once the switch 712 closes, both input terminals of the comparator 708 are placed at the same potential and the output of the comparator 708 (V_C0Mp) once again changes state. As soon as the output of the

comparator 708 changes states, the switch 712 opens and the capacitor 706 begins charging anew. This oscillatory process continues for the duration of the pace phase 122 until the recover phase 124 is detected by the pace pulse phase detector 718. This type of circuit is known as a switched-capacitor circuit. An optional resistor 720 may be located in parallel with the capacitor 706 and the switch 712 to provide a discharge path for the capacitor 706.

[0051] In operation, the pace pulse phase detector 718 detects the phase of the pace waveform 120 and initializes or configures the states of the switches 712, 714, the logic circuit 716, and the counter 710 in a predetermined manner. When the pace pulse phase detector 718 detects the pace phase 122, the first switch 712 is opened to allow the capacitor 706 to charge to a threshold voltage and the second switch 714 is closed by applying a control signal to the corresponding control port "b" to allow the positive flow of charge 108a to be routed to the pacing electrode 104a. During the pace phase 122, the counter 710 is incremented each time the voltage across the capacitor 706 reaches a positive threshold causing the comparator 708 output to change state and close the first switch 712.

Once the first switch 712 closes, the capacitor 706 quickly discharges and the counter 710 is incremented by one count.

[0052] While charge flows in one direction, the counter 710 counts in a first direction and while charge flows in a second direction opposite the first direction the counter 710 counts in a second direction as explained in more detail hereinbelow. Assuming the counter 710 and the capacitor 706 are both initialized to zero at time t = 0 at the beginning of the pace phase 122 cycle, the charge balance circuit 704 can be used to measure the charge flowing out to the pacing electrode 104a during the pace phase 122 by counting the number of the times the capacitor 706 has been charged and discharged as tracked by the counter 710. If the counter 710 is stopped at the end of the pace phase 122, the count accumulated by the counter 710 is indicative of the total charge (Q) that flowed through the capacitor 706 in the first direction during the pace phase 122.

[0053] When the pace pulse phase detector 718 detects the start of the recover phase 124, the operation of the counter 710 is set to count in the opposite direction.

Thus, if the counter 710 was initially configured as an up- counter (e.g., set to increment or count-up with each positive going input), it will now be reconfigured as a down-counter (e.g., set to decrement or count-down with each negative going input) each time the capacitor voltage V_CAP reaches the threshold voltage. In the aspect

illustrated in FIG. 7, during the recover phase 124, the pace waveform 120 is negative and the counter 710 is decremented each time the capacitor voltage V_CAP reaches a negative threshold. While charge flows into the pacing electrode 104a, the counter 710 counts down each time the capacitor voltage V_CAP crosses the negative threshold.

[0054] It will be appreciated that for proper operation, the charge balance circuit 704 has to detect both positive and negative voltage thresholds across the capacitor 706. If the threshold voltages are accurately set and maintained such that they have equal magnitude but opposite polarity, the flow charge 108a out of the pacing electrode 104a will equal the flow of charge 108b into the pacing electrode 104a whenever the output of the counter 710 returns to zero. At such time, the counter 710 sends a signal to the logic circuit 716, which opens the second switch 714 to interrupt the flow of charge 108b to prevent any additional charge from flowing into the pacing electrode 104a.

[0055] It will be appreciated that quantization error may slightly affect the accuracy of the bipolar switched capacitor charge balance circuit 704 described in

connection with FIG. 7. Quantization error occurs may occur if the current through the capacitor 706 stops flowing while the capacitor 706 is charging toward the threshold voltage but prior to reaching the threshold. In this situation, the charge on the capacitor 706 will not be counted by the counter 710. When the flow of current reverses, the charge held by the capacitor 706 as a voltage will be removed from the capacitor 706 and the voltage across the capacitor 706 eventually returns to Q. While there is quantization (counted in units of CV threshold) , the charge balance circuit 704 may compensate to minimize the quantization error by the proper selection of capacitor size, threshold voltage, as described above. A smaller value capacitor and a lower threshold voltage will cause the capacitor to charge and discharge at a higher

frequency. Thus, each charge/discharge cycle represents a smaller quantity of charge and is one unit is not counted because of quantization error it will be a smaller

percentage of the total charge.

[0056] In various aspects, the charge balance circuit

704 may be integrated within the lead IC 702 as illustrated in FIG. 7 or may be provided external to the lead IC 702. In one aspect, the switches 712, 714 may be implemented as transistors, such as, FET or CMOS switching devices. In one aspect, the charge balance circuit 704 may be located within the pulse generator 102. Furthermore, if the lead IC 702 supports more than one pacing electrode 104a, a different charge balance circuit 704 may be used to charge balance each of the additional electrodes coupled to the lead IC 702. In general, if there are four pacing

electrodes coupled to a lead IC 702, four charge balancing circuits 704 of the type described in connection with FIG. 7 may be employed to charge balance each one of the four pacing electrodes. Nevertheless, the aspects are not limited in this context and any suitable number of

electrodes may be balanced either internally or externally using aspects of the charge balance circuit 704.

[0057] For clarity of disclosure, FIG. 8 provides timing diagrams 800 showing the relationship between the pace waveform 120, the capacitor 706 voltage, the comparator 708 output voltage, and the conduction state of the switches 712, 714 in the charge balance circuit 704 shown in FIG. 7. The value of the capacitor 706 is selected to be small relative to the duration of the pace phase 122 or recover phase 124 of the pace waveform 120 (FIG. 1A) . Accordingly, the capacitor 706 will reach the threshold voltage quickly and will be charged and discharged many times during both the pace phase 122 and the recover phase 124 of the pace waveform 120. The diagrams shown in FIG. 8, however, are not drawn to scale and are presented for illustration and clarity of disclosure.

[0058] FIG. 9 illustrates one aspect of a pacing system 900 comprising a lead IC 902 coupled between the pulse generator 102 shown in FIG. 5 and the pacing electrode 104a. For clarity of description of the aspect illustrated in FIG. 9, reference is also made to FIG. 1A and

corresponding portions of the description. In one aspect, the lead IC 902 comprises a charge balance circuit 904 to balance the charge of the pacing electrode 104a. In one aspect, the charge balance circuit 904 comprises a charge monitoring circuit utilizing a monopolar switched capacitor charge balancing technique. The monopolar switched

capacitor circuit may be employed to measure the amount of charge flowing through the circuit during the pace phase 122 and recover phase 124 of the pace waveform 120 cycle. [0059] In one aspect, the charge balance circuit 904 comprises a small value capacitor 906 electrically coupled to first (+) and second (-) inputs of a comparator 908, a digital counter 910, a plurality of switches 912, 914a, 914b, 914c, 914d, each one having a control port, a logic circuit 916, and a pace pulse phase detector circuit 918. The charge balance circuit 904, including the capacitor 906, is coupled in series with the pulse generator (not shown) and pacing electrode 104a to be charge balanced. The switches 914a-914d are controlled by the logic circuit 916 by applying control signals "a, b, c, d" to

corresponding control ports "a, b, c, d" of the switches 914a-914d to control the conduction state of thereof. The switches 914a-914d may be configured such that the flow of charge 108a, 108b either in the forward direction or reverse direction flows through the capacitor 906 in the same direction. This configuration avoids any circuit complexity that may be associated with dual voltage

thresholds (e.g., positive and negative) as employed in the bipolar charge balance circuit 704 described in connection with FIG. 7. The switches 914a-914d are relatively easy to realize in an integrated circuit and can be readily

integrated with the lead IC 902. Whether current flows out of or into the pacing electrode 104a during respective pace phase 122 or recover phase 124, the voltage across the capacitor 906 increases according to equation (3) in the same direction. Thus, the comparator 908 only requires a single threshold, whether positive or negative, to detect the charge across the capacitor 906.

[0060] In operation, a pace pulse phase detector 918 detects the pace phase 122 of the pace waveform 120 and initializes or configures the logic circuit 916 and the state of the switches 914a-914d in a predetermined manner. In the aspect illustrated in FIG. 9, for a particular pacing electrode 104a, a flow of charge 108a will flow out to the pace electrode 104a during the pace phase 122 (e.g., the positive portion of the pace waveform 120), and current will flow into the pacing electrode 104a during the recover phase 124. The charge balance circuit 904 places the charge measuring capacitor 906 and threshold detection comparator 908 circuit such that current flows "forward" during the pace phase 122, and then reverses the

connections of the capacitor 906 relative to the inputs of the comparator 908 during the recover phase 124. One method to accomplish this functionality is to close the forward (f) switches 914a, 914b and open the reverse (r) switches 914c, 914d during the forward pace phase 122; and close the reverse (r) switches 914c, 914d and open the forward switches 914a, 914b during the reverse recover phase 124.

[0061] Switched as shown and described, the comparator 908 has only one threshold voltage to detect. Accordingly, the aspect illustrated in FIG. 9 eliminates the quantization error resulting from unequal positive and negative threshold levels as described in connection with the aspect illustrated in FIG. 7. The switching

configuration illustrated FIG. 9 includes logic circuitry causing the counter 910 to count bi-directionally (e.g., may be selectively configured as an up-counter and as a down-counter) .

[0062] Once the pace phase 122 is detected by the pace pulse phase detector 918, the counter 910 is configured to count up and the charge monitoring process begins by closing the forward (f) switches 914a, 914b and opening the reverse (r) switches 914c, 914d. In this configuration, the forward flow of charge 108a enters the capacitor 906 in the direction indicated by the arrow and the capacitor 906 begins charging with the polarity indicated in FIG. 9. As the comparator 908 senses the increased voltage on the "+" terminal of the capacitor 906, the comparator 908 output voltage (V_C0Mp) changes state (e.g., V_C0Mp changes from low to high) and closes the switched capacitor switch 912 to quickly discharge the capacitor 906. After the capacitor 906 discharges, the output state of the comparator once again changes state (e.g., V_C0Mp changes from high to low) because both input terminals of the comparator are held at the same potential. This causes the switch 912 to open and the capacitor 906 to begin charging anew. During the pace phase 122 the counter is configured to count in a first direction. If configured as an up-counter, the output of the counter 914 increments with each rising edge of the output of the comparator 908. An optional resistor 920 may be located in parallel with the capacitor 906 and the switch 912 to provide a discharge path for the capacitor 906.

[0063] The oscillatory behavior of the switched- capacitor charge balance circuit 904 continues until the pace pulse phase detector 918 detects the recover phase 124 of the pace waveform 120. At such time, the counter 901 may be configured to count in the opposite direction to which it was previously set. For example, if the counter 910 was previously configured as an up-counter, it is now reconfigured as a down-counter. The forward (f) switches 914a, 914b are now opened, and the reverse (r) switches 914c, 914d are now closed to provide an electrical path for the reverse flow of charge 108b entering the pacing

electrode 104a. In this configuration, the reverse flow of charge 108b enters the capacitor 906 in the same direction as it did in the forward direction and the capacitor 906 begins charging with the same polarity previously indicated in FIG. 9. As the comparator 908 senses the increasing voltage on the "+" terminal of the capacitor 906, the comparator 908 output voltage (V_C0Mp) changes state (e.g., VCOMP changes from low to high) and closes the switched capacitor switch 912 to quickly discharge the capacitor 906. After the capacitor 906 discharges, the output of the comparator 908 again changes state (e.g., V_C0Mp changes from high to low) and the capacitor 906 begins charging anew. During the recover phase 124 the counter 910 is decremented with each rising edge of the output of the comparator 908. Charge balance is achieved when the counter 910 decrements to zero during the recover phase 124 and at such time, the counter 910 sends a signal to the logic circuit 916 to open forward (f) switches 914a, 914b and the reverse (r)

switches 914c, 914d to interrupt (stop, arrest, or prevent) reverse flow of charge 108b in the charge balance circuit 904.

[0064] It will be appreciated, that the above discussion generally was directed to a pacing electrode 104a

configured as an anode electrode such that during the pace phase 122 of the pulse waveform 120 current flows out of the pacing electrode 104a and during the recover phase 124 current flows into the pacing electrode 104a. Not all electrodes, however, are configured as anodes when pacing. Some are configured as cathodes such that current flows into the electrode during the pace phase 122 and flows out of the electrode during the recover phase 124. To charge balance cathode pacing electrodes, the switching order of the switches 914a-914d may be inverted such that the reverse (r) switches 914c, 914d are closed switches during the pace phase 122 and the forward (f) switches 914a, 914b are closed during recover phase 124.

[0065] In an ideal system, all switches 914a-914d are opened just at the end of a full pace waveform 120 cycle, and all charge flows are balanced. In practical

applications, however, a bleed element (such as a large value resistor) distal to the pulse generator 102 (not shown) can be used to provide a path for very small residual charges to balance the pacing electrode in case all the switches 914a-914d open before all charge is balanced .

[0066] In various aspects, the charge balance circuit

904 may be integrated within the lead IC 902 as illustrated in FIG. 9 or may be provided external to the lead IC 902. In one aspect, the charge balance circuit 604 may be located within the pulse generator 102. Furthermore, if the lead IC 902 supports more than one pacing electrode 104a, a different charge balance circuit 904 may be used to charge balance each of the additional electrodes coupled to the lead IC 902. In general, if there are four pacing electrodes coupled to a lead IC 902, four charge balancing circuits 904 of the type described in connection with FIG. 9 may be employed to charge balance each one of the four pacing electrodes. Nevertheless, the aspects are not limited in this context and any suitable number of

electrodes may be balanced either internally or externally using aspects of the charge balance circuit 904. In one aspect, the switches 912 and 914a-914d may be implemented as transistors, such as, FET or CMOS switching devices. In another aspect, the switches 914a-914d may be replaced with diodes or other if the charge balance circuit 904 can tolerate the forward bias voltage drop across the diodes.

[0067] In connection with the above aspects, it should be noted that the negative charge compensation for the positive charge flow through the lead IC does not need to flow back through the lead IC. The negative flow can be in the pulse generator 102 or elsewhere on the pacing lead 106a provided that the negative flow of charge compensating for the lead IC positive charge flow does not go through the pacing electrodes.

[0068] It will be appreciated, that some aspects may employ a plurality of lead ICs coupled in parallel between the pulse generator 102 and the pacing electrodes.

Although the charge consumed by each individual lead IC is relatively small, the charge consumption may become

significant in a system comprising multiple lead ICs.

Accordingly, the integral electrical network 504 and/or the charge balance circuits 604, 704, 904 described above provide a suitable electrode charge balancing solution at each lead IC. Each lead IC strung along the anode pacing lead 106a and the cathode pacing lead 106b lines of the pulse generator 102 would compute and maintain its own local charge balance for the lead IC portion of charge flow. The lead IC would not maintain charge balance for electrodes coupled to the lead IC as current flowing out of one electrode on one lead IC might return on an electrode coupled to another lead IC. The pulse generator 102 may be configured to manage the overall charge balancing process to maintain charge balance on the pacing electrodes.

[0069] For clarity of disclosure, FIG. 10 provides timing diagrams 1000 showing the relationship between the pace waveform 120, the capacitor 906 voltage, the

comparator 908 output voltage, and the conduction state of the switches 912, and 914a-914d in the charge balance circuit 904 shown in FIG. 9. The value of the capacitor 906 is selected to be small relative to the duration of the pace phase 122 or recover phase 124 of the waveform 120. Accordingly, the capacitor 906 will reach the threshold voltage quickly and will be discharged many times during the pace phase 122 and the recover phase 124 of the pace waveform 120 (FIG. 1A) . The diagrams shown in FIG. 10, however, are not drawn to scale and are presented for illustration and clarity of disclosure.

[0070] FIG. 11 illustrates one aspect of a pacing system 1100 comprising a plurality of lead ICs 1102-1 to 1102-n coupled in parallel, where the individual lead ICs 1102-1 to 1102-n may not have integral electrical networks 504 and/or charge balance circuits 604, 704, and 904 described herein in connection with FIGS. 5-10. During the pace phase 122 (FIG. 1A) , small positive flows of charge 110b- 1', 110b-n' flow into each one of the respective lead ICs 1102-1 to 1102n. In one aspect, each of the multiple lead ICs 1102-1 to 1102-n may employ an additional charge balance circuit as described in connection with FIGS. 5-10 located across the anode and cathode where the charge balance circuit implements the equivalent of the reverse current path in the lead IC 1102-1 to 1102-n. In other aspects, however, a single external circuit 1104 may be employed to compensate for the current drawn by all the lead IC 1102-1 to 1102-n. The circuit 1104 could be used to consume a negative current that is equal to sum of all the small currents for as many lead ICs 1102-1 to 1102-n as are located across the anode cathode lines. The circuit 1104 may be located inside the pulse generator 102 or could be assembled on the lead.

[0071] Alternatively, a small current source distal to the pulse generator 102 may be employed to inject a bias current to compensate for the reverse currents.

[0072] FIG. 12 illustrates one aspect of a method 1200 of charge balancing a pacing electrode. For clarity of description of the method illustrated in FIG. 12, reference is also made to FIGS. 1A and 5-10 and corresponding

portions of the description. In accordance with one aspect, the functionality of the method may be implemented in any of the described aspects of electrical networks 504 and/or charge balance circuits 604, 704, 904 described in connection with corresponding FIGS. 5-10. Accordingly, a charge balance circuit receives 1202 a pace waveform 120 from a pulse generator 102. A charge monitor circuit, e.g., the charge monitor circuit 606 of FIG. 6, the bipolar switched capacitor charge monitor circuit of FIG. 7, the monopolar switched capacitor charge monitor circuit of FIG. 9, among others, determines 1204 a flow of charge through at least one pacing electrode 104a in a first direction. The charge monitor circuit determines 1206 a flow of charge through the at least one pacing electrode 104a in a second direction. The flow of charge in the second direction is interrupted 1208 by a logic circuit 716, 916 when the determined flow of charge in the second direction is substantially equal to the determined flow of charge in a first direction.

[ 0073 ] In one aspect, a detector detects a pace pulse phase of the pace waveform and in response thereto,

initializes a state of a charge monitor circuit and a logic circuit. Furthermore, a first electrical path may be provided between the pulse generator and the at least one pacing electrode by controlling the state of semiconductor solid state switches such as FET or CMOS switching devices. A second electrical path may be provided between the pulse generator and the at least one pacing electrode for the flow of charge in second direction.

[0074] It is worthy to note that any reference to "one aspect" or "an aspect" means that a particular feature, structure, or characteristic described in connection with the aspect is included in at least one aspect. Thus, appearances of the phrases "in one aspect" or "in an aspect" in various places throughout the specification are not necessarily all referring to the same aspect.

Furthermore, the particular features, structures or

characteristics may be combined in any suitable manner in one or more aspects.

[0075] Some aspects may be described using the

expression "coupled" and "connected" along with their derivatives. It should be understood that these terms are not intended as synonyms for each other. For example, some aspects may be described using the term "connected" to indicate that two or more elements are in direct physical or electrical contact with each other. In another example, some aspects may be described using the term "coupled" to indicate that two or more elements are in direct physical or electrical contact. The term "coupled," however, also may mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other. [ 0076 ] While certain features of the aspects have been illustrated as described herein, many modifications, substitutions, changes and equivalents will now occur to those skilled in the art. It is therefore to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the aspects.

Claims

CLAIMS We Claim:

1. A charge balance device to receive a pace

waveform from a pulse generator and to provide a balanced flow of charge to at least one pacing electrode, the charge balance device comprising: a charge monitor circuit electrically coupled to at least one pacing electrode, the charge monitor circuit to measure a flow of charge through the at least one pacing electrode in a first direction; and a logic circuit to interrupt a flow of charge in a second direction when a measured flow of charge in the second direction is substantially equal to a measured flow of charge in the first direction.

2. The charge balance device of claim 1, comprising the charge monitor circuit to measure a flow of charge in the first and second directions.

3. The charge balance device of claim 1, comprising: a pace pulse phase detector circuit to detect the phase of the pace waveform and in response thereto, to initialize a state of the charge monitor circuit and the logic circuit.

4. The charge balance device of claim 1, comprising: a first and a second switch located in an

electrical path of the flow of charge in the first

direction, the first switch to couple the pulse generator to the charge monitor circuit and the second switch to couple the charge monitor circuit to the at least one pacing electrode; and a third and a fourth switch located in the electrical path of the flow of charge in the second

direction, the third switch to couple the at least one pacing electrode to the charge monitor and the fourth switch is to couple the charge monitor to the pulse

generator .

5. The charge balance device of claim 4, comprising the logic circuit to determine when the measured flow of charge in the second direction is substantially equal to the measured flow of charge in the first direction and responsive to the determination, to control the conduction state of at least the third and fourth switches to

interrupt the flow of charge in the second direction.

6. The charge balance device of claim 1, comprising: a switched capacitor circuit to measure the amount of charge flowing in the first direction.

7. The charge balance device of claim 6, comprising the switched capacitor circuit to measure the amount of charge flowing in the second direction.

8. A charge balance device to receive a pace

waveform from a pulse generator and to provide a balanced flow of charge to at least one pacing electrode, the charge balance device comprising: a switched capacitor circuit to measure a flow of charge through at least one pacing electrode in a first direction, the at least one pacing electrode electrically coupled to the switched capacitor circuit; and a logic circuit to interrupt the flow of charge in a second direction when a measured flow of charge in the second direction is substantially equal to a measured flow of charge in the first direction.

9. The charge balance device of claim 8, comprising: a comparator having first and second inputs and an output; a capacitor electrically coupled to the first and second inputs of the comparator and electrically coupled in series with the pulse generator to receive a pace waveform; and a first switch electrically coupled across the capacitor, the first switch comprising a control port and is operable to change from a conducting state to a non^¬ conducting state responsive to a signal applied to the control port; wherein, the capacitor charges to a voltage responsive to charge flowing therethrough when the pace waveform is applied to an input terminal of the capacitor; and wherein, when the comparator detects a capacitor voltage that exceeds a predetermined threshold, the output of the comparator changes state and applies a signal to the control port of the first switch to discharge the

capacitor .

10. The charge balance device of claim 9, comprising: a digital counter coupled to the output of the comparator, the counter configurable to count in a first direction and a second direction opposite the first

direction, wherein each count is proportional to a unit of charge stored by the capacitor; wherein, the counter is initially configured to count in the first direction responsive to the change of state of the comparator output.

11. The charge balance device of claim 10, comprising : a pace pulse phase detector circuit to detect the phase of the pace waveform and in response thereto, to initialize a state of the logic circuit and the counter.

12. The charge balance device of claim 10, wherein when a charge flows through the capacitor in a first direction, the capacitor charges towards a first threshold voltage and when a charge flows through the capacitor in a second direction opposite to the first direction, the capacitor charges towards a second threshold voltage; and wherein the first and second threshold voltages are substantially equal in magnitude.

13. The charge balance device of claim 12, wherein when the comparator detects the first threshold voltage, the output of the comparator changes state and causes the counter to count in the first direction; and when the comparator detects the second threshold voltage, the output of the comparator changes state and causes the counter to count in the second direction, opposite the first direction.

14. The charge balance device of claim 13, comprising : a second switch located in the electrical path of the flow of charge, the second switch having a first end electrically coupled to the capacitor, a second end

electrically coupled to the pacing electrode, and a control port electrically coupled to the logic circuit, the second switch is operable to change from a conducting state to a non-conducting state responsive to a signal applied to the control port; wherein, the logic circuit controls the state of the second switch to enable and disable the flow of charge through the second switch, and when the charge measured by the counter in the first direction is substantially equal to the charge measured by the counter in the second

direction, the logic circuit applies a signal to the control port of the second switch to interrupt the flow of charge in the second direction.

15. The charge balance device of claim 10, wherein when charge flows through the pacing electrode in a first direction, the capacitor charges towards a

threshold voltage and when charge flows through the pacing electrode in a second direction opposite the first

direction, the capacitor voltage charges towards the same threshold voltage.

16. The charge balance device of claim 15, wherein when charge flows through the pacing electrode in the first direction and the comparator detects the first threshold voltage, the comparator output changes state and the counter is caused to count in the first direction; and when charge flows through the pacing electrode in a second direction opposite the first direction the logic circuit reverses the counting mode of the counter and when the comparator detects the first threshold voltage, the comparator output changes state and the counter is caused to count in a second direction opposite the first

direction .

17. The charge balance device of claim 16,

comprising : a second switch and a third switch located in series with the capacitor, the second switch located between the pulse generator and the capacitor and the third switch located between the capacitor and the pacing electrode ; a fourth switch and a fifth switch located in series with the capacitor, the fourth switch located between the pacing electrode and the capacitor and the fifth switch located between the capacitor and the pulse generator ; wherein, the second, third, fourth, and fifth switches each comprise a control port to control the conduction state of the switch; and wherein the logic circuit controls the states of the second, third, fourth, and fifth switches to enable and disable the flow of charge there through;

18. The charge balance device of claim 17, wherein when charge flows through the pacing electrode in the first direction, the logic circuit closes the second and third switches and opens the third and fourth switches to cause the counter to count in the first direction, wherein the count accumulated by the counter is indicative of the charge that flowed through the capacitor in the first direction; wherein, when charge flows through the pacing electrode in the second direction, the logic circuit opens the second and third switches and closes the fourth and fifth switches to cause the counter to count in the second direction by the same number of counts as in the first direction; and wherein, when the counter reaches the same number of counts in the second direction as in the first

direction, the charge that flowed through the capacitor in the second direction is substantially equal to the charge that flowed through the capacitor in the first direction and responsive thereto the logic circuit applies a signal to the control ports of at least the fourth and fifth switches to interrupt the flow of charge in the second direction .

19. A method of charge balancing a pacing electrode, the method comprising: receiving a pace waveform from a pulse generator; determining a flow of charge through at least one pacing electrode in a first direction; determining a flow of charge through the at least one pacing electrode in a second direction; and interrupting the flow of charge in the second direction when the determined flow of charge in the second direction is substantially equal to the determined flow of charge in a first direction.

20. The method of claim 19, comprising: detecting a pace pulse phase of the pace waveform; and in response thereto, initializing a state of the a charge monitor circuit and a logic circuit.

21. The method of claim 19, comprising: providing a first electrical path between the pulse generator and the at least one pacing electrode for the flow of charge in a first direction; and providing a second electrical path between the pulse generator and the at least one pacing electrode for the flow of charge in second direction.