WO2012089540A1 - Verbundsubstrat, halbleiterchip mit verbundsubstrat und verfahren zur herstellung von verbundsubstraten und halbleiterchips - Google Patents
Verbundsubstrat, halbleiterchip mit verbundsubstrat und verfahren zur herstellung von verbundsubstraten und halbleiterchips Download PDFInfo
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- WO2012089540A1 WO2012089540A1 PCT/EP2011/073134 EP2011073134W WO2012089540A1 WO 2012089540 A1 WO2012089540 A1 WO 2012089540A1 EP 2011073134 W EP2011073134 W EP 2011073134W WO 2012089540 A1 WO2012089540 A1 WO 2012089540A1
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- H10H20/80—Constructional details
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- H10H20/822—Materials of the light-emitting regions
- H10H20/824—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
- H10H20/825—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H10H20/813—Bodies having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies
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- H10H20/841—Reflective coatings, e.g. dielectric Bragg reflectors
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- H10H20/80—Constructional details
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- H10H20/854—Encapsulations characterised by their material, e.g. epoxy or silicone resins
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
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- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
Definitions
- the present application relates to a composite substrate, a semiconductor chip with a composite substrate, and a method for producing composite substrates and of
- Semiconductor chips typically have a semiconductor chip provided for generating radiation and a
- Radiation conversion material which is intended to partially generate the radiation generated in the semiconductor chip
- This radiation conversion material is often embedded in a cladding of the semiconductor chip.
- Potting material used makes difficult efficient coupling of the radiation conversion material to the
- a manufacturing method is to be specified with which radiation conversion for white light sources based on optoelectronic semiconductor chips can be achieved efficiently and cost-effectively.
- a composite substrate has a carrier and a wear layer, wherein the wear layer is fastened to the carrier by means of a dielectric connection layer.
- the carrier contains a
- Such a composite substrate is particularly suitable for use as an epitaxial substrate, in particular for the production of optoelectronic semiconductor chips.
- a surface of the wear layer facing away from the wearer is
- the carrier is preferably so thick that it is cantilevered and furthermore preferably mechanically stabilizes the material to be deposited on the carrier, in particular also at temperatures of, for example, 700 ° C. to 1100 ° C. used for epitaxy processes.
- Wavelength range is in particular by means of the efficiency of the excitation, the thickness of the carrier and / or the concentration of the radiation conversion material adjustable.
- the carrier contains
- a carrier containing a ceramic is preferably formed largely by the radiation conversion material. For the most part means that the carrier the
- the carrier contains the radiation conversion material to a volume fraction of at least 75%, more preferably to a volume fraction of at least 90%.
- the radiation conversion material to a volume fraction of at least 75%, more preferably to a volume fraction of at least 90%.
- Radiation conversion material but also be formed to a lower volume fraction in the carrier.
- the ceramic is preferably formed by particles which are connected to each other and / or with other particles to the ceramic.
- a radiation conversion material is particularly suitable material that can be connected by sintering to form a ceramic.
- a garnet activated in particular with rare earth metals for example Y 3 (Al, Ga) s O 12, for example activated with Ce, can be used.
- the glass is
- the wear layer is expediently thinner than the carrier. The thinner the wear layer, the more cost effective the composite substrate can be made.
- the groove layer preferably has a thickness of at most 1 ⁇ m, preferably a thickness of between 10 nm and 500 nm inclusive, particularly preferably between 10 nm and 200 nm inclusive.
- the wear layer contains, in a preferred embodiment, a material suitable for the deposition of nitridic
- Compound semiconductor material is suitable.
- On nitride compound semiconductors as used herein means that the active epitaxial layer sequence or at least one layer thereof is a nitride III / V compound semiconductor material, preferably Al n Ga m ini- n - comprises m N, where 0 ⁇ n ⁇ 1, 0 ⁇ m ⁇ 1 and n + m ⁇ 1. In this case, this material does not necessarily have to have a mathematically exact composition according to the above formula, but rather it may contain one or more dopants and additional dopants
- the wear layer is preferably based on a nitridic compound semiconductor material. Such a wear layer is particularly suitable for the deposition of high-quality nitridic compound semiconductor material. In a preferred embodiment, only the dielectric connection layer between the wear layer and the carrier is arranged. In other words that's it
- the dielectric compound layer contains an oxide, for example silicon oxide, a nitride, for example silicon nitride or an oxynitride, for example silicon oxynitride.
- an oxide for example silicon oxide, a nitride, for example silicon nitride or an oxynitride, for example silicon oxynitride.
- such a connecting layer is characterized by a particularly simple and stable connection of the groove layer with the carrier.
- the refractive index is adjustable over the material composition.
- a refractive index of the dielectric bonding layer decreases from the wear layer toward the wearer.
- the decrease can be continuous or stepped.
- a variation of the material of the dielectric connection layer is particularly useful when the material having the higher refractive index used for the dielectric compound layer has a higher absorption coefficient than the material having the lower refractive index.
- a surface of the carrier facing the wear layer and / or a surface of the wear layer facing the wearer can have a surface
- the structuring can be any shape having structuring.
- the structuring can be any shape having geometry having structuring.
- an optical element can be formed by means of structuring.
- the composite substrate described is particularly suitable for the production of an optoelectronic semiconductor chip, in particular a LED chip, such as an LED.
- a semiconductor body which has a semiconductor layer sequence with an active region provided for the generation of radiation, is arranged on the wear layer, wherein in operation in the active
- Wavelength range different second wavelength range is converted.
- Composite substrate in the production serve as an epitaxial substrate and the operation of the semiconductor chip integrated into the semiconductor chip
- the semiconductor chip is characterized by a
- Dielectric connection layer of the composite substrate is arranged. Furthermore, the carrier can the
- Bonding layer by good heat dissipation properties.
- the thickness of the carrier is finished
- Asked semiconductor chip between 10 ⁇ inclusive and 200 ⁇ , more preferably between
- the carrier has a mirror layer on the side facing away from the semiconductor body.
- a semiconductor chip is preferably provided for mounting on the part of the mirror layer. Radiation emitted by the active region in the direction of the carrier can be reflected at the mirror layer and, in particular after at least one further pass through the carrier, can emerge on a radiation exit surface of the semiconductor chip facing away from the mirror layer.
- Such a semiconductor chip is particularly suitable for mounting in flip-chip geometry.
- the attachment of the wear layer is preferably carried out by direct bonding.
- adhesive bonding by means of an adhesive layer is for fastening no
- Adhesion layer required.
- the first layer Adhesion layer required.
- the second layer Adhesion layer required.
- Connection can be achieved directly by heat input and exerting pressure.
- the wear layer is provided on an auxiliary carrier. After attachment to the carrier, the wear layer is detached from the rest of the subcarrier.
- the subcarrier is used for the preferred
- separation wedges are formed before the attachment of the wear layer along which the wear layer is removed after fastening to the support. This can be achieved for example by implantation of ions, wherein the position of the separation nuclei and thus the thickness of the wear layer after detachment via the energy of the
- the detachment is preferably carried out by heating the composite of carrier and auxiliary carrier.
- the composite substrate with the semiconductor layer sequence is singulated into a plurality of semiconductor chips.
- the singulation can be done, for example, by means of coherent radiation, mechanically or chemically.
- the composite substrate mechanically stabilizes the semiconductor layer sequence.
- the composite substrate can remain completely or at least partially in the component and fulfill the function of a radiation conversion element.
- the carrier is thinned after depositing the semiconductor layer sequence.
- the carrier can therefore have a greater thickness than in the finished
- the thinning can be done before or after the singulation of the composite substrate.
- the semiconductor chip is preferably already electrically contacted during thinning, so that the color location of the radiation emitted by the semiconductor chip, in particular for each semiconductor chip individually and separately,
- Semiconductor chips are for making one up composite substrate described or a
- Figures 1A and 1B show a first and second embodiment, respectively, of a composite substrate in schematic section;
- Figures 2A to 2E an embodiment of a
- Figures 3A and 3B show an embodiment of a
- FIGS. 4A and 4B show a second exemplary embodiment of a semiconductor chip with a composite substrate (FIG. 4A) and a component with such a semiconductor chip (FIG. 4B), each in a schematic sectional view; and FIGS. 5A to 5C show an exemplary embodiment of a method for producing a plurality of semiconductor chips schematically illustrated in sectional view
- a first exemplary embodiment of a composite substrate is shown schematically in a sectional view in FIG. 1A.
- Composite substrate 1 has a carrier 2 and a wear layer 5. Between the carrier and the wear layer is a
- Dielectric connection layer 3 is arranged.
- Carrier 2 facing away from the wear layer is as a Abscheichtoberber Diagram for epitaxial deposition
- the carrier 2 comprises a radiation conversion material, for example a luminescent or phosphorescent material.
- the carrier may be formed as a ceramic, in which the radiation conversion material for producing the carrier in the form of phosphor particles is assembled into a ceramic, for example by sintering.
- Radiation conversion material further particles and / or
- additives can completely escape from the carrier during production or at least partially remain in the carrier.
- a ceramic-based support is preferably formed largely by the radiation conversion material.
- the carrier contains the
- Radiation conversion material to a volume fraction of at least 75%, more preferably of at least 90%.
- a ceramic with a radiation conversion material and a method for producing such a ceramic is described in the document WO 2010/045915, whose
- a radiation conversion material is particularly suitable with rare earth metals, such as Ce, garnet doped, for example, Y 3 (Al, Ga) 5 O12.
- the support may include at least one of rare earth activated alkaline earth sulfides, rare earth activated thiogallates, rare earth activated aluminates, and rare earth metals
- rare earth activated oxynitrides and rare earth activated aluminum oxynitrides, rare earth activated silicon nitrides.
- the carrier may comprise a matrix material, for example a glass into which the
- Radiation conversion material is embedded.
- the radiation conversion material and the glass are
- Volume fraction of the radiation conversion material in this case is preferably between 5% inclusive and 30% inclusive.
- the dielectric compound layer 3 preferably contains an oxide, for example silicon oxide, a nitride,
- silicon nitride for example, silicon nitride, or an oxynitride
- silicon oxynitride for example, silicon oxynitride.
- the refractive index is adjustable by varying the nitrogen content between about 1.45 and 2.5, with the
- Refractive index is higher, the greater the nitrogen content.
- composition of the dielectric connection layer 3 may be in the vertical direction, ie in a direction perpendicular to a main extension plane of the composite substrate 1
- the dielectric connecting layer 3 preferably has a higher refractive index on the side facing the wear layer 5 than on the side facing the carrier 2.
- the refractive index may decrease continuously or stepwise toward the wearer.
- silicon oxynitride not only increases the refractive index, but also the increasing nitrogen content
- the wear layer 5 is preferably designed such that it is suitable for the deposition of III-V
- the wear layer 5 is based on a nitridic
- the slot layer may also contain or consist of another material, in particular another semiconductor material such as, for example, silicon, silicon carbide, gallium phosphide or gallium arsenide, or consist of such a material.
- another semiconductor material such as, for example, silicon, silicon carbide, gallium phosphide or gallium arsenide, or consist of such a material.
- the composite substrate 1 has a
- Connecting layer 3 is formed. Alternatively or
- an interface between the wear layer and the dielectric connection layer 3 can also be structured.
- the structuring 25 can, for example, by means of a
- the structuring is in particular intended to reduce the waveguide effects of radiation irradiated into the composite substrate 1 and / or radiation converted by means of the radiation conversion material.
- the structuring 25 can fulfill the function of an optical element, for example a lens or a diffraction grating.
- the structuring and / or the optical element may alternatively or additionally also be formed on the side of the carrier 2 facing away from the wear layer 5.
- FIGS. 2A to 2E show a first exemplary embodiment of the production of a composite substrate on the basis of FIG
- a semiconductor material 50 is provided on an auxiliary carrier 4.
- the auxiliary carrier 4 is used in particular for the epitaxial deposition of
- Semiconductor material 50 for example by MBE or MOCVD.
- separation nuclei 51 are formed by implantation of ions, for example hydrogen ions (represented by arrows in FIG. 2B).
- the separating germs extend in a plane parallel to a surface facing away from the auxiliary carrier 4
- Semiconductor material 50 extends.
- the energy of the ions determines the penetration depth of the ions into the ions
- the thickness is preferably at most 1 ⁇ m, preferably between 10 nm and 500 nm inclusive, particularly preferably between 10 nm and 200 nm inclusive.
- a first dielectric sub-layer 31 is deposited, which in the finished Composite substrate a part of the dielectric
- Connecting layer 3 represents.
- the carrier 2 is provided with a second dielectric
- the dielectric sub-layers 31, 32 are by direct bonding, for example by
- An adhesion layer such as an adhesive layer or a solder layer is for the
- the subcarrier 4 is detached with a portion of the semiconductor material 50 along the separation nuclei. This is preferably thermally induced. The remaining on the carrier 2
- Composite Substrate 1 (FIG. 2E).
- the subcarrier after peeling, may be used to make additional composite substrates
- Deposition on the submount is not required in this case.
- FIG. 3A A first exemplary embodiment of a semiconductor chip is shown in a schematic sectional view in FIG. 3A.
- the Semiconductor chip 10 has, by way of example, a composite substrate 1 which is as described in connection with FIG. 1A
- a semiconductor body 7 with a semiconductor layer sequence 700 is arranged on the composite substrate 1.
- Semiconductor layer sequence which forms the semiconductor body, has an active region 70, which is arranged between a first semiconductor layer 71 and a second semiconductor layer 72.
- the first semiconductor layer 71 and the second semiconductor layer 72 are expediently different from each other in terms of their conductivity type.
- the first semiconductor layer 71 may be n-type and the second
- Semiconductor layer 72 may be p-type or
- Semiconductor layer 72 are each electrically connected to a first contact 81 and a second contact 82.
- the contacts 81, 82 are provided for external electrical contacting of the semiconductor chip 10.
- charge carriers from different sides can be injected into the active region 70 via the contacts and recombine there with emission of radiation of a first wavelength range.
- the radiation of the first wavelength range is in
- the active region 70 for generating radiation in the blue spectral range and the Radiation conversion material in the carrier 2 to
- Radiation conversion can be provided in radiation in the yellow spectral range, so that emerges from the semiconductor chip 10 for the human eye appearing white mixed light. The radiation conversion thus already takes place in the semiconductor chip itself. In contrast to a component in which
- Radiation conversion material is embedded in a cladding or in which a radiation conversion element is attached to the semiconductor chip by means of an adhesion layer, the radiation does not pass through prior to the radiation conversion material with a relatively low refractive index, such as silicone. Because of the high refractive indices of the dielectric connecting layer 3, which separates the radiation conversion material of the carrier 2 from the semiconductor material of the semiconductor chip 10, the radiation conversion material is optically particularly efficiently bonded to the semiconductor material. Furthermore, the
- Connection layer 3 of silicon oxide about ten times as high as in a silicone layer with 1 ⁇ thickness.
- Component 100 with such a semiconductor chip is shown schematically in sectional view in FIG. 3B.
- the semiconductor chip 10 is attached to a connection carrier 9.
- the first contact 81 and the second contact 82 are in each case electrically conductive with a first connection surface 91 or a second connection surface 92
- PCB printed circuit board
- submount intermediate carrier
- ceramic carrier for example a ceramic carrier
- housing body for a PCB
- first connection surface 91 and the second connection surface 92 may be formed by a leadframe.
- the semiconductor chip 10 is in an encapsulation 95
- the encapsulation is expediently transparent or at least translucent for the radiation emitted by the semiconductor chip 10.
- the encapsulation may be free of radiation conversion material, since this is already contained in the carrier 2 of the composite substrate 1.
- a silicone, an epoxy or a hybrid material with a silicone and an epoxy is particularly suitable.
- Radiation conversion material can in particular for
- Component 100 may be provided radiated radiation.
- the semiconductor chip 10 is arranged in flip-chip geometry on the connection carrier 9, that is to say that the composite substrate 1 is arranged on the side of the semiconductor layer sequence 7 facing away from the connection carrier 9.
- the carrier 2 thus forms a top side, thus facing away from the connection carrier,
- the composite substrate remains completely or at least partially in the semiconductor chip.
- the carrier 2 can thus the semiconductor body 7 mechanically
- the thickness of the carrier 2 is preferably between
- the carrier may also have a greater thickness.
- the risk of bending the carrier at the comparatively high temperatures for epitaxial deposition can thus be reduced.
- a thick support is thinned after deposition to said thickness.
- About the thickness of the color of the radiated from the finished semiconductor chips radiation is adjustable.
- the carrier can be thinned, for example mechanically, for example by means of grinding, lapping or polishing or chemically, for example wet-chemically or
- the color locus of be adjusted individually emitted by the semiconductor chip radiation. If necessary, the
- Semiconductor chip also be provided for adjusting the color locus with a coating, which also
- Radiation conversion material may contain.
- the second exemplary embodiment for a semiconductor chip 10 shown in FIG. 4A essentially corresponds to the first embodiment described in connection with FIG. 3A
- a mirror layer 96 is formed, which is intended to reflect the radiation generated in the active region 70 radiation.
- the preferably metallic mirror layer 96 has
- Radiation conversion material converted radiation to a high reflectivity.
- the visible spectral range for example, aluminum or silver is suitable.
- radiation-permeable contact layer 821 is formed, via which the charge carriers injected into the second contact 82 can be impressed over a large area and uniformly into the second semiconductor layer 72.
- the radiation-transmissive contact layer 821 contains
- the radiation-transmissive contact layer may be a metal layer that is so thin that they are suitable for the
- Semiconductor chip generated radiation is permeable.
- connection carrier 9 Semiconductor chip, in particular for a mounting, in which the mirror layer 96 faces the connection carrier 9.
- the electrically conductive connection of the contacts 81, 82 with the pads 91, 92 can be made via connecting conductors 97, for example via wire bonds.
- FIGS. 5A to 5C An exemplary embodiment of a method for producing a semiconductor chip is shown in FIGS. 5A to 5C
- a composite substrate having a support 2 containing radiation conversion material, a dielectric connection layer 3 and a wear layer 5 is provided.
- Compound substrate 1 shown in the figures from which in the production of the semiconductor chips, two semiconductor chips
- Adhesion layer such as an adhesive layer or a solder layer keeps the dielectric compound layer the typical Temperatures at the epitaxy, for example, between 700 ° C and 1100 ° C stood, so that the carrier 2 the
- Semiconductor layer sequence during deposition can stabilize mechanically.
- Semiconductor layer 71 partially exposed. This can be carried out in particular chemically, for example wet-chemically or dry-chemically.
- radiation-permeable contact layer and the mirror layer 96 is preferably carried out by means of vapor deposition or
- a singulation in semiconductor chips for example by means of laser radiation, mechanically, for example by means of sawing or chemically, for example by means of wet-chemical or dry chemical etching.
- Radiation conversion material contains.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
Description
Claims
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP11805000.4A EP2659523A1 (de) | 2010-12-28 | 2011-12-16 | Verbundsubstrat, halbleiterchip mit verbundsubstrat und verfahren zur herstellung von verbundsubstraten und halbleiterchips |
JP2013545230A JP2014501447A (ja) | 2010-12-28 | 2011-12-16 | 複合基板、複合基板を有する半導体チップ、並びに複合基板及び半導体チップの製造方法 |
US13/883,730 US9123528B2 (en) | 2010-12-28 | 2011-12-16 | Composite substrate, semiconductor chip having a composite substrate and method for producing composite substrates and semiconductor chips |
CN201180063542.8A CN103262268B (zh) | 2010-12-28 | 2011-12-16 | 用于制造多个半导体芯片的方法 |
KR20157002312A KR20150031449A (ko) | 2010-12-28 | 2011-12-16 | 복합 기판, 복합 기판을 포함하는 반도체 칩 및, 복합 기판과 반도체 칩의 제조 방법 |
KR1020137019929A KR101526090B1 (ko) | 2010-12-28 | 2011-12-16 | 복합 기판, 복합 기판을 포함하는 반도체 칩 및, 복합 기판과 반도체 칩의 제조 방법 |
US14/739,684 US9997671B2 (en) | 2010-12-28 | 2015-06-15 | Composite substrate, semiconductor chip having a composite substrate and method for producing composite substrates and semiconductor chips |
Applications Claiming Priority (4)
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DE102010056447 | 2010-12-28 | ||
DE102010056447.8 | 2010-12-28 | ||
DE102011012298.2 | 2011-02-24 | ||
DE201110012298 DE102011012298A1 (de) | 2010-12-28 | 2011-02-24 | Verbundsubstrat, Halbleiterchip mit Verbundsubstrat und Verfahren zur Herstellung von Verbundsubstraten und Halbleiterchips |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/883,730 A-371-Of-International US9123528B2 (en) | 2010-12-28 | 2011-12-16 | Composite substrate, semiconductor chip having a composite substrate and method for producing composite substrates and semiconductor chips |
US14/739,684 Continuation US9997671B2 (en) | 2010-12-28 | 2015-06-15 | Composite substrate, semiconductor chip having a composite substrate and method for producing composite substrates and semiconductor chips |
Publications (1)
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WO2012089540A1 true WO2012089540A1 (de) | 2012-07-05 |
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PCT/EP2011/073134 WO2012089540A1 (de) | 2010-12-28 | 2011-12-16 | Verbundsubstrat, halbleiterchip mit verbundsubstrat und verfahren zur herstellung von verbundsubstraten und halbleiterchips |
Country Status (7)
Country | Link |
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US (2) | US9123528B2 (de) |
EP (1) | EP2659523A1 (de) |
JP (1) | JP2014501447A (de) |
KR (2) | KR101526090B1 (de) |
CN (1) | CN103262268B (de) |
DE (1) | DE102011012298A1 (de) |
WO (1) | WO2012089540A1 (de) |
Families Citing this family (4)
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JP6694650B2 (ja) * | 2015-09-01 | 2020-05-20 | ローム株式会社 | 半導体発光素子 |
US11369746B2 (en) * | 2017-05-09 | 2022-06-28 | Novo Nordisk A/S | Flexible electronic label device |
DE102017114467A1 (de) | 2017-06-29 | 2019-01-03 | Osram Opto Semiconductors Gmbh | Halbleiterchip mit transparenter Stromaufweitungsschicht |
KR102110514B1 (ko) | 2018-11-21 | 2020-05-13 | (주)알씨디에이치 | 원전 dc 전원공급장치용 스트링 |
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- 2011-12-16 JP JP2013545230A patent/JP2014501447A/ja active Pending
- 2011-12-16 CN CN201180063542.8A patent/CN103262268B/zh not_active Expired - Fee Related
- 2011-12-16 KR KR1020137019929A patent/KR101526090B1/ko not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
---|---|
DE102011012298A1 (de) | 2012-06-28 |
KR101526090B1 (ko) | 2015-06-04 |
US20140203413A1 (en) | 2014-07-24 |
CN103262268A (zh) | 2013-08-21 |
JP2014501447A (ja) | 2014-01-20 |
US9123528B2 (en) | 2015-09-01 |
KR20150031449A (ko) | 2015-03-24 |
US20150287883A1 (en) | 2015-10-08 |
CN103262268B (zh) | 2016-09-21 |
EP2659523A1 (de) | 2013-11-06 |
KR20130102117A (ko) | 2013-09-16 |
US9997671B2 (en) | 2018-06-12 |
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