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WO2011121715A1 - Procédé de décodage d'image - Google Patents

Procédé de décodage d'image Download PDF

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Publication number
WO2011121715A1
WO2011121715A1 PCT/JP2010/055640 JP2010055640W WO2011121715A1 WO 2011121715 A1 WO2011121715 A1 WO 2011121715A1 JP 2010055640 W JP2010055640 W JP 2010055640W WO 2011121715 A1 WO2011121715 A1 WO 2011121715A1
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WIPO (PCT)
Prior art keywords
block
data
blocks
pattern data
order
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PCT/JP2010/055640
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English (en)
Japanese (ja)
Inventor
竹島　秀則
浅野　渉
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株式会社 東芝
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Priority to PCT/JP2010/055640 priority Critical patent/WO2011121715A1/fr
Priority to PCT/JP2010/071155 priority patent/WO2011121843A1/fr
Priority to JP2012508020A priority patent/JPWO2011121843A1/ja
Priority to CN2010800376170A priority patent/CN102484716A/zh
Priority to KR1020127004738A priority patent/KR20120043014A/ko
Publication of WO2011121715A1 publication Critical patent/WO2011121715A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/44—Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/30—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using hierarchical techniques, e.g. scalability
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards

Definitions

  • the present invention relates to a method for decoding an image stored on a disk, for example, an image decoding method for receiving and reproducing an image by broadcasting or streaming.
  • H.264 (for example, Non-Patent Document 1) is known.
  • H. H.264 is a standard that defines a decoding method.
  • H. In H.264 a residual (prediction error) in intra-frame and inter-frame prediction is converted by a predetermined orthogonal transform, and the transform coefficient is quantized and encoded.
  • the size of the orthogonal transform either a 4 ⁇ 4 pixel block or an 8 ⁇ 8 pixel block is used depending on the encoding mode.
  • the coefficient of the orthogonal transform often becomes zero due to quantization. So H.
  • a 1-bit flag indicating whether all transform coefficients are zero is encoded, and when all transform coefficients are zero, encoding of transform coefficients is skipped. .
  • This flag indicates that all coefficients are zero if the value is 0, and that there is at least one non-zero coefficient if the value is 1.
  • CBF coded block block flag
  • CBP coded block pattern
  • CBP is encoded for a block of 16 ⁇ 16 pixels
  • this CBP is composed of four 8 ⁇ 8 pixel luminance signal (Luminance) blocks and all two color difference signal (Chrominance) blocks corresponding to the block of 16 ⁇ 16 pixels. Represents whether or not the conversion coefficient is zero.
  • information (CBP and CBF) indicating whether or not the transform coefficient is 0 is hierarchically encoded.
  • ITU-T Telecommunication Standardization-Sector-International-Telecommunication Union
  • Recommendation-H.264 -"Advanced-video-coding-for-generic-audiovisual-services",-2007.-(p.95-p.96-"coded_block_pattern", "p.101-” coded_block_flag "
  • An object of the present invention is to provide an image decoding method for decoding when data compressed by an encoding unit that eliminates redundancy in encoding of hierarchical CBP, CBF, and skip flag is given. That is.
  • the image decoding method of the present invention includes prediction information in units of blocks, coded pattern data indicating the presence or absence of a prediction residual signal in units of blocks, and prediction residual signals in units of blocks.
  • the information included in the bitstream is lower-order code pattern data that is code pattern data belonging to the higher-order code pattern data, and the combination of the already acquired higher-order code pattern data and the lower-order code pattern data is a specific combination.
  • a predetermined code as lower-order code pattern data in the case of a combination, a step of decoding the bitstream and obtaining the next lower-order code pattern data when not in the specific combination, and a block unit by the codet pattern data Determining whether or not there is a prediction residual signal in step B, and if the information included in the bit stream is prediction information in units of blocks, decoding the bit stream to obtain prediction information in units of blocks; When the information included in the bitstream is a prediction residual signal in units of blocks, decoding the bitstream to obtain a prediction residual signal in units of blocks; prediction information in units of blocks; And using the prediction residual signal in block units Characterized by comprising the steps of decoding an image signal.
  • an image decoding method for decoding when data compressed by an encoding unit that eliminates redundancy in encoding of hierarchical CBP, CBF, and skip flag is given. be able to.
  • FIG. 6 is a block diagram of an encoding device that performs the operation of FIG. 5.
  • movement of FIG. The figure which shows an example of the decoding method of hierarchical CBP of this Embodiment.
  • the figure which shows another example of FIG. The figure which shows an example of the decoding method which reversed the conditional branch of FIG.
  • H An encoding means for generating data that can be decoded by H.264 will be briefly described.
  • This encoding means for example, as shown in FIG. 1, is an integer-precision orthogonal transform that is an approximation of intra-frame prediction (Intra prediction), inter-frame prediction (Inter prediction), or discrete cosine transform (DCT).
  • Intra prediction intra-frame prediction
  • Inter prediction inter-frame prediction
  • DCT discrete cosine transform
  • CABAC Context-based Adaptive Binary Arithmetic Code
  • CAVLC variable length coding
  • the image decoding method of the present embodiment aims to decode such compressed data.
  • the upper skip flag is 0, encoding is performed while avoiding the assignment of codes to redundant combinations in which the lower skip flags are all 1.
  • the image decoding method according to the present embodiment decodes such compressed data.
  • coded pattern data (Reduce redundancy of hierarchical CBP, encoder)
  • coded pattern data data that summarizes flags for a plurality of 8 ⁇ 8 pixel or 16 ⁇ 16 pixel blocks corresponds to CBP, and a flag for one 4 ⁇ 4 pixel block corresponds to CBF.
  • the coded pattern data corresponding to the upper one block is called upper_flag
  • the i-th lower coded pattern data belonging to the upper one block is called lower_flags [i].
  • upper_flag and lower_flags [i] are 1 bit in CodedBlockPatternLuma and the remaining of the i-th 4 ⁇ 4 pixel block, respectively.
  • coded_block_flag for the difference signal corresponds to coded_block_flag for the difference signal.
  • MPEG-1 / 2/4 compressed video decoding standard and H.264 In the decoding process defined in many standards such as H.264, the image is divided in units of blocks, and then the decoding process is performed in units of blocks. Therefore, in the following description, an example of a process of encoding (encoding) in units of blocks and an example of a process of decoding (decoding) in units of blocks will be described.
  • the processing of the entire screen can be performed by repeating the processing for each block by the number of divided blocks.
  • a means for improving the compression ratio by reducing the amount of code corresponding to a specific pattern is provided, and generated by such means.
  • Decoded bitstream is decoded.
  • a specific example of a specific pattern (when the lower order is 4 bits) is shown in FIG. 2, and an example of simple hierarchical code pattern data corresponding to FIG. 2 (when the lower order is 4 bits) is shown in FIG. 3 is used in H.264 of Non-Patent Document 1).
  • the low-order code pattern data is 4 bits. However, it is not particularly required to be 4 bits. For example, 2 bits shown in FIG. 4 may be used. In the case of 2 bits, if it is found that the upper code pattern data is 1 and the first 1 bit is 0 in the 2-bit lower code pattern, the last 1 bit may be 1. Recognize. Therefore, in this case as well, there is a case where it is not necessary to encode one bit in encoding and it is not necessary to decode one bit in decoding encoded data.
  • FIG. 5 shows a flowchart showing the process of encoding CBP in block units
  • FIG. 6 shows an example of an apparatus used for encoding.
  • the coding pattern data can be encoded by the following method, for example. In the following description, step 3 and step 11 which are encoding of portions other than the codet pattern data will be described.
  • Step 1 The image input unit 601 reads an image block.
  • the block to be read here is typically assumed to have the same size or larger size (for example, 16 ⁇ 16 pixels) than the block corresponding to the higher-order code pattern data in step 5.
  • Step 2 The calculation unit 602 reads from the program memory 605 the prediction mode to be encoded for the block read in S501.
  • the prediction mode may be determined in advance, or the best mode may be selected by performing step S503 and subsequent steps in each of a plurality of prediction modes. There are many other variations for setting the prediction mode.
  • Step 3 The arithmetic unit 602 encodes the prediction mode, and the encoded data output unit 604 outputs it to the bit stream.
  • Step 4. The arithmetic unit 602 performs block prediction using the prediction mode and data that has already been decoded, and obtains a prediction residual that is the difference between the input image block and the predicted image block.
  • Step 5 The arithmetic unit 602 performs block transform (for example, KLT base generated by training data in advance or orthogonal transform using DCT base) and quantization on the prediction residual.
  • block transform for example, KLT base generated by training data in advance or orthogonal transform using DCT base
  • the arithmetic unit 602 calculates information representing whether or not non-zero coefficients exist in the quantized transform coefficients in units of blocks.
  • this information is 1-bit flag information for each block, which is 1 when a non-zero coefficient exists in the block and 0 when all the coefficients in the block are 0. This information is referred to as lower-order code pattern data (lower-order CBP or CBF).
  • higher-order code pattern data which is code pattern data for a larger block, represents information indicating whether or not a set of lower-order code pattern data (for example, four lower-order code pattern data) is all zero.
  • the high-order code pattern data is 1 bit for each block, 0 if the low-order code pattern data is all 0, and 1 if there is any non-zero information in the low-order code pattern data. It becomes flag information.
  • the size of the block corresponding to the high-order code pattern data is larger than the low-order code pattern data (for example, 8 ⁇ 8 pixels).
  • Step 6 The arithmetic unit 602 encodes the high-order code pattern data, and the encoded data output unit 604 outputs it to the bit stream.
  • Step 7. The arithmetic unit 602 skips Steps 8 to 10 if the higher-order code pattern data is 0, and executes Step 8 if not.
  • Step 8 to 10 are processes in which the lower code pattern data is encoded bit by bit.
  • the arithmetic unit 602 is a case where the already encoded lower-order code pattern data is specific pattern data (typically, the last one-bit lower-order code pattern data is encoded, and If all the encoded lower-order code pattern data is 0), step 9 for outputting to the next bit stream is skipped; otherwise, step 9 is executed.
  • Step 9 the arithmetic unit 602 encodes lower-order code pattern data to be encoded, and the encoded data output unit 604 outputs it to the bit stream.
  • Step 10 The arithmetic unit 602 proceeds to step 11 if all the lower-order code pattern data have been encoded, and returns to step 8 if not.
  • the number of times of rotation is determined according to the number of bits.
  • Step 11 The encoded data output unit 604 encodes the quantized transform coefficient for a block having non-zero coded pattern data, and outputs the result to a bit stream.
  • step 3 may be prior to S501 and S502.
  • the encoder can improve the compression rate by, for example, repeatedly trying steps 2 to 11 while switching the prediction mode to be encoded and then selecting a prediction mode with good encoding efficiency.
  • repetition is not essential, and the prediction mode may be determined based on another criterion.
  • the encoding apparatus includes an image input unit 601, an arithmetic unit 602, a data memory 603, an encoded data output unit 604, and a program memory 605.
  • the image input unit 601 reads an image block.
  • the arithmetic unit 602 encodes the image block read by the image input unit 601 with reference to the data memory 603 and the program memory 605.
  • the data memory 603 is a temporary storage device, and temporarily stores, for example, a frame before the currently processed frame.
  • the data memory 603 is a RAM, for example.
  • the program memory 605 stores a program for encoding.
  • the program memory 605 is, for example, a ROM or a RAM.
  • the encoded data output unit 604 outputs the encoded data to a bit stream.
  • FIG. 7 shows an example of a flowchart of a method for decoding the bit stream generated by the above method (decoding of CBP in units of blocks), and FIG. 8 shows an example of an apparatus for executing the decoding.
  • the decoding of the coded pattern data can be performed by, for example, the following steps 1 to 10.
  • Step 1 The encoded data input unit 801 inputs a bit stream as input data.
  • the bit stream includes prediction information in units of blocks, coded pattern data indicating the presence / absence of a prediction residual signal in units of blocks, and image data obtained by entropy encoding the prediction residual signal in units of blocks.
  • Step 2 the arithmetic unit 802 determines whether the data to be acquired is higher-order code pattern data (for example, higher-order CBP), and if it is determined that the data is higher-order code pattern data, step S702 If not, jump to step 4.
  • higher-order code pattern data for example, higher-order CBP
  • Step 3 The arithmetic unit 802 obtains higher-order code pattern data by entropy decoding. Jump to step 9.
  • Step 4. the arithmetic unit 802 determines whether the data to be acquired is low-order code pattern data (for example, low-order CBP or low-order CBF) that is code pattern data belonging to the high-order code pattern data. If it is determined that the code pattern data is lower order, the process jumps to step 6; otherwise, the process jumps to step 5.
  • low-order code pattern data for example, low-order CBP or low-order CBF
  • Step 5 the data to be acquired by the arithmetic unit 802 (other than the coded pattern data) is acquired and the process jumps to Step 9.
  • Step 6 The arithmetic unit 802 determines whether the already acquired lower-order code pattern data is a predetermined pattern. If it is a predetermined pattern, the operation unit 802 jumps to step 7, otherwise. Jump to step 8.
  • the predetermined pattern is that the lower-order code pattern data is 4 bits, and the lower-order code pattern data has already been acquired in 3 bits, and the next data to be acquired is It is the 4th bit code pattern data, and indicates the pattern in which 3 bits already acquired is 000.
  • Step 7 the arithmetic unit 802 sets a predetermined fixed value as lower-order code pattern data to be acquired, and jumps to step 9 after the setting. For example, in the example of FIG. 2, 1 is set as the fourth bit code pattern data to be acquired next.
  • Step 9 The arithmetic unit 802 determines whether or not the acquisition of the block information has been completed. If the acquisition has been completed, the process jumps to Step 10, and if not, the process jumps to Step 2.
  • Block information indicates decoded prediction information in units of blocks and prediction residual signals in units of blocks. That is, although not explicitly shown in this flow, when the information included in the bitstream is prediction information in units of blocks, there is a step of decoding the bitstream to obtain prediction information in units of blocks, which is included in the bitstream. If the information to be received is a prediction residual signal in units of blocks, there is a step of obtaining a prediction residual signal in units of blocks by decoding the bit stream.
  • Step 10 The arithmetic unit 802 restores the block image signal based on the acquired block information, and the image output unit 804 outputs the restored image.
  • the decoding apparatus includes an encoded data input unit 801, an arithmetic unit 802, a data memory 803, an image output unit 804, and a program memory 805.
  • the encoded data input unit 801 inputs a bit stream as input data.
  • the arithmetic unit 802 decodes the blocks included in the bit stream input by the encoded data input unit 801 with reference to the data memory 603 and the program memory 605 while determining the block breaks.
  • the data memory 803 is a temporary storage device, and temporarily stores, for example, the bit stream input by the encoded data input unit 801.
  • the program memory 805 stores a program for decoding and stores, for example, a program corresponding to the pseudo program shown in FIG. 9 or FIG.
  • FIG. 9 shows an example of the syntax of the decoding method when the lower-order code pattern data is a 4-bit hierarchical CBP.
  • FIG. 9 shows the decoding method when the lower-order code pattern data is a num_lower_blocks-bit hierarchical CBP.
  • An example of the syntax is shown in FIG. 9 and 10, a line indicated as ae (v) indicates that 1-bit information is acquired by entropy decoding (for example, CABAC), and a line that does not indicate that the line is executed.
  • “(Upper_flag is ready decoded)” indicates that the upper-level code pattern data has already been acquired as upper_flag.
  • “(Other decoding processes, optional)” indicates that if other syntax processing is necessary, the syntax processing is executed.
  • the conditional branch determination for determining whether the coded pattern data is a specific combination can be reversed. An example in which the conditional branch determination in FIG. 9 is reversed is shown in FIG. The same applies to other figures.
  • coded_block_flag that is coded pattern data corresponding to a block of 4 ⁇ 4 pixels is the first coded_block_flag, and when the first coded_block_flag is non-zero, the first conversion coefficient, the second coded_block_flag, and the second coded_block are In the case of non-zero, the second transform coefficient is decoded together with the transform coefficient.
  • the syntax is as shown in FIG. It can be expressed as follows.
  • FIG. 12 shows an example of a method for decoding a CBF of a 4 ⁇ 4 pixel block when the CBP corresponding to the block of 8 ⁇ 8 pixels is non-zero.
  • an argument blockIndex represents an index when a 4 ⁇ 4 pixel block being processed has a leading block of 0 in an 8 ⁇ 8 pixel block including the block, and (decode residual coefficients coeffLevel [i]) represents a conversion coefficient. It represents decoding. Also, before decoding the first 4 ⁇ 4 pixel block, 0 is set to nonzero_coded_block_flag_found. Since there are four 4 ⁇ 4 pixel blocks constituting an 8 ⁇ 8 pixel block, when blockIndex is 3 and other coded_block_flag is 0, coded_block_flag can be set to 1 without decoding. Otherwise, the coded_block_flag needs to be decoded. Although not included in FIG.
  • the size of a block (macroblock) having higher-order code pattern data is 16 ⁇ 16 pixels.
  • an extension of expanding the macroblock size to 32 ⁇ 32 pixels or 64 ⁇ 64 pixels is also conceivable.
  • This is called an extended macroblock.
  • the extended macroblock for example, there are four 16 ⁇ 16 pixel blocks constituting the extended macroblock of 32 ⁇ 32 pixels if only the luminance block is considered, and if there are four luminance blocks and Cb and Cr color difference blocks, there are 12 blocks. Will do. CBP is often 0, and it is desirable to avoid coding 12 flags of 0.
  • coded_block_pattern_32 is 1-bit flag information. If a level 2 extended macroblock of 64 ⁇ 64 pixels is considered as a larger extended macroblock, coded_block_pattern_32 which is a 32 ⁇ 32 pixel CBP constituting the level 2 extended macroblock is all 0, or one or more non-zero bits are set. It is conceivable to encode whether the CBP is possessed.
  • coded pattern data for an extended macroblock of 64 ⁇ 64 pixels is called coded_block_pattern_64, and the four 32 ⁇ 32 pixel blocks constituting the 64 ⁇ 64 pixel block are indexed and coded_block_pattern_32 [0] to coded_block_pattern_32 [3]. ].
  • FIG. 13 shows an example of the flow of processing for decoding coded_block_pattern_64 and coded_block_pattern_32
  • FIG. 14 shows another example. Both figures show an example of a method of decoding a hierarchical CBP in which the size of the upper block is 64 ⁇ 64 pixels, the size of the lower block is 32 ⁇ 32 pixels, and the lower block is 4 bits.
  • FIG. 13 illustrates an example of decoding data in which coded_block_pattern_64 and coded_block_pattern_32 are encoded. In FIG. 13, first, coded_block_pattern_64 is decoded, and when it is not 0, each element of coded_block_pattern_32 is decoded.
  • coded_block_pattern_32 [3] is decoded if at least one of coded_block_pattern_32 [0] to coded_block_pattern_32 [2] is non-zero, but coded_block_pattern_32 [0] to all of coded_block_block_patter_block_patt_p32_patt_patch_block0_32_32_3 In this case, coded_block_pattern_32 [3] is set to 1.
  • FIG. 14 shows an example in which coded_block_pattern_64 and coded_block_pattern_32 in FIG. 13 are expressed as different functions. In FIG.
  • macroblock_cluster_residual_64x64 is a function for decoding a residual of a level 2 extended macroblock of 64x64 pixels
  • macroblock_cluster_residual_32x32 is a function for decoding a residual of an extended macroblock of 32x32 pixels.
  • FIG. 15 shows an example of a syntax for obtaining cbp for 4 ⁇ 4, 8 ⁇ 8, 16 ⁇ 8, 8 ⁇ 16, and 16 ⁇ 16 conversion when a 1-bit luminance CBP for a 16 ⁇ 16 pixel block is given.
  • cur_transform_type when cur_transform_type is 0 or 1, reading corresponding to FIG. 2 is performed, and when cur_transform_type is 2 and the conversion size is 16 ⁇ 8/8 ⁇ 16, reading corresponding to FIG. 4 is performed.
  • cur_transform_type is 2 and the transform size is 16x16
  • the present invention can be used by using the given CBP as it is.
  • “cbp_luma — 1 bit” represents 1-bit luminance CBP
  • “MbPartWidth (mb_type)” and “MbPartHeight (mb_type)” represent prediction block sizes
  • cbp represents 16 ⁇ 16 luminance blocks in four 8 ⁇ 8 blocks.
  • cbp When divided, 4 bits of cbp corresponding to each 8 ⁇ 8 luminance block are represented.
  • cbp is set to 4 bits in accordance with the 8 ⁇ 8 block.
  • the skip mode is a mode in which there is no prediction residual of the direct mode.
  • H.264 it is possible to encode a direct mode in which no prediction residual exists, but in such a case, it is encoded in the skip mode, and it is interpreted that there is always a prediction residual in the direct mode at the time of decoding. It can be seen that the direct mode without the prediction residual is a redundant mode. Therefore, when decoding the hierarchical coded block data in the extended macroblock, only the coded block data having the same size as the block coded as the direct mode is acquired without entropy decoding. A fixed value (1) representing the presence of the prediction residual can be set.
  • a predetermined value is set without decoding higher-order code pattern data from the bitstream.
  • the prediction residual Presence / absence of existence is unknown, and it is necessary to encode and decode the coded block data.
  • the explanation so far has described means for reducing the waste of code block data. With the same means, redundant information can be reduced for the skip flag indicating the skip mode.
  • the skip mode is a flag that becomes 1 when the block is skipped and 0 when it is not.
  • FIG. 16 an example of a simple hierarchical skip flag. This is a table obtained by logically inverting the examples of CBP and CBF described so far. It is redundant for the same reason that the coded block data is redundant. Therefore, as shown in FIG.
  • the upper skip flag is 0 and the lower skip is performed. If the first, second, and third skip flags among the flags are 1, a fixed value of 0 can be used without encoding and decoding the fourth lower skip flag.
  • FIG. 20 shows the flow of a method for encoding a hierarchical skip flag. Encoding is performed in the following flow.
  • Step 1 The image input unit 601 reads an image block.
  • Step 2 The calculation unit 602 reads from the program memory 605 the prediction mode to be encoded for the block read in S501.
  • the prediction mode includes information on a skip flag (Skip).
  • the prediction mode may be determined in advance, or the best mode may be selected by performing step S503 and subsequent steps in each of a plurality of prediction modes. There are many other variations for setting the prediction mode.
  • Step 3 The arithmetic unit 602 encodes the upper skip flag, and the encoded data output unit 604 outputs it to the bit stream.
  • Step 4 This step executes the next conditional branch. If the upper skip flag is 1, the arithmetic unit 602 skips steps 5 to 9. Otherwise, step 5 is executed.
  • Step 5 The arithmetic unit 602 encodes an upper prediction mode other than the skip flag, and outputs the encoded prediction mode from the encoded data output unit 604 to a bit stream.
  • Step 6 to 8 are processes for encoding one bit of the lower skip flags.
  • the next conditional branch is executed.
  • the arithmetic unit 602 uses the encoding of the low-order skip flag that has already been encoded as the specific pattern data (typically, the encoding of the low-order skip flag of the last 1 bit and the encoding If all the skipped lower flags are 1), step 7 to be output to the next bit stream is skipped; otherwise, step 7 is executed.
  • Step 7 The arithmetic unit 602 encodes the low-order skip flag to be encoded, and outputs it from the encoded data output unit 604 to the bit stream.
  • Step 8. The arithmetic unit 602 encodes a lower prediction mode other than the skip flag, and outputs it from the encoded data output unit 604 to a bit stream. Also, if there is residual information, the arithmetic unit 602 encodes the residual information and outputs it from the encoded data output unit 604 to a bit stream.
  • Step 9 If all the lower blocks (including the lower skip flag) have been encoded, the arithmetic unit 602 ends the block encoding. Otherwise, go back to step 6 to encode the next lower block.
  • the number of turns depends on the number of lower-order blocks belonging to the higher-order block. For example, if the lower-order block is divided into four, it is turned only four times.
  • the encoder for example, can improve the compression rate by repeatedly selecting the prediction mode with good encoding efficiency after repeatedly trying steps 2 to 9 while switching the prediction mode to be encoded.
  • the prediction mode may be determined based on another criterion.
  • FIG. 18 shows an example of the decoding flow of the block-by-block skip flag corresponding to FIG.
  • the flow in FIG. 18 differs from FIG. 7 in that the CBP in S702 to S708 is replaced with a skip flag in S1802 to S1808 (indicated as skip in FIG. 18).
  • the corresponding syntax is, for example, as shown in FIG. FIG. 19 is an example of flag reduction using this embodiment for hierarchical skip flags.
  • the instructions shown in the processing procedure shown in the above-described embodiment can be executed based on a program that is software.
  • a general-purpose computer system stores this program in advance and reads this program, so that it is possible to obtain the same effects as those obtained by the image decoding method and the image encoding method of the above-described embodiment.
  • the instructions described in the above-described embodiments are, as programs that can be executed by a computer, magnetic disks (flexible disks, hard disks, etc.), optical disks (CD-ROM, CD-R, CD-RW, DVD-ROM, DVD). ⁇ R, DVD ⁇ RW, etc.), semiconductor memory, or a similar recording medium.
  • the storage format may be any form. If the computer reads the program from the recording medium and causes the CPU to execute instructions described in the program based on the program, the computer performs the same operation as the image decoding method and the image encoding method of the above-described embodiment. Can be realized. Of course, when the computer acquires or reads the program, it may be acquired or read through a network.
  • the OS operating system
  • database management software database management software
  • MW middleware
  • the storage medium in the present invention is not limited to a medium independent of a computer or an embedded system, but also includes a storage medium in which a program transmitted via a LAN or the Internet is downloaded and stored or temporarily stored.
  • the number of storage media is not limited to one, and the processing in the present embodiment is executed from a plurality of media, and the configuration of the media is included in the storage media in the present invention.
  • the computer or the embedded system in the present invention is for executing each process in the present embodiment based on a program stored in a storage medium, and includes a single device such as a personal computer or a microcomputer, Any configuration such as a system in which apparatuses are connected to a network may be used.
  • the computer in the embodiment of the present invention is not limited to a personal computer, but includes an arithmetic processing device, a microcomputer, and the like included in an information processing device, and a device capable of realizing the functions in the embodiment of the present invention by a program, The device is a general term.
  • the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying constituent elements without departing from the scope of the invention in the implementation stage.
  • various inventions can be formed by appropriately combining a plurality of components disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment.
  • constituent elements over different embodiments may be appropriately combined.
  • 601 Image input unit, 602, 802 ... Arithmetic unit, 603, 803 ... Data memory, 604 ... Encoded data output unit, 605, 805 ... Program memory, 801 ... Encoded data input unit, 804 ... Image output unit .

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Abstract

La présente invention se rapporte à un procédé qui comprend : une première étape consistant à entrer des données codées qui comprennent : (1) une donnée de motif codé supérieur indiquant si un signal résiduel de prédiction est présent dans un bloc supérieur comprenant les 1er jusqu'au Nième (N > 1) blocs inférieurs ; (2) une donnée de motif codé inférieur indiquant si un signal résiduel de prédiction est présent dans chaque bloc inférieur depuis le 1er jusqu'au Nième (N > 1) bloc inférieur susmentionné ; et (3) le signal résiduel de prédiction des unités de bloc inférieur susmentionnées ; une deuxième étape consistant à déterminer une valeur prédéterminée comme correspondant à la donnée de motif codé supérieur du Nième bloc inférieur dans les cas où la valeur de la donnée de motif codé supérieur susmentionné est une valeur indiquant qu'un signal résiduel de prédiction est présent dans le bloc supérieur susmentionné et où les valeurs des données de motif codé inférieur susmentionné pour les blocs inférieurs allant du 1er jusqu'au Nième blocs inférieurs sont une combinaison spécifique ; et une troisième étape consistant à acquérir une image décodée du signal résiduel de prédiction dans les données codées susmentionnées pour les blocs parmi les blocs inférieurs allant du 1er jusqu'au Nième blocs inférieurs susmentionnés dans lesquels est présent un signal résiduel de prédiction, selon les données de motif codé inférieur susmentionnées.
PCT/JP2010/055640 2010-03-30 2010-03-30 Procédé de décodage d'image WO2011121715A1 (fr)

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PCT/JP2010/055640 WO2011121715A1 (fr) 2010-03-30 2010-03-30 Procédé de décodage d'image
PCT/JP2010/071155 WO2011121843A1 (fr) 2010-03-30 2010-11-26 Procédé de codage et de décodage d'image
JP2012508020A JPWO2011121843A1 (ja) 2010-03-30 2010-11-26 画像符号化及び画像復号化方法
CN2010800376170A CN102484716A (zh) 2010-03-30 2010-11-26 图像编码以及图像解码方法
KR1020127004738A KR20120043014A (ko) 2010-03-30 2010-11-26 화상 부호화 및 화상 복호화 방법

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JP2015226111A (ja) * 2014-05-26 2015-12-14 キヤノン株式会社 画像処理装置、画像処理装置の制御方法

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CN118540483A (zh) * 2019-04-26 2024-08-23 松下电器（美国）知识产权公司 编码装置、解码装置和非暂时性计算机可读介质

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JP2015065645A (ja) * 2013-09-25 2015-04-09 三菱電機株式会社 画像推定方法
JP2015065644A (ja) * 2013-09-25 2015-04-09 三菱電機株式会社 画像推定方法
JP2015226111A (ja) * 2014-05-26 2015-12-14 キヤノン株式会社 画像処理装置、画像処理装置の制御方法

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KR20120043014A (ko) 2012-05-03
CN102484716A (zh) 2012-05-30
JPWO2011121843A1 (ja) 2013-07-04

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