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WO2011019132A1 - Conductive adhesive, semiconductor mounting method using same, and wafer level package - Google Patents

Conductive adhesive, semiconductor mounting method using same, and wafer level package Download PDF

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Publication number
WO2011019132A1
WO2011019132A1 PCT/KR2010/002390 KR2010002390W WO2011019132A1 WO 2011019132 A1 WO2011019132 A1 WO 2011019132A1 KR 2010002390 W KR2010002390 W KR 2010002390W WO 2011019132 A1 WO2011019132 A1 WO 2011019132A1
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WO
WIPO (PCT)
Prior art keywords
conductive
adhesive
particles
insulating resin
conductive adhesive
Prior art date
Application number
PCT/KR2010/002390
Other languages
French (fr)
Korean (ko)
Inventor
김종민
김주헌
박수현
임병승
Original Assignee
중앙대학교 산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020090075214A external-priority patent/KR101182714B1/en
Priority claimed from KR1020090110523A external-priority patent/KR101637401B1/en
Application filed by 중앙대학교 산학협력단 filed Critical 중앙대학교 산학협력단
Publication of WO2011019132A1 publication Critical patent/WO2011019132A1/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02—Non-macromolecular additives
    • C09J11/04—Non-macromolecular additives inorganic
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J9/00—Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
    • C09J9/02—Electrically-conducting adhesives
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08K—Use of inorganic or non-macromolecular organic substances as compounding ingredients
    • C08K3/00—Use of inorganic substances as compounding ingredients
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    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/00013—Fully indexed content
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    • H01L2924/01006—Carbon [C]
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/01029—Copper [Cu]
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    • H01L2924/01047—Silver [Ag]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0263—Details about a collection of particles
    • H05K2201/0272—Mixed conductive particles, i.e. using different conductive particles, e.g. differing in shape
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0425—Solder powder or solder coated metal powder

Definitions

  • the present invention relates to a conductive adhesive, and more particularly, to ensure sufficient electrical connection between terminals, such as terminals facing each other, and to conventional soldering through metallurgical bonding by melting conductive materials between terminals. Low electrical resistance of the same degree can be obtained, sufficient insulation between adjacent terminals can be applied to ultra-fine pitch, excellent repair characteristics, especially conductive adhesive with improved heat dissipation, semiconductor mounting method and wafer level using the same It's about packages.
  • a conductive adhesive disperses conductive particles such as metals in a resin, and is an electrode bonding material capable of obtaining conductivity between opposing electrodes and insulating properties between adjacent electrodes.
  • the conductive particles contained in the conductive adhesive enable conduction between the counter electrodes, while the insulation contained between the adjacent electrodes is ensured by the resin contained in the conductive adhesive, and the opposing electrodes are adhered to each other to bond the chip and the substrate. It is fixed.
  • the conductive particles are electrically conductive through the physical contact between the metal pads of the upper substrate and the lower substrate, so that the contact resistance is very large, the ultrafine pitch is difficult, and the repair characteristics are inferior.
  • the present invention is to solve the above problems, an object of the present invention is to ensure a sufficient electrical connection between the terminals such as opposing terminals, and through the metallurgical coupling by melting the conductive material between the terminals The same low electrical resistance as soldering can be obtained, and sufficient insulating property between adjacent terminals can be applied to ultrafine pitching, and it has excellent repair characteristics.
  • an object of the present invention is to ensure a sufficient electrical connection between the terminals such as opposing terminals, and through the metallurgical coupling by melting the conductive material between the terminals The same low electrical resistance as soldering can be obtained, and sufficient insulating property between adjacent terminals can be applied to ultrafine pitching, and it has excellent repair characteristics.
  • the present invention includes an insulating layer comprising a meltable conductive layer and an adhesive insulating resin that is not cured at the melting point of the conductive layer, wherein the adhesive layer is attached to the conductive layer and the insulating layer.
  • Heat dissipation particles that do not melt at the temperature at which the insulating resin is cured are optionally included.
  • the semiconductor mounting method of the present invention is a semiconductor mounting method having a plurality of component electrode pads corresponding to the plurality of component electrode pads on a substrate on which a plurality of substrate electrodes are formed, wherein the substrate electrode and the semiconductor chip electrode are formed. Disposing a conductive adhesive therebetween; and heating / pressurizing the conductive adhesive to a temperature that is higher than the melting point of the conductive layer and the curing of the adhesive layer is not completed. And forming a wetting region by spreading on the surfaces of the plurality of opposing semiconductor chip electrodes to enable electrical connection, wherein the adhesive insulating resin is flowed in a state where the curing is not completed, between the circuit board and the semiconductor chip. It is filled with the substrate electrode pad, the semiconductor chip electrode pad and the wetting region Curing step and the adhesive insulating resin to insulate the term junction between those and a step of bonding the circuit board and the semiconductor chip.
  • the conductive adhesive includes an insulating layer including a meltable conductive layer and an adhesive insulating resin that hardening is not completed at the melting point of the conductive layer, wherein the adhesive insulating resin is cured on the conductive layer and the insulating layer. Radiating particles that do not melt at a temperature may be optionally included.
  • the present invention may include a meltable conductive particle, an adhesive insulating resin that hardening is not completed at the melting point of the conductive particle, and heat dissipating particles that are not melted at a temperature at which curing of the adhesive insulating resin is completed.
  • the conductive adhesive may be formed into a paste or a film to be entirely filled, or may be locally filled to each terminal.
  • the semiconductor level package of the present invention is constructed by applying a conductive adhesive to the surface of a wafer on which a semiconductor chip is formed and dicing.
  • the present invention can secure sufficient electrical connection between terminals such as opposite terminals, and has excellent thermal conductivity during the heating / pressing process by the heat-dissipating particles, prevents short circuits by the conductive particles, and generates internally. There is an effect that can easily release the heat.
  • FIG. 1 and 2 is a block diagram of a conductive adhesive according to a first embodiment of the present invention.
  • 3 to 5 are conceptual views illustrating a method for mounting a semiconductor according to a first embodiment of the present invention.
  • FIG. 6 is a block diagram of a conductive adhesive according to a second embodiment of the present invention.
  • FIG. 7 and 8 are conceptual views illustrating a method for mounting a semiconductor according to a second embodiment of the present invention.
  • 9 and 10 are conceptual views illustrating a method of manufacturing a wafer level package according to an embodiment of the present invention.
  • the second component may be referred to as the first component, and similarly, the first component may also be referred to as the second component.
  • 'wetability' refers to a property in which a liquid or a solid spreads on a solid surface, and defines an extent of adhesion, adhesion, or adhesion of an adhesive to a solid surface.
  • 1 to 2 are structural diagrams of a conductive adhesive according to a first embodiment of the present invention.
  • the conductive adhesives 10 and 11 are insulated including a meltable conductive layer 2 and an adhesive insulating resin 5 whose curing is not completed at the melting point of the conductive layer 2.
  • Anisotropic comprising a layer (3), wherein the conductive layer (2) and the insulating layer (3) optionally contain heat-dissipating particles (4) that do not melt at a temperature at which curing of the adhesive insulating resin (5) is completed It consists of a conductive film.
  • the conductive layer 2 and the insulating layer 3 may be alternately stacked, and the number of stacked layers may be even or odd.
  • the conductive layer 2 is meltable at low temperature or high temperature, and is composed of a metal or an alloy and includes at least one sublayer.
  • the conductive layer 2 may include tin (Sn), indium (In), bismuth (Bi), silver (Ag), copper (Cu), zinc (Zn), lead (Pb), and cadmium (Cd). ), One or two or more sublayers containing metals such as gallium (Ga), silver (Ag), tarium (Tl), or one or two or more sublayers containing alloys made of such metals. .
  • the conductive layer 2 may be formed of at least one selected from the group consisting of metals, nonmetals, and alloys having a relatively low melting point, and the low melting point alloy has a melting point (melting point) of 183.
  • Sn-57Bi, Sn-52In, Sn-44In-14Cd, etc. having a lower melting point based on Sn-37Pb, which is °C, Sn-3.5Ag, Sn-2.5Ag-10Sb, Sn-4.7Ag-1.7Cu And the like can be used.
  • the conductive layer 2 is not necessarily limited thereto, and any conductive metal 2 may be used as long as it is melted at a temperature lower than a temperature at which curing of the adhesive insulating resin 5 is completed.
  • the conductive layer 2 may be formed by mixing the above-mentioned metal and the alloy, or may be used by mixing another metal or alloy with the above-mentioned metal or alloy.
  • the conductive layer 2 takes the form of a plate composed of one or a plurality of layers, the conductive layer 2 has an effect of excellent cohesiveness at the time of melting as compared with the case in which the conductive layer 2 is dispersed and formed in the form of conventional particles.
  • the heat radiating particles 4 are selectively included in the conductive layer 2 or the insulating layer 3 to increase the thermal conductivity.
  • the heat dissipation particles 4 may shorten the process time due to rapid heat conduction during heating / pressurization for mounting the semiconductor chip on the substrate, and has an effect of rapidly dissipating heat generated after mounting to the outside.
  • the heat-dissipating particles (4) has a melting point higher than the heating temperature at the time of adhesion to withstand heat and pressure, preferably a material that does not melt at a temperature at which curing of the adhesive insulating resin (5) is completed Can be.
  • the heat dissipation particles 4 may be variously selected from several nm to several tens of micrometers, and may be configured to be smaller than the final bonding distance between the substrate and the electrode of the electronic material.
  • the heat-dissipating particles 4 may have a different shape than a spherical shape, and the particles may include spherical particles having different diameters to increase the contact area.
  • the heat dissipation particles 4 may be formed of a non-conductive material.
  • polymer particles such as Teflon and polyethylene or silicon-based materials such as alumina, silica, glass, and silicon carbide may be used. It may be used and may be composed of a mixture thereof.
  • the non-conductive heat-dissipating particles (4) is located between the wetting (wetting) region of the conductive layer (2) serves to prevent the short circuit between the conductive layer (2).
  • the heat-dissipating particles 4 when included in a volume ratio of 50% or more, conduction may be inhibited between the electrode terminals by the heat-dissipating particles 4 having electrically non-conductivity, and when included in a volume ratio of less than 3%, sufficient heat conduction. No effect will be obtained.
  • the heat dissipation particle 4 is made of a non-conductive material
  • the heat dissipation particle 4 is preferably contained in a volume ratio of 3% to 50% in the conductive adhesive.
  • the heat-dissipating particles (4) may be composed of a conductive material, for example, one selected from the group consisting of gold, silver, copper, tungsten, carbon nanotubes (CNT), graphite and mixtures thereof. The above can be selected.
  • the conductive layer 2 when the conductive layer 2 is melted and combined with the metal terminal during heating / pressurization, the conductive layer 2 has sufficient conductivity even when the heat-dissipating particles 4 are included therein so that the current between terminals is short-circuited. Does not occur.
  • the heat dissipation particles 4 may be not only composed of a conductive material or a non-conductive material, but may be modified in various forms included in an adhesive to perform a heat dissipation function.
  • the non-conductive material and the conductive material may be alternately coated or the polymer particles may be alternately coated with the conductive material or the non-conductive material.
  • the adhesive insulating resin 5 may be used without limitation as long as curing is not completed at the melting temperature of the conductive layer 2.
  • it may be at least one selected from the group consisting of a thermoplastic resin, a thermosetting resin and a photocurable resin.
  • thermoplastic resin examples include vinyl acetate resin, polyvinyl butynal resin, vinyl chloride resin, styrene resin, vinyl methyl ether resin, grevyl resin, ethylene-vinyl acetate copolymer resin, styrene-butadiene copolymer resin, poly Butadiene resin, polyvinyl alcohol resin, and the like
  • thermosetting resins include epoxy resins, urethane resins, acrylic resins, silicone resins, phenolic resins, melamine resins, alkyd resins, urea resins, and unsaturated polyester resins. Etc. can be used.
  • photocurable resin mixes a photopolymerizable monomer, a photopolymerizable oligomer, a photoinitiator, etc., and has a characteristic that a polymerization reaction is started by light irradiation.
  • photopolymerizable monomers and photopolymerizable oligomers include (meth) acrylic acid ester monomers, ether (meth) acrylates, urethane (meth) acrylates, epoxy (meth) acrylates, amino resins (meth) acrylates, and unsaturated polyesters. , Silicone resins and the like can be used.
  • the conductive layer 2 and the insulating layer 3 may further include at least one of a flux, a surface active agent, and a curing agent.
  • a surface activation resin having a surface activation effect of activating the surface of the conductive particles or the surface of the electrode pad may be used as the adhesive insulating resin.
  • the surface-activated resin has a reducing property for reducing the surface of the conductive particles or the surface of the electrode pad.
  • a resin that heats and liberates an organic acid can be used.
  • thermosetting resin the resin is heated and cured to a temperature where the curing of the resin is completed.
  • thermoplastic resin the resin is cooled to the curing temperature of the resin and cured, and the photocurable resin is used. When it does, it irradiates, starts a polymerization reaction, and hardens
  • thermoplastic resin in the case of using a thermoplastic resin, it is expected to have excellent water-retaining property through re-heating in case of fine cracking, breakage, and defect of the connection part.
  • heating is required only until the conductive layer component is melted.
  • Using a low melting point can be expected to be applicable to devices with poor heat resistance.
  • the conductive adhesive according to the embodiment of the present invention may further contain a flux, a surface active agent, a curing agent, and the like in the conductive layer 2 and the insulating layer 3 in addition to the main constituent material.
  • the flux is not particularly limited, and examples thereof include reducing agents such as resins, inorganic acids, amines, and organic acids. Flux is reduced by removing foreign substances such as oxides on the surface of the molten conductive layer or the surface of the upper and lower electrode pads to change into soluble and fusible compounds. In addition, surface foreign matter is removed to cover the surface of the conductive layer and the upper and lower electrode pads to be cleaned to prevent reoxidation.
  • reducing agents such as resins, inorganic acids, amines, and organic acids. Flux is reduced by removing foreign substances such as oxides on the surface of the molten conductive layer or the surface of the upper and lower electrode pads to change into soluble and fusible compounds. In addition, surface foreign matter is removed to cover the surface of the conductive layer and the upper and lower electrode pads to be cleaned to prevent reoxidation.
  • the surface active agent is not particularly limited, and examples thereof include glycols such as ethylene glycol and glycerin, organic acids such as maleic acid and azipine acid, amine compounds such as amines, amino acids, organic acid salts of amines, and halogen salts of amines and inorganic acids. Foreign substances on the surface of the molten conductive particles or the surface of the opposite upper and lower electrode pads are dissolved and removed by using an inorganic acid salt or the like.
  • the flux or the surface active agent has a boiling point higher than the melting point of the conductive layer and lower than the temperature at which curing of the resin is completed.
  • curing agent is not specifically limited,
  • an indication resin amide, imidazole, etc. can accelerate hardening of an epoxy resin.
  • the insulating layer 3 is composed of an adhesive insulating resin 5 that hardening is not completed at the melting point of the conductive layer 2, the insulating layer 3 may further include heat radiation particles (4).
  • the insulating layer 3 has the effect of increasing the adhesive strength by the adhesive insulating resin 5 and has the advantage of increasing the electrical insulation effect between the plurality of terminals by filling the space between the electrode terminals.
  • the adhesive insulating resin 5 and the heat dissipation particle 4 have been described above, the same description is omitted.
  • 3 to 5 are conceptual views illustrating a method for mounting a semiconductor according to a first embodiment of the present invention.
  • the semiconductor mounting method according to the embodiment of the present invention is formed on the meltable conductive layers 101, 201, and 301 and the conductive layers 101, 201, and 301, and At the temperature at which the curing of the adhesive insulating resins 104, 204 and 304 and the insulating layers 102, 202 and 302 including the adhesive insulating resins 104, 204 and 304 are not completed at the melting point.
  • the conductive adhesive (100, 200, 300) is the same as the conductive adhesive (10, 11) described with reference to FIGS. 1 and 2, duplicate description will be omitted.
  • the conductive adhesives 100, 200, and 300 shown in FIGS. 3 to 5 have the same method for mounting semiconductors of the conductive layers 101, 201, and 301 and the insulating layers 102, 202, and 302.
  • the adhesive insulating resin having no curing completed (The conductive layer 101 in the 104 forms a plurality of conductors 101 so that they can flow freely, and the conductive region 101 is wetted on the surfaces of the electrodes 111 and 121 so that the wetting region is wetted.
  • 105 is formed to electrically connect the plurality of semiconductor chip electrodes 121 opposed to the plurality of substrate electrodes 111, respectively.
  • the adhesive insulating resin 104 which is not cured is flowed and filled between the circuit board 110 and the semiconductor chip 120, and the substrate electrode 111, the semiconductor chip electrode 121, and the like. Insulate between the electrical junctions.
  • the adhesive insulating resin 104 may be cured to bond the circuit board 110 to the semiconductor chip 120.
  • the conductive layer 101 is melted to form the wetting region 101 to form chemical bonds such as metal bonds between the terminals, and the terminals facing each other are connected by chemical bonds.
  • the electrical resistance between the terminals can be obtained at the same level as that of the metal junction, thereby obtaining a highly reliable electrical connection between the terminals.
  • the conductive layer 101 takes the form of a plate composed of one or a plurality of layers, wetting regions of the electrodes 111 and 121 are excellent in cohesiveness when melting, as compared with a case in which the conductive layer 101 is dispersed and formed in the form of conventional particles.
  • Form 105 since the conductive layer 101 takes the form of a plate composed of one or a plurality of layers, wetting regions of the electrodes 111 and 121 are excellent in cohesiveness when melting, as compared with a case in which the conductive layer 101 is dispersed and formed in the form of conventional particles.
  • the electrical joint is remelted by partially or totally reheating at a temperature higher than the melting point of the conductive layer.
  • the heat dissipation particles having high thermal conductivity are finely formed compared to the conductive layer and have a high melting point, so that the heat dissipation characteristics are evenly distributed to the outside without disturbing the conductive path during heating / pressurization.
  • FIG. 6 is a block diagram of a conductive adhesive according to a second embodiment of the present invention.
  • the conductive particles 22 that can be melted, the adhesive insulating resin 5 that hardening is not completed at the melting point of the conductive particles, and the curing of the adhesive insulating resin 4 are completed. It includes heat dissipation particles (4) that do not melt at the temperature.
  • the conductive particles 22 of the conductive adhesive according to the embodiment of the present invention are melted upon heating, they have a volume ratio of 10 to 60% in the conductive adhesive.
  • the volume ratio of the conductive particles 22 is less than 10%, the degree of dispersion in the adhesive insulating resin 5 decreases, and when the volume ratio exceeds 60%, the conductive particles 22 are densely disposed so that the conductive particles 22 This is because there is a possibility that the mixed state of the resin layer and the adhesive insulating resin 5 becomes nonuniform.
  • the conductive adhesive 30 according to the second embodiment of the present invention may be formed into a paste or may be formed into a film.
  • the conductive particles 22 may be made of the same material as the conductive layer of the conductive adhesive according to the first embodiment, but may be formed in the form of particles rather than the conductive layer, and the heat radiating particles 4 may be formed of the conductive particles ( 22) to about 1/2 to 1/10 of the average particle diameter.
  • the conductive adhesive is meltable conductive particles 22, the adhesive insulating resin (5) cured at a temperature lower than the melting point of the conductive particles 22, and the heat radiation particles (4) having a higher melting point than the conductive particles It may be configured in the form of a paste or film containing.
  • the conductive particles 2 may be formed of tin (Sn), indium (In), bismuth (Bi), silver (Ag), copper (Cu), or zinc (Zn) having a melting point higher than the curing temperature of the adhesive insulating resin 5.
  • Zn lead (Pb), cadmium (Cd), gallium (Ga), silver (Ag) and tarium (Tl) and the like, in addition to the general high melting point alloy may be selected.
  • FIG. 7 to 8 are schematic views of a semiconductor mounting method according to a second embodiment of the present invention.
  • the positive electrode terminals 31 and 32 are disposed to face each other, and the conductive adhesive 30 according to the second embodiment of the present invention is filled therebetween.
  • the conductive adhesive 30 is entirely filled between the positive electrode terminals 31 and 32 as shown in FIG. 7. (At this time, although not shown in the drawing, even when a plurality of electrode terminals are formed on the substrate and the semiconductor chip, the entirety may be filled between the substrate and the semiconductor chip.)
  • the conductive particles 22 are heated to a predetermined temperature so that they can be melted, and are pressed to narrow the gap between the electrode terminals 31 and 32.
  • the adhesive insulating resin 5 has a viscosity of several tens to hundreds of cps, and the molten conductive particles 22 are fused with neighboring conductive particles 22 to form both electrode terminals 31, Wetting areas 33 are formed that electrically connect between the 32.
  • wetting regions 33a, 33b, and 33c may be locally formed according to the fusion form of the conductive particles 22.
  • the heat-dissipating particles (4) has a melting point higher than the conductive particles (22) as described above, the size is configured to be smaller so that the molten conductive particles 22 are fused to electrically between the substrate (31, 32) When connected, the wetting region 33 may be separated and evenly distributed to the outside of the adhesive.
  • the adhesive insulating resin 5 is cured to insulate portions other than the wetting region 33. That is, the space other than the wetting region 33 is insulated between the opposing substrates 31 and 32.
  • the curing method of the resin may proceed differently depending on the type of the adhesive insulating resin (5).
  • the semiconductor mounting method is not necessarily limited thereto, and as shown in FIG. 8, the conductive adhesive 30 is formed into a paste to be locally formed on either side of the electrode terminal 35a of the part or the electrode terminal 36a of the substrate.
  • the filling region 33 may be filled and heated / pressurized to form a wetting region 33 between the positive electrode terminals 35a and 36a, or may be formed between the substrate and the semiconductor chip by forming a conductive adhesive 30 on a film.
  • the semiconductor mounting method using the conductive adhesive 30 can be applied in the same manner as described above.
  • the conductive particles 22 and the heat-dissipating particles 4 are not melted during the heating / pressing process, whereas the adhesive insulating resin 5 is melted to have a viscosity of several tens to hundreds of cps. 22 is free to flow and is constrained between the electrodes (31, 32 in FIG. 7 or 35a, 36a in FIG. 8) to electrically connect the two electrodes by mechanical / physical coupling.
  • 9 and 10 are conceptual diagrams of a wafer level package according to an embodiment of the present invention.
  • a wafer level package according to an embodiment of the present invention is formed by placing a conductive adhesive 500 on a surface of a wafer 400 on which a plurality of semiconductor chips (not shown) are formed and dicing the wafer 400. .
  • the conductive adhesive 500 may be manufactured in the form of a paste or a film to be formed on the wafer 400.
  • the conductive adhesive 500 includes conductive particles 22 and heat-dissipating particles 4 and insulating resins 5 which do not melt at the melting point of the conductive particles 22, and are conductive in the adhesive insulating resin without classifying the layers.
  • Particles and heat dissipation particles may be configured in a dispersed form.

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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

The present invention relates to an anisotropic conductive adhesive and to a semiconductor mounting method using same, as well as to a semiconductor level package. The adhesive comprises: a conductive paste including meltable conductive particles, an adhesive insulating resin that is not completely cured at the melting point of the conductive particles, and heat-resistant particles which do not melt at a temperature below which the adhesive insulating resin is completely cured; and an insulation layer including a meltable conductive layer, and an adhesive insulating resin that is not completely cured at the melting point of the conductive layer, wherein the conductive layer and the insulation layer selectively include heat-resistant particles that do not melt at a temperature below which the adhesive insulating resin is completely cured.

Description

도전성 접착제, 이를 이용한 반도체의 실장방법 및 웨이퍼 레벨 패키지Conductive Adhesive, Semiconductor Mounting Method and Wafer Level Package Using the Same
본 발명은 도전성 접착제에 관한 것으로서, 보다 구체적으로 서로 대향하는 단자 등의 단자 간의 충분한 전기적 접속을 확보할 수 있고, 단자 간에서 도전재료의 용융에 의한 금속학적 결합을 통해 기존의 솔더링 (soldering)과 동일한 정도의 낮은 전기 저항을 얻을 수 있으며, 인접 단자 간의 절연성도 충분히 확보하여 초미세 피치화에 적용할 수 있고 리페어 특성이 뛰어나며, 특히 방열 기능이 향상된 도전성 접착제, 이를 이용한 반도체의 실장방법 및 웨이퍼 레벨 패키지에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a conductive adhesive, and more particularly, to ensure sufficient electrical connection between terminals, such as terminals facing each other, and to conventional soldering through metallurgical bonding by melting conductive materials between terminals. Low electrical resistance of the same degree can be obtained, sufficient insulation between adjacent terminals can be applied to ultra-fine pitch, excellent repair characteristics, especially conductive adhesive with improved heat dissipation, semiconductor mounting method and wafer level using the same It's about packages.
일반적으로 도전성 접착제는 금속 등의 도전입자를 수지 중에 분산시키는 것으로, 대향 전극 간에는 도전성을 얻을 수 있고 인접 전극 간에는 절연성을 얻을 수 있는 전극 접합 재료이다. Generally, a conductive adhesive disperses conductive particles such as metals in a resin, and is an electrode bonding material capable of obtaining conductivity between opposing electrodes and insulating properties between adjacent electrodes.
즉, 도전성 접착제에 포함되는 도전입자에 의해, 대향 전극 간의 도통을 가능하게 하는 한편, 상기 도전성 접착제에 포함되는 수지에 의해 인접 전극 간의 절연성을 확보함과 함께, 대향 전극 간을 접착시켜 칩과 기판을 고정하고 있는 것이다.That is, the conductive particles contained in the conductive adhesive enable conduction between the counter electrodes, while the insulation contained between the adjacent electrodes is ensured by the resin contained in the conductive adhesive, and the opposing electrodes are adhered to each other to bond the chip and the substrate. It is fixed.
최근 전자분야에서는 고속화, 대용량화, 소형화 또는 경량화의 요구에 부응하여, 반도체 팁과 같은 전자 부품의 고집적화나 고밀도화를 실현하기 위한 실장기술의 개발이 진행되고 있으며, 특히 내열 온도가 낮은 전자 디바이스 등의 실장을 수행하는 경우에는 열화를 방지하기 위하여 저온에서 접합 될 것이 요구되고 있다.In recent years, in order to meet the demand of high speed, large capacity, miniaturization, and light weight, the development of mounting technology for realizing high integration and high density of electronic components such as semiconductor tips is progressing, and in particular, mounting of electronic devices with low heat resistance temperature In the case of performing the above, it is required to be bonded at low temperature in order to prevent deterioration.
그러나 종래의 도전성 접착제는 도전입자가 상부기판과 하부기판의 금속 패드 간의 물리적 접촉을 통해 도전이 이루어지므로, 접촉저항이 매우 큰 단점이 있으며, 초미세 피치화가 어렵고, 리페어 특성이 떨어지는 문제점이 있다.However, in the conventional conductive adhesive, the conductive particles are electrically conductive through the physical contact between the metal pads of the upper substrate and the lower substrate, so that the contact resistance is very large, the ultrafine pitch is difficult, and the repair characteristics are inferior.
또한, 반도체를 포함하는 전자기기는 필연적으로 지속적인 열이 발생하게 되는데 접착제가 열을 전달하는 능력의 한계가 있어 결국 국부적으로 열이 집중되어 열점(hot spot)이 발생하는 문제가 있다.In addition, electronic devices including semiconductors inevitably generate continuous heat, and there is a limit in the ability of the adhesive to transfer heat, so that heat is locally concentrated and hot spots occur.
본 발명은 상기와 같은 문제점을 해결하기 위한 것으로, 본 발명의 목적은 대향하는 단자 등의 단자 간의 충분한 전기적 접속을 확보할 수 있고, 단자 간에서 도전재료의 용융에 의한 금속학적 결합을 통해 기존의 솔더링 (soldering)과 동일한 정도의 낮은 전기 저항을 얻을 수 있으며, 인접 단자 간의 절연성도 충분히 확보하여 초미세 피치화에 적용할 수 있고 리페어 특성이 뛰어나며, 특히 방열 기능이 향상된 도전성 접착제, 이를 이용한 반도체의 실장방법 및 웨이퍼 레벨 패키지를 제공하는 것이다.The present invention is to solve the above problems, an object of the present invention is to ensure a sufficient electrical connection between the terminals such as opposing terminals, and through the metallurgical coupling by melting the conductive material between the terminals The same low electrical resistance as soldering can be obtained, and sufficient insulating property between adjacent terminals can be applied to ultrafine pitching, and it has excellent repair characteristics. To provide a mounting method and a wafer level package.
상기와 같은 목적을 달성하기 위하여 본 발명은 용융 가능한 도전층과, 상기 도전층의 융점에서 경화가 완료되지 않는 접착성 절연 수지를 포함하는 절연층을 포함하고, 상기 도전층과 절연층에 상기 접착성 절연 수지가 경화되는 온도에서 용융되지 않는 방열입자가 선택적으로 포함된다.In order to achieve the above object, the present invention includes an insulating layer comprising a meltable conductive layer and an adhesive insulating resin that is not cured at the melting point of the conductive layer, wherein the adhesive layer is attached to the conductive layer and the insulating layer. Heat dissipation particles that do not melt at the temperature at which the insulating resin is cured are optionally included.
또한, 본 발명의 반도체 실장 방법은 복수의 기판 전극이 형성된 기판에, 상기 복수의 부품 전극 패드에 각각 대응하는 복수의 부품 전극 패드를 갖는 반도체 실장 방법에 있어서, 상기 기판전극과 상기 반도체칩 전극의 사이에 도전성 접착제를 배치하는 단계와, 상기 도전층의 융점보다 높고 상기 접착층의 경화가 완료되지 않는 온도까지 상기 도전성 접착제을 가열/가압하는 단계로서, 가압시 상기 도전층이 용융되어 복수의 기판전극 표면 및 대향되는 상기 복수의 반도체칩 전극 표면에 퍼져 웨팅 영역을 형성하여 전기적으로 접속을 가능하게 하고, 상기 접착성 절연 수지가 경화가 완료되지 않은 상태에서 유동되어, 상기 회로기판과 상기 반도체칩 사이에 충진되어 상기 기판전극패드, 상기 반도체칩 전극패드 및 상기 웨팅 영역으로 이루어지는 전기적 접합부분들 간을 절연하는 단계 및 상기 접착성 절연 수지를 경화시켜 상기 회로기판과 상기 반도체칩을 접착시키는 단계를 포함한다.In addition, the semiconductor mounting method of the present invention is a semiconductor mounting method having a plurality of component electrode pads corresponding to the plurality of component electrode pads on a substrate on which a plurality of substrate electrodes are formed, wherein the substrate electrode and the semiconductor chip electrode are formed. Disposing a conductive adhesive therebetween; and heating / pressurizing the conductive adhesive to a temperature that is higher than the melting point of the conductive layer and the curing of the adhesive layer is not completed. And forming a wetting region by spreading on the surfaces of the plurality of opposing semiconductor chip electrodes to enable electrical connection, wherein the adhesive insulating resin is flowed in a state where the curing is not completed, between the circuit board and the semiconductor chip. It is filled with the substrate electrode pad, the semiconductor chip electrode pad and the wetting region Curing step and the adhesive insulating resin to insulate the term junction between those and a step of bonding the circuit board and the semiconductor chip.
이때 상기 도전성 접착제는 용융 가능한 도전층과, 상기 도전층의 융점에서 경화가 완료되지 않는 접착성 절연 수지를 포함하는 절연층을 포함하고, 상기 도전층과 절연층에 상기 접착성 절연 수지가 경화되는 온도에서 용융되지 않는 방열입자가 선택적으로 포함될 수 있다.In this case, the conductive adhesive includes an insulating layer including a meltable conductive layer and an adhesive insulating resin that hardening is not completed at the melting point of the conductive layer, wherein the adhesive insulating resin is cured on the conductive layer and the insulating layer. Radiating particles that do not melt at a temperature may be optionally included.
또는 용융 가능한 도전입자와, 상기 도전입자의 융점에서 경화가 완료되지 않는 접착성 절연 수지, 및 상기 접착성 절연 수지의 경화가 완료되는 온도에서 용융되지 않는 방열입자를 포함할 수 있다. Alternatively, the present invention may include a meltable conductive particle, an adhesive insulating resin that hardening is not completed at the melting point of the conductive particle, and heat dissipating particles that are not melted at a temperature at which curing of the adhesive insulating resin is completed.
이때 도전성 접착제는 페이스트 또는 필름 상으로 형성되어 전체적으로 충진될 수도 있고, 각 단자에 국소적으로 충진될 수도 있다.In this case, the conductive adhesive may be formed into a paste or a film to be entirely filled, or may be locally filled to each terminal.
또한, 본 발명의 반도체 레벨 패키지는 반도체 칩이 형성된 웨이퍼의 표면에 도전성 접착제를 도포하고 다이싱되어 구성된다.Further, the semiconductor level package of the present invention is constructed by applying a conductive adhesive to the surface of a wafer on which a semiconductor chip is formed and dicing.
상기와 같은 구성에 의하여 본 발명은 대향하는 단자 등의 단자 간의 충분한 전기적 접속을 확보할 수 있으며, 방열입자에 의하여 가열/가압 공정시 열전도율이 뛰어나고, 도전입자에 의한 단락을 방지하고, 내부에서 발생된 열을 용이하게 방출할 수 있는 효과가 있다.According to the above configuration, the present invention can secure sufficient electrical connection between terminals such as opposite terminals, and has excellent thermal conductivity during the heating / pressing process by the heat-dissipating particles, prevents short circuits by the conductive particles, and generates internally. There is an effect that can easily release the heat.
또한, 방열입자에 의하여 공기 또는 수분의 침투를 차단하여 전자제품의 성능 저하를 방지하고 수명을 연장할 수 있다.In addition, by blocking the penetration of air or moisture by the heat-dissipating particles can prevent the performance degradation of electronic products and extend the life.
도 1 및 도 2는 본 발명의 제1 실시예에 따른 도전성 접착제의 구성도.1 and 2 is a block diagram of a conductive adhesive according to a first embodiment of the present invention.
도 3 내지 도 5는 본 발명의 제1 실시예에 따른 반도체의 실장방법을 나타내는 개념도.3 to 5 are conceptual views illustrating a method for mounting a semiconductor according to a first embodiment of the present invention.
도 6은 본 발명의 제2 실시예에 따른 도전성 접착제의 구성도.6 is a block diagram of a conductive adhesive according to a second embodiment of the present invention.
도 7 및 8은 본 발명의 제2 실시예에 따른 반도체의 실장방법을 나타내는 개념도. 7 and 8 are conceptual views illustrating a method for mounting a semiconductor according to a second embodiment of the present invention.
도 9 및 도 10는 본 발명의 일 실시예에 따른 웨이퍼 레벨 패키지의 제조방법을 나타내는 개념도.9 and 10 are conceptual views illustrating a method of manufacturing a wafer level package according to an embodiment of the present invention.
본 발명은 다양한 변경을 가할 수 있고 여러 가지 실시예를 가질 수 있는 바, 특정 실시예들을 도면에 예시하고 상세한 설명에 상세하게 설명하고자 한다.As the invention allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description.
그러나, 이는 본 발명을 특정한 실시 형태에 대해 한정하려는 것이 아니며, 본 발명의 사상 및 기술 범위에 포함되는 모든 변경, 균등물 내지 대체물을 포함하는 것으로 이해되어야 한다. However, this is not intended to limit the present invention to specific embodiments, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention.
제1, 제2 등과 같이 서수를 포함하는 용어는 다양한 구성요소들을 설명하는데 사용될 수 있지만, 상기 구성요소들은 상기 용어들에 의해 한정되지는 않는다.Terms including ordinal numbers such as first and second may be used to describe various components, but the components are not limited by the terms.
상기 용어들은 하나의 구성요소를 다른 구성요소로부터 구별하는 목적으로만 사용된다. The terms are used only for the purpose of distinguishing one component from another.
예를 들어, 본 발명의 권리 범위를 벗어나지 않으면서 제2 구성요소는 제1 구성요소로 명명될 수 있고, 유사하게 제1 구성요소도 제2 구성요소로 명명될 수 있다.For example, without departing from the scope of the present invention, the second component may be referred to as the first component, and similarly, the first component may also be referred to as the second component.
어떤 구성요소가 다른 구성요소에 "연결되어" 있다거나 "접속되어" 있다고 언급될 때에는, 그 다른 구성요소에 직접적으로 연결되어 있거나 또는 접속되어 있을 수도 있지만, 중간에 다른 구성요소가 존재할 수도 있다고 이해되어야 할 것이다. When a component is referred to as being "connected" or "connected" to another component, it may be directly connected or connected to that other component, but it may be understood that other components may be present in between. Should be.
반면에, 어떤 구성요소가 다른 구성요소에 "직접 연결되어" 있다거나 "직접 접속되어" 있다고 언급된 때에는, 중간에 다른 구성요소가 존재하지 않는 것으로 이해되어야 할 것이다.On the other hand, when a component is said to be "directly connected" or "directly connected" to another component, it should be understood that there is no other component in between.
본 출원에서 사용한 용어는 단지 특정한 실시예를 설명하기 위해 사용된 것으로, 본 발명을 한정하려는 의도가 아니다. 단수의 표현은 문맥상 명백하게 다르게 뜻하지 않는 한, 복수의 표현을 포함한다. The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise.
본 출원에서, "포함한다" 또는 "가지다" 등의 용어는 명세서상에 기재된 특징, 숫자, 단계, 동작, 구성요소, 부품 또는 이들을 조합한 것이 존재함을 지정하려는 것이지, 하나 또는 그 이상의 다른 특징들이나 숫자, 단계, 동작, 구성요소, 부품 또는 이들을 조합한 것들의 존재 또는 부가 가능성을 미리 배제하지 않는 것으로 이해되어야 한다. In this application, the terms "comprises" or "having" are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described in the specification, and one or more other features. It is to be understood that the present invention does not exclude the possibility of the presence or the addition of numbers, steps, operations, components, components, or a combination thereof.
또한 본 출원에서 첨부된 도면은 설명의 편의를 위하여 확대 또는 축소하여 도시된 것으로 이해되어야 한다. In addition, it is to be understood that the accompanying drawings in this application are shown enlarged or reduced for convenience of description.
이제 본 발명에 대하여 도면을 참고하여 상세하게 설명하고, 도면 부호에 관계없이 동일하거나 대응하는 구성 요소는 동일한 참조 번호를 부여하고 이에 대한 중복되는 설명은 생략하기로 한다.DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the drawings. Like reference numerals designate like elements throughout, and duplicate descriptions thereof will be omitted.
본 발명에서 '젖음성(Wetability)'은 액체 또는 고체가 고체 표면 위에 퍼지는 성질을 의미하는 것으로 접착제가 고체 표면에 퍼짐, 점착 또는 밀착의 정도를 의미하는 것으로 정의한다.In the present invention, 'wetability' refers to a property in which a liquid or a solid spreads on a solid surface, and defines an extent of adhesion, adhesion, or adhesion of an adhesive to a solid surface.
도 1 내지 도 2는 본 발명의 제1 실시예에 따른 도전성 접착제의 구성도이다.1 to 2 are structural diagrams of a conductive adhesive according to a first embodiment of the present invention.
본 발명의 일 실시예에 따른 도전성 접착제(10, 11)는 용융 가능한 도전층(2)과, 상기 도전층(2)의 융점에서 경화가 완료되지 않는 접착성 절연 수지(5)를 포함하는 절연층(3)을 포함하고, 상기 도전층(2)과 절연층(3)에 상기 접착성 절연 수지(5)의 경화가 완료되는 온도에서 용융되지 않는 방열입자(4)가 선택적으로 포함된 이방성 도전성 필름으로 구성된다.The conductive adhesives 10 and 11 according to an embodiment of the present invention are insulated including a meltable conductive layer 2 and an adhesive insulating resin 5 whose curing is not completed at the melting point of the conductive layer 2. Anisotropic comprising a layer (3), wherein the conductive layer (2) and the insulating layer (3) optionally contain heat-dissipating particles (4) that do not melt at a temperature at which curing of the adhesive insulating resin (5) is completed It consists of a conductive film.
여기서, 상기 도전층(2)과 절연층(3)은 교대로 적층될 수 있으며, 적층된 수가 짝수 또는 홀수 개일 수 있다.Here, the conductive layer 2 and the insulating layer 3 may be alternately stacked, and the number of stacked layers may be even or odd.
도전층(2)은 저온 또는 고온에서 용융 가능하며, 금속 또는 합금으로 구성되어 적어도 하나의 서브층을 포함한다. 예를 들어, 도전층(2)은 주석(Sn), 인지움(In), 비스머스(Bi), 은(Ag), 동(Cu), 아연(Zn), 납(Pb), 카드뮴(Cd), 갈륨(Ga), 은(Ag), 타리움(Tl) 등의 금속을 함유한 하나 또는 두개 이상의 서브층이나, 이러한 금속으로부터 이루어지는 합금을 함유한 하나 또는 두 개 이상의 서브층으로 이루어질 수 있다.The conductive layer 2 is meltable at low temperature or high temperature, and is composed of a metal or an alloy and includes at least one sublayer. For example, the conductive layer 2 may include tin (Sn), indium (In), bismuth (Bi), silver (Ag), copper (Cu), zinc (Zn), lead (Pb), and cadmium (Cd). ), One or two or more sublayers containing metals such as gallium (Ga), silver (Ag), tarium (Tl), or one or two or more sublayers containing alloys made of such metals. .
한편, 상기 도전층(2)은 상대적으로 저융점을 갖는 금속, 비금속 및 합금으로 이루어진 그룹으로부터 선택된 하나 이상으로 형성될 수 있으며, 저융점 합금(Low Melting Point Alloy)은 용융점(녹는점)이 183℃인 Sn-37Pb를 기준으로 이보다 낮은 용융점을 갖는 Sn-57Bi, Sn-52In, Sn-44In-14Cd 등과 높은 온도를 갖는 Sn-3.5Ag, Sn-2.5Ag-10Sb, Sn-4.7Ag-1.7Cu 등이 사용될 수 있다.Meanwhile, the conductive layer 2 may be formed of at least one selected from the group consisting of metals, nonmetals, and alloys having a relatively low melting point, and the low melting point alloy has a melting point (melting point) of 183. Sn-57Bi, Sn-52In, Sn-44In-14Cd, etc. having a lower melting point based on Sn-37Pb, which is ℃, Sn-3.5Ag, Sn-2.5Ag-10Sb, Sn-4.7Ag-1.7Cu And the like can be used.
그러나 상기 도전층(2)은 반드시 이에 한정되는 것은 아니고 접착성 절연 수지(5)의 경화가 완료되는 온도보다 낮은 온도에서 용융되는 금속 또는 합금이면 모두 사용 가능하다.However, the conductive layer 2 is not necessarily limited thereto, and any conductive metal 2 may be used as long as it is melted at a temperature lower than a temperature at which curing of the adhesive insulating resin 5 is completed.
예를 들면 상기 언급한 금속과 상기 합금을 혼합하여 도전층(2)을 형성할 수도 있으며, 상기 언급한 금속 또는 합금에 다른 금속이나 합금을 혼합하여 사용할 수 있는 것이다.For example, the conductive layer 2 may be formed by mixing the above-mentioned metal and the alloy, or may be used by mixing another metal or alloy with the above-mentioned metal or alloy.
상기 도전층(2)은 하나 또는 다수의 층으로 구성되는 판 형태를 취하기 때문에, 종래 입자의 형태로 분산되어 형성되는 경우에 비해 용융 시 그 응집성이 뛰어난 효과가 있다.Since the conductive layer 2 takes the form of a plate composed of one or a plurality of layers, the conductive layer 2 has an effect of excellent cohesiveness at the time of melting as compared with the case in which the conductive layer 2 is dispersed and formed in the form of conventional particles.
상기 방열입자(4)는 선택적으로 도전층(2) 또는 절연층(3) 내에 포함되어 열 전도율을 높이는 역할을 수행하게 된다. 이러한 방열입자(4)에 의하여 반도체칩을 기판에 실장하기 위한 가열/가압시 열전도가 빠르게 일어나 공정 시간을 단축할 수 있으며, 실장된 이후 발생하는 열을 빠르게 외부로 방출하는 효과가 있다.The heat radiating particles 4 are selectively included in the conductive layer 2 or the insulating layer 3 to increase the thermal conductivity. The heat dissipation particles 4 may shorten the process time due to rapid heat conduction during heating / pressurization for mounting the semiconductor chip on the substrate, and has an effect of rapidly dissipating heat generated after mounting to the outside.
상기 방열입자(4)는 열 및 압력에 견딜 수 있도록 접착시의 가열 온도보다 더 높은 융점을 가지고, 바람직하게는 상기 접착성 절연 수지(5)의 경화가 완료되는 온도에서 용융되지 않는 물질이 선택될 수 있다.The heat-dissipating particles (4) has a melting point higher than the heating temperature at the time of adhesion to withstand heat and pressure, preferably a material that does not melt at a temperature at which curing of the adhesive insulating resin (5) is completed Can be.
상기 방열입자(4)는 수 nm에서 수십 ㎛의 크기로 다양하게 선택될 수 있으며, 바람직하게는 기판과 전자재료의 전극의 최종 접합 거리보다 작도록 구성될 수 있다.The heat dissipation particles 4 may be variously selected from several nm to several tens of micrometers, and may be configured to be smaller than the final bonding distance between the substrate and the electrode of the electronic material.
또한, 상기 방열입자(4)은 구형이 아니라 다른 형상을 가져도 무방하며 입자는 각각 지름이 다른 구형 입자를 포함하여 접촉 면적을 늘리는 것이 바람직하다.In addition, the heat-dissipating particles 4 may have a different shape than a spherical shape, and the particles may include spherical particles having different diameters to increase the contact area.
이러한 방열입자(4)는 접착성 절연 수지(5) 내에 적절히 분산되어 있으면 기판과 전자재료 사이에서 발생한 열이 상기 방열입자(4)에 의하여 외부로 신속히 배출되게 된다. 따라서 발생한 열에 의해 과도한 온도 상승을 방지할 수 있다.When the heat dissipation particles 4 are properly dispersed in the adhesive insulating resin 5, heat generated between the substrate and the electronic material is quickly discharged to the outside by the heat dissipation particles 4. Therefore, excessive temperature rise can be prevented by the generated heat.
한편, 공기 또는 수분의 침투를 차단하고, 침투 경로를 우회하게 하게 되어 침투하는 공기 또는 수분이 감소한다. 따라서 수분, 공기 또는 열에 의한 열화 현상이 감소하여 전자제품의 성능 저하를 방지하고 수명을 연장할 수 있다.On the other hand, it blocks the infiltration of air or moisture and bypasses the infiltration path, reducing the infiltration of air or moisture. As a result, deterioration due to moisture, air, or heat is reduced, thereby preventing performance degradation of electronic products and extending the lifespan.
이하 방열입자의 종류에 대하여 살펴보면 상기 방열입자(4)는 비전도성 물질로 구성될 수 있으며, 예를 들면 테플론, 폴리에틸렌 등의 폴리머 입자 또는 알루미나, 실리카, 글라스 및 실리콘 카바이드 등의 실리콘 계열의 물질이 사용될 수 있으며 이들의 혼합물 등으로 구성될 수도 있다.Hereinafter, the heat dissipation particles 4 may be formed of a non-conductive material. For example, polymer particles such as Teflon and polyethylene or silicon-based materials such as alumina, silica, glass, and silicon carbide may be used. It may be used and may be composed of a mixture thereof.
상기 비전도성 방열입자(4)는 도전층(2)의 웨팅(Wetting) 영역 사이에 위치하여 도전층(2) 간 단락을 방지하는 역할을 보조적으로 수행한다. 그러나 상기 방열입자(4)가 50%이상의 부피비로 포함되는 경우 전기적으로 비전도성을 갖는 방열입자(4)에 의하여 전극단자 사이에 통전이 저해될 수 있으며, 3%보다 낮은 부피비로 포함되면 충분한 열전도 효과를 얻을 수 없게 된다. The non-conductive heat-dissipating particles (4) is located between the wetting (wetting) region of the conductive layer (2) serves to prevent the short circuit between the conductive layer (2). However, when the heat-dissipating particles 4 are included in a volume ratio of 50% or more, conduction may be inhibited between the electrode terminals by the heat-dissipating particles 4 having electrically non-conductivity, and when included in a volume ratio of less than 3%, sufficient heat conduction. No effect will be obtained.
따라서 상기 방열입자(4)를 비전도성 물질로 구성하는 경우, 상기 방열입자(4)는 도전성 접착제 내에 3% 내지 50%의 부피비로 포함되는 것이 바람직하다.Therefore, when the heat dissipation particle 4 is made of a non-conductive material, the heat dissipation particle 4 is preferably contained in a volume ratio of 3% to 50% in the conductive adhesive.
또한, 상기 방열입자(4)는 전도성 물질로 구성될 수도 있으며, 이러한 전도성 물질의 예로는 금, 은, 구리, 텅스텐, 탄소나노튜브(CNT), 흑연 및 이들의 혼합물 등으로 이루어진 그룹으로부터 선택된 하나 이상을 선택할 수 있다.In addition, the heat-dissipating particles (4) may be composed of a conductive material, for example, one selected from the group consisting of gold, silver, copper, tungsten, carbon nanotubes (CNT), graphite and mixtures thereof. The above can be selected.
따라서, 앞서 설명한 바와 같이 가열/가압시 도전층(2)이 용융되어 금속단자와 결합하는 경우 상기 방열입자(4)가 그 안에 포함된 경우에도 충분한 전도성을 갖게 되어 단자 간 전류가 단락되는 문제가 발생하지 않는다.Therefore, as described above, when the conductive layer 2 is melted and combined with the metal terminal during heating / pressurization, the conductive layer 2 has sufficient conductivity even when the heat-dissipating particles 4 are included therein so that the current between terminals is short-circuited. Does not occur.
그러나 상기 방열입자(4)는 전술한 바와 같이 전도성 물질 또는 비전도성 물질로만 구성될 것은 아니고 접착제에 포함되어 방열 기능을 수행하는 다양한 형태로 변형될 수 있다. However, as described above, the heat dissipation particles 4 may be not only composed of a conductive material or a non-conductive material, but may be modified in various forms included in an adhesive to perform a heat dissipation function.
예를 들면, 비전도성 물질과 전도성 물질이 교번하여 코팅되거나 폴리머 입자에 전도성 물질 또는 비전도성 물질이 교번하여 코팅되어 사용될 수도 있는 것이다.For example, the non-conductive material and the conductive material may be alternately coated or the polymer particles may be alternately coated with the conductive material or the non-conductive material.
이하 상기 접착성 절연 수지(5)에 대하여 살펴보면 상기 접착성 절연 수지(5)는 도전층(2)의 용융 온도에서 경화가 완료되지 않는 것이면 제한 없이 사용 가능하다. 예를 들어 열가소성 수지, 열경화성 수지 및 광경화성 수지로 이루어진 그룹으로부터 선택된 하나 이상일 수 있다.Hereinafter, the adhesive insulating resin 5 may be used without limitation as long as curing is not completed at the melting temperature of the conductive layer 2. For example, it may be at least one selected from the group consisting of a thermoplastic resin, a thermosetting resin and a photocurable resin.
열가소성 수지로는 초산비닐계 수지, 폴리비닐 부티날계 수지, 염화 비닐계 수지, 스틸렌계 수지, 비닐 메틸 에테르계 수지, 그리브틸 수지, 에틸렌-초산비닐 공중합계 수지, 스틸렌-부타디엔 공중합계 수지, 폴리 부타디엔 수지 및 폴리비닐 알코올계 수지 등을 들 수가 있으며, 열경화성 수지로서는, 에폭시계수지, 우레탄계 수지, 아크릴계 수지, 실리콘계 수지, 페놀계 수지, 멜라민계 수지, 알키드계 수지, 요소수지 및 불포화 폴리에스테르수지 등을 사용할 수 있다.Examples of the thermoplastic resin include vinyl acetate resin, polyvinyl butynal resin, vinyl chloride resin, styrene resin, vinyl methyl ether resin, grevyl resin, ethylene-vinyl acetate copolymer resin, styrene-butadiene copolymer resin, poly Butadiene resin, polyvinyl alcohol resin, and the like, and examples of thermosetting resins include epoxy resins, urethane resins, acrylic resins, silicone resins, phenolic resins, melamine resins, alkyd resins, urea resins, and unsaturated polyester resins. Etc. can be used.
또한, 광경화성 수지는 광중합성 모노머나 광중합성 올리고머와 광중합 개시제 등을 혼합한 것으로, 광조사에 의해 중합 반응이 개시되는 특성을 갖는다. Moreover, photocurable resin mixes a photopolymerizable monomer, a photopolymerizable oligomer, a photoinitiator, etc., and has a characteristic that a polymerization reaction is started by light irradiation.
이러한 광중합성 모노머나 광중합성 올리고머로는 (메타)아크릴산 에스테르류 모노머, 에테르 (메타)아크릴레이트, 우레탄 (메타)아크릴레이트, 에폭시 (메타)아크릴레이트, 아미노 수지 (메타)아크릴레이트, 불포화 폴리에스테르, 실리콘계 수지 등을 사용할 수 있다.Such photopolymerizable monomers and photopolymerizable oligomers include (meth) acrylic acid ester monomers, ether (meth) acrylates, urethane (meth) acrylates, epoxy (meth) acrylates, amino resins (meth) acrylates, and unsaturated polyesters. , Silicone resins and the like can be used.
또한, 상기 도전층(2) 및 절연층(3)에는 플럭스, 표면활성제, 경화제 중 적어도 하나가 더 포함될 수 있다. In addition, the conductive layer 2 and the insulating layer 3 may further include at least one of a flux, a surface active agent, and a curing agent.
뿐만 아니라, 상기 접착성 절연 수지로서 도전입자의 표면이나 전극패드의 표면을 활성화시키는 표면활성화효과를 가지는 표면활성화 수지를 사용할 수도 있다. In addition, a surface activation resin having a surface activation effect of activating the surface of the conductive particles or the surface of the electrode pad may be used as the adhesive insulating resin.
표면활성화 수지는 도전입자의 표면이나 전극패드의 표면을 환원시키는 환원성을 가지는 것으로, 예를 들어, 가열하여 유기산을 유리(遊離)시키는 수지를 사용할 수 있다. The surface-activated resin has a reducing property for reducing the surface of the conductive particles or the surface of the electrode pad. For example, a resin that heats and liberates an organic acid can be used.
한편 경화방법으로는, 열경화성 수지를 이용했을 경우에는 수지의 경화가 완료되는 온도까지 가온하여 경화하게 되고, 열가소성 수지를 이용했을 경우에는 수지의 경화하는 온도까지 냉각하여 경화하며, 광경화성 수지를 이용했을 경우에는, 광조사를 실시해 중합 반응을 개시시켜 경화하게 된다. On the other hand, when the thermosetting resin is used, the resin is heated and cured to a temperature where the curing of the resin is completed. When the thermoplastic resin is used, the resin is cooled to the curing temperature of the resin and cured, and the photocurable resin is used. When it does, it irradiates, starts a polymerization reaction, and hardens | cures it.
특히, 열가소성 수지를 사용하였을 경우에는 접속부의 미세 크렉, 파단 및 불량 시 재가열을 통한 보수성이 우수한 특성을 기대할 수 있으며, 광경화성 수지를 사용하는 경우에는 도전층 성분이 용융될 때까지만 가열을 하면 되므로 융점이 낮은 것을 사용하면 내열성이 좋지 않은 디바이스에 적용할 수 있는 특성을 기대할 수 있다. In particular, in the case of using a thermoplastic resin, it is expected to have excellent water-retaining property through re-heating in case of fine cracking, breakage, and defect of the connection part. In the case of using a photocurable resin, heating is required only until the conductive layer component is melted. Using a low melting point can be expected to be applicable to devices with poor heat resistance.
한편, 본 발명의 실시예에 따른 도전성 접착제는 주 구성물질 이외에 도전층(2) 및 절연층(3)에 플럭스, 표면활성제, 경화제 등을 더 함유할 수 있다. Meanwhile, the conductive adhesive according to the embodiment of the present invention may further contain a flux, a surface active agent, a curing agent, and the like in the conductive layer 2 and the insulating layer 3 in addition to the main constituent material.
플럭스는 특별히 한정하지는 않지만 예를 들어, 수지, 무기산, 아민, 유기산 등의 환원제를 들 수 있다. 플럭스는 용융된 도전층의 표면이나 상하 전극패드의 표면의 산화물 등의 표면 이물질을 환원시켜 가용성 및 가융성의 화합물로 변화시켜 제거한다. 또한, 표면 이물질이 제거되어 청정하게 된 상기 도전층의 표면 및 상하 전극패드 표면을 덮어 재산화를 방지한다. The flux is not particularly limited, and examples thereof include reducing agents such as resins, inorganic acids, amines, and organic acids. Flux is reduced by removing foreign substances such as oxides on the surface of the molten conductive layer or the surface of the upper and lower electrode pads to change into soluble and fusible compounds. In addition, surface foreign matter is removed to cover the surface of the conductive layer and the upper and lower electrode pads to be cleaned to prevent reoxidation.
그리고, 표면활성제는 특별히 한정하지 않지만 예를 들어, 에틸렌 글리콜이나 글리세린 등의 글리콜, 마레인산이나 아지핀산 등의 유기산, 아민, 아미노산, 아민의 유기산염, 아민의 할로겐염 등의 아민계 화합물, 무기산이나 무기산염 등으로, 용융된 도전입자의 표면이나 대향되는 상하 전극패드 표면의 산화물 등의 표면의 이물질을 용해시켜 제거한다. The surface active agent is not particularly limited, and examples thereof include glycols such as ethylene glycol and glycerin, organic acids such as maleic acid and azipine acid, amine compounds such as amines, amino acids, organic acid salts of amines, and halogen salts of amines and inorganic acids. Foreign substances on the surface of the molten conductive particles or the surface of the opposite upper and lower electrode pads are dissolved and removed by using an inorganic acid salt or the like.
여기서, 플럭스 또는 표면활성제는 도전층의 융점보다 높고 수지의 경화가 완료되는 온도 보다 낮은 비점을 가지도록 하는 것이 바람직하다. Here, it is preferable that the flux or the surface active agent has a boiling point higher than the melting point of the conductive layer and lower than the temperature at which curing of the resin is completed.
또한, 경화제는 특별히 한정하지 않지만 예를 들어, 지시안지아미드나 이미다졸 등으로 에폭시 수지의 경화를 촉진시킬 수 있다. Moreover, although a hardening | curing agent is not specifically limited, For example, an indication resin amide, imidazole, etc. can accelerate hardening of an epoxy resin.
상기 절연층(3)은 도전층(2)의 융점에서 경화가 완료되지 않는 접착성 절연 수지(5)로 구성되는데 상기 절연층(3)에는 방열입자(4)가 더 포함될 수 있다.The insulating layer 3 is composed of an adhesive insulating resin 5 that hardening is not completed at the melting point of the conductive layer 2, the insulating layer 3 may further include heat radiation particles (4).
이러한 절연층(3)은 상기 접착성 절연 수지(5)에 의하여 접착력이 증가되는 효과가 있으며 전극 단자 간의 공간을 채워 복수 개의 단자 사이에 전기적 절연 효과가 높아지는 장점이 있다. 이하 접착성 절연 수지(5)와 방열입자(4)는 앞서 설명하였으므로 동일한 설명은 생략한다.The insulating layer 3 has the effect of increasing the adhesive strength by the adhesive insulating resin 5 and has the advantage of increasing the electrical insulation effect between the plurality of terminals by filling the space between the electrode terminals. Hereinafter, since the adhesive insulating resin 5 and the heat dissipation particle 4 have been described above, the same description is omitted.
도 3 내지 도 5는 본 발명의 제1 실시예에 따른 반도체의 실장방법을 나타내는 개념도이다.3 to 5 are conceptual views illustrating a method for mounting a semiconductor according to a first embodiment of the present invention.
본 발명의 일 실시예에 따른 반도체의 실장방법은 용융 가능한 도전층(101, 201 및 301)과 상기 도전층(101, 201 및 301) 상에 형성되며 상기 도전층(101, 201 및 301)의 융점에서 경화가 완료되지 않는 접착성 절연 수지(104, 204, 304)를 포함하는 절연층(102, 202, 302) 및 상기 접착성 절연 수지(104, 204, 304)의 경화가 완료되는 온도에서 용융되지 않는 방열입자(103, 203, 303)를 포함하는 도전성 접착제(100, 200, 300)를 사이에 두고 기판전극(111, 211, 311)과 반도체칩 전극(121, 221, 321)을 대향시켜 배치하는 단계를 포함한다.The semiconductor mounting method according to the embodiment of the present invention is formed on the meltable conductive layers 101, 201, and 301 and the conductive layers 101, 201, and 301, and At the temperature at which the curing of the adhesive insulating resins 104, 204 and 304 and the insulating layers 102, 202 and 302 including the adhesive insulating resins 104, 204 and 304 are not completed at the melting point. Opposing substrate electrodes 111, 211, 311 and semiconductor chip electrodes 121, 221, 321 with conductive adhesives 100, 200, 300 containing heat-dissipating particles 103, 203, and 303 that are not melted. And disposing it.
여기서, 상기 도전성 접착제(100, 200, 300)는 도 1 및 도 2를 통하여 설명한 도전성 접착제(10, 11)와 동일하며, 중복된 설명은 생략하도록 한다.Here, the conductive adhesive (100, 200, 300) is the same as the conductive adhesive (10, 11) described with reference to FIGS. 1 and 2, duplicate description will be omitted.
한편, 도 3 내지 도 5에 도시된 도전성 접착제(100, 200, 300)는 도전층(101, 201, 301)과 절연층(102, 202, 302)의 반도체의 실장방법은 모두 동일하다.Meanwhile, the conductive adhesives 100, 200, and 300 shown in FIGS. 3 to 5 have the same method for mounting semiconductors of the conductive layers 101, 201, and 301 and the insulating layers 102, 202, and 302.
이하, 도 3을 예로 들어 구체적으로 설명하면, 상기 도전성 접착제(100)를 상기 접착성 절연 수지(104)의 경화가 완료되지 않은 온도까지 가열/가압하면, 경화가 완료되지 않은 접착성 절연 수지(104) 내에 도전층(101)은 복수의 도전체(101)를 형성하게 되어 자유롭게 유동될 수 있으며, 전극(111, 121)의 표면에 도전체(101)가 젖음(wetting) 상태가 되어 웨팅 영역(105)을 형성하여 상기 복수의 기판전극(111)과 대향되는 상기 복수의 반도체칩 전극(121)을 각각 전기적으로 접속한다.Hereinafter, referring to FIG. 3 as an example, when the conductive adhesive 100 is heated / pressurized to a temperature at which the curing of the adhesive insulating resin 104 is not completed, the adhesive insulating resin having no curing completed ( The conductive layer 101 in the 104 forms a plurality of conductors 101 so that they can flow freely, and the conductive region 101 is wetted on the surfaces of the electrodes 111 and 121 so that the wetting region is wetted. 105 is formed to electrically connect the plurality of semiconductor chip electrodes 121 opposed to the plurality of substrate electrodes 111, respectively.
또한, 경화가 완료되지 않은 접착성 절연 수지(104)가 유동되어 상기 회로기판(110)과 상기 반도체칩(120) 사이에 충진되며, 상기 기판전극(111), 상기 반도체칩 전극(121) 및 상기 전기적 접합부분들 간을 절연한다.In addition, the adhesive insulating resin 104 which is not cured is flowed and filled between the circuit board 110 and the semiconductor chip 120, and the substrate electrode 111, the semiconductor chip electrode 121, and the like. Insulate between the electrical junctions.
이후, 상기 접착성 절연 수지(104)를 경화시켜 상기 회로기판(110)과 상기 반도체칩(120)을 접착시킬 수 있다.Thereafter, the adhesive insulating resin 104 may be cured to bond the circuit board 110 to the semiconductor chip 120.
즉, 도전층(101)이 용융이 되어 웨팅 영역(101)을 형성하여 단자 사이에 금속 결합 등의 화학적인 결합을 형성할 수가 있어 서로 대향하는 단자 간은 화학적 결합에 의해 접속된 상태가 된다. 이에 따라 상기 단자 간의 전기 저항을 금속 접합과 동등 레벨에서 얻을 수 있으므로 상기 단자 간에 신뢰성이 높은 전기적 접속을 얻을 수 있다. That is, the conductive layer 101 is melted to form the wetting region 101 to form chemical bonds such as metal bonds between the terminals, and the terminals facing each other are connected by chemical bonds. As a result, the electrical resistance between the terminals can be obtained at the same level as that of the metal junction, thereby obtaining a highly reliable electrical connection between the terminals.
또한, 상기 도전층(101)은 하나 또는 다수의 층으로 구성되는 판 형태를 취하기 때문에, 종래 입자의 형태로 분산되어 형성되는 경우에 비해 용융 시 그 응집성이 뛰어나 용이하게 전극(111,121)에 웨팅 영역(105)을 형성한다.In addition, since the conductive layer 101 takes the form of a plate composed of one or a plurality of layers, wetting regions of the electrodes 111 and 121 are excellent in cohesiveness when melting, as compared with a case in which the conductive layer 101 is dispersed and formed in the form of conventional particles. Form 105.
그리고 본 발명에 의하면 접합부의 미세 균열, 파단, 불량 시 재가열을 통해 입자의 재용융에 의한 접합부의 보수성을 얻을 수도 있으며, 특히 상기 도전층의 융점보다 높은 온도로 부분적 또는 전체적으로 재가열하여, 상기 전기적 접합부분을 재용융시켜 대향되는 상기 복수의 기판전극과 상기 복수의 반도체칩 전극 간의 전기적인 접속을 리페어할 수 있는 장점이 있다. And according to the present invention It is also possible to obtain repairability of the joint by remelting the particles through reheating in case of fine cracking, fracture, or failure of the joint. Particularly, the electrical joint is remelted by partially or totally reheating at a temperature higher than the melting point of the conductive layer. There is an advantage in that it is possible to repair the electrical connection between the plurality of substrate electrodes and the plurality of semiconductor chip electrodes that are opposed.
이때, 열전도도가 높은 방열입자는 상기 도전층에 비해 미세하게 형성되고 융점이 높아 상기 가열/가압시 도전 경로를 방해하지 않고, 외측으로 골고루 분산되어 있으므로 방열 특성이 우수해지는 장점이 있다.In this case, the heat dissipation particles having high thermal conductivity are finely formed compared to the conductive layer and have a high melting point, so that the heat dissipation characteristics are evenly distributed to the outside without disturbing the conductive path during heating / pressurization.
도 6은 본 발명의 제2 실시예에 따른 도전성 접착제의 구성도이다.6 is a block diagram of a conductive adhesive according to a second embodiment of the present invention.
본 발명의 도전성 접착제(30)는 용융 가능한 도전입자(22)와, 상기 도전입자의 융점에서 경화가 완료되지 않는 접착성 절연 수지(5), 및 상기 접착성 절연 수지(4)의 경화가 완료되는 온도에서 용융되지 않는 방열입자(4)를 포함한다.In the conductive adhesive 30 of the present invention, the conductive particles 22 that can be melted, the adhesive insulating resin 5 that hardening is not completed at the melting point of the conductive particles, and the curing of the adhesive insulating resin 4 are completed. It includes heat dissipation particles (4) that do not melt at the temperature.
본 발명의 실시예에 따른 도전성 접착제의 도전입자(22)는 가열시 용융되므로 상기 도전성 접착제 중에서 10~60%의 부피비를 갖는다.Since the conductive particles 22 of the conductive adhesive according to the embodiment of the present invention are melted upon heating, they have a volume ratio of 10 to 60% in the conductive adhesive.
이는 상기 도전입자(22)의 부피비가 10%미만이면 접착성 절연 수지(5) 내에서 분산되는 정도가 떨어지고, 60%를 초과하는 경우에는 도전입자(22)가 과밀하게 배치되어 도전입자(22)와 접착성 절연 수지(5)의 혼합상태가 불균일해질 가능성이 있기 때문이다. When the volume ratio of the conductive particles 22 is less than 10%, the degree of dispersion in the adhesive insulating resin 5 decreases, and when the volume ratio exceeds 60%, the conductive particles 22 are densely disposed so that the conductive particles 22 This is because there is a possibility that the mixed state of the resin layer and the adhesive insulating resin 5 becomes nonuniform.
또한, 상기 본 발명의 제2 실시예에 따른 도전성 접착제(30)는 페이스트 상으로 형성될 수도 있고, 필름상으로 형성될 수도 있다. In addition, the conductive adhesive 30 according to the second embodiment of the present invention may be formed into a paste or may be formed into a film.
이하 도전입자(22), 방열입자(4) 및 접착성 절연 수지(5)에 대한 자세한 설명은 제1실시예에 따른 도전성 접착제와 동일하므로 더 이상의 자세한 설명을 생략한다.Hereinafter, detailed descriptions of the conductive particles 22, the heat dissipating particles 4, and the adhesive insulating resin 5 are the same as those of the conductive adhesive according to the first embodiment, and thus detailed descriptions thereof will be omitted.
다만, 상기 도전입자(22)는 제 1 실시예에 따른 도전성 접착제의 도전층과 동일한 재료로 구성될 수 있으나 도전층이 아닌 입자형태로 구성되어 있고, 상기 방열입자(4)는 상기 도전입자(22)의 평균 입경의 약 1/2~1/10 내로 구성될 수 있다.However, the conductive particles 22 may be made of the same material as the conductive layer of the conductive adhesive according to the first embodiment, but may be formed in the form of particles rather than the conductive layer, and the heat radiating particles 4 may be formed of the conductive particles ( 22) to about 1/2 to 1/10 of the average particle diameter.
또한, 상기 도전성 접착제는 용융 가능한 도전입자(22)와, 상기 도전입자(22)의 융점보다 낮은 온도에서 경화되는 접착성 절연 수지(5), 및 상기 도전입자보다 융점이 높은 방열입자(4)를 포함하는 페이스트 또는 필름 형태로 구성될 수도 있다.In addition, the conductive adhesive is meltable conductive particles 22, the adhesive insulating resin (5) cured at a temperature lower than the melting point of the conductive particles 22, and the heat radiation particles (4) having a higher melting point than the conductive particles It may be configured in the form of a paste or film containing.
이때 상기 도전입자(2)는 접착성 절연 수지(5)의 경화 온도보다 높은 융점을 갖는 주석(Sn), 인듐(In), 비스무스(Bi), 은(Ag), 동(Cu), 아연(Zn), 납(Pb), 카드뮴(Cd), 갈륨(Ga), 은(Ag) 및 타륨(Tl) 등으로 형성될 수 있고, 이 외에도 일반적인 고융점 합금이 선택될 수도 있다.In this case, the conductive particles 2 may be formed of tin (Sn), indium (In), bismuth (Bi), silver (Ag), copper (Cu), or zinc (Zn) having a melting point higher than the curing temperature of the adhesive insulating resin 5. Zn), lead (Pb), cadmium (Cd), gallium (Ga), silver (Ag) and tarium (Tl) and the like, in addition to the general high melting point alloy may be selected.
도 7 내지 도 8은 본 발명의 제2 실시예에 따른 반도체 실장 방법의 개략도이다.7 to 8 are schematic views of a semiconductor mounting method according to a second embodiment of the present invention.
본 반도체 실장방법은 페이스트 상태 또는 필름 상태의 도전성 접착제를 이용하여 반도체를 실장하는 원리는 동일한바 이하 페이스트 상태인 도전성 접착제를 기준으로 설명한다.In this semiconductor mounting method, the principle of mounting a semiconductor using a conductive adhesive in a paste state or a film state will be described based on the conductive adhesive in the paste state as follows.
먼저 양 전극 단자(31,32)를 대향시켜 배치하고 그 사이에 본 발명의 제2 실시예에 따른 도전성 접착제(30)를 충전한다. 이때 상기 도전성 접착제(30)은 도 7과 같이 양 전극단자(31,32)에 사이에 전체적으로 충진된다. (이때 도면에는 도시되지 않았으나 기판과 반도체 칩에 복수개의 전극단자가 형성된 경우에도 기판과 반도체 칩 사이에 전체적으로 충진될 수 있다.)First, the positive electrode terminals 31 and 32 are disposed to face each other, and the conductive adhesive 30 according to the second embodiment of the present invention is filled therebetween. In this case, the conductive adhesive 30 is entirely filled between the positive electrode terminals 31 and 32 as shown in FIG. 7. (At this time, although not shown in the drawing, even when a plurality of electrode terminals are formed on the substrate and the semiconductor chip, the entirety may be filled between the substrate and the semiconductor chip.)
이후, 도전입자(22)가 용융될 수 있도록 소정 온도로 가열하고, 전극단자(31,32) 사이의 간격이 좁아지도록 가압한다.Thereafter, the conductive particles 22 are heated to a predetermined temperature so that they can be melted, and are pressed to narrow the gap between the electrode terminals 31 and 32.
이러한 가열/가압과정을 통하여 상기 접착성 절연 수지(5)는 수십~수백 cps의 점도를 갖게 되어 상기 용융된 도전입자(22)는 이웃한 도전입자(22)와 융합되어 양 전극단자(31,32) 사이를 전기적으로 연결하는 웨팅 영역(33)을 형성하게 된다.Through the heating / pressing process, the adhesive insulating resin 5 has a viscosity of several tens to hundreds of cps, and the molten conductive particles 22 are fused with neighboring conductive particles 22 to form both electrode terminals 31, Wetting areas 33 are formed that electrically connect between the 32.
이때 상기 도전입자(22)의 융합 형태에 따라 국소적으로 다양한 형태의 웨팅 영역(33a, 33b, 33c)을 구성하게 된다. 이때, 방열입자(4)는 전술한 바와 같이 상기 도전입자(22)보다 융점이 높고, 크기가 작도록 구성되어 용융된 도전입자(22)가 융합되어 양 기판(31,32) 사이를 전기적으로 연결할 때 상기 웨팅 영역(33)에서 이탈되어 접착제 외측으로 골고루 분산될 수 있다.In this case, wetting regions 33a, 33b, and 33c may be locally formed according to the fusion form of the conductive particles 22. At this time, the heat-dissipating particles (4) has a melting point higher than the conductive particles (22) as described above, the size is configured to be smaller so that the molten conductive particles 22 are fused to electrically between the substrate (31, 32) When connected, the wetting region 33 may be separated and evenly distributed to the outside of the adhesive.
이에 따라, 양 기판(31,32) 간의 전기저항을 솔더링과 동등한 정도의 낮은 전기저항을 얻을 수 있어 대향하는 단자 간에 전기적 접속 신뢰성을 향상시킬 수 있다.As a result, a low electric resistance equivalent to the soldering of the electric resistance between the two substrates 31 and 32 can be obtained, and the electrical connection reliability between the opposing terminals can be improved.
이후, 접착성 절연 수지(5)는 경화가 완료되어 웨팅 영역(33) 이외의 부분을 절연시킨다. 즉, 대향되는 기판(31,32) 사이에 웨팅 영역 (33)이외의 공간을 절연시킨다.After that, the adhesive insulating resin 5 is cured to insulate portions other than the wetting region 33. That is, the space other than the wetting region 33 is insulated between the opposing substrates 31 and 32.
이때 접착성 절연 수지(5)의 종류에 따라 수지의 경화방법은 다르게 진행될 수 있다.At this time, the curing method of the resin may proceed differently depending on the type of the adhesive insulating resin (5).
그러나 반도체 실장 방법은 반드시 이에 한정되는 것은 아니고, 도 8과 같이 도전성 접착제(30)를 페이스트 상으로 형성하여 부품의 전극단자(35a) 또는 기판의 전극단자(36a) 중 어느 한 측에 국소적으로 충진하고 가열/가압하여 양 전극단자(35a, 36a) 사이에 웨팅영역(33)을 형성할 수도 있고, 도전성 접착제(30)를 필름 상으로 형성하여 기판과 반도체 칩 사이에 위치시킬 수도 있는 것이다.However, the semiconductor mounting method is not necessarily limited thereto, and as shown in FIG. 8, the conductive adhesive 30 is formed into a paste to be locally formed on either side of the electrode terminal 35a of the part or the electrode terminal 36a of the substrate. The filling region 33 may be filled and heated / pressurized to form a wetting region 33 between the positive electrode terminals 35a and 36a, or may be formed between the substrate and the semiconductor chip by forming a conductive adhesive 30 on a film.
또한, 접착성 절연수지(5)의 경화 온도가 도전입자(22)의 용융 온도보다 낮은 경우에도 도전성 접착제(30)를 이용한 반도체 실장방법은 앞서 설명한 바와 동일하게 적용될 수 있다. In addition, even when the curing temperature of the adhesive insulating resin 5 is lower than the melting temperature of the conductive particles 22, the semiconductor mounting method using the conductive adhesive 30 can be applied in the same manner as described above.
다만, 상기 가열/가압과정에서 도전입자(22)와 방열입자(4)는 용융되지 않는 반면 상기 접착성 절연 수지(5)는 용융되어 수십~수백 cps의 점도를 갖게 되므로 상기 용융되지 않은 도전입자(22)는 자유롭게 유동하여 전극(도 7의 31,32 또는 도 8의 35a, 36a) 사이에 구속되어 기계적/물리적 결합에 의해 양 전극 간을 전기적으로 연결하게 된다.However, the conductive particles 22 and the heat-dissipating particles 4 are not melted during the heating / pressing process, whereas the adhesive insulating resin 5 is melted to have a viscosity of several tens to hundreds of cps. 22 is free to flow and is constrained between the electrodes (31, 32 in FIG. 7 or 35a, 36a in FIG. 8) to electrically connect the two electrodes by mechanical / physical coupling.
도 9 및 도 10는 본 발명의 일 실시예에 따른 웨이퍼 레벨 패키지의 개념도이다.9 and 10 are conceptual diagrams of a wafer level package according to an embodiment of the present invention.
본 발명의 일 실시예에 따른 웨이퍼 레벨 패키지는 도전성 접착제(500)를 복수의 반도체 칩(도시되지 않음)이 형성된 웨이퍼(400)의 표면에 배치시키고, 상기 웨이퍼(400)를 다이싱하여 형성된다.A wafer level package according to an embodiment of the present invention is formed by placing a conductive adhesive 500 on a surface of a wafer 400 on which a plurality of semiconductor chips (not shown) are formed and dicing the wafer 400. .
이때 상기 도전성 접착제(500)를 페이스트 또는 필름 형태로 제조되어 상기 웨이퍼(400) 상에 형성될 수도 있다.In this case, the conductive adhesive 500 may be manufactured in the form of a paste or a film to be formed on the wafer 400.
여기서 도전 접착제(500)는 도전입자(22)와 상기 도전입자(22)의 융점에서 용융되지 않는 방열입자(4) 및 절연 수지(5)를 포함하며, 층의 구분 없이 접착성 절연 수지 내에 도전입자와 방열입자가 분산된 형태로 구성될 수 있다.Here, the conductive adhesive 500 includes conductive particles 22 and heat-dissipating particles 4 and insulating resins 5 which do not melt at the melting point of the conductive particles 22, and are conductive in the adhesive insulating resin without classifying the layers. Particles and heat dissipation particles may be configured in a dispersed form.
이하 도전입자(22)와 방열입자(4) 및 접착성 절연 수지(5)에 대하여는 앞서 설명한 바와 동일하므로 자세한 설명을 생략한다.Hereinafter, since the conductive particles 22, the heat dissipating particles 4, and the adhesive insulating resin 5 are the same as described above, detailed descriptions thereof will be omitted.
이러한 구성에 의하여 반도체 실장시 별도의 접착제를 구비할 필요 없이 바로 가열/가압하여 반도체를 실장할 수 있는 장점이 있다.By such a configuration, there is an advantage in that the semiconductor can be directly mounted by heating / pressurizing without the need for a separate adhesive when mounting the semiconductor.
위에서 설명된 본 발명의 바람직한 실시예는 예시의 목적을 위해 개시된 것이고, 본 발명에 대한 통상의 지식을 가지는 당업자라면 본 발명의 사상과 범위 안에서 다양한 수정, 변경, 부가가 가능할 것이며, 이러한 수정, 변경 및 부가는 하기의 특허청구범위에 속하는 것으로 보아야 할 것이다.Preferred embodiments of the present invention described above are disclosed for purposes of illustration, and those skilled in the art having various ordinary knowledge of the present invention will be able to make various modifications, changes, and additions within the spirit and scope of the present invention. And additions should be considered to be within the scope of the following claims.

Claims (32)

  1. 용융 가능한 도전입자;Meltable conductive particles;
    상기 도전입자의 융점에서 경화가 완료되지 않는 접착성 절연 수지; 및An adhesive insulating resin in which hardening is not completed at the melting point of the conductive particles; And
    상기 접착성 절연 수지의 경화가 완료되는 온도에서 용융되지 않는 방열입자를 포함하는 도전성 접착제.A conductive adhesive comprising heat-dissipating particles that do not melt at a temperature at which curing of the adhesive insulating resin is completed.
  2. 용융 가능한 도전입자; Meltable conductive particles;
    상기 도전입자보다 융점이 높은 방열 입자; 및Heat dissipation particles having a higher melting point than the conductive particles; And
    상기 도전입자의 융점보다 낮은 경화 온도를 갖는 접착성 절연 수지를 포함하는 도전성 접착제.A conductive adhesive comprising an adhesive insulating resin having a curing temperature lower than the melting point of the conductive particles.
  3. 용융 가능한 도전층; 및A meltable conductive layer; And
    상기 도전층의 융점에서 경화가 완료되지 않는 접착성 절연 수지를 포함하는 절연층;을 포함하고,And an insulating layer comprising an adhesive insulating resin which is not cured at the melting point of the conductive layer.
    상기 도전층과 절연층에 상기 접착성 절연 수지의 경화가 완료되는 온도에서 용융되지 않는 방열입자가 선택적으로 포함된 도전성 접착제.A conductive adhesive optionally comprising heat dissipating particles that do not melt at a temperature at which the curing of the adhesive insulating resin is completed in the conductive layer and the insulating layer.
  4. 제1항 또는 제2항에 있어서, The method according to claim 1 or 2,
    페이스트 상인 것을 특징으로 하는 도전성 접착제.It is a paste form, The electrically conductive adhesive characterized by the above-mentioned.
  5. 제1항 또는 제2항에 있어서,The method according to claim 1 or 2,
    필름 상인 것을 특징으로 하는 도전성 접착제.It is a film form, The electrically conductive adhesive characterized by the above-mentioned.
  6. 제3항에 있어서,The method of claim 3,
    상기 도전층과 상기 절연층이 교번하여 적층되는 것을 특징으로 하는 도전성 접착제.A conductive adhesive, characterized in that the conductive layer and the insulating layer are laminated alternately.
  7. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 접착성 절연 수지는 열가소성 수지, 열경화성 수지 및 광반응성 수지로 이루어진 그룹으로부터 선택된 하나 이상인 것을 특징으로 하는 도전성 접착제.The adhesive insulating resin is a conductive adhesive, characterized in that at least one selected from the group consisting of a thermoplastic resin, a thermosetting resin and a photoreactive resin.
  8. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 접착성 절연 수지는 표면활성화수지를 포함하는 것을 특징으로 하는 도전성 접착제.The adhesive insulating resin is a conductive adhesive, characterized in that it comprises a surface-activated resin.
  9. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 접착성 절연 수지는 플럭스, 표면활성제, 경화제 중 적어도 하나를 더 포함하는 것을 특징으로 하는 도전성 접착제.The adhesive insulating resin further comprises at least one of a flux, a surface active agent, a curing agent.
  10. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 방열입자는 상기 도전입자보다 크기가 작은 것을 특징으로 하는 도전성 접착제.The heat dissipation particle is a conductive adhesive, characterized in that the smaller than the conductive particle size.
  11. 제1항 또는 제3항에 있어서,The method according to claim 1 or 3,
    상기 방열입자의 평균 직경은 도전입자 직경의 1/10 이상에서 1/2 이하이고 크기가 상이한 것을 특징으로 하는 도전성 접착제.Conductive adhesive, characterized in that the average diameter of the heat-dissipating particles is 1/10 or more of the diameter of the conductive particles and less than 1/2 and different in size.
  12. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 방열입자는 도전성을 갖는 금, 은, 구리, 텅스텐, 탄소나노튜브(CNT) 및 이들의 혼합물 등으로 이루어진 그룹으로부터 선택된 하나 이상인 것을 특징으로 하는 도전성 접착제.The heat dissipation particle is a conductive adhesive, characterized in that at least one selected from the group consisting of conductive gold, silver, copper, tungsten, carbon nanotubes (CNT) and mixtures thereof.
  13. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 방열입자는 비도전성 입자로 이루어진 것을 특징으로 하는 도전성 접착제.The heat dissipation particle is a conductive adhesive, characterized in that consisting of non-conductive particles.
  14. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 방열입자는 테플론, 폴리에틸렌, 알루미나, 실리카, 글라스 및 실리콘 카바이드로 및 이들의 혼합물 등으로 이루어진 그룹으로부터 선택된 하나 이상인 것 특징으로 하는 도전성 접착제.The heat dissipating particles are at least one selected from the group consisting of Teflon, polyethylene, alumina, silica, glass and silicon carbide, and mixtures thereof, and the like.
  15. 제1항 또는 제3항에 있어서,The method according to claim 1 or 3,
    상기 방열입자는 상기 접착성 절연 수지에 대하여 3% 내지 50%의 부피비로 포함되는 것을 특징으로 하는 도전성 접착제.The heat-dissipating particles are conductive adhesive, characterized in that contained in a volume ratio of 3% to 50% with respect to the adhesive insulating resin.
  16. 제1항 또는 제3항에 있어서,The method according to claim 1 or 3,
    상기 방열입자는 수지입자에 코팅되어 형성되는 것을 특징으로 하는 도전성 접착제.The heat-dissipating particles are conductive adhesive, characterized in that formed by coating on the resin particles.
  17. 복수의 기판 전극이 형성된 기판에 상기 복수의 반도체칩 전극이 형성된 반도체 칩을 실장하는 반도체 실장 방법에 있어서,In a semiconductor mounting method for mounting a semiconductor chip formed with the plurality of semiconductor chip electrodes on a substrate on which a plurality of substrate electrodes are formed,
    상기 반도체와 기판 사이에 용융 가능한 도전입자와, 상기 도전입자의 융점에서 경화가 완료되지 않는 접착성 절연 수지 및 상기 접착성 절연 수지의 경화가 완료되는 온도에서 용융되지 않는 방열입자를 포함하는 도전성 접착제를 배치하는 단계;A conductive adhesive comprising meltable conductive particles between the semiconductor and the substrate, an adhesive insulating resin that is not cured at the melting point of the conductive particles, and heat dissipating particles that are not melted at a temperature at which curing of the adhesive insulating resin is completed Arranging;
    상기 도전성 접착제를 가열/가압하여 상기 도전입자가 상기 상/하 전극단자 사이에 웨팅 영역을 형성하여 전극단자간을 전기적으로 연결하는 단계;Heating / pressurizing the conductive adhesive to form a wetting region between the upper and lower electrode terminals to electrically connect the electrode terminals to each other;
    상기 접착성 절연 수지를 경화시켜 상기 상/하 전극단자를 접착시키는 단계를 포함하는 반도체 실장방법.Hardening the adhesive insulating resin to bond the upper and lower electrode terminals.
  18. 복수의 기판 전극이 형성된 기판에 상기 복수의 반도체칩 전극이 형성된 반도체 칩을 실장하는 반도체 실장 방법에 있어서,In a semiconductor mounting method for mounting a semiconductor chip formed with the plurality of semiconductor chip electrodes on a substrate on which a plurality of substrate electrodes are formed,
    상기 반도체와 기판 사이에 용융 가능한 도전입자와 상기 도전입자보다 융점이 높은 방열 입자 및 상기 도전성 입자의 융점보다 낮은 경화 온도를 갖는 접착성 절연 수지를 포함하는 도전성 접착제를 배치하는 단계;Disposing a conductive adhesive between the semiconductor and the substrate, the conductive adhesive including meltable conductive particles, heat dissipating particles having a higher melting point than the conductive particles, and an adhesive insulating resin having a curing temperature lower than the melting point of the conductive particles;
    상기 도전성 접착제를 가열/가압하여 상기 도전입자가 상기 상/하 전극단자 사이에 구속되어 전극단자 간을 전기적으로 연결하는 단계; 및 Heating / pressurizing the conductive adhesive to constrain the conductive particles between the upper and lower electrode terminals to electrically connect the electrode terminals; And
    상기 접착성 절연 수지를 경화시켜 상기 상/하 전극단자를 접착시키는 단계를 포함하는 반도체 실장방법.Hardening the adhesive insulating resin to bond the upper and lower electrode terminals.
  19. 복수의 기판 전극이 형성된 기판에 상기 복수의 반도체칩 전극이 형성된 반도체 칩을 실장하는 반도체 실장 방법에 있어서,In a semiconductor mounting method for mounting a semiconductor chip formed with the plurality of semiconductor chip electrodes on a substrate on which a plurality of substrate electrodes are formed,
    상기 기판과 상기 반도체칩 사이에 용융 가능한 도전층 및 상기 도전층의 융점에서 경화가 완료되지 않는 접착성 절연 수지를 포함하는 절연층을 포함하고, 상기 도전층과 절연층에 상기 접착성 절연 수지의 경화가 완료되는 온도에서 용융되지 않는 방열입자가 선택적으로 포함된 도전성 접착제를 배치하는 단계;An insulating layer comprising an electrically conductive layer meltable between the substrate and the semiconductor chip and an adhesive insulating resin that is not cured at the melting point of the conductive layer, wherein the adhesive insulating resin is formed on the conductive layer and the insulating layer. Disposing a conductive adhesive optionally including heat-dissipating particles that do not melt at a temperature at which curing is completed;
    상기 도전성 접착제를 가열/가압하여 접착성 절연 수지가 용융되어 상기 도전층이 상기 기판전극과 대향되는 상기 반도체칩 전극 사이에 퍼져 웨팅 영역을 형성하여 전극간을 전기적으로 연결하는 단계; 및Heating / pressing the conductive adhesive to melt an adhesive insulating resin to spread the conductive layer between the semiconductor chip electrodes facing the substrate electrode to form a wetting region to electrically connect the electrodes; And
    상기 접착성 절연 수지를 경화시켜 상기 기판과 상기 반도체칩을 접착시키는 단계를 포함하는 것을 특징으로 하는 반도체 실장방법.Hardening the adhesive insulating resin to bond the substrate to the semiconductor chip.
  20. 제17항 또는 제18항에 있어서,The method of claim 17 or 18,
    상기 도전성 접착제는 페이스트 상으로 형성되어 상기 반도체와 기판 사이에 충진되는 것을 특징으로 하는 반도체 실장방법.The conductive adhesive is formed in a paste shape is a semiconductor mounting method, characterized in that the filling between the semiconductor and the substrate.
  21. 제17항 또는 제18항에 있어서,The method of claim 17 or 18,
    상기 도전성 접착제는 페이스트 상으로 형성되어 상기 반도체칩 또는 기판의 각 전극단자에 충진되는 것을 특징으로 하는 반도체 실장방법.The conductive adhesive is formed in a paste shape is a semiconductor mounting method, characterized in that the filling in each electrode terminal of the semiconductor chip or substrate.
  22. 제17항 내지 제19항 중 어느 한 항에 있어서,The method according to any one of claims 17 to 19,
    상기 도전성 접착제는 필름 상으로 형성되어 상기 반도체와 기판 사이에 배치되는 것을 특징으로 하는 반도체 실장방법.The conductive adhesive is formed on a film and a semiconductor mounting method, characterized in that disposed between the semiconductor and the substrate.
  23. 제17항 또는 제19항에 있어서,The method of claim 17 or 19,
    상기 방열입자의 크기는 상기 복수의 기판 전극과 복수의 반도체칩 전극의 최종 접합 거리보다 작은 것을 특징으로 하는 반도체 실장방법.And the size of the heat dissipation particles is smaller than a final bonding distance between the plurality of substrate electrodes and the plurality of semiconductor chip electrodes.
  24. 제17항 또는 제18항에 있어서,The method of claim 17 or 18,
    상기 도전입자는 Sn-37Pb, Sn-57Bi, Sn-52In, Sn-44In-14Cd, Sn-3.5Ag, Sn-2.5Ag-10Sb, Sn-4.7Ag-1.7Cu 등으로 이루어진 그룹으로부터 선택된 하나 이상인 것을 특징으로 하는 반도체 실장방법.The conductive particles may be at least one selected from the group consisting of Sn-37Pb, Sn-57Bi, Sn-52In, Sn-44In-14Cd, Sn-3.5Ag, Sn-2.5Ag-10Sb, Sn-4.7Ag-1.7Cu, and the like. A semiconductor mounting method characterized by the above-mentioned.
  25. 제19항에 있어서,The method of claim 19,
    상기 도전층은 Sn-37Pb, Sn-57Bi, Sn-52In, Sn-44In-14Cd, Sn-3.5Ag, Sn-2.5Ag-10Sb, Sn-4.7Ag-1.7Cu 등으로 이루어진 그룹으로부터 선택된 하나 이상인 것을 특징으로 하는 반도체 실장방법.The conductive layer is one or more selected from the group consisting of Sn-37Pb, Sn-57Bi, Sn-52In, Sn-44In-14Cd, Sn-3.5Ag, Sn-2.5Ag-10Sb, Sn-4.7Ag-1.7Cu, and the like. A semiconductor mounting method characterized by the above-mentioned.
  26. 제17항 내지 제19항 중 어느 한 항에 있어서,The method according to any one of claims 17 to 19,
    상기 접착성 절연 수지는 열가소성 수지, 열경화성 수지 및 광반응성 수지로 이루어진 그룹으로부터 선택된 하나 이상인 것을 특징으로 하는 반도체 실장방법.The adhesive insulating resin is at least one member selected from the group consisting of a thermoplastic resin, a thermosetting resin and a photoreactive resin.
  27. 제17항 또는 제19항에 있어서,The method of claim 17 or 19,
    상기 방열입자의 평균 직경은 도전입자 직경의 1/10 이상에서 1/2 이하이고 크기가 상이한 것을 특징으로 하는 반도체 실장방법.The average diameter of the heat-dissipating particles is a semiconductor mounting method, characterized in that the size is different from 1/10 or more of the diameter of the conductive particles and less than 1/2.
  28. 제17항 내지 제19항 중 어느 한 항에 있어서,The method according to any one of claims 17 to 19,
    상기 방열입자는 도전성을 갖는 금, 은, 구리, 텅스텐, 탄소나노튜브(CNT) 및 이들의 혼합물 등으로 이루어진 그룹으로부터 선택된 하나 이상인 것을 특징으로 하는 반도체 실장방법.The heat dissipation particle is a semiconductor mounting method, characterized in that at least one selected from the group consisting of conductive gold, silver, copper, tungsten, carbon nanotubes (CNT) and mixtures thereof.
  29. 제17항 내지 제19항 중 어느 한 항에 있어서,The method according to any one of claims 17 to 19,
    상기 방열입자는 테플론, 폴리에틸렌, 알루미나, 실리카, 글라스 및 실리콘 카바이드로 및 이들의 혼합물로 이루어진 그룹으로부터 선택된 하나 이상인 것 특징으로 하는 반도체 실장방법.The heat dissipation particle is at least one selected from the group consisting of Teflon, polyethylene, alumina, silica, glass and silicon carbide, and mixtures thereof.
  30. 제17항 또는 제19항 중 어느 한 항에 있어서,The method according to claim 17 or 19,
    상기 방열입자는 상기 접착성 절연 수지에 대하여 3% ~ 50%의 부피비로 포함되는 것을 특징으로 하는 반도체 실장방법.The heat dissipation particle is a semiconductor mounting method, characterized in that contained in a volume ratio of 3% to 50% with respect to the adhesive insulating resin.
  31. 제17항 내지 제19항 중 어느 한 항에 있어서,The method according to any one of claims 17 to 19,
    상기 방열입자는 가열/가압시 상기 웨팅 영역 외부로 이탈하는 것을 특징으로 하는 반도체 실장방법.The heat dissipation particle is a semiconductor mounting method, characterized in that when the heating / pressurized out of the wetting region.
  32. 제1항의 도전성 접착제를 포함하는 웨이퍼 레벨 패키지.A wafer level package comprising the conductive adhesive of claim 1.
PCT/KR2010/002390 2009-08-14 2010-04-16 Conductive adhesive, semiconductor mounting method using same, and wafer level package WO2011019132A1 (en)

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KR1020090075214A KR101182714B1 (en) 2009-08-14 2009-08-14 Method for packaging semiconductors using anisotropic conductive adhesive
KR10-2009-0110523 2009-11-16
KR1020090110523A KR101637401B1 (en) 2009-11-16 2009-11-16 Conductive adhesive, method for packaging semiconductors and wafer level package using the same

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