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WO2011016080A1 - Information processor and information processing method - Google Patents

Information processor and information processing method Download PDF

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Publication number
WO2011016080A1
WO2011016080A1 PCT/JP2009/003716 JP2009003716W WO2011016080A1 WO 2011016080 A1 WO2011016080 A1 WO 2011016080A1 JP 2009003716 W JP2009003716 W JP 2009003716W WO 2011016080 A1 WO2011016080 A1 WO 2011016080A1
Authority
WO
WIPO (PCT)
Prior art keywords
mode
information processing
recording medium
power control
power
Prior art date
Application number
PCT/JP2009/003716
Other languages
French (fr)
Japanese (ja)
Inventor
工藤亨
木村真敏
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to PCT/JP2009/003716 priority Critical patent/WO2011016080A1/en
Publication of WO2011016080A1 publication Critical patent/WO2011016080A1/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24Resetting means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/81Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/82Protecting input, output or interconnection devices
    • G06F21/85Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4418Suspend and resume; Hibernate and awake
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present invention relates to an information processing apparatus and an information processing method that handle a power saving function, and more specifically, relates to an information processing technique for returning from a power saving mode such as a sleep state or a hibernation state.
  • An information processing apparatus having a power saving function having a power saving mode such as a sleep state or a hibernation state is also known.
  • ACPI Advanced Configuration and Power Interface
  • the information processing device By the way, by inserting the memory card into the memory card slot of the information processing device when the information processing device is in the power saving state, the information processing device is returned from the power saving state and a predetermined desired procedure is executed. There is a request for it.
  • a desired procedure for example, a specific program related to data contained in the inserted memory card (for example, a program for executing a slide show using image data in the card) is automatically started.
  • Etc it is conventionally possible for a user to execute a desired procedure by performing a predetermined operation after returning the information processing apparatus from the power saving state by pressing a power button or the like, but that is complicated. This is the reason for the above request.
  • the conventional information processing apparatus cannot execute a desired procedure such as automatically starting a specific program by inserting a memory card. This point will be described in more detail with reference to FIG.
  • FIG. 1 is a block diagram for explaining power control for each unit in a computer as a conventional information processing apparatus.
  • This computer is configured to accept an SD card as a recording medium.
  • the computer shown in FIG. 1 includes a chip set 2, a CPU 3, a power supply unit 4, an SD card slot 5, an SD card controller 6, and the like.
  • the power supply unit 4 is instructed by the power control signal from the chip set 2 by a power control signal, and sets a power supply state for each unit in the computer according to the power control mode.
  • a solid line (power (always)) drawn from the power supply unit 4 indicates a state in which power is supplied without changing from the normal state even in the power saving state.
  • a dotted line drawn from the power supply unit 4 indicates a state where the power supply is restricted more than the normal state in the power saving state.
  • the switch in the SD card slot 5 When the computer shown in FIG. 1 is in a normal operation state (not in a power saving state), the switch in the SD card slot 5 is in a state where the SD card is inserted into the SD card slot 5 or not inserted. Is turned on (card detection signal is at low level) or off (card detection signal is at high level). As a result, the SD card controller 6 recognizes the acceptance state of the SD card (either the state in which the SD card is inserted or the state in which the SD card is not inserted).
  • the card detection signal can be recognized through the operating system (OS) and the device driver of the SD card slot 5.
  • OS operating system
  • the OS is not activated and the card detection signal cannot be recognized.
  • an information processing apparatus and an information processing method capable of returning from a power saving state and executing a desired procedure by accepting a recording medium in the power saving state.
  • the purpose is to do.
  • a first aspect is an information processing apparatus capable of receiving a recording medium from the outside.
  • This information processing device (A) a recording medium receiving unit that generates a first signal indicating whether or not a recording medium is received; (B) A power supply unit that operates in a power supply control mode including a first mode in which power is supplied to each unit of the information processing apparatus and a second mode in which power supply is limited more than in the first mode; (C) having a plurality of terminals for activating the information processing apparatus, wherein the first terminal is assigned for the first signal among the plurality of terminals, and the power control mode is the second mode; A power control unit that controls the power supply unit to shift the power control mode from the second mode to the first mode when it is determined that the recording medium is newly received based on the first signal; (D) an execution unit that executes a predetermined procedure in accordance with preset first setting information when the power supply control mode shifts from the second mode to the first mode due to newly receiving a recording medium; Is provided.
  • a second aspect is an
  • the disclosed information processing apparatus and information processing method it is possible to return from the power saving state and execute a desired procedure by accepting the recording medium when the information processing apparatus is in the power saving state.
  • the block diagram for demonstrating the power supply control with respect to each part in the computer as a conventional information processing apparatus The block diagram which shows the structure of the computer of 1st Embodiment.
  • the block diagram for demonstrating the power supply control with respect to each part in the computer of 1st Embodiment The figure which shows the hierarchical relationship on hardware about the software which operate
  • the flowchart which shows the procedure of the action setting in a data acquisition program in the computer of 1st Embodiment. 6 is a flowchart illustrating a processing procedure when the computer according to the first embodiment shifts from ACPI-S0 to any one of ACPI-S3 to S5. 6 is a flowchart showing a processing procedure when the computer according to the first embodiment returns from any one of ACPI-S3 to S5 to an ACPI-S0 state.
  • the block diagram for demonstrating the power supply control with respect to each part on hardware in the computer of 2nd Embodiment. 9 is a flowchart showing a processing procedure when the computer according to the second embodiment shifts from ACPI-S0 to any state of ACPI-S4 or S5.
  • a computer as an information processing apparatus will be described.
  • a computer that can accept an SD card as a recording medium will be described.
  • the recording medium is not limited to an SD card, and any medium that stores data may be used.
  • another type of memory card such as a memory stick (registered trademark) may be used as the recording medium.
  • FIG. 2 shows a power supply control mode defined by ACPI.
  • this computer includes ACPI-S0 to S5 as power control modes.
  • ACPI-S0 is a normal operation state in which the computer is turned on.
  • ACPI-S1 is in a state of lower power consumption than ACPI-S0.
  • ACPI-S2 is a state in which power supply to the CPU is turned off.
  • ACPI-S3 is in a sleep state and means suspend to RAM. In the sleep mode, when the computer is turned off, the HDD (Hard Disk Drive) and various devices are turned off, but power is supplied to the RAM and the data being executed is held as it is.
  • HDD Hard Disk Drive
  • ACPI-S4 is in a dormant state (hibernation) and means suspending to the HDD.
  • hibernation the contents of the RAM are saved in the HDD, and then the power of various devices including the RAM is turned off.
  • the computer is subsequently turned on, the contents saved in the HDD are read out to the RAM and restored.
  • ACPI-S5 is in a state where the computer is turned off by software (shutdown).
  • ACPI-S0 corresponds to the first mode
  • any of ACPI-S3 to S5 corresponds to the second mode.
  • FIG. 3 is a block diagram showing the hardware configuration of the computer.
  • the computer includes a chip set 12 (power control unit), a CPU 13, a power supply unit 14, an SD card slot 15 (recording medium receiving unit), an SD card controller 16 (recording medium control unit), a main A RAM 17 as a memory, a BIOS-ROM 18, an HDD 21, and various devices 22 for computer input / output are included.
  • the chip set 12 is connected to each part of the computer by a bus.
  • the CPU 13 executes various programs provided in the computer.
  • the RAM 17 is a main memory of the CPU 13 and is a volatile storage device for temporarily storing programs executed by the CPU 13 and data referred to by the CPU 13.
  • the chip set 12 includes a control circuit for an interface between the CPU 13 and other units, and a register for controlling the units.
  • the chip set 12 corresponds to GPI (General Purpose Interface) which is a general purpose interface.
  • GPI General Purpose Interface
  • GPIO General Purpose Input / Output terminals (a plurality of terminals) are provided in the chipset 12.
  • the chip set 12 is configured to start up the computer (including “return” from the power saving state) or shut down based on an external input signal to each GPIO terminal.
  • Each GPIO terminal is managed by setting a control register in the chipset 12 as to whether to enable or disable the startup or shutdown of the computer based on the input to the GPIO terminal.
  • an event that the computer starts (including “return” from the power saving state) based on an input to the GPIO terminal is referred to as a “GPI event”.
  • the BIOS-ROM 18 stores a basic input / output system (BIOS) that is a basic input / output system (program) for performing basic input / output processing with hardware.
  • BIOS basic input / output system
  • a GPI event reception setting is made for validating or invalidating a GPI event generated by insertion (acceptance) of an SD card.
  • the GPI event reception setting value is, for example, 1-bit data indicating “valid” or “invalid”, and is reflected in the setting of the control register of the GPIO (n) terminal of the chipset 12.
  • the power supply unit 14 performs power control, which will be described later, in cooperation with the chipset 12, and supplies power to each unit of the computer or restricts power supply.
  • the HDD 21 as a storage is a non-volatile storage device, and stores an OS such as Windows (registered trademark) and a program executed on the OS.
  • the device 22 generically represents one or a plurality of input / output devices of a computer such as a mouse as an input device and a display device as an output device.
  • the SD card slot 15 is configured so that an SD card as an external recording medium can be inserted or removed.
  • the SD card slot 15 is connected to an SD card controller 16 having an interface function with the SD card.
  • FIG. 4 is a diagram illustrating a hierarchical relationship on hardware of software operating on the computer according to the embodiment.
  • FIG. 5 is a diagram exemplifying a setting screen after a data capturing program described later is started.
  • a virtual device driver is a virtual device driver provided by the BIOS.
  • the data capture program is a program that starts with the OS after the power is turned on, and stays in the RAM 17 after the computer is started until the power is turned off.
  • a setting screen illustrated in FIG. 5 is displayed on a display device (not shown) connected to the computer.
  • the data capture program Recognizing the input from the computer user made through this setting screen, the data capture program stores the following action setting data (action setting data; first setting information) in the registry of the OS.
  • the CPU 13 that executes the data capturing program is an embodiment of the execution unit of the present invention.
  • the application programs P1 to P3 that are executed when the power-on when the SD card is inserted are enabled correspond to each action that can be set by the data capture program.
  • the application program P1 is a program for automatically fetching data in the SD card to a predetermined area in the HDD 21, and corresponds to the action “automatic data fetch” in FIG.
  • the application program P2 is a program for automatically reproducing a slide show based on data in the SD card, and corresponds to the action “slide show automatic reproduction” in FIG.
  • the application program P3 is a program for displaying a predetermined selection screen regarding data in the SD card, and corresponds to the action of “selection screen display” in FIG. Even when the power-on when the SD card is inserted is validated, the selection of “do nothing” can be taken.
  • the data capture program sets the GPI event reception setting provided in the BIOS to “valid” via the virtual device driver based on the selection of whether to enable or disable the power-on when the SD card is inserted in the action setting. "Or” Invalid ".
  • the setting value of the GPI event reception of the BIOS is reflected in the setting of the control register (third setting information) of the GPIO (n) terminal of the chip set 12 described later.
  • FIG. 6 is a block diagram for explaining power control for each unit on the hardware in the computer according to the embodiment.
  • FIG. 7 is a diagram for explaining the contents of a register related to power control provided in the chip set 12.
  • the solid line (power (always)) drawn from the power supply unit 14 is in a state where power is supplied in the power saving state (for example, ACPI-S3 to S5) as in the normal operation state (ACPI-S0). Is shown.
  • power is constantly supplied to the chipset 12 and the SD card controller 16.
  • a dotted line drawn from the power supply unit 14 indicates a state in which power supply is restricted more than in a normal operation state in the power saving state.
  • the limitation of power supply is to reduce the power supplied to a part or all of the computer from the normal operation state or to stop the power supply to a part or all of the computer. Including that.
  • the specifications of power supply to each part of the computer in each state of ACPI-S0 to S5 are defined in advance.
  • the power supply unit 14 performs power supply defined in advance for each state of ACPI-S0 to S5.
  • the OS rewrites the power supply control register so that only the value of the S3 flag indicates “1” and the values of the other flags all indicate “0”. It will be.
  • the chip set 12 sequentially refers to the power control register and sends a power control signal corresponding to the value of the power control register to the power supply unit 14.
  • the power supply unit 14 sets a power supply state for each unit in the computer based on the power control signal from the chipset 12.
  • a signal line between the SD card slot 15 and the SD card controller 16 branches, and a signal line L15 between the SD card slot 15 and the chip set 12 is provided.
  • the signal line L15 is connected to a GPIO (n) terminal (first terminal) which is one of the plurality of GPIO terminals of the chip set 12. Since power is always supplied to the chipset 12, the SD card slot 15 is inserted into the SD card slot 15 in a state where the SD card is inserted into the SD card slot 15 or not in the power saving state of the computer. Are switched on (card detection signal is at low level) or off (card detection signal is at high level). In accordance with the logic level of the card detection signal, GPIO (n) of the chip set 12 becomes a high level or a low level.
  • FIG. 6 shows that power is supplied to the SD card controller 16 even in the power saving state, it is not necessarily supplied in the power saving state. That is, in the computer according to the present embodiment, the signal line L15 for directly taking the card detection signal into the chip set 12 is provided. Therefore, the chip set 12 does not need to recognize that the SD card has been inserted via the bus with the SD card controller 16. Therefore, in the present embodiment, power supply to the SD card controller 16 may be stopped in the power saving state of the computer.
  • an input to the GPIO terminal for the chipset 12 (always power supply) or another request signal that can start the computer (for example, in FIG. 6, a wake-up signal based on pressing of the power button) (Wakeup) is described.) Is configured to return from the power saving state to the normal operation state. That is, for example, when the input level to a predetermined GPIO terminal changes (for example, from a high level to a low level), the chip set 12 rewrites the power supply control register according to the change, and further changes the value of the rewritten power supply control register. Based on this, the power control signal is set.
  • this computer is provided with the signal line L15 for connecting the SD card slot 15 and the GPIO (n) terminal of the chipset 12 as described above. Therefore, the chip set 12 can determine whether or not the return from the power saving state to the normal operation state is due to the insertion of the SD card by monitoring the logic level of the GPIO (n) terminal. .
  • the chip set 12 sets the return determination flag (see FIG. 7) of the return determination register to “1” when the return from the power saving state to the normal operation state is due to the insertion of the SD card; 0 ”.
  • the return determination register is used for recognizing a factor when the computer returns from the power saving state.
  • the chipset 12 As described above, based on the action setting by the data capturing program, that is, based on the selection (second setting information) on whether to enable or disable the power-on when the SD card is inserted, the chipset 12 The GPIO (n) terminal control register (third setting information) is set. Therefore, depending on the setting of this control register, the return from the power saving state to the normal operation state by inserting the SD card is enabled or disabled.
  • FIG. 8 is a flowchart showing an action setting procedure in the data capture program.
  • FIG. 9 is a flowchart showing a processing procedure when the computer shifts from ACPI-S0 to any one of ACPI-S3 to S5.
  • FIG. 10 is a flowchart showing a processing procedure when the computer returns from the ACPI-S3 to S5 state to the ACPI-S0 state.
  • the action setting in the data acquisition program is to select whether to enable or disable the power-on when the SD card is inserted, and to turn the power on This is a setting related to the selection of an action to be performed when is enabled.
  • the procedure shown in FIG. 8 is performed in advance when the computer is in a normal operation state.
  • the user activates an action setting process for a data capture program that is a resident program (step S10).
  • the setting screen on the computer display in the action setting process is, for example, as shown in FIG. Through this setting screen, the user selects whether to enable or disable power-on, and the action when power-on is enabled (step S12).
  • the action setting process of the data fetch program ends (step S14).
  • the data capture program stores the generated action setting data in the OS registry (step S16).
  • FIG. 9 Processing Procedure when Computer Moves from ACPI-S0 to ACPI-S3 to S5
  • the user performs a predetermined operation on the computer to execute “ One of the power saving states of “sleep” (ACPI-S3), “hibernation” (ACPI-S4), or “shutdown” (ACPI-S5) is selected (step S20).
  • the OS notifies each program that the power saving state has been selected (step S22).
  • the data capture program (resident program) refers to the action setting data stored in the registry of the OS (step S24).
  • the data capture program sets the BIOS GPI event reception setting to “enabled” via the virtual device driver.
  • the control register (third setting information) of the GPIO (n) terminal of the chipset 12 is set by the BIOS to enable the return from the power saving state to the normal operation state by inserting the SD card.
  • the action setting data is referred to and the action setting indicates “power-on disabled” (No in step S26)
  • the data capturing program sets the BIOS GPI event reception setting to “disabled” via the virtual device driver. (Step S29).
  • the control register (third setting information) of the GPIO (n) terminal of the chipset 12 is set by the BIOS to invalidate the return from the power saving state to the normal operation state due to the insertion of the SD card.
  • the OS sets a value indicating the power saving state selected in step S20 in the power supply control register of the chipset 12 (step S30). That is, any one of the S3 flag, S4 flag, and S5 flag of the power control register is set to “1”, and the other flags are set to “0” (see FIG. 7).
  • step S30 the computer shifts to the power saving state (any one of ACPI-S3 to S5) selected in step S20 (step S32). That is, the chip set 12 sends a power control signal corresponding to the value of the power control register set in step S30 to the power supply unit 14. Based on the power supply control signal from the chipset 12, the power supply unit 14 sets the power supply state for each unit in the computer to a state set in advance as ACPI-S3, S4, or S5.
  • FIG. 10 when a user inserts an SD card into SD card slot 15, SD card slot 15 and chip
  • the card detection signal of the signal line L15 connecting the set 12 becomes a low level.
  • the chip set 12 detects that the level of the GPIO (n) terminal has changed from the high level to the low level, and recognizes that the user has inserted the SD card into the SD card slot 15 (step S40).
  • the chip set 12 sets the return determination flag (see FIG. 7) of the return determination register to “1”.
  • the chip set 12 rewrites the power control register so that only the value of the S0 flag indicates “1” and the values of the other flags all indicate “0”.
  • the chip set 12 sends a power control signal corresponding to the rewritten power control register value to the power supply unit 14.
  • the power supply unit 14 Based on the power supply control signal from the chipset 12, the power supply unit 14 sets the power supply state for each unit in the computer to the normal operation state (ACPI-S0) (step S42).
  • the computer can detect the insertion and removal of the SD card from the SD card slot 15 by the OS and the virtual device driver.
  • the return to the normal operation state (ACPI-S0) is due to factors other than the insertion of the SD card, such as a factor due to pressing of the power button or the occurrence of another GPI event.
  • the BIOS preferably sets the GPI event reception setting to “invalid” until an application program described later is started (step S44).
  • the control register of the GPIO (n) terminal of the chip set 12 is set so as to invalidate the return from the power saving state to the normal operation state due to the insertion of the SD card.
  • the BIOS checks the cause of the computer returning from the power saving state (step S46). Specifically, this factor check is performed by the BIOS referring to the value (first information) of the return determination flag in the return determination register of the chip set 12 (steps S46 and S48). As a result, if the return is not due to the insertion of the SD card (No in step S48), the normal return process is performed without performing the procedure after step S52 (step S50). If the recovery is due to the insertion of the SD card (Yes in step S48), the BIOS stacks data indicating the recovery factor (recovery due to the insertion of the SD card) in a memory (for example, the RAM 17) (step S52). The OS is restored (step S54). The OS notifies each program that it has returned (step S56). In the BIOS, it is assumed that unique data indicating a return factor is defined for each return factor.
  • step S58 the data fetching program resident in the RAM 17 is executed, and the action setting data stored in the OS registry is referred to (step S58).
  • action setting second setting information
  • “power on valid” Is set (step S60). If “power-on invalid” is set in the action setting, the normal recovery process is performed without performing the processes after step S62 (step S50).
  • the action setting is “power-on enabled”, the data fetching program inquires of the BIOS that the computer has returned from the power saving state via the virtual device driver (step S62).
  • the BIOS that has received the inquiry refers to the data stacked in the memory in step S52 to determine whether or not the return is due to the insertion of the SD card (step S64).
  • step S50 the normal return process is performed without performing the processes after step S66 (step S50). If it is determined that the return is due to the insertion of the SD card, the process proceeds to step S66.
  • step S66 the data capture program refers to the action setting data (fourth setting information) again. Since it has already been found that “Power ON Enabled” is already set in the action setting, here, a specific action selection (in the example shown in this embodiment, the application programs P1 to P3 or “what” Refer to the selection of “No”. As a result, unless the action setting is “do nothing” (No in step S68), the program corresponding to the action set in the action setting (any one of the application programs P1 to P3) is started and executed ( Step S70). For example, when the application program P2 is executed, slide show automatic reproduction using the image data in the SD card inserted in step S40 is executed.
  • the card detection signal (first signal) indicating that the SD card is inserted (SD card is newly received) is directly applied to a specific GPIO terminal of the chipset. Entered.
  • the chipset controls the power supply unit based on this input, and returns the computer to the power supply state in the normal operation state.
  • the data capture program stores action setting data describing a desired action to be performed at the time of return in the OS registry in advance. Then, at the time of return, the registry is referred to and a program corresponding to the action (any one of the application programs P1 to P3 in this embodiment) is activated.
  • the recovery from the power saving state is triggered by accepting a recording medium such as an SD card in the power saving state, and a desired application program is started as a desired procedure. Can be made.
  • the application program corresponding to the action is preferably a program that uses data in the receiving target recording medium, such as a slide show automatic reproduction using image data in an SD card as a recording medium.
  • the computer of the present embodiment is intended for further power saving compared to the computer of the first embodiment. Specifically, in the computer of this embodiment, power supply to the SD card controller 16 in the power saving state is stopped.
  • FIG. 11 is a block diagram for explaining power control for each unit on the hardware in the computer according to the embodiment.
  • a switch 30 whose conduction state is controlled by a predetermined GPIO (m) terminal of the chipset 12 is provided.
  • the switch 30 is provided on a power supply line connecting the power supply unit 14 and the SD card controller 16.
  • the chipset 12 changes the logic level of the GPIO (m) terminal, and this level change In response to this, the switch 30 is turned off. Thereby, in the power saving state (ACPI-S4 or S5) of the computer, the power supply to the SD card controller 16 is stopped.
  • the chipset 12 changes the logic level of the GPIO (m) terminal and responds to this level change.
  • the switch 30 becomes conductive. Thereby, the power supply to the SD card controller 16 is resumed.
  • Step S1 when the user performs a predetermined operation specified in advance by the computer, “Hibernate” (ACPI-S4) or “Shutdown” (ACPI-S5) is selected on the OS (Step S1). S80).
  • the OS notifies each program that “Hibernate” or “Shutdown” has been selected (step S82).
  • the data fetch program (resident program) refers to the action setting data stored in the registry of the OS (step S84).
  • the action setting indicates “power-on enabled” (Yes in step S86)
  • the data capturing program sets the BIOS GPI event reception setting to “enabled” via the virtual device driver (step S88).
  • the control register of the GPIO (n) terminal of the chip set 12 is set by the BIOS to enable the return from the power saving state to the normal operation state due to the insertion of the SD card.
  • the action setting data is referred to and the action setting indicates “power-on disabled” (No in step S86)
  • the data capture program sets the BIOS GPI event reception setting to “disabled” via the virtual device driver. (Step S89).
  • the control register of the GPIO (n) terminal of the chipset 12 is set by the BIOS so as to invalidate the return from the power saving state to the normal operation state due to the insertion of the SD card.
  • the OS tries to set the value indicating “sleep state” or “shutdown” selected in step S80 in the power control register of the chipset 12 (step S90).
  • the BIOS traps a value (a value indicating “hibernation” or “shutdown”) that the OS tries to set in the power control register of the chipset 12 and stacks it in a memory (for example, the RAM 17) (step S92). ).
  • the BIOS changes the logic level of the GPIO (m) terminal for controlling the switch 30 (step S94). As a result, the terminal switch 30 is turned off.
  • the BIOS calls the value (setting value) stacked in the memory and sets it in the power control register of the chipset 12 (step S96). That is, in the procedure of the present embodiment, the BIOS emulates the transition process to the ACPI-S4 or S5 state by the OS.
  • the BIOS emulates the transition process to the ACPI-S4 or S5 state by the OS.
  • the BIOS emulates the transition process to the ACPI-S4 or S5 state by the OS.
  • pause state ACPI-S4
  • the S4 flag of the power supply control register is set to “1”, and the other flags are set to “0”.
  • shutdown ACPI-S5
  • only the S5 flag of the power control register is set to “1”, and the other flags are set to “0” (see FIG. 7).
  • the power supply state of the computer shifts to “sleep state” (ACPI-S4) or “shutdown” (ACPI-S5) (step S98). That is, the chip set 12 sends a power control signal corresponding to the value of the power control register set in step S96 to the power supply unit 14. Based on the power supply control signal from the chipset 12, the power supply unit 14 sets the power supply state for each unit in the computer to a state preset as ACPI-S4 or S5.
  • the above is the processing procedure when shifting from ACPI-S0 to ACPI-S4 or S5.
  • the processing procedure when the computer returns from the ACPI-S3, S4 or S5 to the ACPI-S0 state is the same as that shown in FIG. Absent.
  • a card detection signal high level when an SD card is not inserted, low level when an SD card is inserted
  • a wakeup signal Wikeup: power supply
  • a logic circuit 32 OR circuit that inputs a high level when on and a low level when power is off may be provided.
  • the output of the logic circuit 32 is connected to the GPIO (n) terminal.
  • the GPIO (n) terminal is at a low level only when an SD card is inserted and the power button is not pressed. Thereby, in the situation where the SD card is inserted at the same time as the power button is pressed, the possibility of software malfunction can be reduced.
  • a logic circuit not limited to the OR circuit
  • for connecting to the GPIO (n) terminal can be configured based on the card detection signal and the power activation request signal other than the wake-up signal.

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Abstract

Provided are an information processor capable of being restored from a power-saving state and executing a desired procedure by receiving (inserting therein) a recording medium in the power-saving state, and an information processing method.  A card detection signal indicating that a recording medium such as an SD card is received is directly inputted to a specified GPIO terminal of a chip set.  In the power-saving state, the chip set controls a power supply unit on the basis of the input and restores a computer to a power feeding state in a normal operating state.  With reference to action set data in which a desired action to be performed at the time of restoration is preset, a data import program starts and executes an application program corresponding to the action.

Description

情報処理装置、情報処理方法Information processing apparatus and information processing method
 本発明は、省電力機能を扱う情報処理装置、情報処理方法に係り、より具体的には、スリープ状態、休止状態などの省電力モードから復帰する場合の情報処理技術に関する。 The present invention relates to an information processing apparatus and an information processing method that handle a power saving function, and more specifically, relates to an information processing technique for returning from a power saving mode such as a sleep state or a hibernation state.
 パーソナルコンピュータ、HDD(Hard Disk Drive)レコーダ、DVD(Digital Video Disk)レコーダ等の情報処理装置として、SDカード、メモリスティック(登録商標)等のメモリカード(記録媒体)を受け入れるためのメモリカードスロットを備えたものが知られている。
 また、スリープ状態、休止状態などの省電力モードを有する省電力機能を備えた情報処理装置が知られている。省電力機能に関する統一規格としてACPI(Advanced Configuration and Power Interface)が知られている。
A memory card slot for receiving a memory card (recording medium) such as an SD card or a Memory Stick (registered trademark) as an information processing apparatus such as a personal computer, an HDD (Hard Disk Drive) recorder, or a DVD (Digital Video Disk) recorder What you have is known.
An information processing apparatus having a power saving function having a power saving mode such as a sleep state or a hibernation state is also known. ACPI (Advanced Configuration and Power Interface) is known as a unified standard for power saving functions.
特開平4-175916号公報Japanese Patent Laid-Open No. 4-175916 特開平9-251331号公報JP-A-9-251331 特開平3-276322号公報JP-A-3-276322
 ところで、情報処理装置が省電力状態のときにメモリカードを情報処理装置のメモリカードスロットに挿入することによって、情報処理装置を省電力状態から復帰させるとともに、予め決められた所望の手順を実行させたい、という要請がある。そのような所望の手順としては、例えば、挿入されたメモリカードに含まれるデータに関連する特定のプログラム(例えば、カード内の画像データを用いたスライドショーを実行するプログラム)を自動的に起動させること等である。例えば電源釦を押下する等により情報処理装置を省電力状態から復帰させた後、ユーザが所定の操作を行うことで所望の手順を実行させることは従来から可能であるが、それでは煩雑であるというのが上記要請の理由である。 By the way, by inserting the memory card into the memory card slot of the information processing device when the information processing device is in the power saving state, the information processing device is returned from the power saving state and a predetermined desired procedure is executed. There is a request for it. As such a desired procedure, for example, a specific program related to data contained in the inserted memory card (for example, a program for executing a slide show using image data in the card) is automatically started. Etc. For example, it is conventionally possible for a user to execute a desired procedure by performing a predetermined operation after returning the information processing apparatus from the power saving state by pressing a power button or the like, but that is complicated. This is the reason for the above request.
 しかしながら、従来の情報処理装置では、メモリカードの挿入によって自動的に特定のプログラムを起動させる等の所望の手順を実行させることができなかった。この点について、図1を参照してさらに詳しく述べる。 However, the conventional information processing apparatus cannot execute a desired procedure such as automatically starting a specific program by inserting a memory card. This point will be described in more detail with reference to FIG.
 図1は、従来の情報処理装置としてのコンピュータにおける各部に対する電源制御を説明するためのブロック図である。このコンピュータは、記録媒体としてのSDカードを受入可能な構成となっている。図1に示すコンピュータは、チップセット2、CPU3、電源供給部4、SDカードスロット5、SDカードコントローラ6等を備える。図1に示すコンピュータにおいて、電源供給部4は、チップセット2から電源制御モードが電源制御信号により指示され、その電源制御モードに応じてコンピュータ内の各部に対する給電状態を設定する。図1において、電源供給部4から引き出される実線(電力(常時))は、省電力状態においても通常状態と変わらず電力が供給される状態を示す。電源供給部4から引き出される点線は、省電力状態において通常状態よりも電力供給が制限される状態を示す。 FIG. 1 is a block diagram for explaining power control for each unit in a computer as a conventional information processing apparatus. This computer is configured to accept an SD card as a recording medium. The computer shown in FIG. 1 includes a chip set 2, a CPU 3, a power supply unit 4, an SD card slot 5, an SD card controller 6, and the like. In the computer shown in FIG. 1, the power supply unit 4 is instructed by the power control signal from the chip set 2 by a power control signal, and sets a power supply state for each unit in the computer according to the power control mode. In FIG. 1, a solid line (power (always)) drawn from the power supply unit 4 indicates a state in which power is supplied without changing from the normal state even in the power saving state. A dotted line drawn from the power supply unit 4 indicates a state where the power supply is restricted more than the normal state in the power saving state.
 図1に示すコンピュータが通常動作状態にある(省電力状態でない)場合、SDカードがSDカードスロット5に挿入されている状態、又は挿入されていない状態で、それぞれ、SDカードスロット5内のスイッチがオン(カード検出信号がローレベル)、又はオフ(カード検出信号がハイレベル)する。これによりSDカードコントローラ6は、SDカードの受入状態(SDカードが挿入された状態、又は挿入されていない状態のいずれか)を認識する。ここで、コンピュータが通常動作状態にあれば、オペレーティングシステム(OS)及びSDカードスロット5のデバイスドライバを介してカード検出信号を認識することができる。しかしながら、コンピュータが省電力状態である場合にはOSが起動しておらず、カード検出信号を認識することができない。 When the computer shown in FIG. 1 is in a normal operation state (not in a power saving state), the switch in the SD card slot 5 is in a state where the SD card is inserted into the SD card slot 5 or not inserted. Is turned on (card detection signal is at low level) or off (card detection signal is at high level). As a result, the SD card controller 6 recognizes the acceptance state of the SD card (either the state in which the SD card is inserted or the state in which the SD card is not inserted). Here, if the computer is in the normal operation state, the card detection signal can be recognized through the operating system (OS) and the device driver of the SD card slot 5. However, when the computer is in the power saving state, the OS is not activated and the card detection signal cannot be recognized.
 他方、SDカードコントローラ6とチップセット2間のバスに対してPCI_Express(登録商標)等が適用される場合には、カード検出信号に基づいてSDカードコントローラ6がPME(Power Management Event)信号をチップセット2へ送出することが可能である。そこで、チップセット2においてPME信号をGPIO(General Purpose Input/Output)端子に接続するように構成しておけば、SDカードの挿入によってコンピュータを省電力状態から通常動作状態へ復帰させうる。しかしながら、この復帰処理では、コンピュータを通常動作状態へ復帰させることができるに過ぎず、さらに自動的に特定のプログラムを起動させる等の所望の手順を実行させることができない。
 なお、SDカードコントローラ6とチップセット2間のバスに対してUSB(Universal Serial Bus)が適用される場合には、USBがPME信号をサポートしていないため、SDカードの挿入によってコンピュータを省電力状態から通常動作状態へ復帰させることすらできない。
On the other hand, when PCI_Express (registered trademark) or the like is applied to the bus between the SD card controller 6 and the chip set 2, the SD card controller 6 converts the PME (Power Management Event) signal into a chip based on the card detection signal. Can be sent to set 2. Therefore, if the chip set 2 is configured to connect the PME signal to a GPIO (General Purpose Input / Output) terminal, the computer can be returned from the power saving state to the normal operation state by inserting the SD card. However, this return process can only return the computer to the normal operation state, and cannot execute a desired procedure such as automatically starting a specific program.
Note that when USB (Universal Serial Bus) is applied to the bus between the SD card controller 6 and the chipset 2, the USB does not support the PME signal. It cannot even be restored from the normal state to the normal operation state.
 よって、本発明の1つの側面では、省電力状態のときに記録媒体を受け入れることによって省電力状態から復帰し、かつ所望の手順を実行させることが可能となる情報処理装置、情報処理方法を提供することを目的とする。 Thus, according to one aspect of the present invention, there is provided an information processing apparatus and an information processing method capable of returning from a power saving state and executing a desired procedure by accepting a recording medium in the power saving state. The purpose is to do.
 第1の観点は、外部から記録媒体を受入可能な情報処理装置である。
 この情報処理装置は、
 (A)記録媒体を受け入れているか否かを示す第1信号を生成する記録媒体受入部;
 (B)情報処理装置の各部へ給電を行う第1モードと、第1モードよりも給電を制限する第2モードとを含む電源制御モードにより動作する電源供給部;
 (C)情報処理装置を起動するための複数の端子を有し、当該複数の端子の中で第1端子が前記第1信号のために割り当てられ、電源制御モードが第2モードのときに前記第1信号に基づいて記録媒体を新たに受け入れたと判断した場合には、電源制御モードを第2モードから第1モードへ移行するように電源供給部を制御する電源制御部;
 (D)記録媒体を新たに受け入れたことに起因して電源制御モードが第2モードから第1モードへ移行した場合、予め設定された第1設定情報に従って所定の手順を実行する実行部;
 を備える。
 第2の観点は、上記情報処理装置の各部と同様の処理を行う情報処理方法である。
A first aspect is an information processing apparatus capable of receiving a recording medium from the outside.
This information processing device
(A) a recording medium receiving unit that generates a first signal indicating whether or not a recording medium is received;
(B) A power supply unit that operates in a power supply control mode including a first mode in which power is supplied to each unit of the information processing apparatus and a second mode in which power supply is limited more than in the first mode;
(C) having a plurality of terminals for activating the information processing apparatus, wherein the first terminal is assigned for the first signal among the plurality of terminals, and the power control mode is the second mode; A power control unit that controls the power supply unit to shift the power control mode from the second mode to the first mode when it is determined that the recording medium is newly received based on the first signal;
(D) an execution unit that executes a predetermined procedure in accordance with preset first setting information when the power supply control mode shifts from the second mode to the first mode due to newly receiving a recording medium;
Is provided.
A second aspect is an information processing method that performs the same processing as each unit of the information processing apparatus.
 開示の情報処理装置、情報処理方法によれば、情報処理装置が省電力状態のときに記録媒体を受け入れることによって省電力状態から復帰し、かつ所望の手順を実行させることが可能となる。 According to the disclosed information processing apparatus and information processing method, it is possible to return from the power saving state and execute a desired procedure by accepting the recording medium when the information processing apparatus is in the power saving state.
従来の情報処理装置としてのコンピュータにおける各部に対する電源制御を説明するためのブロック図。The block diagram for demonstrating the power supply control with respect to each part in the computer as a conventional information processing apparatus. 第1実施形態のコンピュータの構成を示すブロック図。The block diagram which shows the structure of the computer of 1st Embodiment. 第1実施形態のコンピュータにおける各部に対する電源制御を説明するためのブロック図。The block diagram for demonstrating the power supply control with respect to each part in the computer of 1st Embodiment. 第1実施形態のコンピュータで動作するソフトウエアについて、ハードウエア上での階層関係を示す図。The figure which shows the hierarchical relationship on hardware about the software which operate | moves with the computer of 1st Embodiment. 第1実施形態のコンピュータにおいてデータ取り込みプログラムが起動した後の設定画面を例示する図。The figure which illustrates the setting screen after the data acquisition program starts in the computer of a 1st embodiment. 第1実施形態のコンピュータにおいて、ハードウエア上の各部に対する電源制御を説明するためのブロック図。The block diagram for demonstrating the power supply control with respect to each part on hardware in the computer of 1st Embodiment. 第1実施形態のコンピュータにおいて、チップセットのレジスタの内容を説明するための図。The figure for demonstrating the content of the register | resistor of a chipset in the computer of 1st Embodiment. 第1実施形態のコンピュータにおいて、データ取り込みプログラムにおけるアクション設定の手順を示すフローチャート。The flowchart which shows the procedure of the action setting in a data acquisition program in the computer of 1st Embodiment. 第1実施形態のコンピュータがACPI-S0からACPI-S3~S5のいずれかの状態へ移行するときの処理手順を示すフローチャート。6 is a flowchart illustrating a processing procedure when the computer according to the first embodiment shifts from ACPI-S0 to any one of ACPI-S3 to S5. 第1実施形態のコンピュータがACPI-S3~S5のいずれかの状態からACPI-S0の状態へ復帰するときの処理手順を示すフローチャート。6 is a flowchart showing a processing procedure when the computer according to the first embodiment returns from any one of ACPI-S3 to S5 to an ACPI-S0 state. 第2実施形態のコンピュータにおいて、ハードウエア上の各部に対する電源制御を説明するためのブロック図。The block diagram for demonstrating the power supply control with respect to each part on hardware in the computer of 2nd Embodiment. 第2実施形態のコンピュータがACPI-S0からACPI-S4又はS5のいずれかの状態へ移行するときの処理手順を示すフローチャート。9 is a flowchart showing a processing procedure when the computer according to the second embodiment shifts from ACPI-S0 to any state of ACPI-S4 or S5. 実施形態のコンピュータにおいて、ハードウエア上の各部に対する電源制御を説明するためのブロック図。The block diagram for demonstrating the power supply control with respect to each part on hardware in the computer of embodiment.
 12…チップセット、13…CPU、14…電源供給部、15…SDカードスロット、16…SDカードコントローラ、17…RAM、18…BIOS-ROM、21…HDD、22…デバイス、30…スイッチ、32…論理回路 DESCRIPTION OF SYMBOLS 12 ... Chip set, 13 ... CPU, 14 ... Power supply part, 15 ... SD card slot, 16 ... SD card controller, 17 ... RAM, 18 ... BIOS-ROM, 21 ... HDD, 22 ... Device, 30 ... Switch, 32 ... Logic circuit
 以下の各実施形態では、情報処理装置としてのコンピュータについて説明する。以下の各実施形態では、記録媒体としてSDカードを受入可能なコンピュータについて説明するが、記録媒体はSDカードに限られず、データを記憶する媒体であれば何でも構わない。例えばメモリスティック(登録商標)などの他の種類のメモリカードを記録媒体として適用してもよい。 In the following embodiments, a computer as an information processing apparatus will be described. In each of the following embodiments, a computer that can accept an SD card as a recording medium will be described. However, the recording medium is not limited to an SD card, and any medium that stores data may be used. For example, another type of memory card such as a memory stick (registered trademark) may be used as the recording medium.
 1.第1実施形態
 (1-1)電源制御モード
 本実施形態のコンピュータは、ACPIに準拠した省電力機能を備えている。ACPIで規定される電源制御モードを図2に示す。
 図2に示すように、このコンピュータでは、電源制御モードとしてACPI-S0~S5を備える。ACPI-S0は、コンピュータの電源がオンの状態の通常動作状態である。ACPI-S1は、ACPI-S0よりも低消費電力となる状態である。ACPI-S2は、CPUへの給電がオフとなる状態である。ACPI-S3はスリープの状態であり、RAMへのサスペンドを意味する。スリープでは、コンピュータの電源をオフした際、HDD(Hard Disk Drive)、各種デバイスの電源をオフにするが、RAMには電力が供給され、実行中のデータがそのまま保持される。ACPI-S4は休止状態(ハイバネーション)であり、HDDへのサスペンドを意味する。休止状態とは、HDDにRAMの内容を退避させてから、RAMを含む各種デバイスの電源をオフにするものである。その後のコンピュータの電源オン時には、HDDに退避した内容をRAMに読み出して復帰する。ACPI-S5はソフトウエアによりコンピュータの電源がオフとなる状態(シャットダウン)である。
1. First Embodiment (1-1) Power Control Mode The computer according to the present embodiment has a power saving function compliant with ACPI. FIG. 2 shows a power supply control mode defined by ACPI.
As shown in FIG. 2, this computer includes ACPI-S0 to S5 as power control modes. ACPI-S0 is a normal operation state in which the computer is turned on. ACPI-S1 is in a state of lower power consumption than ACPI-S0. ACPI-S2 is a state in which power supply to the CPU is turned off. ACPI-S3 is in a sleep state and means suspend to RAM. In the sleep mode, when the computer is turned off, the HDD (Hard Disk Drive) and various devices are turned off, but power is supplied to the RAM and the data being executed is held as it is. ACPI-S4 is in a dormant state (hibernation) and means suspending to the HDD. In the hibernation state, the contents of the RAM are saved in the HDD, and then the power of various devices including the RAM is turned off. When the computer is subsequently turned on, the contents saved in the HDD are read out to the RAM and restored. ACPI-S5 is in a state where the computer is turned off by software (shutdown).
 なお、本実施形態で示す電源制御モードの例では、ACPI-S0が第1モードに対応し、ACPI-S3~S5のいずれかが第2モードに対応する。 In the example of the power control mode shown in the present embodiment, ACPI-S0 corresponds to the first mode, and any of ACPI-S3 to S5 corresponds to the second mode.
 (1-2)コンピュータのハードウエア構成
 図3は、このコンピュータのハードウエア構成を示すブロック図である。
 図3に示すように、このコンピュータは、チップセット12(電源制御部)、CPU13、電源供給部14、SDカードスロット15(記録媒体受入部)、SDカードコントローラ16(記録媒体制御部)、メインメモリとしてのRAM17、BIOS-ROM18、HDD21、コンピュータの入出力のための各種のデバイス22、を含む。チップセット12は、コンピュータの各部とバスによって接続されている。
(1-2) Computer Hardware Configuration FIG. 3 is a block diagram showing the hardware configuration of the computer.
As shown in FIG. 3, the computer includes a chip set 12 (power control unit), a CPU 13, a power supply unit 14, an SD card slot 15 (recording medium receiving unit), an SD card controller 16 (recording medium control unit), a main A RAM 17 as a memory, a BIOS-ROM 18, an HDD 21, and various devices 22 for computer input / output are included. The chip set 12 is connected to each part of the computer by a bus.
 CPU13は、コンピュータに設けられる各種のプログラムを実行する。RAM17は、CPU13のメインメモリであり、CPU13が実行するプログラムやCPU13が参照するデータを一時的に格納するための揮発性記憶装置である。 The CPU 13 executes various programs provided in the computer. The RAM 17 is a main memory of the CPU 13 and is a volatile storage device for temporarily storing programs executed by the CPU 13 and data referred to by the CPU 13.
 チップセット12は、CPU13と他の各部とのインタフェースのための制御回路、各部を制御するためのレジスタを含む。チップセット12は、汎用インタフェースであるGPI(General Purpose Interface)に対応している。このGPIのために複数のGPIO(General Purpose Input/Output)端子(複数の端子)がチップセット12に設けられている。チップセット12は、各GPIO端子に対する外部からの入力信号に基づいてコンピュータを起動(省電力状態からの「復帰」を含む)、又はシャットダウンできるように構成されている。
 各GPIO端子は、GPIO端子に対する入力に基づくコンピュータの起動又はシャットダウンを有効とするか無効とするかについて、チップセット12内の制御レジスタの設定によって管理される。また、以下の説明では、GPIO端子に対する入力に基づいてコンピュータが起動(省電力状態からの「復帰」を含む)するイベントを「GPIイベント」と呼ぶ。
The chip set 12 includes a control circuit for an interface between the CPU 13 and other units, and a register for controlling the units. The chip set 12 corresponds to GPI (General Purpose Interface) which is a general purpose interface. For this GPI, a plurality of GPIO (General Purpose Input / Output) terminals (a plurality of terminals) are provided in the chipset 12. The chip set 12 is configured to start up the computer (including “return” from the power saving state) or shut down based on an external input signal to each GPIO terminal.
Each GPIO terminal is managed by setting a control register in the chipset 12 as to whether to enable or disable the startup or shutdown of the computer based on the input to the GPIO terminal. In the following description, an event that the computer starts (including “return” from the power saving state) based on an input to the GPIO terminal is referred to as a “GPI event”.
 BIOS-ROM18は、ハードウエアとの基本的な入出力処理を行うための基本入出力システム(プログラム)であるBIOS(Basic Input/Output System)を記憶する。BIOSには、SDカードの挿入(受け入れ)によって生ずるGPIイベントを有効とするか、又は無効とするかについてのGPIイベント受付の設定が行われる。GPIイベント受付の設定値は、例えば「有効」又は「無効」を示す1ビットのデータであり、チップセット12のGPIO(n)端子の制御レジスタの設定に反映される。 The BIOS-ROM 18 stores a basic input / output system (BIOS) that is a basic input / output system (program) for performing basic input / output processing with hardware. In the BIOS, a GPI event reception setting is made for validating or invalidating a GPI event generated by insertion (acceptance) of an SD card. The GPI event reception setting value is, for example, 1-bit data indicating “valid” or “invalid”, and is reflected in the setting of the control register of the GPIO (n) terminal of the chipset 12.
 電源供給部14は、チップセット12と協働して後述する電源制御を行い、コンピュータの各部への電源を供給、又は給電を制限する。
 ストレージとしてのHDD21は不揮発性記憶装置であり、Windows(登録商標)等のOSやOS上で実行されるプログラムを記憶する。デバイス22は、例えば、入力用デバイスとしてのマウス、出力用デバイスとしてのディスプレイ装置等の、コンピュータの1又は複数の入出力デバイスを総称して表記するものである。
 SDカードスロット15は、外部からの記録媒体としてのSDカードを挿入、又は抜き出し可能に構成されている。SDカードスロット15は、SDカードとのインタフェース機能を備えたSDカードコントローラ16と接続されている。
The power supply unit 14 performs power control, which will be described later, in cooperation with the chipset 12, and supplies power to each unit of the computer or restricts power supply.
The HDD 21 as a storage is a non-volatile storage device, and stores an OS such as Windows (registered trademark) and a program executed on the OS. The device 22 generically represents one or a plurality of input / output devices of a computer such as a mouse as an input device and a display device as an output device.
The SD card slot 15 is configured so that an SD card as an external recording medium can be inserted or removed. The SD card slot 15 is connected to an SD card controller 16 having an interface function with the SD card.
 (1-3)コンピュータで動作するソフトウエア
 ここで、このコンピュータで動作するソフトウエアについて、図4及び図5を参照して説明する。図4は、実施形態のコンピュータで動作するソフトウエアについて、ハードウエア上での階層関係を示す図である。図5は、後述するデータ取り込みプログラムが起動した後の設定画面を例示する図である。
 図4において、仮想デバイスドライバは、BIOSが提供する仮想デバイスのドライバである。データ取り込みプログラムは、電源投入後OSの起動とともに起動し、コンピュータの起動後は電源オフとなるまでRAM17に常駐するプログラムである。データ取り込みプログラムの設定処理が実行されると、このコンピュータに接続されたディスプレイ装置(図示せず)上に、図5に例示する設定画面が表示される。この設定画面を通して行われるコンピュータのユーザからの入力を認識して、データ取り込みプログラムは、以下のアクション設定についてのデータ(アクション設定データ;第1設定情報)をOSのレジストリに保存する。
 なお、データ取り込みプログラムを実行するCPU13は、本発明の実行部の一実施形態である。
 [アクション設定]
 ・SDカードが挿入された場合の電源オンを有効又は無効とするかについての選択に関する設定(第2設定情報)
 ・有効とした場合に行われるアクションの選択に関する設定(第4設定情報)
(1-3) Software Running on Computer Here, software running on this computer will be described with reference to FIG. 4 and FIG. FIG. 4 is a diagram illustrating a hierarchical relationship on hardware of software operating on the computer according to the embodiment. FIG. 5 is a diagram exemplifying a setting screen after a data capturing program described later is started.
In FIG. 4, a virtual device driver is a virtual device driver provided by the BIOS. The data capture program is a program that starts with the OS after the power is turned on, and stays in the RAM 17 after the computer is started until the power is turned off. When the setting process of the data capturing program is executed, a setting screen illustrated in FIG. 5 is displayed on a display device (not shown) connected to the computer. Recognizing the input from the computer user made through this setting screen, the data capture program stores the following action setting data (action setting data; first setting information) in the registry of the OS.
The CPU 13 that executes the data capturing program is an embodiment of the execution unit of the present invention.
[Action settings]
-Settings for selecting whether to enable or disable power-on when an SD card is inserted (second setting information)
-Settings related to action selection performed when enabled (4th setting information)
 SDカードが挿入された場合の電源オンを有効とした場合に実行されるアプリケーションプログラムP1~P3は、データ取り込みプログラムによって設定されうる各アクションに対応している。例えば、アプリケーションプログラムP1は、HDD21内の予め決められた領域に対してSDカード内のデータの自動取り込みを行うためのプログラムであって、図5の「データの自動取り込み」というアクションに対応する。アプリケーションプログラムP2は、SDカード内のデータに基づいてスライドショーを自動再生するためのプログラムであって、図5の「スライドショー自動再生」というアクションに対応する。アプリケーションプログラムP3は、SDカード内のデータに関する所定の選択画面表示を行うためのプログラムであって、図5の「選択画面表示」というアクションに対応する。SDカードが挿入された場合の電源オンを有効とした場合であっても、「何もしない」という選択もとりうる。 The application programs P1 to P3 that are executed when the power-on when the SD card is inserted are enabled correspond to each action that can be set by the data capture program. For example, the application program P1 is a program for automatically fetching data in the SD card to a predetermined area in the HDD 21, and corresponds to the action “automatic data fetch” in FIG. The application program P2 is a program for automatically reproducing a slide show based on data in the SD card, and corresponds to the action “slide show automatic reproduction” in FIG. The application program P3 is a program for displaying a predetermined selection screen regarding data in the SD card, and corresponds to the action of “selection screen display” in FIG. Even when the power-on when the SD card is inserted is validated, the selection of “do nothing” can be taken.
 データ取り込みプログラムは、アクション設定における、SDカードが挿入された場合の電源オンを有効又は無効とするかについての選択に基づき、仮想デバイスドライバ経由で、BIOSに設けられるGPIイベント受付の設定を「有効」又は「無効」とする。前述したように、BIOSのGPIイベント受付の設定値は、後述するチップセット12のGPIO(n)端子の制御レジスタ(第3設定情報)の設定に反映される。 The data capture program sets the GPI event reception setting provided in the BIOS to “valid” via the virtual device driver based on the selection of whether to enable or disable the power-on when the SD card is inserted in the action setting. "Or" Invalid ". As described above, the setting value of the GPI event reception of the BIOS is reflected in the setting of the control register (third setting information) of the GPIO (n) terminal of the chip set 12 described later.
 (1-4)コンピュータにおける電源制御
 次に、実施形態のコンピュータにおける電源制御に関する観点について、図6及び図7を参照して説明する。図6は、実施形態のコンピュータにおいて、ハードウエア上の各部に対する電源制御について説明するためのブロック図である。図7は、チップセット12に設けられる電源制御に関するレジスタの内容を説明するための図である。
 図6において、電源供給部14から引き出される実線(電力(常時))は、省電力状態(例えばACPI-S3~S5)においても通常動作状態(ACPI-S0)と変わらず電力が供給される状態を示している。本実施形態では、チップセット12及びSDカードコントローラ16に対して電力が常時供給される。電源供給部14から引き出される点線は、省電力状態において通常動作状態よりも電力供給が制限される状態を示している。
(1-4) Power Control in Computer Next, aspects regarding power control in the computer of the embodiment will be described with reference to FIG. 6 and FIG. FIG. 6 is a block diagram for explaining power control for each unit on the hardware in the computer according to the embodiment. FIG. 7 is a diagram for explaining the contents of a register related to power control provided in the chip set 12.
In FIG. 6, the solid line (power (always)) drawn from the power supply unit 14 is in a state where power is supplied in the power saving state (for example, ACPI-S3 to S5) as in the normal operation state (ACPI-S0). Is shown. In the present embodiment, power is constantly supplied to the chipset 12 and the SD card controller 16. A dotted line drawn from the power supply unit 14 indicates a state in which power supply is restricted more than in a normal operation state in the power saving state.
 なお、実施形態の説明において、電力供給の制限は、コンピュータの一部又はすべての部分に対する供給電力を通常動作状態よりも低下させることや、コンピュータの一部又はすべての部分に対する電力供給を停止させることを含む。また、ACPI-S0~S5の各々の状態におけるコンピュータの各部への電力供給の仕様(各部の給電状態)については予め定義されている。電源供給部14は、ACPI-S0~S5の各々の状態ごとに予め定義された電力供給を行うものとする。 In the description of the embodiment, the limitation of power supply is to reduce the power supplied to a part or all of the computer from the normal operation state or to stop the power supply to a part or all of the computer. Including that. In addition, the specifications of power supply to each part of the computer in each state of ACPI-S0 to S5 (power supply state of each part) are defined in advance. The power supply unit 14 performs power supply defined in advance for each state of ACPI-S0 to S5.
 ACPI-S0(通常動作状態)からACPI-S3(スリープ)、ACPI-S4(休止状態)、ACPI-S5(シャットダウン)への状態遷移(電源制御モードの移行)は、OS上でのユーザによる選択により行われる。このユーザの選択に従い、OSは、選択された状態をチップセット12に設定する。この設定は、チップセット12内の電源制御レジスタに対して行われる。ここで図7を参照すると、ACPI-S0(通常動作状態)では、S0フラグの値のみが“1”を示し、他のフラグの値はすべて“0”を示している。そして、例えばACPI-S0からACPI-S3へ状態遷移すると、S3フラグの値のみが“1”を示し、他のフラグの値はすべて“0”を示すように、OSにより電源制御レジスタが書き換えられることになる。
 チップセット12は、電源制御レジスタを逐次参照し、電源制御レジスタの値に応じた電源制御信号を電源供給部14へ送出する。電源供給部14は、チップセット12からの電源制御信号に基づいて、コンピュータ内の各部に対する給電状態を設定する。
State transition from ACPI-S0 (normal operation state) to ACPI-S3 (sleep), ACPI-S4 (sleep state), ACPI-S5 (shutdown) (transition of power control mode) is selected by the user on the OS Is done. According to the user's selection, the OS sets the selected state in the chip set 12. This setting is performed for the power supply control register in the chip set 12. Referring now to FIG. 7, in ACPI-S0 (normal operation state), only the value of the S0 flag indicates “1”, and the values of the other flags all indicate “0”. Then, for example, when a state transition is made from ACPI-S0 to ACPI-S3, the OS rewrites the power supply control register so that only the value of the S3 flag indicates “1” and the values of the other flags all indicate “0”. It will be.
The chip set 12 sequentially refers to the power control register and sends a power control signal corresponding to the value of the power control register to the power supply unit 14. The power supply unit 14 sets a power supply state for each unit in the computer based on the power control signal from the chipset 12.
 図6に示すように、このコンピュータでは、SDカードスロット15とSDカードコントローラ16間の信号ラインが分岐し、SDカードスロット15とチップセット12との間の信号ラインL15が設けられる。この信号ラインL15は、チップセット12の複数のGPIO端子の中の1つであるGPIO(n)端子(第1端子)に接続されている。
 チップセット12には常時電力が供給されているので、コンピュータの省電力状態において、SDカードがSDカードスロット15に挿入されている状態、又は挿入されていない状態で、それぞれ、SDカードスロット15内のスイッチがオン(カード検出信号がローレベル)、又はオフ(カード検出信号がハイレベル)する。カード検出信号の論理レベルに符合して、チップセット12のGPIO(n)がハイレベル又はローレベルとなる。
As shown in FIG. 6, in this computer, a signal line between the SD card slot 15 and the SD card controller 16 branches, and a signal line L15 between the SD card slot 15 and the chip set 12 is provided. The signal line L15 is connected to a GPIO (n) terminal (first terminal) which is one of the plurality of GPIO terminals of the chip set 12.
Since power is always supplied to the chipset 12, the SD card slot 15 is inserted into the SD card slot 15 in a state where the SD card is inserted into the SD card slot 15 or not in the power saving state of the computer. Are switched on (card detection signal is at low level) or off (card detection signal is at high level). In accordance with the logic level of the card detection signal, GPIO (n) of the chip set 12 becomes a high level or a low level.
 なお、図6では、省電力状態においてもSDカードコントローラ16に対して電力が供給されることを示しているが、省電力状態において必ずしも供給する必要はない。すなわち、本実施形態のコンピュータでは、カード検出信号を直接チップセット12に取り込むための信号ラインL15を設けている。そのため、チップセット12は、SDカードが挿入されたことを、SDカードコントローラ16との間のバス経由で認識する必要はない。よって、本実施形態では、コンピュータの省電力状態では、SDカードコントローラ16に対する給電を停止するようにしてもよい。 Although FIG. 6 shows that power is supplied to the SD card controller 16 even in the power saving state, it is not necessarily supplied in the power saving state. That is, in the computer according to the present embodiment, the signal line L15 for directly taking the card detection signal into the chip set 12 is provided. Therefore, the chip set 12 does not need to recognize that the SD card has been inserted via the bus with the SD card controller 16. Therefore, in the present embodiment, power supply to the SD card controller 16 may be stopped in the power saving state of the computer.
 実施形態のコンピュータでは、チップセット12(常時給電)に対するGPIO端子への入力、又は、コンピュータを起動させることが可能な他の要求信号(例えば、図6では、電源釦の押圧に基づくウェイクアップ信号(Wakeup)を記載する。)によって、省電力状態から通常動作状態へ復帰するように構成されている。すなわち、例えば所定のGPIO端子への入力レベルが変化すると(例えばハイレベルからローレベル)、チップセット12は、その変化に応じて電源制御レジスタを書き換え、さらには書き換えられた電源制御レジスタの値に基づいて電源制御信号を設定する。特に、このコンピュータでは、上述したように、SDカードスロット15とチップセット12のGPIO(n)端子を接続する信号ラインL15を設けている。そのため、チップセット12では、GPIO(n)端子の論理レベルを監視することで、省電力状態から通常動作状態への復帰がSDカードの挿入によるものなのか否かについて判別できるようになっている。チップセット12は、省電力状態から通常動作状態への復帰がSDカードの挿入によるものである場合、復帰判定レジスタの復帰判定フラグ(図7参照)を“1”とし、そうでない場合には“0”とする。この復帰判定レジスタは、コンピュータが省電力状態から復帰するときの要因を認識するために利用される。 In the computer of the embodiment, an input to the GPIO terminal for the chipset 12 (always power supply) or another request signal that can start the computer (for example, in FIG. 6, a wake-up signal based on pressing of the power button) (Wakeup) is described.) Is configured to return from the power saving state to the normal operation state. That is, for example, when the input level to a predetermined GPIO terminal changes (for example, from a high level to a low level), the chip set 12 rewrites the power supply control register according to the change, and further changes the value of the rewritten power supply control register. Based on this, the power control signal is set. In particular, this computer is provided with the signal line L15 for connecting the SD card slot 15 and the GPIO (n) terminal of the chipset 12 as described above. Therefore, the chip set 12 can determine whether or not the return from the power saving state to the normal operation state is due to the insertion of the SD card by monitoring the logic level of the GPIO (n) terminal. . The chip set 12 sets the return determination flag (see FIG. 7) of the return determination register to “1” when the return from the power saving state to the normal operation state is due to the insertion of the SD card; 0 ”. The return determination register is used for recognizing a factor when the computer returns from the power saving state.
 なお、前述したように、データ取り込みプログラムによるアクション設定、すなわち、SDカードが挿入された場合の電源オンを有効又は無効とするかについての選択(第2設定情報)に基づいて、チップセット12のGPIO(n)端子の制御レジスタ(第3設定情報)の設定が行われる。よって、この制御レジスタの設定次第で、SDカードの挿入による省電力状態から通常動作状態への復帰が有効化、又は無効化される。 As described above, based on the action setting by the data capturing program, that is, based on the selection (second setting information) on whether to enable or disable the power-on when the SD card is inserted, the chipset 12 The GPIO (n) terminal control register (third setting information) is set. Therefore, depending on the setting of this control register, the return from the power saving state to the normal operation state by inserting the SD card is enabled or disabled.
 (1-5)コンピュータの動作
 次に、本実施形態のコンピュータの動作について図8~11を参照して説明する。
 図8は、データ取り込みプログラムにおけるアクション設定の手順を示すフローチャートである。図9は、コンピュータがACPI-S0からACPI-S3~S5のいずれかの状態へ移行するときの処理手順を示すフローチャートである。図10は、コンピュータがACPI-S3~S5のいずれかの状態からACPI-S0の状態へ復帰するときの処理手順を示すフローチャートである。
(1-5) Computer Operation Next, the operation of the computer of this embodiment will be described with reference to FIGS.
FIG. 8 is a flowchart showing an action setting procedure in the data capture program. FIG. 9 is a flowchart showing a processing procedure when the computer shifts from ACPI-S0 to any one of ACPI-S3 to S5. FIG. 10 is a flowchart showing a processing procedure when the computer returns from the ACPI-S3 to S5 state to the ACPI-S0 state.
 (A)データ取り込みプログラムにおけるアクション設定の設定手順
 前述したように、データ取り込みプログラムにおけるアクション設定は、SDカードが挿入された場合の電源オンを有効又は無効とするかについての選択、及び、電源オンを有効とした場合に行われるアクションの選択、に関する設定である。
 図8に示す手順は、コンピュータが通常動作状態のときに予め行われる。先ず、ユーザが、常駐プログラムであるデータ取り込みプログラムのアクション設定処理を起動する(ステップS10)。アクション設定処理におけるコンピュータのディスプレイ上の設定画面は、例えば図5に示したとおりである。この設定画面を通して、電源オンを有効又は無効とするかについての選択、及び電源オンを有効とした場合のアクションがユーザにより選択される(ステップS12)。ユーザの選択に従ってアクション設定データが生成された後、データ取り込みプログラムのアクション設定処理が終了する(ステップS14)。アクション設定処理が終了すると、データ取り込みプログラムは、生成されたアクション設定データをOSのレジストリに保存する(ステップS16)。
(A) Action Setting Setting Procedure in Data Acquisition Program As described above, the action setting in the data acquisition program is to select whether to enable or disable the power-on when the SD card is inserted, and to turn the power on This is a setting related to the selection of an action to be performed when is enabled.
The procedure shown in FIG. 8 is performed in advance when the computer is in a normal operation state. First, the user activates an action setting process for a data capture program that is a resident program (step S10). The setting screen on the computer display in the action setting process is, for example, as shown in FIG. Through this setting screen, the user selects whether to enable or disable power-on, and the action when power-on is enabled (step S12). After the action setting data is generated according to the user's selection, the action setting process of the data fetch program ends (step S14). When the action setting process ends, the data capture program stores the generated action setting data in the OS registry (step S16).
 (B)コンピュータがACPI-S0からACPI-S3~S5の状態へ移行するときの処理手順
 図9を参照すると、先ずユーザがコンピュータで予め規定された所定の操作を行うことにより、OS上で「スリープ」(ACPI-S3)、「休止状態」(ACPI-S4)、又は「シャットダウン」(ACPI-S5)のいずれかの省電力状態が選択される(ステップS20)。OSは、省電力状態が選択されたことを各プログラムへ通知する(ステップS22)。次に、データ取り込みプログラム(常駐プログラム)は、OSのレジストリに保存されているアクション設定データを参照する(ステップS24)。その結果、アクション設定(第2設定情報)が「電源オン有効」を示す場合(ステップS26のYes)、データ取り込みプログラムは、仮想デバイスドライバ経由でBIOSのGPIイベント受付の設定を「有効」とする(ステップS28)。それに応じて、チップセット12のGPIO(n)端子の制御レジスタ(第3設定情報)は、BIOSにより、SDカードの挿入による省電力状態から通常動作状態への復帰を有効化するように設定される。
 一方、アクション設定データを参照し、アクション設定が「電源オン無効」を示す場合(ステップS26のNo)、データ取り込みプログラムは、仮想デバイスドライバ経由でBIOSのGPIイベント受付の設定を「無効」とする(ステップS29)。それに応じて、チップセット12のGPIO(n)端子の制御レジスタ(第3設定情報)は、BIOSにより、SDカードの挿入による省電力状態から通常動作状態への復帰を無効化するように設定される。
 次に、OSは、ステップS20で選択された省電力状態を示す値をチップセット12の電源制御レジスタに設定する(ステップS30)。すなわち、電源制御レジスタのS3フラグ、S4フラグ又はS5フラグのいずれかを“1”とし、その他のフラグを“0”とする(図7参照)。
(B) Processing Procedure when Computer Moves from ACPI-S0 to ACPI-S3 to S5 Referring to FIG. 9, first, the user performs a predetermined operation on the computer to execute “ One of the power saving states of “sleep” (ACPI-S3), “hibernation” (ACPI-S4), or “shutdown” (ACPI-S5) is selected (step S20). The OS notifies each program that the power saving state has been selected (step S22). Next, the data capture program (resident program) refers to the action setting data stored in the registry of the OS (step S24). As a result, when the action setting (second setting information) indicates “power-on enabled” (Yes in step S26), the data capture program sets the BIOS GPI event reception setting to “enabled” via the virtual device driver. (Step S28). Accordingly, the control register (third setting information) of the GPIO (n) terminal of the chipset 12 is set by the BIOS to enable the return from the power saving state to the normal operation state by inserting the SD card. The
On the other hand, when the action setting data is referred to and the action setting indicates “power-on disabled” (No in step S26), the data capturing program sets the BIOS GPI event reception setting to “disabled” via the virtual device driver. (Step S29). Accordingly, the control register (third setting information) of the GPIO (n) terminal of the chipset 12 is set by the BIOS to invalidate the return from the power saving state to the normal operation state due to the insertion of the SD card. The
Next, the OS sets a value indicating the power saving state selected in step S20 in the power supply control register of the chipset 12 (step S30). That is, any one of the S3 flag, S4 flag, and S5 flag of the power control register is set to “1”, and the other flags are set to “0” (see FIG. 7).
 ステップS30の処理の後、コンピュータは、ステップS20で選択された省電力状態(ACPI-S3~S5のいずれかの状態)へ移行する(ステップS32)。すなわち、チップセット12は、ステップS30で設定された電源制御レジスタの値に応じた電源制御信号を電源供給部14へ送出する。電源供給部14は、チップセット12からの電源制御信号に基づいて、コンピュータ内の各部に対する給電状態を、ACPI-S3、S4又はS5として予め設定された状態とする。 After step S30, the computer shifts to the power saving state (any one of ACPI-S3 to S5) selected in step S20 (step S32). That is, the chip set 12 sends a power control signal corresponding to the value of the power control register set in step S30 to the power supply unit 14. Based on the power supply control signal from the chipset 12, the power supply unit 14 sets the power supply state for each unit in the computer to a state set in advance as ACPI-S3, S4, or S5.
 (C)コンピュータがACPI-S3,S4又はS5からACPI-S0の状態へ復帰するときの処理手順
 図10を参照すると、ユーザがSDカードをSDカードスロット15に挿入すると、SDカードスロット15とチップセット12を接続する信号ラインL15のカード検出信号がローレベルとなる。チップセット12は、GPIO(n)端子のレベルがハイレベルからローレベルへ変化したことを検出し、ユーザがSDカードをSDカードスロット15に挿入したことを認識する(ステップS40)。GPIO(n)端子のレベル変化を受けて、チップセット12は、復帰判定レジスタの復帰判定フラグ(図7参照)を“1”とする。さらに、チップセット12は電源制御レジスタを、S0フラグの値のみが“1”を示し、他のフラグの値がすべて“0”を示すように書き換える。チップセット12は、書き換えられた電源制御レジスタの値に応じた電源制御信号を電源供給部14へ送出する。電源供給部14は、チップセット12からの電源制御信号に基づいて、コンピュータ内の各部に対する給電状態を通常動作状態(ACPI-S0)に設定する(ステップS42)。
(C) Processing procedure when computer returns to ACPI-S0 from ACPI-S3, S4 or S5 Referring to FIG. 10, when a user inserts an SD card into SD card slot 15, SD card slot 15 and chip The card detection signal of the signal line L15 connecting the set 12 becomes a low level. The chip set 12 detects that the level of the GPIO (n) terminal has changed from the high level to the low level, and recognizes that the user has inserted the SD card into the SD card slot 15 (step S40). In response to the level change of the GPIO (n) terminal, the chip set 12 sets the return determination flag (see FIG. 7) of the return determination register to “1”. Further, the chip set 12 rewrites the power control register so that only the value of the S0 flag indicates “1” and the values of the other flags all indicate “0”. The chip set 12 sends a power control signal corresponding to the rewritten power control register value to the power supply unit 14. Based on the power supply control signal from the chipset 12, the power supply unit 14 sets the power supply state for each unit in the computer to the normal operation state (ACPI-S0) (step S42).
 いったん通常動作状態(ACPI-S0)に復帰すると、コンピュータは、SDカードのSDカードスロット15に対する挿入及び抜き出しを、OS及び仮想デバイスドライバにより検出可能となる。ここで、仮に、通常動作状態(ACPI-S0)への復帰が電源釦の押圧による要因や他のGPIイベントの発生など、SDカードの挿入以外の要因によるものであって、その後にSDカードの挿入が行われたとしたならば、予め設定されたアプリケーションプログラムの起動はユーザにとって予期せぬものとなり、また誤動作の原因にもなりうる。よって、BIOSは、後述するアプリケーションプログラムが起動するまでの間、GPIイベント受付の設定を「無効」とすることが好ましい(ステップS44)。このBIOSの設定に応じて、チップセット12のGPIO(n)端子の制御レジスタが、SDカードの挿入による省電力状態から通常動作状態への復帰を無効化するように設定される。 Once the computer returns to the normal operation state (ACPI-S0), the computer can detect the insertion and removal of the SD card from the SD card slot 15 by the OS and the virtual device driver. Here, it is assumed that the return to the normal operation state (ACPI-S0) is due to factors other than the insertion of the SD card, such as a factor due to pressing of the power button or the occurrence of another GPI event. If the insertion has been performed, the activation of a preset application program becomes unexpected for the user and may cause a malfunction. Therefore, the BIOS preferably sets the GPI event reception setting to “invalid” until an application program described later is started (step S44). In accordance with this BIOS setting, the control register of the GPIO (n) terminal of the chip set 12 is set so as to invalidate the return from the power saving state to the normal operation state due to the insertion of the SD card.
 次に、BIOSは、コンピュータが省電力状態から復帰した要因をチェックする(ステップS46)。この要因チェックは具体的には、BIOSがチップセット12の復帰判定レジスタの復帰判定フラグの値(第1情報)を参照することにより行われる(ステップS46、S48)。その結果、SDカードの挿入による復帰でない場合(ステップS48のNo)、ステップS52以降の手順は行わず、通常復帰の処理が行われる(ステップS50)。SDカードの挿入による復帰である場合(ステップS48のYes)、BIOSはその復帰要因(SDカードの挿入による復帰であること)を示すデータをメモリ(例えばRAM17)にスタックした後(ステップS52)、OSが復帰する(ステップS54)。OSは、自身が復帰したことを各プログラムへ通知する(ステップS56)。
 なお、BIOSでは、復帰要因を示す固有のデータが復帰要因ごとに定義されているものとする。
Next, the BIOS checks the cause of the computer returning from the power saving state (step S46). Specifically, this factor check is performed by the BIOS referring to the value (first information) of the return determination flag in the return determination register of the chip set 12 (steps S46 and S48). As a result, if the return is not due to the insertion of the SD card (No in step S48), the normal return process is performed without performing the procedure after step S52 (step S50). If the recovery is due to the insertion of the SD card (Yes in step S48), the BIOS stacks data indicating the recovery factor (recovery due to the insertion of the SD card) in a memory (for example, the RAM 17) (step S52). The OS is restored (step S54). The OS notifies each program that it has returned (step S56).
In the BIOS, it is assumed that unique data indicating a return factor is defined for each return factor.
 次に、RAM17に常駐しているデータ取り込みプログラムが実行されて、OSのレジストリに保存されているアクション設定データを参照し(ステップS58)、そのアクション設定(第2設定情報)において「電源オン有効」と設定されているか判定される(ステップS60)。アクション設定において「電源オン無効」と設定されている場合には、ステップS62以降の処理を行わず、通常復帰の処理が行われる(ステップS50)。アクション設定において「電源オン有効」である場合、データ取り込みプログラムは、仮想デバイスドライバ経由でBIOSに対し、コンピュータが省電力状態から復帰した要因の問合せを行う(ステップS62)。問合せを受けたBIOSは、ステップS52でメモリにスタックしたデータを参照することで、SDカードの挿入による復帰であるか否かを判定する(ステップS64)。その結果、SDカードの挿入による復帰でないと判断した場合には、ステップS66以降の処理を行わず、通常復帰の処理が行われる(ステップS50)。SDカードの挿入による復帰であると判断した場合には、ステップS66へ進む。 Next, the data fetching program resident in the RAM 17 is executed, and the action setting data stored in the OS registry is referred to (step S58). In the action setting (second setting information), “power on valid” Is set (step S60). If “power-on invalid” is set in the action setting, the normal recovery process is performed without performing the processes after step S62 (step S50). If the action setting is “power-on enabled”, the data fetching program inquires of the BIOS that the computer has returned from the power saving state via the virtual device driver (step S62). The BIOS that has received the inquiry refers to the data stacked in the memory in step S52 to determine whether or not the return is due to the insertion of the SD card (step S64). As a result, when it is determined that the return is not due to the insertion of the SD card, the normal return process is performed without performing the processes after step S66 (step S50). If it is determined that the return is due to the insertion of the SD card, the process proceeds to step S66.
 ステップS66では、データ取り込みプログラムが再度アクション設定データ(第4設定情報)を参照する。既にアクション設定において「電源オン有効」と設定されていることが判明しているので、ここでは、具体的なアクションの選択(本実施形態で示した例では、アプリケーションプログラムP1~P3、又は「何もしない」のいずれかの選択)を参照する。その結果、アクション設定において「何もしない」という設定でない限り(ステップS68のNo)、アクション設定で設定されているアクションに対応するプログラム(アプリケーションプログラムP1~P3のいずれか)を起動・実行する(ステップS70)。例えば、アプリケーションプログラムP2が実行されると、ステップS40で挿入されたSDカード内の画像データを用いたスライドショー自動再生が実行される。 In step S66, the data capture program refers to the action setting data (fourth setting information) again. Since it has already been found that “Power ON Enabled” is already set in the action setting, here, a specific action selection (in the example shown in this embodiment, the application programs P1 to P3 or “what” Refer to the selection of “No”. As a result, unless the action setting is “do nothing” (No in step S68), the program corresponding to the action set in the action setting (any one of the application programs P1 to P3) is started and executed ( Step S70). For example, when the application program P2 is executed, slide show automatic reproduction using the image data in the SD card inserted in step S40 is executed.
 以上説明したように、本実施形態のコンピュータでは、SDカードが挿入された(SDカードを新たに受け入れた)ことを示すカード検出信号(第1信号)が直接、チップセットの特定のGPIO端子に入力される。そして、省電力状態にある場合、この入力に基づいてチップセットは電源供給部を制御し、コンピュータを通常動作状態の給電状態に復帰させる。さらに、データ取り込みプログラムは、復帰時に行われる所望のアクションを記述したアクション設定データを、予めOSのレジストリに保存しておく。そして、復帰時にはそのレジストリを参照して、アクションに対応するプログラム(本実施形態ではアプリケーションプログラムP1~P3のいずれか)を起動させる。したがって、本実施形態のコンピュータによれば、省電力状態のときにSDカード等の記録媒体を受け入れたことをトリガとして省電力状態から復帰し、かつ、所望の手順として、所望のアプリケーションプログラムを起動させることができる。なお、アクションに対応するアプリケーションプログラムは、好ましくは、記録媒体としてのSDカード内の画像データを用いたスライドショー自動再生等、受け入れ対象の記録媒体内のデータを利用するプログラムである。 As described above, in the computer according to the present embodiment, the card detection signal (first signal) indicating that the SD card is inserted (SD card is newly received) is directly applied to a specific GPIO terminal of the chipset. Entered. When in the power saving state, the chipset controls the power supply unit based on this input, and returns the computer to the power supply state in the normal operation state. Furthermore, the data capture program stores action setting data describing a desired action to be performed at the time of return in the OS registry in advance. Then, at the time of return, the registry is referred to and a program corresponding to the action (any one of the application programs P1 to P3 in this embodiment) is activated. Therefore, according to the computer of the present embodiment, the recovery from the power saving state is triggered by accepting a recording medium such as an SD card in the power saving state, and a desired application program is started as a desired procedure. Can be made. The application program corresponding to the action is preferably a program that uses data in the receiving target recording medium, such as a slide show automatic reproduction using image data in an SD card as a recording medium.
 (2)第2実施形態
 次に、第2実施形態のコンピュータについて説明する。
 本実施形態のコンピュータは、第1実施形態のコンピュータに対して、さらに省電力を目的としたものである。具体的には、本実施形態のコンピュータでは、省電力状態におけるSDカードコントローラ16への給電が停止させられる。
(2) Second Embodiment Next, a computer according to a second embodiment will be described.
The computer of the present embodiment is intended for further power saving compared to the computer of the first embodiment. Specifically, in the computer of this embodiment, power supply to the SD card controller 16 in the power saving state is stopped.
 (2-1)コンピュータのハードウエア構成
 以下、図11を参照して、本実施形態のコンピュータのハードウエア構成を説明する。図11は、実施形態のコンピュータにおいて、ハードウエア上の各部に対する電源制御を説明するためのブロック図である。
(2-1) Hardware Configuration of Computer Hereinafter, the hardware configuration of the computer according to the present embodiment will be described with reference to FIG. FIG. 11 is a block diagram for explaining power control for each unit on the hardware in the computer according to the embodiment.
 図11を参照すると、本実施形態のコンピュータでは、チップセット12の所定のGPIO(m)端子により導通状態が制御されるスイッチ30が設けられる。このスイッチ30は、電源供給部14とSDカードコントローラ16を接続する電源供給ライン上に設けられている。
 コンピュータが通常動作状態(ACPI-S0)から省電力状態(本実施形態では、ACPI-S4又はS5)へ移行すると、チップセット12は、GPIO(m)端子の論理レベルを変化させ、このレベル変化に応じてスイッチ30は非導通状態となる。これにより、コンピュータの省電力状態(ACPI-S4又はS5)では、SDカードコントローラ16への給電が停止させられる。逆に、コンピュータが省電力状態(ACPI-S4又はS5)から通常動作状態(ACPI-S0)へ移行すると、チップセット12は、GPIO(m)端子の論理レベルを変化させ、このレベル変化に応じてスイッチ30は導通状態となる。これにより、SDカードコントローラ16への給電が再開する。
Referring to FIG. 11, in the computer of this embodiment, a switch 30 whose conduction state is controlled by a predetermined GPIO (m) terminal of the chipset 12 is provided. The switch 30 is provided on a power supply line connecting the power supply unit 14 and the SD card controller 16.
When the computer shifts from the normal operation state (ACPI-S0) to the power saving state (ACPI-S4 or S5 in this embodiment), the chipset 12 changes the logic level of the GPIO (m) terminal, and this level change In response to this, the switch 30 is turned off. Thereby, in the power saving state (ACPI-S4 or S5) of the computer, the power supply to the SD card controller 16 is stopped. Conversely, when the computer shifts from the power saving state (ACPI-S4 or S5) to the normal operation state (ACPI-S0), the chipset 12 changes the logic level of the GPIO (m) terminal and responds to this level change. Thus, the switch 30 becomes conductive. Thereby, the power supply to the SD card controller 16 is resumed.
 したがって、本実施形態のコンピュータでは、第1実施形態のものと異なり、省電力状態(ACPI-S4又はS5)におけるSDカードコントローラ16への給電が停止させられるため、さらに省電力が実現されることになる。なお、コンピュータの省電力状態においてもスイッチ30には電力が供給されるが、その消費電力は非常に僅かなものである。 Therefore, in the computer according to the present embodiment, unlike the first embodiment, since power supply to the SD card controller 16 in the power saving state (ACPI-S4 or S5) is stopped, further power saving is realized. become. Note that power is supplied to the switch 30 even in the power saving state of the computer, but the power consumption is very small.
 (2-2)コンピュータの動作
 次に、図12のフローチャートを参照して、本実施形態のコンピュータがACPI-S0からACPI-S4又はS5の状態へ移行するときの処理手順を説明する。
(2-2) Computer Operation Next, a processing procedure when the computer according to the present embodiment shifts from ACPI-S0 to ACPI-S4 or S5 will be described with reference to the flowchart of FIG.
 図12を参照すると、先ずユーザがコンピュータで予め規定された所定の操作を行うことにより、OS上で「休止状態」(ACPI-S4)又は「シャットダウン」(ACPI-S5)が選択される(ステップS80)。OSは、「休止状態」又は「シャットダウン」が選択されたことを各プログラムへ通知する(ステップS82)。次に、データ取り込みプログラム(常駐プログラム)は、OSのレジストリに保存されているアクション設定データを参照する(ステップS84)。その結果、アクション設定が「電源オン有効」を示す場合(ステップS86のYes)、データ取り込みプログラムは、仮想デバイスドライバ経由でBIOSのGPIイベント受付の設定を「有効」とする(ステップS88)。それに応じて、チップセット12のGPIO(n)端子の制御レジスタは、BIOSにより、SDカードの挿入による省電力状態から通常動作状態への復帰を有効化するように設定される。
 一方、アクション設定データを参照し、アクション設定が「電源オン無効」を示す場合(ステップS86のNo)、データ取り込みプログラムは、仮想デバイスドライバ経由でBIOSのGPIイベント受付の設定を「無効」とする(ステップS89)。それに応じて、チップセット12のGPIO(n)端子の制御レジスタは、BIOSにより、SDカードの挿入による省電力状態から通常動作状態への復帰を無効化するように設定される。
Referring to FIG. 12, first, when the user performs a predetermined operation specified in advance by the computer, “Hibernate” (ACPI-S4) or “Shutdown” (ACPI-S5) is selected on the OS (Step S1). S80). The OS notifies each program that “Hibernate” or “Shutdown” has been selected (step S82). Next, the data fetch program (resident program) refers to the action setting data stored in the registry of the OS (step S84). As a result, when the action setting indicates “power-on enabled” (Yes in step S86), the data capturing program sets the BIOS GPI event reception setting to “enabled” via the virtual device driver (step S88). Accordingly, the control register of the GPIO (n) terminal of the chip set 12 is set by the BIOS to enable the return from the power saving state to the normal operation state due to the insertion of the SD card.
On the other hand, when the action setting data is referred to and the action setting indicates “power-on disabled” (No in step S86), the data capture program sets the BIOS GPI event reception setting to “disabled” via the virtual device driver. (Step S89). Accordingly, the control register of the GPIO (n) terminal of the chipset 12 is set by the BIOS so as to invalidate the return from the power saving state to the normal operation state due to the insertion of the SD card.
 次に、OSは、ステップS80で選択された「休止状態」又は「シャットダウン」を示す値をチップセット12の電源制御レジスタに設定しようとする(ステップS90)。
 しかしながら本実施形態では、OSによりACPI-S4又はS5の状態への移行処理が行われてしまうと、上述したスイッチ30への制御が行われないため、OSによる上記移行処理を抑止する必要がある。そこで、BIOSは、OSがチップセット12の電源制御レジスタに設定しようとした値(「休止状態」又は「シャットダウン」を示す値)をトラップし、メモリ(例えばRAM17)にスタックしておく(ステップS92)。スタックしている間に、BIOSは、スイッチ30を制御するためのGPIO(m)端子の論理レベルを変化させる(ステップS94)。これにより、端子スイッチ30が非導通状態となる。
Next, the OS tries to set the value indicating “sleep state” or “shutdown” selected in step S80 in the power control register of the chipset 12 (step S90).
However, in the present embodiment, if the transition process to the ACPI-S4 or S5 state is performed by the OS, the control to the switch 30 described above is not performed, and thus the transition process by the OS needs to be suppressed. . Therefore, the BIOS traps a value (a value indicating “hibernation” or “shutdown”) that the OS tries to set in the power control register of the chipset 12 and stacks it in a memory (for example, the RAM 17) (step S92). ). During the stacking, the BIOS changes the logic level of the GPIO (m) terminal for controlling the switch 30 (step S94). As a result, the terminal switch 30 is turned off.
 その後、BIOSは、メモリにスタックしておいた値(設定値)を呼び出し、チップセット12の電源制御レジスタに設定する(ステップS96)。すなわち、本実施形態の手順では、OSによるACPI-S4又はS5の状態への移行処理をBIOSがエミュレートすることになる。電源制御レジスタの設定では、「休止状態」(ACPI-S4)の場合には、電源制御レジスタのS4フラグのみを“1”とし、その他のフラグを“0”とする。「シャットダウン」(ACPI-S5)の場合には、電源制御レジスタのS5フラグのみを“1”とし、その他のフラグを“0”とする(図7参照)。電源制御レジスタが設定されると、コンピュータの電力供給状態が「休止状態」(ACPI-S4)又は「シャットダウン」(ACPI-S5)へ移行する(ステップS98)。すなわち、チップセット12は、ステップS96で設定された電源制御レジスタの値に応じた電源制御信号を電源供給部14へ送出する。電源供給部14は、チップセット12からの電源制御信号に基づいて、コンピュータ内の各部に対する給電状態を、ACPI-S4又はS5として予め設定された状態とする。 Thereafter, the BIOS calls the value (setting value) stacked in the memory and sets it in the power control register of the chipset 12 (step S96). That is, in the procedure of the present embodiment, the BIOS emulates the transition process to the ACPI-S4 or S5 state by the OS. In the setting of the power supply control register, in the case of “pause state” (ACPI-S4), only the S4 flag of the power supply control register is set to “1”, and the other flags are set to “0”. In the case of “shutdown” (ACPI-S5), only the S5 flag of the power control register is set to “1”, and the other flags are set to “0” (see FIG. 7). When the power supply control register is set, the power supply state of the computer shifts to “sleep state” (ACPI-S4) or “shutdown” (ACPI-S5) (step S98). That is, the chip set 12 sends a power control signal corresponding to the value of the power control register set in step S96 to the power supply unit 14. Based on the power supply control signal from the chipset 12, the power supply unit 14 sets the power supply state for each unit in the computer to a state preset as ACPI-S4 or S5.
 以上が、ACPI-S0からACPI-S4又はS5の状態へ移行するときの処理手順である。
 なお、本実施形態では、ACPI-S0からACPI-S3の状態へ移行するときには、SDカードコントローラ16に対する給電を停止しない方が好ましい。すなわち、ACPI-S0からACPI-S3の状態へ移行するときの手順は、図9で説明したものと同一であることが好ましい。これは、ACPI-S3の状態からACPI-S0の状態への復帰期間の短縮化と、SDカードコントローラ16のデバイスドライバの復帰時の動作の安定化を図るためである。
The above is the processing procedure when shifting from ACPI-S0 to ACPI-S4 or S5.
In the present embodiment, it is preferable not to stop the power supply to the SD card controller 16 when shifting from the ACPI-S0 to the ACPI-S3 state. That is, the procedure for shifting from ACPI-S0 to ACPI-S3 is preferably the same as that described in FIG. This is to shorten the return period from the ACPI-S3 state to the ACPI-S0 state and to stabilize the operation when the device driver of the SD card controller 16 returns.
 また、本実施形態のコンピュータにおいて、コンピュータがACPI-S3,S4又はS5からACPI-S0の状態へ復帰するときの処理手順は、図10に示したものと同様であり、ここでは重複説明を行わない。 Further, in the computer of this embodiment, the processing procedure when the computer returns from the ACPI-S3, S4 or S5 to the ACPI-S0 state is the same as that shown in FIG. Absent.
 以上、本発明の各実施形態について詳細に説明したが、本発明の情報処理装置、情報処理方法は上記の各実施形態に限定されず、本発明の主旨を逸脱しない範囲において、種々の改良や変更をしてもよいのはもちろんである。 The embodiments of the present invention have been described in detail above. However, the information processing apparatus and the information processing method of the present invention are not limited to the above-described embodiments, and various improvements and modifications can be made without departing from the spirit of the present invention. Of course, changes may be made.
 例えば、図13に示すように、カード検出信号(SDカードが挿入されていない時にハイレベル、SDカードが挿入されている時にローレベル)と、電源釦の押圧に伴うウェイクアップ信号(Wakeup:電源オン時にハイレベル、電源オフ時にローレベル)とを入力する論理回路32(OR回路)を設けてもよい。論理回路32の出力は、GPIO(n)端子に接続される。このような構成とすることにより、SDカードが挿入されており、かつ電源釦の押圧がないときに限り、GPIO(n)端子がローレベルとなる。これにより、電源釦の押圧と同時にSDカードが挿入された状況等において、ソフトウエア上の誤作動が生ずる可能性を低減することができる。なお、カード検出信号と、ウェイクアップ信号以外の電源起動要求信号とに基づいて、GPIO(n)端子に接続するための論理回路(OR回路に限られない)を構成することもできる。 For example, as shown in FIG. 13, a card detection signal (high level when an SD card is not inserted, low level when an SD card is inserted), and a wakeup signal (Wakeup: power supply) associated with pressing of a power button A logic circuit 32 (OR circuit) that inputs a high level when on and a low level when power is off may be provided. The output of the logic circuit 32 is connected to the GPIO (n) terminal. With such a configuration, the GPIO (n) terminal is at a low level only when an SD card is inserted and the power button is not pressed. Thereby, in the situation where the SD card is inserted at the same time as the power button is pressed, the possibility of software malfunction can be reduced. Note that a logic circuit (not limited to the OR circuit) for connecting to the GPIO (n) terminal can be configured based on the card detection signal and the power activation request signal other than the wake-up signal.

Claims (16)

  1.  外部から記録媒体を受入可能な情報処理装置であって、
     記録媒体を受け入れているか否かを示す第1信号を生成する記録媒体受入部と、
     情報処理装置の各部へ給電を行う第1モードと、第1モードよりも給電を制限する第2モードとを含む電源制御モードにより動作する電源供給部と、
     情報処理装置を起動するための複数の端子を有し、当該複数の端子の中で第1端子が前記第1信号のために割り当てられ、電源制御モードが第2モードのときに前記第1信号に基づいて記録媒体を新たに受け入れたと判断した場合には、電源制御モードを第2モードから第1モードへ移行するように電源供給部を制御する電源制御部と、
     記録媒体を新たに受け入れたことに起因して電源制御モードが第2モードから第1モードへ移行した場合、予め設定された第1設定情報に従って所定の手順を実行する実行部と、
     を備えた情報処理装置。
    An information processing apparatus capable of receiving a recording medium from outside,
    A recording medium receiving unit for generating a first signal indicating whether or not the recording medium is received;
    A power supply unit that operates in a power control mode including a first mode that supplies power to each unit of the information processing device and a second mode that limits power supply more than the first mode;
    A plurality of terminals for activating the information processing apparatus, a first terminal of which is assigned for the first signal, and the first signal when the power control mode is the second mode; A power control unit that controls the power supply unit to shift the power control mode from the second mode to the first mode when it is determined that the recording medium is newly received based on
    An execution unit that executes a predetermined procedure according to preset first setting information when the power supply control mode shifts from the second mode to the first mode due to newly receiving a recording medium;
    An information processing apparatus comprising:
  2.  基本入出力システムを備え、
     基本入出力システムは、電源制御モードの第2モードから第1モードへの移行が記録媒体を新たに受け入れたことに起因するか否かについての第1情報、を電源制御部から取得し、
     前記実行部は、基本入出力システムから前記第1情報を参照して前記所定の手順を実行する、
     請求項1に記載された情報処理装置。
    It has a basic input / output system,
    The basic input / output system acquires, from the power control unit, first information as to whether or not the transition from the second mode to the first mode of the power control mode is due to a new acceptance of the recording medium,
    The execution unit executes the predetermined procedure with reference to the first information from a basic input / output system;
    The information processing apparatus according to claim 1.
  3.  前記電源制御部は、記録媒体を新たに受け入れたことに起因して電源制御モードが第2モードから第1モードへ移行した後は、前記実行部が前記所定の手順の実行を完了するまで、前記第1端子への入力に基づく情報処理装置の起動を禁止する、
     請求項1又は2に記載された情報処理装置。
    After the power supply control mode shifts from the second mode to the first mode due to the newly received recording medium, the power supply control unit completes the execution of the predetermined procedure until the execution unit completes the execution of the predetermined procedure. Prohibiting activation of the information processing device based on an input to the first terminal;
    The information processing apparatus according to claim 1 or 2.
  4.  基本入出力システムを備え、
     前記第1設定情報は、ユーザの選択に応じて、記録媒体を新たに受け入れたことに起因した電源制御モードの第2モードから第1モードへの移行を有効とするか否かについての第2設定情報、を含み、
     基本入出力システムは、前記第1設定情報から前記第2設定情報を取得する、
     請求項1に記載された情報処理装置。
    It has a basic input / output system,
    The first setting information is a second information on whether or not to enable the transition from the second mode to the first mode of the power control mode caused by newly accepting the recording medium according to the user's selection. Configuration information,
    The basic input / output system acquires the second setting information from the first setting information.
    The information processing apparatus according to claim 1.
  5.  電源制御部は、前記第1信号に基づく電源制御モードの第2モードから第1モードへの移行を有効とするか否かについての第3設定情報を備え、
     基本入出力システムは、前記第2設定情報に応じて電源制御部の前記第3設定情報を設定する、
     請求項4に記載された情報処理装置。
    The power control unit includes third setting information as to whether or not to enable transition from the second mode to the first mode of the power control mode based on the first signal,
    The basic input / output system sets the third setting information of the power control unit according to the second setting information.
    The information processing apparatus according to claim 4.
  6.  記録媒体と電源制御部との間のデータインタフェース機能を有する記録媒体制御部を備え、電源制御モードが第2モードである間は記録媒体制御部に対する給電が停止させられる、
     請求項1~5のいずれかに記載された情報処理装置。
    A recording medium control unit having a data interface function between the recording medium and the power control unit, and power supply to the recording medium control unit is stopped while the power control mode is the second mode;
    The information processing apparatus according to any one of claims 1 to 5.
  7.  前記実行部の第1設定情報は、複数のアプリケーションプログラムの中から、前記所定の手順にて実行されるアプリケーションプログラムのユーザによる選択結果についての第4設定情報を含む、
     請求項1~6のいずれかに記載された情報処理装置。
    The first setting information of the execution unit includes fourth setting information about a selection result by a user of an application program executed in the predetermined procedure from among a plurality of application programs.
    The information processing apparatus according to any one of claims 1 to 6.
  8.  前記第4設定情報がオペレーティングシステム内に予め保存されており、
     前記第1信号の入力に起因して電源制御モードが第2モードから第1モードへ移行したと判断された場合、前記実行部はオペレーティングシステムを参照して、前記第4設定情報に係るアプリケーションプログラムを実行する、
     請求項7に記載された情報処理装置。
    The fourth setting information is stored in advance in the operating system;
    When it is determined that the power control mode has shifted from the second mode to the first mode due to the input of the first signal, the execution unit refers to the operating system and the application program related to the fourth setting information Run the
    The information processing apparatus according to claim 7.
  9.  外部から記録媒体を受入可能であって、かつ、情報処理装置の各部へ給電を行う第1モードと、第1モードよりも給電を制限する第2モードとを含む電源制御モードにより動作する情報処理装置、における情報処理方法であって、
     記録媒体を受け入れているか否かを示す第1信号を生成し、
     電源制御モードが第2モードのときに、情報処理装置の電源制御部が、情報処理装置を起動するための複数の端子の中の第1端子に入力される前記第1信号に基づいて、記録媒体を新たに受け入れたと判断した場合には、電源制御モードを第2モードから第1モードへ移行させ、
     情報処理装置のプログラムが、記録媒体を新たに受け入れたことに起因して電源制御モードが第2モードから第1モードへ移行した場合、予め設定された第1設定情報に従って所定の手順を実行する、
     情報処理方法。
    Information processing capable of receiving a recording medium from the outside and operating in a power control mode including a first mode in which power is supplied to each unit of the information processing apparatus and a second mode in which power supply is restricted more than in the first mode An information processing method in an apparatus,
    Generating a first signal indicating whether or not the recording medium is accepted;
    When the power control mode is the second mode, the power control unit of the information processing device performs recording based on the first signal input to the first terminal among the plurality of terminals for starting the information processing device. If it is determined that the medium has been newly received, the power control mode is changed from the second mode to the first mode,
    When the power supply control mode shifts from the second mode to the first mode due to the new reception of the recording medium by the program of the information processing apparatus, a predetermined procedure is executed according to preset first setting information ,
    Information processing method.
  10.  前記プログラムが所定の手順を実行することは、
     情報処理装置の基本入出力システムが、電源制御モードの第2モードから第1モードへの移行が記録媒体を新たに受け入れたことに起因するか否かについての第1情報、を前記電源制御部から取得し、
     前記プログラムが、前記基本入出力システムから前記第1情報を参照して前記所定の手順を実行すること、
     を含む、請求項9に記載された情報処理方法。
    For the program to execute a predetermined procedure,
    The basic input / output system of the information processing apparatus receives first information as to whether or not the transition from the second mode of the power control mode to the first mode is due to a new acceptance of the recording medium, the power control unit Get from
    The program executes the predetermined procedure with reference to the first information from the basic input / output system;
    An information processing method according to claim 9, comprising:
  11.  記録媒体を新たに受け入れたことに起因して電源制御モードが第2モードから第1モードへ移行した後は、前記プログラムが前記所定の手順の実行を完了するまで、前記第1端子への入力に基づく情報処理装置の起動を禁止すること、
     をさらに備えた、請求項9又は10に記載された情報処理方法。
    After the power supply control mode shifts from the second mode to the first mode due to the new acceptance of the recording medium, the input to the first terminal until the program completes the execution of the predetermined procedure. Prohibiting activation of information processing devices based on
    The information processing method according to claim 9 or 10, further comprising:
  12.  前記プログラムが、ユーザの選択に応じて、記録媒体を新たに受け入れたことに起因した電源制御モードの第2モードから第1モードへの移行を有効とするか否かについての第2設定情報を参照し、
     情報処理装置の基本入出力システムが、前記プログラムから前記第2設定情報を取得すること、
     をさらに備えた、請求項9に記載された情報処理方法。
    Second setting information as to whether or not to enable the transition from the second mode to the first mode of the power control mode caused by the program receiving a new recording medium according to the user's selection. Browse and
    The basic input / output system of the information processing apparatus acquires the second setting information from the program;
    The information processing method according to claim 9, further comprising:
  13.  前記基本入出力システムが、前記第2設定情報に応じて、前記第1信号に基づく電源制御モードの第2モードから第1モードへの移行を有効とするか否かについての第3設定情報を設定すること、
     をさらに備えた、請求項12に記載された情報処理方法。
    Third setting information about whether or not the basic input / output system validates the transition from the second mode to the first mode of the power control mode based on the first signal according to the second setting information. Setting,
    The information processing method according to claim 12, further comprising:
  14.  電源制御モードが第2モードである間は、情報処理装置において記録媒体と電源制御部との間のデータインタフェース機能を有する記録媒体制御部に対する給電が停止させること、
     をさらに備えた、請求項9~13のいずれかに記載された情報処理方法。
    While the power control mode is the second mode, power supply to the recording medium control unit having a data interface function between the recording medium and the power control unit in the information processing apparatus is stopped.
    The information processing method according to any one of claims 9 to 13, further comprising:
  15.  前記プログラムが、複数のアプリケーションプログラムの中から、前記所定の手順にて実行されるアプリケーションプログラムのユーザによる選択結果についての第4設定情報を参照すること、
     をさらに備えた、請求項9~14のいずれかに記載された情報処理方法。
    The program refers to fourth setting information about a selection result by a user of an application program executed in the predetermined procedure from a plurality of application programs;
    The information processing method according to any one of claims 9 to 14, further comprising:
  16.  前記プログラムが、前記アプリケーションプログラムの選択結果を情報処理装置のオペレーティングシステム内に予め保存しておき、前記所定の手順を実行するときにオペレーティングシステム内の前記選択結果に係るアプリケーションプログラムを参照すること、を含む、
     請求項15に記載された情報処理方法。
    The program stores the selection result of the application program in advance in the operating system of the information processing apparatus, and refers to the application program related to the selection result in the operating system when executing the predetermined procedure; including,
    The information processing method according to claim 15.
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