WO2010125941A1 - Screening method for magnetoresistive storage device - Google Patents
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- WO2010125941A1 WO2010125941A1 PCT/JP2010/056945 JP2010056945W WO2010125941A1 WO 2010125941 A1 WO2010125941 A1 WO 2010125941A1 JP 2010056945 W JP2010056945 W JP 2010056945W WO 2010125941 A1 WO2010125941 A1 WO 2010125941A1
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- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
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- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
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- G—PHYSICS
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- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50008—Marginal testing, e.g. race, voltage or current testing of impedance
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
- H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/10—Magnetoresistive devices
Definitions
- the present invention relates to a screening method for a magnetoresistive memory device, and more particularly, to a defective cell screening method for a magnetic random access memory (MRAM).
- MRAM magnetic random access memory
- MRAM is a promising nonvolatile memory from the viewpoint of high integration and high-speed operation.
- a magnetoresistive memory element exhibiting a “magnetoresistance effect” such as a TMR (Tunnel MagnetoResistance) effect is used.
- a magnetic tunnel junction MTJ
- the two ferromagnetic layers are composed of a pinned layer (magnetization pinned layer) whose magnetization direction is fixed and a free layer (magnetization free layer) whose magnetization direction can be reversed.
- MTJ magnetic tunnel junction
- the two ferromagnetic layers are composed of a pinned layer (magnetization pinned layer) whose magnetization direction is fixed and a free layer (magnetization free layer) whose magnetization direction can be reversed.
- Roy Scheuerlein et al. “A 10 ns Read and Write Non-Volatile Memory Array Usage a Magnetic Tunnel Junction and FET SwitchinEtErPNeSNRC” 128-129 (Non-P
- the resistance value (R + ⁇ R) of the MTJ when the magnetization directions of the pinned layer and the free layer are “anti-parallel” is larger than the resistance value (R) when they are “parallel” due to the magnetoresistance effect. It is known.
- the MRAM uses a magnetoresistive storage element having this MTJ as a memory cell, and stores data in a nonvolatile manner by utilizing the change in the resistance value. Data is written to the memory cell by reversing the magnetization direction of the free layer.
- the asteroid method is known as a method of writing data to the MRAM.
- M.M. Durlam et al. “Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, 2000 IEEE International Solid-State Circuits Conference, DIGEST OF TECHNICPAPER. 130-131 (Non-Patent Document 2) discloses such an asteroid system.
- FIG. 1 is a perspective view showing an example of a non-volatile memory using TMR as a storage element.
- the TMR 505 is arranged in an array.
- a pair of wirings 506 and 509 that intersect is provided above and below the TMR 505.
- the free layer of the TMR 505 is connected to the upper wiring 506.
- the pin layer of the TMR 505 is connected to the drain of the transistor 508 formed in the lower layer through the wiring layer 507.
- the magnetization direction (data to be written) of the free layer is set according to the direction of current. Thereby, the resistance value of the TMR 505 can be changed (data can be written).
- the transistor 508 connected to the TMR 505 to be read is turned on by the wiring (W) 510, a voltage is applied to the TMR 505 from the wiring (B) 506, and the resistance value of the TMR 505 is evaluated by the current flowing through the TMR 505.
- W the wiring
- the reversal magnetic field necessary for reversing the magnetization of the free layer is substantially in inverse proportion to the size of the memory cell. That is, the write current tends to increase as the memory cell is miniaturized.
- spin transfer method has been proposed as a write method capable of suppressing an increase in write current accompanying miniaturization.
- Yamami and Suzuki “Research Trends in Spin Transfer Magnetization Switching” (Research Trends of Spin Injection Magnetization Reversal), Journal of Japan Society of Applied Magnetics, Vol. 28, no. 9, 2004, pp. No. 937-948 (Non-patent Document 3) discloses such a spin injection method.
- a spin-polarized current is injected into the ferromagnetic conductor, and the magnetization is reversed by a direct interaction between the spin of the conduction electron carrying the current and the magnetic moment of the conductor.
- Spin Transfer Magnetization Switching referred to as “Spin Transfer Magnetization Switching”.
- FIG. 2 is a schematic cross-sectional view showing an outline of the spin injection magnetization reversal of the magnetoresistive memory element.
- the magnetoresistive memory element includes a free layer 601, a pinned layer 603, and a tunnel barrier layer 602 that is a nonmagnetic layer sandwiched between the free layer 601 and the pinned layer 603.
- the pinned layer 603 whose magnetization direction is fixed is formed to be thicker than the free layer 601, and plays a role as a mechanism (spin filter) for creating a spin-polarized current.
- the state where the magnetization directions of the free layer 601 and the pinned layer 603 are parallel is associated with data “0”, and the state where they are antiparallel is associated with data “1”.
- the spin-injection magnetization reversal shown in FIG. 2 is realized by a CPP (Current Perpendicular to Plane) method, and a write current is injected perpendicularly to the film surface. Specifically, current flows from the pinned layer 603 to the free layer 601 at the time of transition from data “0” to data “1”. In this case, electrons having the same spin state as the pinned layer 603 serving as a spin filter move from the free layer 601 to the pinned layer 603. Then, the magnetization of the free layer 601 is reversed by a spin transfer (spin angular momentum transfer) effect.
- CPP Current Perpendicular to Plane
- the direction of the current is reversed, and the current flows from the free layer 601 to the pinned layer 603.
- electrons having the same spin state as the pinned layer 603 serving as a spin filter move from the pinned layer 603 to the free layer 601. Due to the spin transfer effect, the magnetization of the free layer 601 is reversed.
- the direction of magnetization of the free layer 601 can be defined by the direction of the spin-polarized current injected perpendicular to the film surface.
- Japanese Patent No. 3866701 discloses a magnetic random access memory and a test method thereof.
- the magnetic random access memory includes a memory cell array, a write word line and a write bit line, a first driver, a second driver, a first sinker, a third driver, a fourth driver, 2 sinkers, first means, and second means.
- magnetoresistive storage elements are arranged in a matrix.
- a write word line is arranged in each row of the memory cell array.
- Write bit lines are arranged in each column of the memory cell array.
- the first driver is selectively connected to both ends of the write word line.
- the second driver has a higher driving capability than the first driver.
- the third driver was connected to one end of the write bit line.
- the fourth driver has a higher driving capability than the third driver.
- the second sinker was connected to the other end of the write bit line.
- the first means collectively writes the information of the plurality of memory cells by uniaxial writing in the hard axis direction by the second driver.
- the second means simultaneously applies a larger current to the plurality of memory cells by uniaxial writing in the easy axis direction than the biaxial writing in the normal operation by the fourth driver.
- Japanese Patent Application Laid-Open No. 2003-338199 discloses a semiconductor memory device and a method for using the same.
- This semiconductor memory device uses a plurality of magnetoresistive memory elements as memory cells.
- This semiconductor memory device has a function of determining stored data of a memory cell, and a function of comparing a characteristic value correlated with the absolute value of the resistance value of each memory cell with a desired threshold value to determine whether the memory cell is good or bad And have.
- Japanese Patent Application Laid-Open No. 2005-311167 discloses a tunnel magnetoresistive effect element inspection method and apparatus.
- this tunnel magnetoresistive effect element inspection method the initial resistance value of the tunnel magnetoresistive effect element is measured to obtain a first resistance value, and a current is passed through the tunnel magnetoresistive effect element from the non-substrate direction to the substrate direction.
- the resistance value after energization for a predetermined time is measured to obtain a second resistance value, and the tunnel magnetoresistive effect element is evaluated by comparing the first resistance value and the second resistance value.
- JP-A-2006-269907 discloses a tunnel magnetoresistive element inspection method and apparatus, a tunnel magnetoresistive element manufacturing method, and a tunnel magnetoresistive element.
- this tunnel magnetoresistive effect element inspection method the resistance values of the tunnel magnetoresistive effect element are respectively measured in a state where a plurality of voltages having mutually different voltage values are applied to the tunnel magnetoresistive effect element.
- the tunnel magnetoresistive element is evaluated by obtaining the resistance change amount from the value.
- JP 2007-123637 A (corresponding US Pat. No. 7,394,684 (B2)) discloses a spin injection magnetic random access memory.
- This spin-injection magnetic random access memory executes writing to a magnetoresistive element using spin-polarized electrons generated by a spin-injection current.
- the spin injection magnetic random access memory includes means for applying a magnetic field in the hard axis direction of the magnetoresistive effect element to the magnetoresistive effect element at the time of writing.
- FIG. 3 is an asteroid curve showing conditions under which magnetization reversal occurs in the free layer when a magnetic field is applied.
- the vertical axis represents the magnitude of the magnetic field in the direction of the hard axis in the free layer.
- the horizontal axis indicates the magnitude of the magnetic field in the direction of the easy axis of magnetization in the free layer.
- a thick arrow indicates the magnetization direction of the free layer.
- the magnetization of the free layer is reversed to a data “1” state when a magnetic field exceeding the solid line A of the asteroid curve is applied, and to a data “0” state when a magnetic field exceeding the broken line B is applied. .
- the magnetization can be reversed with the smallest magnetic field by applying the magnetic field in the direction of 45 degrees with respect to the easy axis direction.
- FIG. 3 moves or deforms.
- 4A and 4B show an example of an asteroid curve when the magnetic characteristics are changed.
- the asteroid curve is shifted and deformed, for example, in the lower right direction as shown in FIG. 4A, or when the asteroid curve is shifted, for example, in the lower right direction as shown in FIG. 4B
- the magnetization reversal itself has a good balance regardless of the data to be written, and the value is the same as in the case of FIG.
- the origin which is in the state of holding no magnetic field data, is close to the asteroid curve indicating the boundary where magnetization reversal occurs.
- magnetization reversal occurs due to thermal disturbance during data retention, and data is easily destroyed. For these reasons, it is not desirable for the asteroid curve in the free layer to shift, rotate or deform. Therefore, it is necessary to perform a screening process for detecting a memory cell (defective cell) having a magnetoresistive memory element exhibiting such magnetic characteristics and not using it as a memory cell.
- magnetization reversal due to thermal disturbance is a phenomenon that occurs stochastically and does not necessarily occur just because data is retained for a certain period of time. Therefore, in the magnetoresistive memory element that stores data using the magnetization direction, it is difficult to screen a defective cell in which magnetization reversal occurs with probability and to obtain a highly reliable magnetoresistive memory device. is there.
- An object of the present invention is to provide a method for effectively screening defective cells of a magnetoresistive memory device such as an MRAM.
- a screening method for a magnetoresistive storage device is a screening method for a magnetoresistive storage device that includes a first magnetic body and includes a storage element that stores data in the direction of magnetization of the first magnetic body. It is.
- the step of setting the magnetization direction of the first magnetic body is different from the magnetization easy axis direction and the magnetization difficult axis direction of the first magnetic body.
- the magnetoresistive storage device includes a storage element, a writing unit, an applying unit, an evaluating unit, and a control unit.
- the storage element includes a first magnetic body and stores data in the magnetization direction of the first magnetic body.
- the writing unit sets the magnetization direction of the first magnetic body.
- the application unit stores a first magnetic field that has a direction component that is different from an easy magnetization direction and a hard magnetization direction of the first magnetic body and includes a direction component opposite to the magnetization direction of the first magnetic body. Apply to.
- the evaluation unit evaluates the resistance of the memory element.
- the control unit determines whether or not the storage element is defective based on the evaluation result, and stores and / or sets the storage element that is determined to be defective so as not to be used.
- the screening method of the magnetoresistive memory device of the present invention enables efficient defective cell screening. Thereby, a highly reliable magnetoresistive memory device can be realized.
- FIG. 1 is a perspective view showing an example of a nonvolatile memory using TMR as a memory element.
- FIG. 2 is a schematic cross-sectional view showing an outline of spin injection magnetization reversal of the magnetoresistive memory element.
- FIG. 3 is an asteroid curve showing conditions under which magnetization reversal occurs in the free layer when a magnetic field is applied.
- FIG. 4A is an example of an asteroid curve when the magnetic properties change.
- FIG. 4B is another example of an asteroid curve when the magnetic properties are changed.
- FIG. 5A is a schematic diagram showing the principle of the screening method for the magnetoresistive storage device according to the embodiment of the present invention.
- FIG. 5A is a schematic diagram showing the principle of the screening method for the magnetoresistive storage device according to the embodiment of the present invention.
- FIG. 5B is a schematic diagram illustrating the principle of the screening method for the magnetoresistive storage device according to the embodiment of the present invention.
- FIG. 5C is a schematic diagram showing the principle of the screening method for the magnetoresistive storage device according to the embodiment of the present invention.
- FIG. 5D is a schematic diagram showing the principle of the screening method of the magnetoresistive storage device according to the embodiment of the present invention.
- FIG. 6 is a sectional view showing the main part of the memory cell according to the first embodiment of the present invention.
- FIG. 7 is a plan view showing the main part of the memory cell according to the first embodiment of the present invention.
- FIG. 8 is a circuit diagram showing a configuration example of the memory cell according to the first embodiment of the present invention.
- FIG. 9 is a block diagram showing a configuration example of a magnetoresistive memory device in which memory cells according to the first embodiment of the present invention are integrated.
- FIG. 10A is a conceptual diagram illustrating a memory cell screening method according to the first embodiment of the present invention.
- FIG. 10B is a conceptual diagram illustrating a memory cell screening method according to the first embodiment of the present invention.
- FIG. 11 is a plan view showing an example of an external magnetic field according to the first embodiment of the present invention.
- FIG. 12 is a sectional view showing the main part of a memory cell according to the second embodiment of the present invention.
- FIG. 13 is a plan view showing the main part of a memory cell according to the second embodiment of the present invention.
- FIG. 10A is a conceptual diagram illustrating a memory cell screening method according to the first embodiment of the present invention.
- FIG. 10B is a conceptual diagram illustrating a memory cell screening method according to the first embodiment of the present invention.
- FIG. 11 is a plan view showing an example
- FIG. 14A is a conceptual diagram illustrating a memory cell screening method according to a second embodiment of the present invention.
- FIG. 14B is a conceptual diagram illustrating a memory cell screening method according to a second embodiment of the present invention.
- FIG. 15 is a sectional view showing the main part of a memory cell according to the third embodiment of the present invention.
- FIG. 16 is a plan view showing the main part of a memory cell according to the third embodiment of the present invention.
- FIG. 17A is a conceptual diagram illustrating a memory cell screening method according to a third embodiment of the present invention.
- FIG. 17B is a conceptual diagram illustrating a memory cell screening method according to a third embodiment of the present invention.
- 5A to 5D are schematic diagrams showing the principle of the screening method for the magnetoresistive memory device according to the embodiment of the present invention.
- the magnetoresistive memory device 10 is exemplified by an MRAM in which a plurality of memory cells are arranged in an array, and the memory cell includes a magnetoresistive memory element 1. As shown in FIG. 5A and FIG. 5C, the magnetoresistive memory device 10 includes a memory cell (magnetoresistance memory element 1), a writing unit 4, an applying unit 2, an evaluating unit 3, and a control unit 5. is doing.
- the magnetoresistive memory element 1 includes a first magnetic layer 11 whose magnetization state changes according to data, a second magnetic layer 13 whose magnetization direction is fixed, a first magnetic layer 11 and a second magnetic layer 13. And a tunnel barrier layer 12 which is a nonmagnetic material sandwiched between the two.
- the first magnetic layer 11, the tunnel barrier layer 12, and the second magnetic layer 13 constitute an MTJ element.
- the first magnetic layer 11 is exemplified as a free layer of a typical or spin-injection magnetoresistive memory element or a reference layer of a domain wall motion type magnetoresistive memory element.
- the second magnetic layer 13 is exemplified by a pin layer of a typical or spin-injection magnetoresistive memory element or a magnetization recording layer of a domain wall motion type magnetoresistive memory element.
- 5A and 5C show that in the magnetoresistive memory element 1 (memory cell), the first magnetic layer 11 and the second magnetic layer 13 have perpendicular magnetic anisotropy, and data “0” (first magnetic layer) is shown.
- the body layer 11 and the second magnetic layer 13 have parallel magnetization directions) and data “1” (same as the antiparallel magnetization direction) are stored.
- the writing unit 4 changes the magnetization state of the first magnetic layer 11 and writes data to the magnetoresistive memory element 1.
- a circuit for writing a memory cell and a wiring for writing can be used.
- the application unit 2 applies a screening magnetic field to at least the first magnetic layer 11 during screening.
- An external magnetic field may be used.
- the evaluation unit 3 evaluates the magnitude of the resistance of the magnetoresistive memory element 1 and reads data of the magnetoresistive memory element 1.
- the control unit 5 determines whether the memory cell is good or defective using the evaluated resistance value or the characteristic value corresponding to the resistance value, and handles the memory cell (defective cell) determined as defective in advance.
- 5A and 5C show a case where screening is performed by applying a magnetic field Hs for screening to the magnetoresistive memory element 1 (memory cell).
- the structure of the magnetoresistive memory element 1, the application part 2, the evaluation part 3, the writing part 4, and the control part 5 in a figure are typical illustrations, and are not limited to this example.
- the writing unit 4 sets the direction of magnetization of the first magnetic layer 11 (writes data to the memory cell), and the applying unit 2 applies the screening magnetic field Hs (screening) to the first magnetic layer 11.
- a magnetic field a step in which the evaluation unit 3 evaluates the magnitude of the resistance of the magnetoresistive memory element 1 after the magnetic field Hs is applied (reads data in the memory cell), and a resistance value evaluated by the control unit 5
- the magnetic field Hs is a magnetic field having such a magnitude and direction that does not cause magnetization reversal in a memory cell that is not defective, but may be capable of magnetization reversal in a defective memory cell.
- FIGS. 5B and 5D show the range of the magnetic field Hs (screening magnetic field) to be applied when screening is performed in FIGS. 5A and 5C, respectively.
- the vertical axis represents the easy axis direction (also referred to as easy axis direction) of the first magnetic layer 11, and the horizontal axis represents the hard axis (plane) direction (also referred to as hard axis direction). Is the direction of magnetization of the first magnetic layer 11.
- the direction of the magnetic field Hs applied by the application unit 2 has a component opposite to the direction of magnetization of the first magnetic layer 11, and further includes an easy axis direction and a hard axis direction of the first magnetic layer 11. Are in different directions. For example, in the case of FIG.
- the range ⁇ 1 of the direction of the magnetic field Hs is a range having a component opposite to the direction of magnetization of the first magnetic layer 11, and the direction of the angle ⁇ 1 from the hard axis (plane) direction. To the direction of the angle ⁇ 2 from the easy axis direction.
- the range ⁇ 2 of the direction of the magnetic field Hs is a range having a component in the opposite direction to the magnetization direction of the first magnetic layer 11, and the direction of the angle ⁇ 3 from the hard axis (plane) direction. To the direction from the easy axis direction to the direction of the angle ⁇ 4.
- the magnetic field Hs (screening magnetic field) applied by the application unit 2 has an angle component in the direction of 45 degrees from the easy axis direction of the first magnetic layer 11 larger than the easy axis direction component and the difficult axis direction component. More preferably, the magnetic field Hs is 45 degrees from the easy axis direction of the first magnetic layer 11. As can be seen from the shape of the asteroid curve (Fig. 3), there is the smallest reversal magnetic field between the easy axis direction and the hard axis direction, so the position is 45 degrees between the easy axis direction and the hard axis direction. This is because is optimal.
- the write magnetic field Hw applied by the writing unit 4 has the magnetization direction to be set. It has a component, and the direction of about 45 degrees from the easy axis direction of the first magnetic layer 11 is desirable.
- the direction of the magnetic field Hs has a component opposite to the direction of magnetization set in the first magnetic layer 11 and is about 45 degrees from the easy axis direction of the first magnetic layer 11. Direction. For this reason, when viewed from the writing magnetic field Hw, the direction of the magnetic field Hs applied in the screening is about 90 degrees (about 45 degrees + about 45 degrees).
- the application of the magnetic field Hs is performed for each of the two magnetization states of the first magnetic layer 11 set corresponding to the data “0” and “1”, and a plurality of application of the magnetic field Hs is performed for each of the two magnetization states. It is effective when performed in the direction of. This is particularly effective when the hard axis direction forms a surface. Thereby, when there is a problem in the magnetic characteristics, magnetization reversal or the like is likely to occur in the retained state, and screening can be performed reliably.
- the evaluation unit 3 performs the resistance evaluation of the memory cell (the magnetoresistive memory element 1) before applying the magnetic field Hs, after applying the magnetic field Hs and stopping the magnetic field Hs, or while applying the magnetic field Hs. Or you may perform combining those evaluation.
- the control unit 5 determines whether the memory cell is good or defective based on a predetermined determination criterion.
- a predetermined determination criterion a screening-determination criterion that is provided separately from the determination criterion for determining a defective cell by normal memory cell operation may be used.
- control unit 5 performs resistance evaluation a plurality of times, and determines whether the memory cell is good or bad based on the magnitude relationship between the values or the magnitude relationship between the difference between the values and a predetermined value.
- the control unit 5 stores the address of the defective cell so as not to be used thereafter, or replaces the defective cell or a memory cell group including the defective cell with another memory cell group, depending on the generation position and number. It can be used in the same way as a normal memory cell and control such as correction of data by parity check can be performed.
- magnetization reversal occurs in the holding state, or resistance change occurs, and this is evaluated. It is possible to effectively detect a cell that may become abnormal, and a highly reliable magnetoresistive memory device can be obtained.
- FIG. 6 and 7 are a sectional view and a plan view, respectively, showing the main part of the memory cell according to the first embodiment of the present invention.
- FIG. 6 is an AA ′ sectional view of FIG.
- a Ta film 72, NiFe film 73, PtMn film 74, CoFe film 75, Ru film 76, CoFe film 77, MgO film 78, NiFe film 79, Ta film 84, and AlCu film 89 are laminated in this order. .
- the NiFe film 79 is a free layer as the first magnetic layer 11 in FIGS. 5A and 5C, has a magnetization direction in the in-plane direction of the film, and has an elliptical pattern.
- the CoFe films 75 and 77 antiferromagnetically coupled via the Ru film 76 of the conductor layer are pinned layers as the second magnetic layer 13 in FIGS. 5A and 5C.
- the MgO film 78 is the tunnel barrier layer 12 provided between the free layer and the pinned layer in FIGS. 5A and 5C. These free layer, pinned layer, and tunnel barrier layer function as an MTJ element (magnetoresistance memory element 1).
- a pin layer portion (Ta film 72 / NiFe film 73 / PtMn film 74 / CoFe film 75 / Ru film 76 / CoFe film 77) extending in one direction functions as a write wiring.
- the AlCu film 89 electrically connected to the free layer via the Ta film 84 as the upper electrode functions as a read wiring and a current wiring that induces a screening magnetic field.
- the Ta film 72 which is a lower electrode in the pin layer is electrically connected with other wiring for read current and write current via a W plug 70.
- the MTJ element is arranged so that the long side direction of the ellipse is oriented in a direction inclined by about 45 degrees with respect to the extending direction of the write wiring.
- a transistor including a selection transistor (described later) and a wiring including a bit line and a word line (described later) are formed on a semiconductor substrate (not shown).
- a SiO 2 film 71 as an interlayer insulating film is formed with a film thickness of 300 nm on the semiconductor substrate.
- a W plug 70 connected to the lower layer wiring is formed at a predetermined position of the SiO 2 film 71.
- Annealing is performed in the in-plane magnetic field of about 1 T (Tesla) at 275 ° C. for 2 hours, and the magnetization direction of the pinned layer is set by exchange coupling with the PtMn film 74.
- the Ta film 84 is processed by a photolithography technique and a reactive ion etching technique (RIE: Reactive Ion Etching). After removing the resist by ashing, the NiFe film 79 is processed into an MTJ shape by a milling method using the Ta film 84 as a mask.
- the free layer shape of this example is an ellipse having a long side of 0.4 ⁇ m and a short side of 0.2 ⁇ m as shown in FIG.
- a SiN film 86 having a thickness of 30 nm is formed by a CVD method to protect the sidewall of the NiFe film 79.
- the MgO film 78 to the Ta film 72 are processed into a write wiring shape by a photolithography technique and a milling method. Thereby, a write wiring (Ta film 72, NiFe film 73, PtMn film 74, CoFe film 75, Ru film 76, CoFe film 77) is formed.
- a 200 nm thick SiO 2 film 88 is formed by a CVD method. Thereafter, the surface is flattened by chemical mechanical polishing (CMP) to expose the surface of the Ta film 84.
- CMP chemical mechanical polishing
- an AlCu film 89 is formed and processed into a readout wiring shape. Thereby, a read wiring (AlCu film 89) is formed.
- the MTJ element magnetoresistance memory element 1 can be formed.
- FIG. 8 is a circuit diagram showing a configuration example of the memory cell according to the first embodiment of the present invention.
- a terminal connected to the first magnetic layer 11 NiFe film 79 in the first embodiment, the same applies hereinafter
- a read word line WR for reading.
- One of the two terminals connected to the second magnetic layer 13 is the source of the transistor TRa.
- the other is connected to one of the source / drain of the transistor TRb.
- the other of the sources / drains of the transistors TRa and TRb is connected to the bit lines BLa and BLb for writing, respectively.
- the gates of the transistors TRa and TRb are connected to the word line WL.
- the configuration of the memory cell 180 is not limited to this example.
- FIG. 9 is a block diagram showing a configuration example of a magnetoresistive memory device in which memory cells according to the first embodiment of the present invention are integrated.
- An MRAM 190 as a magnetoresistive storage device includes a memory array 191 in which a plurality of memory cells 180 are arranged in a matrix.
- the memory array 191 includes a reference cell 180r that is referred to when reading data, in addition to the memory cell 180 used for data recording described in FIG. In the example of this figure, one column is a reference cell 180r.
- the structure of the reference cell 180r is the same as that of the memory cell 180.
- the MTJ element of the reference cell 180r has an intermediate resistance value R0.5 between the resistance value R0 when data “0” is stored and the resistance value R1 when data “1” is stored.
- two columns can be used as reference cells 180r, one of which can be used as a reference cell 180r having a resistance value R0, and the other column can be used as a reference cell 180r having a resistance value R1.
- a resistance value of 0.5 is created from the reference cell 180r having the resistance value R0 and the reference cell 180r having the resistance value R1, and is used for reading.
- the data may be determined by comparison with a reference voltage from the reference voltage generation circuit.
- the word line WL and the read word line WR each extend in the X direction.
- One end of the word line WL is connected to the X-side control circuit 192.
- the X-side control circuit 192 selects the word line WL connected to the target memory cell 180 as the selected word line WL during the data write operation and the read operation. In the read operation, the read word line WR connected to the target memory cell 180 is selected as the selected read word line WR.
- Each of the bit lines BLa and BLb extends in the Y direction, and one end thereof is connected to the Y side control circuit 193.
- the Y-side control circuit 193 selects the bit lines BLa and BLb connected to the target memory cell 180 as the selected bit lines BLa and BLb during the data write operation and the read operation.
- the control circuit 194 controls the X-side control circuit 192 and the Y-side control circuit 193 during a data write operation and a read operation.
- the control circuit 194 determines whether the memory cell is good or bad, stores an address for the defective cell, and controls the memory cell so as not to be used thereafter, or sets a memory cell group including the defective cell or the defective cell to another memory. Control is performed such as replacement with a cell group, correction of data by parity check using the same as a normal memory cell depending on the generation position and number.
- the X-side control circuit 192 selects the selected word line WL. As a result, the selected word line WL is pulled up to the “high” level, and the transistors TRa and TRb are turned “ON”.
- the Y-side control circuit 193 selects the selected bit lines BLa and BLb. Accordingly, one of the selected bit lines BLa and BLb is pulled up to the “high” level, and the other is pulled down to the “Low” level. As a result, a write current Iw flows through the pinned layer 13 that functions as a write wiring.
- the X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit lines BLa and BLb, and the control circuit 194 that controls them constitute the writing unit 4.
- the write unit 4 writes a write current to the pin layer portion (Ta film 72 / NiFe film 73 / PtMn film 74 / CoFe film 75 / Ru film 76 / CoFe film 77) that functions as a write wiring of the memory cell 180 that writes data.
- Iw for example, 1 mA is applied.
- the magnetic field Hw generated by the write current Iw changes the magnetization direction of the free layer (NiFe film 79) of the MTJ element (CoFe film 75 / Ru film 76 / CoFe film 77, MgO film 78, NiFe film 79).
- the direction of magnetization of the free layer is set by the direction of the write current Iw flowing through the write wiring.
- desired data “0” and “1” can be written to the MTJ element according to the direction of the write current Iw.
- the X-side control circuit 192 selects the selected word line WL and the selected read word line WR. As a result, the selected word line WL is pulled up to the “high” level, and the transistors TRa and TRb are turned “ON”. A predetermined read current IR is supplied to the memory cell 180 from the selected read word line WR.
- the Y-side control circuit 193 selects the selected bit lines BLa and BLb. Accordingly, one of the selected bit lines BLa and BLb is set to the ground level, and the other is set to “open” (floating).
- the read current IR flows from the selected read word line WR to one of the selected bit lines BLa and BLb via the MTJ element (the first magnetic layer 11, the tunnel barrier layer 12, and the second magnetic layer 13).
- the potential of the selected read word line WR through which the read current IR flows or the magnitude of the read current IR depends on a change in the resistance value of the magnetoresistive element 1 due to the magnetoresistive effect. Therefore, compared with the output of the reference bit line BLr of the reference cell 180r through which the read current IR flows (or the reference voltage from the reference voltage generation circuit), the change in resistance value is expressed as a voltage signal or a current signal.
- high-speed reading can be performed by detection in the X-side control circuit 192 or the Y-side control circuit 193.
- the X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit lines BLa and BLb, and the control circuit 194 for controlling them constitute the evaluation unit 3.
- the evaluation unit 3 sets the pin layer portion (Ta film 72 / NiFe film 73 / PtMn film 74 / CoFe film 75 / Ru film 76 / CoFe film 77) to 0 V, and the read wiring as the selective read word line WR ( A read current of 20 ⁇ A is applied to the AlCu film 89).
- the MTJ element CoFe film 75 / Ru film 76 / CoFe film 77, MgO film 78, NiFe film 79
- the potential of the read wiring through the MTJ element is 0.21 V and 0.41 V, respectively.
- the differential sense amplifier of the evaluation unit 3 can discriminate data by using the potential of the read wiring and the reference potential Vref (or the output potential of the reference cell) set to 0.3V as inputs.
- FIG. 10A and 10B are conceptual diagrams illustrating a memory cell screening method according to the first embodiment of the present invention.
- the writing unit 4 writes data corresponding to the magnetization direction in the memory cell 180 so that the magnetization is oriented in the upper right direction (45 degrees direction from the + x direction and the + y direction).
- the write current Iw1 is supplied to the write wiring in the ⁇ x direction corresponding to the data to be written.
- a magnetization M1 oriented in a desired direction (direction of 45 degrees from the + x direction and the + y direction) is generated.
- the magnetization M1 is a direction parallel to the easy axis direction (+ side).
- the data write operation is as described above.
- the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written.
- the control unit 5 as the control circuit 194 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M1 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell 180 is detected as a defective bit and stored.
- the data read operation is as described above.
- the X-side control circuit 192 selects the selected read word line WR.
- a predetermined screening current Is flows through the selected read word line WR passing through the vicinity of the memory cell 180.
- the screening current Is does not flow into the MTJ element.
- the magnetic field Hs generated by the screening current Is flowing through the selected read word line WR affects the magnetization of the free layer of the memory cell 180.
- the X-side control circuit 192, the read word line WR, and the control circuit 194 that controls them constitute the application unit 2.
- the application unit 2 applies a screening current Is1 in the + y direction to the selected read word line WR as a read wiring, and applies a leftward ( ⁇ x direction) magnetic field Hs1 to the free layer.
- the direction of the magnetic field Hs1 ( ⁇ x direction) is inclined 45 degrees from the easy axis direction ( ⁇ side) of the free layer, and the component is opposite to the magnetization direction of the free layer (45 degrees direction from the + x direction and the + y direction). It becomes the direction with.
- magnetization reversal occurs due to the magnetic field Hs1 that does not cause magnetization reversal in a normal memory cell.
- the evaluation unit 3 performs a data read process of the memory cell 180.
- the control unit 5 detects and stores defective bits. The data read operation and defective bit determination are as described above.
- these procedures are performed by applying a magnetic field Hs2 in the reverse direction after writing the magnetization M2 in the reverse direction. That is, as shown in FIG. 10B, first, the writing unit 4 writes data corresponding to the magnetization direction so that the magnetization is directed in the lower left direction (45 ° direction from the ⁇ x direction and the ⁇ y direction). To the memory cell 180. That is, the write current Iw2 is supplied to the write wiring in the + x direction corresponding to the data to be written. Thereby, when writing is performed satisfactorily, a magnetization M2 oriented in a desired direction (a direction of 45 degrees from the ⁇ x direction and the ⁇ y direction) is generated.
- the magnetization M2 is a direction parallel to the easy axis direction ( ⁇ side).
- the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written.
- the control unit 5 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M2 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell having the MTJ element is detected as a defective bit and stored.
- the application unit 2 applies a screening current Is2 in the ⁇ y direction to the readout wiring, and applies a magnetic field Hs2 in the right direction (+ x direction) to the free layer.
- the direction of the magnetic field Hs2 (+ x direction) is inclined 45 degrees from the easy axis direction (+ side) of the free layer, and is opposite to the magnetization direction of the free layer (45 degrees direction from the -x direction and -y direction).
- the direction has a component.
- magnetization reversal occurs due to the magnetic field Hs2 that does not cause magnetization reversal in a normal memory cell.
- the evaluation unit 3 performs a reading process in the same manner as described above to detect and store a defective bit.
- the memory cells stored as defective in each of the series of operations described above are not used as memory cells, and the control unit 5 performs control so that alternative memory cells are allocated.
- FIG. 11 is a plan view showing an example of an external magnetic field according to the first embodiment of the present invention.
- the direction of the external magnetic field Hs has a component opposite to the direction of the magnetization M of the free layer in the in-plane direction of the free layer and is, for example, 5 degrees, 30 degrees, 60 degrees from the easy axis direction. , With an inclination of 85 degrees or the like. You may test by applying one after another about not only one direction but several directions (angle). Although the angle in the film thickness direction of the free layer is also conceivable, in this case, since the film thickness is thin, it may be applied in the direction in the film plane.
- These series of operations or a part of time for applying the magnetic field Hs may be performed at a temperature higher than room temperature. This is because an asteroid curve is generally small at high temperatures, and it becomes easier to detect defective cells.
- the reading is performed when the magnetic field Hs is not applied. However, the reading may be performed while the magnetic field Hs is being applied.
- a threshold for determining that the controller 5 is defective may be provided for screening separately from the normal reading condition, and may be used by switching between normal reading and screening.
- the asteroid curve is shifted by applying the screening magnetic field Hs to cause magnetization reversal or a large resistance change in a memory cell having an abnormal magnetic characteristic.
- FIG. 12 and 13 are a sectional view and a plan view, respectively, showing the main part of the memory cell according to the second embodiment of the present invention.
- FIG. 12 is a BB ′ sectional view of FIG.
- a Cu film 90, Ta film 91, PtMn film 92, CoPt film 93, Ru film 94, CoPt film 95, MgO film 78, CoPt film 96, Ta film 84, and AlCu film 89 are laminated in this order. .
- this memory cell is a spin injection type memory cell.
- the CoPt film 96 is a free layer as the first magnetic layer 11, has a magnetization direction perpendicular to the film surface, and has a circular pattern.
- the CoPt films 93 and 95 antiferromagnetically coupled through the Ru film 94 of the conductor layer are the pinned layer 13 as the second magnetic layer 13.
- the MgO film 78 is the tunnel barrier layer 12 provided between the free layer and the pinned layer. These free layer, pinned layer, and tunnel barrier layer function as an MTJ element (magnetoresistance memory element 1).
- the AlCu film 89 that is electrically connected to the free layer via the Ta film 84 that is the upper electrode functions as a read current and write current wiring.
- the Cu film 90 as the lower electrode is electrically connected to the pin layer through the W plug 70 and other wiring for the read current and the write current.
- the screening wiring 130 is a wiring for a current that induces a screening magnetic field, and is provided at a distance that allows the current-induced magnetic field to be applied to the free layer.
- a transistor including a selection transistor and a wiring including a bit line and a word line are formed on a semiconductor substrate (not shown).
- a SiO 2 film 71 as an interlayer insulating film is formed with a film thickness of 300 nm on the semiconductor substrate.
- a W plug 70 connected to the lower layer wiring is formed at a predetermined position of the SiO 2 film 71.
- a film 96 and a Ta film 84 with a thickness of 100 nm are formed by sputtering.
- the magnetization direction of the pinned layer is set by annealing in a perpendicular magnetic field of about 1 T (Tesla) at 275 ° C. for 2 hours, and exchange coupling with the PtMn film 92.
- the Ta film 84 is processed by photolithography and RIE. After removing the resist by ashing, the CoPt film 96 is processed into an MTJ shape by a milling method using the Ta film 84 as a mask.
- the free layer shape of this embodiment is circular as shown in FIG.
- a SiN film 86 having a thickness of 30 nm is formed by a CVD method to protect the side wall of the CoPt film 96.
- the MgO film 78 to the Cu film 90 are processed by a photolithography technique and a milling method. Thereafter, a SiN film 87 having a film thickness of 30 nm is formed on the entire surface to protect the side wall of the MTJ. Next, after a 200 nm-thickness SiO 2 film 88 is formed by a CVD method, it is flattened by CMP to expose the surface of the Ta film 84. Next, an AlCu film 89 is formed and processed into a readout wiring shape. Through these steps, the MTJ element (magnetoresistance memory element 1) can be formed.
- the configuration example of the memory cell is basically the same as the case of FIG. 8 according to the first embodiment.
- the transistor TRb is unnecessary and is omitted, and the bit line BLb is different from the first embodiment in that it functions as the screening wiring 130 in FIG. 13 independently.
- the configuration example of the magnetoresistive memory device including the memory cells is basically the same as that in FIG. 9 according to the first embodiment.
- the bit line BLb is different from the first embodiment in that it functions as the screening wiring 130.
- the X-side control circuit 192 selects the paired selected word line WL and selected read word line WR. As a result, the selected word line WL is pulled up to the “high” level, and the transistor TRa is turned “ON”.
- the Y-side control circuit 193 selects the selected bit line BLa. One of the selected read word line WR and the selected bit line BLa is pulled up to the “high” level, and the other is pulled down to the “Low” level.
- the write current Iw flows through the first magnetic layer 11 / tunnel barrier layer 12 / second magnetic layer 13.
- Which of the selected read word line WR and the selected bit line BLa is pulled up to the “high” level and which is pulled down to the “Low” level is determined by data to be written in the magnetoresistive effect element 1. That is, it is determined according to the direction of the write current Iw flowing through the magnetoresistive effect element 1.
- the X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit line BLa, and the control circuit 194 for controlling them constitute the writing unit 4.
- the write unit 4 applies a write current Iw, for example, 0.5 mA, between the free layer (CoPt film 96) and the pinned layer (CoPt film 95 / Ru film 94 / CoPt film 93) of the memory cell 180 into which data is written. Shed. Spin electrons are transferred between the free layer and the pinned layer by the write current Iw. Thereby, the magnetization direction of the free layer can be set by the direction of the write current Iw as described above. Thus, desired data “0” and “1” can be written to the MTJ element according to the direction of the write current Iw.
- a write current Iw for example, 0.5 mA
- the X-side control circuit 192 selects the selected word line WL and the selected read word line WR. As a result, the selected word line WL is pulled up to the “high” level, and the transistor TRa is turned “ON”. A predetermined read current IR is supplied to the memory cell 180 from the selected read word line WR.
- the Y-side control circuit 193 selects the selected bit line BLa. Thereby, the selected bit line BLa is set to the ground level.
- the read current IR flows from the selected read word line WR to the selected bit line BLa via the MTJ element (the first magnetic layer 11, the tunnel barrier layer 12, and the second magnetic layer 13).
- this change in resistance value is a voltage signal.
- detection at the X-side control circuit 192 or the Y-side control circuit 193 enables high-speed reading.
- the X-side control circuit 192, the Y-side control circuit 193, the word line WL, the read word line WR, the bit line BLa, and the control circuit 194 that controls them constitute the evaluation unit 3.
- the evaluation unit 3 sets the pinned layer 13 (CoPt film 95 / Ru film 94 / CoPt film 93) to 0 V and applies a read current of 20 ⁇ A to the read wiring (AlCu film 89) as the selected read word line WR.
- the MTJ element (CoPt film 95 / Ru film 94 / CoPt film 93, MgO film 78, CoPt film 96) has a resistance value of 10 k ⁇ and 20 k ⁇ respectively by data “0” and “1”, it is connected to the pinned layer.
- the on-resistance of the selection transistor TRa is 1 k ⁇ , the potential of the read wiring through the MTJ element is 0.21 V and 0.41 V, respectively.
- the differential sense amplifier of the evaluation unit 3 can discriminate data by using the potential of the read wiring and the reference potential Vref (or the output potential of the reference cell) set to 0.3V as inputs.
- FIG. 14A and 14B are conceptual diagrams illustrating a memory cell screening method according to a second embodiment of the present invention.
- the writing unit 4 writes data corresponding to the magnetization direction to the memory cell 180 so that the magnetization is directed upward (+ z direction) in the figure. That is, the write current Iw1 is supplied to the MTJ element in the ⁇ z direction corresponding to the data to be written.
- magnetization M1 oriented in a desired direction (+ z direction) is generated.
- the magnetization M1 is a direction parallel to the easy axis direction (+ side).
- the data write operation is as described above.
- the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written.
- the control unit 5 as the control circuit 194 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M1 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell 180 is detected as a defective bit and stored.
- the data read operation is as described above.
- the Y-side control circuit 193 selects the selected bit line BLb.
- a predetermined screening current Is flows through the selected bit line BLb as the screening wiring 130 passing through the vicinity of the memory cell 180.
- the magnetic field Hs1 generated by the screening current Is flowing through the selected bit line BLb affects the magnetization of the free layer (first magnetic layer 11) of the memory cell 180.
- the Y-side control circuit 192, the bit line BLb, and the control circuit 194 that controls them constitute the application unit 2.
- the application unit 2 causes the screening current Is1 to flow in the ⁇ y direction through the selected bit line BLb as the screening wiring 130, and the magnetic field Hs1 having a downward ( ⁇ z direction) component to the free layer (first magnetic layer 11). Is applied.
- the direction of the magnetic field Hs1 (having a ⁇ z direction component) is slightly inclined from the easy axis direction ( ⁇ side) of the free layer, and has a direction opposite to the magnetization direction of the free layer (+ z direction).
- magnetization reversal occurs due to the magnetic field Hs1 that does not cause magnetization reversal in a normal memory cell.
- the evaluation unit 3 performs a data read process of the memory cell 180.
- the control unit 5 detects and stores defective bits. The data read operation and defective bit determination are as described above.
- these procedures are performed by applying a magnetic field Hs2 in the reverse direction after writing the magnetization M2 in the reverse direction. That is, as shown in FIG. 14B, the writing unit 4 first writes data corresponding to the magnetization direction to the memory cell 180 so that the magnetization is directed downward ( ⁇ z direction) in the figure. That is, the write current Iw2 is supplied to the MTJ element in the + z direction corresponding to the data to be written. Thereby, when writing is performed satisfactorily, magnetization M2 oriented in a desired direction ( ⁇ z direction) is generated. At this time, the magnetization M2 is a direction parallel to the easy axis direction ( ⁇ side). Next, the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written.
- the control unit 5 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M2 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell 180 is detected as a defective bit and stored.
- the application unit 2 applies a screening current Is2 in the + y direction to the screening wiring 130, and applies a magnetic field Hs2 having an upward component (+ z direction) to the free layer (first magnetic layer 11).
- the direction of the magnetic field Hs2 (having a + z direction component) is slightly inclined from the easy axis direction (+ side) of the free layer 11 and has a component opposite to the magnetization direction of the free layer 11 ( ⁇ z direction). It becomes the direction.
- magnetization reversal occurs due to the magnetic field Hs2 that does not cause magnetization reversal in a normal memory cell.
- the evaluation unit 3 performs a process of reading data from the memory cell 180.
- the control unit 5 detects and stores defective bits. The data read operation and defective bit determination are as described above.
- the memory cells stored as defective in each of the series of operations described above are not used as memory cells, and the control unit 5 performs control so as to allocate alternative memory cells.
- an external magnetic field Hs having a desired direction and strength may be applied to the entire wafer.
- the magnetization direction has a component opposite to the magnetization direction of the free layer ( ⁇ z direction or + z direction) and has an inclination of, for example, 5 degrees, 30 degrees, 60 degrees, 85 degrees, etc. from the easy axis direction.
- the difficult axis direction of the present embodiment is a plane (xy plane)
- the in-plane direction of the free layer of the applied magnetic field Hs can be all 0 ° to 360 °. You may test by applying one after another about not only one direction but several directions (angle). It is clear that the magnetization reversal of the defective cell can be effectively induced when the application of the three angles not in the same plane is performed.
- These series of operations or a part of time for applying the magnetic field Hs may be performed at a temperature higher than room temperature. This is because an asteroid curve is generally small at high temperatures, and it becomes easier to detect defective cells.
- the reading is performed when the magnetic field Hs is not applied. However, the reading may be performed while the magnetic field Hs is being applied.
- a threshold for determining that the controller 5 is defective may be provided for screening separately from the normal reading condition, and may be used by switching between normal reading and screening.
- 15 and 16 are a cross-sectional view and a plan view, respectively, showing the main part of the memory cell according to the third embodiment of the present invention.
- 15 is a cross-sectional view taken along the line BB ′ of FIG.
- the memory cell includes Ta film 100, Pt film 101, CoPt film 93, Ru film 94, CoPt film 95, MgO film 78, CoPt film 96, Ru film 102, PtMn film 103, CoPt film 104, Ta film 83, Ta film. 84 and an AlCu film 89 are laminated in this order.
- this memory cell is a domain wall motion type memory cell.
- the CoPt film 96 is a magnetization recording layer as the second magnetic layer 13, has a magnetization direction perpendicular to the film surface, and has a line pattern (cuboid shape).
- One end of the magnetization recording layer is antiferromagnetically coupled to the PtMn film 103 via the Ru film 102 of the conductor layer to form a first pin region (also referred to as a first magnetization fixed region) 14a.
- the other end of the magnetization recording layer is antiferromagnetically coupled to the CoPt film 104 via the Ru film 102 of the conductor layer to form a second pin region (also referred to as a second magnetization fixed region) 14b.
- the magnetization directions of the first magnetization fixed region 14a and the second magnetization fixed region 14b are the -z direction and the + z direction, respectively, and are in antiparallel relation to each other.
- the magnetization free region 15 (functioning as a free layer) in the center of the magnetization recording layer can take both the ⁇ z direction and the + z direction, and stores data according to the magnetization direction.
- a domain wall is formed at the boundary between the magnetization free region 15 and the magnetization fixed region 14 whose magnetization directions are antiparallel to each other.
- data is written by moving the domain wall by exchanging spin electrons by passing a write current Iw from one of the first magnetization fixed region 14a and the second magnetization fixed region 14b to the other.
- the first magnetization fixed region 14 a is connected to the AlCu film 89 as the second wiring through the Ta film 83.
- the second magnetization fixed region 14 b is connected to another AlCu film 89 as a third wiring via the Ta film 84.
- the CoPt films 93 and 95 antiferromagnetically coupled via the Ru film 94 of the conductor layer are reference layers (functioning as pinned layers) as the first magnetic layer 11.
- the reference layer is connected to the first wiring (not shown) via the W plug 70.
- the MgO film 78 is the tunnel barrier layer 12 provided between the magnetization recording layer and the reference layer.
- the magnetization free region 15 (free layer), reference layer (pinned layer), and tunnel barrier layer of the magnetization recording layer function as an MTJ element (magnetoresistance memory element 1).
- a transistor including a selection transistor and a wiring including a bit line and a word line are formed on a semiconductor substrate (not shown).
- a SiO 2 film 71 as an interlayer insulating film is formed with a film thickness of 300 nm on the semiconductor substrate.
- a W plug 70 connected to the lower layer wiring is formed at a predetermined position of the SiO 2 film 71.
- Ru film 94 as a layer, CoPt film 95 as a reference layer upper layer magnetic material with a thickness of 4 nm, tunnel insulating film MgO film 78 with a thickness of 1 nm, free CoPt film 96 with a thickness of 2 nm, Ru film 102 with a thickness of 1 nm, film A PtMn film 103 with a thickness of 30 nm and a Ta film 83 with a thickness of 100 nm are formed by sputtering.
- a CoPt film 104 having a thickness of 3 nm and a Ta film 84 having a thickness of 100 nm are respectively formed on the entire surface by sputtering and patterned.
- Annealing is performed in a film surface vertical direction magnetic field of about 1 T (Tesla) at 275 ° C. for 2 hours, and the magnetization direction of the first pin region (first magnetization fixed region) using the PtMn film 103 is set.
- a magnetic field is applied in the opposite direction at room temperature, and the magnetization directions of the second pin region (second magnetization fixed region) and the reference layer using the CoPt films 104, 93, and 95 are set in the opposite directions.
- the magnetization directions of the two pin regions can be set in opposite directions.
- a domain wall is formed in a free layer (magnetization recording layer).
- the free layer portion is processed and formed using the resist and the pinned layer as a mask.
- the subsequent steps are the same as in the second embodiment. Through these steps, the MTJ element (magnetoresistance memory element 1) can be formed.
- the configuration example of the memory cell is basically the same as the case of FIG. 8 according to the first embodiment.
- the transistors TRa and TRb are respectively connected to the first magnetization fixed region 14a and the second magnetization fixed region 14b of the magnetization recording layer, and the read word line WR is connected to the reference layer.
- the second wiring (AlCu film 89) connected to the first pin region and the third wiring (AlCu film 89) connected to the second pin region are the bit lines BLa and BLb, respectively.
- the first wiring connected to the reference layer is the read word line WR.
- the configuration example of the magnetoresistive memory device including the memory cells is basically the same as that in FIG. 9 according to the first embodiment.
- the X-side control circuit 192 selects the selected word line WL. As a result, the selected word line WL is pulled up to the “high” level, and the transistors TRa and TRb are turned “ON”.
- the Y-side control circuit 193 selects the selected bit lines BLa and BLb. Accordingly, one of the selected bit lines BLa and BLb is pulled up to the “high” level, and the other is pulled down to the “Low” level.
- the write current Iw flows from one pin region of the magnetization recording layer (second magnetic layer 13) to the other pin region.
- Which of the selected bit lines BLa and BLb is pulled up to a “high” level and which is pulled down to a “Low” level is determined by data to be written in the magnetoresistive element 1. That is, it is determined according to the direction of the write current Iw flowing through the magnetization recording layer (second magnetic layer 13).
- the X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit lines BLa and BLb, and the control circuit 194 that controls them constitute the writing unit 4.
- the writing unit 4 includes two pin regions 14a (PtMn film 103 / Ru film 102 / CoPt film 96) and 14b (CoPt film 104) at both ends of the magnetization recording layer (CoPt film 96) of the memory cell 180 to which data is written.
- / Ru film 102 / CoPt film 96) is supplied with a write current Iw, for example, 0.5 mA from one to the other. Spin electrons are exchanged in the domain wall portion in the magnetization recording layer by the write current Iw.
- the magnetization direction of the magnetization free region 15 can be set to one of the magnetization directions of the two pin regions 14a and 14b depending on the direction of the write current Iw flowing in the magnetization recording layer.
- desired data “0” and “1” can be written to the MTJ element according to the direction of the write current Iw.
- the X-side control circuit 192 selects the selected word line WL and the selected read word line WR. As a result, the selected word line WL is pulled up to the “high” level, and the transistors TRa and TRb are turned “ON”. A predetermined read current IR is supplied to the memory cell 180 from the selected read word line WR.
- the Y-side control circuit 193 selects the selected bit lines BLa and BLb. Accordingly, one of the selected bit lines BLa and BLb is set to the ground level, and the other is set to “open” (floating).
- the read current IR flows from the selected read word line WR to one of the selected bit lines BLa and BLb via the MTJ element (the first magnetic layer 11, the tunnel barrier layer 12, and the second magnetic layer 13).
- the potential of the selected read word line WR through which the read current IR flows or the magnitude of the read current IR depends on a change in the resistance value of the magnetoresistive element 1 due to the magnetoresistive effect. Therefore, compared with the output of the reference bit line BLr of the reference cell 180r through which the read current IR flows (or the reference voltage from the reference voltage generation circuit), the change in resistance value is expressed as a voltage signal or a current signal.
- the detection can be performed at a high speed by the detection by the X-side control circuit 192 or the Y-side control circuit 193.
- the X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit lines BLa and BLb, and the control circuit 194 for controlling them constitute the evaluation unit 3.
- the evaluation unit 3 sets the magnetization recording layer (CoPt film 96) to 0 V via the AlCu film 89 as the selected bit line BLa (or BLb), and the reference layer (CoPt film 93/90) via the selective read word line WR.
- a read current of 20 ⁇ A is applied from the Ru film 94 / CoPt film 95).
- MTJ elements CoPt film 93 / Ru film 94 / CoPt film 95, MgO film 78, CoPt film 96
- the potential of the read wiring through the MTJ element is 0.21 V and 0.41 V, respectively.
- the differential sense amplifier of the evaluation unit 3 can discriminate data by using the potential of the read wiring and the reference potential Vref (or the output potential of the reference cell) set to 0.3V as inputs.
- this structure since the resistance value between the pin regions 14a and 14b and the reference layer does not change regardless of data, this structure has a feature that the resistance change amount is small.
- FIG. 17A and 17B are conceptual diagrams showing a memory cell screening method according to a third embodiment of the present invention.
- the writing unit 4 writes data corresponding to the magnetization direction to the memory cell 180 so that the magnetization is directed upward (+ z direction) in the figure. That is, the write current Iw1 is passed through the magnetization free region 15 of the magnetization recording layer (first magnetic layer 11) in the ⁇ x direction corresponding to the data to be written.
- magnetization M1 oriented in a desired direction (+ z direction) is generated.
- the magnetization M1 is a direction parallel to the easy axis direction (+ side).
- the data write operation is as described above.
- the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written.
- the control unit 5 as the control circuit 194 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M1 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell 180 is detected as a defective bit and stored.
- the data read operation is as described above.
- the Y-side control circuit 193 selects the selected bit line BLa.
- a predetermined screening current Is1 flows through the selected bit line BLa passing through the vicinity of the memory cell 180.
- the magnetic field Hs1 generated by the screening current Is1 flowing through the selected bit line BLa affects the magnetization of the free layer (magnetization free region 15 (first magnetic layer 11)) of the memory cell 180.
- the Y-side control circuit 192, the bit line BLa, and the control circuit 194 that controls them constitute the application unit 2.
- the application unit 2 causes the screening current Is1 to flow in the ⁇ y direction through the selected bit line BLa, and a magnetic field having a downward ( ⁇ z direction) component in the free layer (magnetization free region 15 (first magnetic layer 11)).
- the direction of the magnetic field Hs1 ( ⁇ z direction) is slightly inclined from the easy axis direction ( ⁇ side) of the free layer, and has a direction opposite to the magnetization direction (+ z direction) of the free layer.
- magnetization reversal occurs due to the magnetic field Hs1 that does not cause magnetization reversal in a normal memory cell.
- the evaluation unit 3 performs a data read process for the memory cell 180.
- the control unit 5 detects and stores defective bits. The data read operation and defective bit determination are as described above.
- these procedures are performed by applying a magnetic field Hs2 in the reverse direction after writing the magnetization M2 in the reverse direction. That is, as shown in FIG. 17B, the writing unit 4 first writes data corresponding to the magnetization direction to the memory cell 180 so that the magnetization is directed downward ( ⁇ z direction) in the figure. That is, the write current Iw2 is passed through the magnetization free region 15 of the magnetization recording layer (first magnetic layer 11) in the + x direction corresponding to the data to be written. Thereby, when writing is performed satisfactorily, magnetization M2 oriented in a desired direction ( ⁇ z direction) is generated. At this time, the magnetization M2 is a direction parallel to the easy axis direction ( ⁇ side).
- the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written.
- the control unit 5 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M2 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell having the MTJ element is detected as a defective bit and stored.
- the application unit 2 supplies a screening current Is2 to the selected bit line BLa in the + y direction, and a magnetic field Hs2 having an upward (+ z direction) component in the free layer (magnetization free region 15 (first magnetic layer 11)). Is applied.
- the direction (+ z direction) of the magnetic field Hs2 is slightly inclined from the easy axis direction (+ side) of the free layer, and has a direction opposite to the magnetization direction ( ⁇ z direction) of the free layer.
- magnetization reversal occurs due to the magnetic field Hs2 that does not cause magnetization reversal in a normal memory cell.
- the evaluation unit 3 performs a reading process in the same manner as described above to detect and store a defective bit.
- the memory cells stored as defective in each of the series of operations described above are not used as memory cells, and the control unit 5 performs control so that alternative memory cells are allocated.
- a screening magnetic field Hs is applied in the screening process to shift the asteroid curve, whereby a memory cell having an abnormal magnetic characteristic is reversed in magnetization or large.
- the screening method for a magnetoresistive storage device is a screening method for a magnetoresistive storage device that includes a first magnetic body and includes a storage element that stores data in the direction of magnetization of the first magnetic body.
- the method for screening a magnetoresistive storage device includes a step of setting a magnetization direction of the first magnetic body and a direction different from a magnetization easy axis direction and a magnetization difficult axis direction of the first magnetic body, Applying a first magnetic field including a direction component opposite to the direction of magnetization of one magnetic body to the memory element, evaluating a resistance of the memory element, and based on the evaluation result, the memory element Determining whether or not the memory element is defective, and storing and / or setting the storage element determined to be defective so as not to be used.
- the first magnetic field may have a directional component of 45 degrees with respect to the easy axis direction greater than the easy axis direction component.
- the first magnetic field may have a direction component of 45 degrees with respect to the easy axis direction larger than a component in the hard axis direction.
- the direction of the first magnetic field may be approximately 45 degrees with respect to the easy axis direction.
- the direction of the first magnetic field may be approximately 90 degrees with respect to the direction of the second magnetic field that sets the direction of magnetization of the first magnetic body.
- the step of determining uses, as the evaluation result, a resistance value of the memory element after the application of the first magnetic field or a characteristic value correlated with the resistance value is used. May be.
- the determining step may use, as the evaluation result, a resistance value of the memory element during application of the first magnetic field or a characteristic value correlated with the resistance value. good.
- the determining step includes, as the evaluation result, a resistance value of the storage element before application of the first magnetic field or a characteristic value correlated with the resistance value, or the A characteristic value correlated with the resistance value or resistance value of the memory element after the application of the first magnetic field, and a characteristic value correlated with the resistance value or the resistance value of the memory element during the application of the first magnetic field. And may be used.
- the determining step includes a plurality of the resistance values as the evaluation result or a characteristic value correlated with the plurality of resistance values, or a difference between them and a predetermined value.
- a step of determining whether or not the storage element is defective based on a magnitude relationship with a value may be provided.
- the applying step may include a step of raising the temperature of the memory element above room temperature during at least a part of the time during which the first magnetic field is applied.
- the step of determining may be performed using a defective cell determining unit during normal reading.
- the determining step refers to a determination criterion at the time of screening different from a determination criterion at the time of normal reading, and determines whether or not the storage element is defective May be provided.
- the applying step includes a step of applying a plurality of the first magnetic fields to the memory element from a plurality of directions.
- the step of evaluating includes a step of evaluating a resistance of the memory element with respect to the plurality of first magnetic fields.
- the step of determining may include a step of determining whether or not the storage element is defective based on the plurality of evaluation results.
- the application step, the evaluation step, and the discrimination step may be performed on each of a plurality of magnetization state magnetism possessed by the first magnetic body.
- a magnetoresistive storage device includes a first magnetic body, a storage element that stores data in a magnetization direction of the first magnetic body, and a write that sets a magnetization direction of the first magnetic body And a first magnetic field including a direction component opposite to a magnetization direction of the first magnetic body and having a direction component opposite to the magnetization direction of the first magnetic body.
- An application unit for applying to the storage element, an evaluation unit for evaluating the resistance of the storage element, and determining whether or not the storage element is defective based on the evaluation result, and using the storage element determined to be defective
- a control unit for storing and / or setting so as not to be performed.
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Abstract
A screening method for a magnetoresistive storage device comprising a first magnetic body, and a storage element which stores data in the magnetization direction of the first magnetic body. The method is provided with a step of setting a magnetization direction of the first magnetic body; a step of applying a storage element with a first magnetic field which includes a component in a direction different from the directions of axis of easy magnetization and axis of hard magnetization of the first magnetic body, and opposite to the magnetization direction of the first magnetic body; a step of assessing a resistance of the storage element; a step of determining whether or not the storage element is defective, on the basis of the assessment result; and a step of storing and/or setting so that the storage element which has been determined as defective should not be used.
Description
本発明は、磁気抵抗記憶装置のスクリーニング方法に関し、特に、磁気ランダムアクセスメモリ(MRAM:Magnetic Random Access Memory)の不良セルスクリーニング方法に関する。
The present invention relates to a screening method for a magnetoresistive memory device, and more particularly, to a defective cell screening method for a magnetic random access memory (MRAM).
MRAMは、高集積・高速動作の観点から有望な不揮発性メモリである。MRAMにおいては、TMR(Tunnel MagnetoResistance)効果などの「磁気抵抗効果」を示す磁気抵抗記憶素子が利用される。その磁気抵抗記憶素子には、例えばトンネルバリヤ層が2層の強磁性体層で挟まれた磁気トンネル接合(MTJ; Magnetoresistive Tunnel Junction)が形成される。その2層の強磁性体層は、磁化の向きが固定されたピン層(磁化固定層)と、磁化の向きが反転可能なフリー層(磁化自由層)から構成される。例えば、Roy Scheuerlein et al.,“A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”,2000 IEEE International Solid-State Circuits Conference,DIGEST OF TECHNICAL PAPERS,pp.128-129(非特許文献1)に、そのようなMRAMが開示されている。
MRAM is a promising nonvolatile memory from the viewpoint of high integration and high-speed operation. In the MRAM, a magnetoresistive memory element exhibiting a “magnetoresistance effect” such as a TMR (Tunnel MagnetoResistance) effect is used. In the magnetoresistive memory element, for example, a magnetic tunnel junction (MTJ) is formed in which a tunnel barrier layer is sandwiched between two ferromagnetic layers. The two ferromagnetic layers are composed of a pinned layer (magnetization pinned layer) whose magnetization direction is fixed and a free layer (magnetization free layer) whose magnetization direction can be reversed. For example, Roy Scheuerlein et al. , “A 10 ns Read and Write Non-Volatile Memory Array Usage a Magnetic Tunnel Junction and FET SwitchinEtErPNeSNRC” 128-129 (Non-Patent Document 1) discloses such an MRAM.
ピン層とフリー層の磁化の向きが“反平行”である場合のMTJの抵抗値(R+ΔR)は、磁気抵抗効果により、それらが“平行”である場合の抵抗値(R)よりも大きくなることが知られている。MRAMは、このMTJを有する磁気抵抗記憶素子をメモリセルとして用い、その抵抗値の変化を利用することによってデータを不揮発的に記憶する。メモリセルに対するデータの書き込みは、フリー層の磁化の向きを反転させることによって行われる。
The resistance value (R + ΔR) of the MTJ when the magnetization directions of the pinned layer and the free layer are “anti-parallel” is larger than the resistance value (R) when they are “parallel” due to the magnetoresistance effect. It is known. The MRAM uses a magnetoresistive storage element having this MTJ as a memory cell, and stores data in a nonvolatile manner by utilizing the change in the resistance value. Data is written to the memory cell by reversing the magnetization direction of the free layer.
MRAMに対するデータの書き込み方法として、従来、アステロイド方式が知られている。例えば、M.Durlam et al.,“Nonvolatile RAM based on Magnetic Tunnel Junction Elements”,2000 IEEE International Solid-State Circuits Conference,DIGEST OF TECHNICAL PAPERS,pp.130-131(非特許文献2)に、そのようなアステロイド方式が開示されている。
Conventionally, the asteroid method is known as a method of writing data to the MRAM. For example, M.M. Durlam et al. , “Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, 2000 IEEE International Solid-State Circuits Conference, DIGEST OF TECHNICPAPER. 130-131 (Non-Patent Document 2) discloses such an asteroid system.
図1は、TMRを記憶素子として用いた不揮発性メモリの例を示す斜視図である。この不揮発性メモリでは、TMR505は、アレイ状に配置されている。TMR505の上下に、交差する1対の配線506、509が設置されている。TMR505のフリー層は、上部配線506に接続されている。TMR505のピン層は配線層507を介して下層に形成されたトランジスタ508のドレインに接続されている。二つの配線(B)506、(D)509に電流を流すことで、交点近傍(TMR505近傍)に合成磁場を発生させ、フリー層の磁化方向を設定する(データを書き込む)。フリー層の磁化方向(書き込むデータ)は、電流の方向により設定する。これによりTMR505の抵抗値を変化させることができる(データを書き込むことができる)。データの読み出しは、読み出すTMR505に接続されたトランジスタ508を配線(W)510によりオン状態にし、配線(B)506よりTMR505に電圧を印加し、TMR505に流れる電流でTMR505の抵抗値を評価することで行う。アステロイド方式によれば、メモリセルのサイズにほぼ反比例して、フリー層の磁化を反転させるために必要な反転磁界が大きくなる。つまり、メモリセルが微細化されるにつれて、書き込み電流が増加する傾向にある。
FIG. 1 is a perspective view showing an example of a non-volatile memory using TMR as a storage element. In this nonvolatile memory, the TMR 505 is arranged in an array. A pair of wirings 506 and 509 that intersect is provided above and below the TMR 505. The free layer of the TMR 505 is connected to the upper wiring 506. The pin layer of the TMR 505 is connected to the drain of the transistor 508 formed in the lower layer through the wiring layer 507. By passing a current through the two wirings (B) 506 and (D) 509, a synthetic magnetic field is generated near the intersection (near TMR 505), and the magnetization direction of the free layer is set (data is written). The magnetization direction (data to be written) of the free layer is set according to the direction of current. Thereby, the resistance value of the TMR 505 can be changed (data can be written). To read data, the transistor 508 connected to the TMR 505 to be read is turned on by the wiring (W) 510, a voltage is applied to the TMR 505 from the wiring (B) 506, and the resistance value of the TMR 505 is evaluated by the current flowing through the TMR 505. To do. According to the asteroid method, the reversal magnetic field necessary for reversing the magnetization of the free layer is substantially in inverse proportion to the size of the memory cell. That is, the write current tends to increase as the memory cell is miniaturized.
微細化に伴う書き込み電流の増加を抑制することができる書き込み方式として、「スピン注入(spin transfer)方式」が提案されている。例えば、Yagami and Suzuki,“Research Trends in Spin Transfer Magnetization Switching”(スピン注入磁化反転の研究動向),日本応用磁気学会誌,Vol.28,No.9,2004,pp.937-948(非特許文献3)にそのようなスピン注入方式が開示されている。スピン注入方式によれば、強磁性導体にスピン偏極電流(spin-polarized current)が注入され、その電流を担う伝導電子のスピンと導体の磁気モーメントとの間の直接相互作用によって磁化が反転する(以下、「スピン注入磁化反転:Spin Transfer Magnetization Switching」と参照される)。
A “spin transfer method” has been proposed as a write method capable of suppressing an increase in write current accompanying miniaturization. For example, Yamami and Suzuki, “Research Trends in Spin Transfer Magnetization Switching” (Research Trends of Spin Injection Magnetization Reversal), Journal of Japan Society of Applied Magnetics, Vol. 28, no. 9, 2004, pp. No. 937-948 (Non-patent Document 3) discloses such a spin injection method. According to the spin injection method, a spin-polarized current is injected into the ferromagnetic conductor, and the magnetization is reversed by a direct interaction between the spin of the conduction electron carrying the current and the magnetic moment of the conductor. (Hereinafter referred to as “Spin Transfer Magnetization Switching”).
図2は、磁気抵抗記憶素子のスピン注入磁化反転の概略を示す模式断面図である。磁気抵抗記憶素子は、フリー層601、ピン層603、及びフリー層601とピン層603に挟まれた非磁性層であるトンネルバリヤ層602を備えている。ここで、磁化の向きが固定されたピン層603は、フリー層601よりも厚くなるように形成されており、スピン偏極電流を作る機構(スピンフィルター)としての役割を果たす。フリー層601とピン層603の磁化の向きが平行である状態は、データ“0”に対応付けられ、それらが反平行である状態は、データ“1”に対応付けられている。図2に示されるスピン注入磁化反転は、CPP(Current Perpendicular to Plane)方式により実現され、書き込み電流は膜面に垂直に注入される。具体的には、データ“0”からデータ“1”への遷移時、電流はピン層603からフリー層601へ流れる。この場合、スピンフィルターとしてのピン層603と同じスピン状態を有する電子が、フリー層601からピン層603に移動する。そして、スピントランスファー(スピン角運動量の授受)効果により、フリー層601の磁化が反転する。一方、データ“1”からデータ“0”への遷移時、電流の方向は逆転し、電流はフリー層601からピン層603へ流れる。この場合、スピンフィルターとしてのピン層603と同じスピン状態を有する電子が、ピン層603からフリー層601に移動する。スピントランスファー効果により、フリー層601の磁化が反転する。このように、スピン注入磁化反転では、スピン電子の移動によりデータの書き込みが行われる。膜面に垂直に注入されるスピン偏極電流の方向により、フリー層601の磁化の向きを規定することが可能である。
FIG. 2 is a schematic cross-sectional view showing an outline of the spin injection magnetization reversal of the magnetoresistive memory element. The magnetoresistive memory element includes a free layer 601, a pinned layer 603, and a tunnel barrier layer 602 that is a nonmagnetic layer sandwiched between the free layer 601 and the pinned layer 603. Here, the pinned layer 603 whose magnetization direction is fixed is formed to be thicker than the free layer 601, and plays a role as a mechanism (spin filter) for creating a spin-polarized current. The state where the magnetization directions of the free layer 601 and the pinned layer 603 are parallel is associated with data “0”, and the state where they are antiparallel is associated with data “1”. The spin-injection magnetization reversal shown in FIG. 2 is realized by a CPP (Current Perpendicular to Plane) method, and a write current is injected perpendicularly to the film surface. Specifically, current flows from the pinned layer 603 to the free layer 601 at the time of transition from data “0” to data “1”. In this case, electrons having the same spin state as the pinned layer 603 serving as a spin filter move from the free layer 601 to the pinned layer 603. Then, the magnetization of the free layer 601 is reversed by a spin transfer (spin angular momentum transfer) effect. On the other hand, at the time of transition from data “1” to data “0”, the direction of the current is reversed, and the current flows from the free layer 601 to the pinned layer 603. In this case, electrons having the same spin state as the pinned layer 603 serving as a spin filter move from the pinned layer 603 to the free layer 601. Due to the spin transfer effect, the magnetization of the free layer 601 is reversed. Thus, in spin injection magnetization reversal, data is written by movement of spin electrons. The direction of magnetization of the free layer 601 can be defined by the direction of the spin-polarized current injected perpendicular to the film surface.
関連する技術として、特許第3866701号公報(対応米国特許US6950334(B2))に磁気ランダムアクセスメモリ及びそのテスト方法が開示されている。この磁気ランダムアクセスメモリは、メモリセルアレイと、書き込みワード線と書き込みビット線と、第1のドライバ、第2のドライバ、及び第1のシンカーと、第3のドライバと、第4のドライバと、第2のシンカーと、第1の手段と、第2の手段とを具備する。メモリセルアレイは、磁気抵抗記憶素子がマトリクス状に配置された。書き込みワード線は、前記メモリセルアレイの各行に配置された。書き込みビット線は、前記メモリセルアレイの各列に配置された。第1のドライバは、前記書き込みワード線の両端にそれぞれ選択的に接続される。第2のドライバは、この第1のドライバより駆動能力の高い。第3のドライバは、前記書き込みビット線の一端に接続された。第4のドライバは、この第3のドライバより駆動能力の高い。第2のシンカーは、前記書き込みビット線の他端に接続された。第1の手段は、前記第2のドライバにより複数のメモリセルの情報を困難軸方向の一軸書き込みにて一括で書き込む。第2の手段は、前記第4のドライバにより複数のメモリセルへ容易軸方向の一軸書き込みにて同時に、通常動作における二軸書き込みよりも大きい電流を流す。
As a related technology, Japanese Patent No. 3866701 (corresponding US Pat. No. 6,950,334 (B2)) discloses a magnetic random access memory and a test method thereof. The magnetic random access memory includes a memory cell array, a write word line and a write bit line, a first driver, a second driver, a first sinker, a third driver, a fourth driver, 2 sinkers, first means, and second means. In the memory cell array, magnetoresistive storage elements are arranged in a matrix. A write word line is arranged in each row of the memory cell array. Write bit lines are arranged in each column of the memory cell array. The first driver is selectively connected to both ends of the write word line. The second driver has a higher driving capability than the first driver. The third driver was connected to one end of the write bit line. The fourth driver has a higher driving capability than the third driver. The second sinker was connected to the other end of the write bit line. The first means collectively writes the information of the plurality of memory cells by uniaxial writing in the hard axis direction by the second driver. The second means simultaneously applies a larger current to the plurality of memory cells by uniaxial writing in the easy axis direction than the biaxial writing in the normal operation by the fourth driver.
また、特開2003-338199号公報に半導体記憶装置とその使用方法が開示されている。この半導体記憶装置は、複数の磁気抵抗記憶素子をメモリセルとして用いる。この半導体記憶装置は、メモリセルの記憶データを判別する機能と、各メモリセルの抵抗値の絶対値に相関のある特性値と所望のしきい値とを比較しメモリセルの良否を判定する機能とを有する。
Also, Japanese Patent Application Laid-Open No. 2003-338199 discloses a semiconductor memory device and a method for using the same. This semiconductor memory device uses a plurality of magnetoresistive memory elements as memory cells. This semiconductor memory device has a function of determining stored data of a memory cell, and a function of comparing a characteristic value correlated with the absolute value of the resistance value of each memory cell with a desired threshold value to determine whether the memory cell is good or bad And have.
また、特開2005-311167号公報(対応米国特許US7236392(B2))にトンネル磁気抵抗効果素子の検査方法及び装置が開示されている。このトンネル磁気抵抗効果素子の検査方法は、トンネル磁気抵抗効果素子の初期抵抗値を測定して第1の抵抗値とし、該トンネル磁気抵抗効果素子に非基板方向から基板方向へ電流を流すことにより所定時間通電した後の抵抗値を測定して第2の抵抗値とし、前記第1の抵抗値と前記第2の抵抗値とを比較して該トンネル磁気抵抗効果素子の評価を行う。
Also, Japanese Patent Application Laid-Open No. 2005-311167 (corresponding US Pat. No. 7,236,392 (B2)) discloses a tunnel magnetoresistive effect element inspection method and apparatus. In this tunnel magnetoresistive effect element inspection method, the initial resistance value of the tunnel magnetoresistive effect element is measured to obtain a first resistance value, and a current is passed through the tunnel magnetoresistive effect element from the non-substrate direction to the substrate direction. The resistance value after energization for a predetermined time is measured to obtain a second resistance value, and the tunnel magnetoresistive effect element is evaluated by comparing the first resistance value and the second resistance value.
また、特開2006-269907号公報(対応米国特許US7372282(B2))にトンネル磁気抵抗効果素子の検査方法及び装置、トンネル磁気抵抗効果素子の製造方法、並びにトンネル磁気抵抗効果素子が開示されている。このトンネル磁気抵抗効果素子の検査方法は、トンネル磁気抵抗効果素子に互いに異なる電圧値の複数の電圧を印加した状態で該トンネル磁気抵抗効果素子の抵抗値をそれぞれ測定し、該測定した複数の抵抗値から抵抗変化量を求めて該トンネル磁気抵抗効果素子の評価を行う。
JP-A-2006-269907 (corresponding US Pat. No. 7,737,282 (B2)) discloses a tunnel magnetoresistive element inspection method and apparatus, a tunnel magnetoresistive element manufacturing method, and a tunnel magnetoresistive element. . In this tunnel magnetoresistive effect element inspection method, the resistance values of the tunnel magnetoresistive effect element are respectively measured in a state where a plurality of voltages having mutually different voltage values are applied to the tunnel magnetoresistive effect element. The tunnel magnetoresistive element is evaluated by obtaining the resistance change amount from the value.
また、特開2007-123637号公報(対応米国特許US7394684(B2))にスピン注入磁気ランダムアクセスメモリが開示されている。このスピン注入磁気ランダムアクセスメモリは、スピン注入電流により発生させたスピン偏極電子を用いて磁気抵抗効果素子に対する書き込みを実行する。このスピン注入磁気ランダムアクセスメモリは、前記書き込み時に、前記磁気抵抗効果素子に対して、前記磁気抵抗効果素子の磁化困難軸方向の磁場を印加する手段を具備する。
Also, JP 2007-123637 A (corresponding US Pat. No. 7,394,684 (B2)) discloses a spin injection magnetic random access memory. This spin-injection magnetic random access memory executes writing to a magnetoresistive element using spin-polarized electrons generated by a spin-injection current. The spin injection magnetic random access memory includes means for applying a magnetic field in the hard axis direction of the magnetoresistive effect element to the magnetoresistive effect element at the time of writing.
発明者は、今回、研究の結果以下の知見を新たに発見した。
前述したフリー層の磁化方向をデータの記憶に用いた磁気抵抗記憶素子では、磁気特性がシフトや変形、回転することがある。その理由としては、フリー層の形状異常や磁性体膜の欠陥により磁気特性に不均一な部分があること、近傍の配線などによる応力が働くこと、隣接する磁気抵抗記憶素子や磁性体を用いたダミーパターンからの漏れ磁場に影響されたりすることなどである。図3は、磁場印加によりフリー層で磁化反転が起こる条件を示すアステロイドカーブである。縦軸は、フリー層における磁化困難軸の方向の磁場の大きさを示す。横軸は、フリー層における磁化容易軸の方向の磁場の大きさを示す。また、太矢印はフリー層の磁化方向を示す。図において、アステロイドカーブの実線Aを越える磁場が印加されるとデータ“1”の状態に、破線Bを越える磁場が印加されるとデータ“0”の状態に、それぞれフリー層が磁化反転する。そして、図から分かるように、磁化容易軸方向に対し45度の向きに磁場を印加することで、もっとも小さな磁場で磁化反転させることができる。 The inventor has newly discovered the following findings as a result of this research.
In the magnetoresistive memory element in which the magnetization direction of the free layer described above is used for data storage, the magnetic characteristics may be shifted, deformed, or rotated. The reason is that there is a non-uniform part in the magnetic characteristics due to abnormal shape of the free layer and defects in the magnetic film, stress due to nearby wiring, etc., the use of an adjacent magnetoresistive memory element or magnetic material For example, it is affected by the leakage magnetic field from the dummy pattern. FIG. 3 is an asteroid curve showing conditions under which magnetization reversal occurs in the free layer when a magnetic field is applied. The vertical axis represents the magnitude of the magnetic field in the direction of the hard axis in the free layer. The horizontal axis indicates the magnitude of the magnetic field in the direction of the easy axis of magnetization in the free layer. A thick arrow indicates the magnetization direction of the free layer. In the figure, the magnetization of the free layer is reversed to a data “1” state when a magnetic field exceeding the solid line A of the asteroid curve is applied, and to a data “0” state when a magnetic field exceeding the broken line B is applied. . As can be seen from the figure, the magnetization can be reversed with the smallest magnetic field by applying the magnetic field in the direction of 45 degrees with respect to the easy axis direction.
前述したフリー層の磁化方向をデータの記憶に用いた磁気抵抗記憶素子では、磁気特性がシフトや変形、回転することがある。その理由としては、フリー層の形状異常や磁性体膜の欠陥により磁気特性に不均一な部分があること、近傍の配線などによる応力が働くこと、隣接する磁気抵抗記憶素子や磁性体を用いたダミーパターンからの漏れ磁場に影響されたりすることなどである。図3は、磁場印加によりフリー層で磁化反転が起こる条件を示すアステロイドカーブである。縦軸は、フリー層における磁化困難軸の方向の磁場の大きさを示す。横軸は、フリー層における磁化容易軸の方向の磁場の大きさを示す。また、太矢印はフリー層の磁化方向を示す。図において、アステロイドカーブの実線Aを越える磁場が印加されるとデータ“1”の状態に、破線Bを越える磁場が印加されるとデータ“0”の状態に、それぞれフリー層が磁化反転する。そして、図から分かるように、磁化容易軸方向に対し45度の向きに磁場を印加することで、もっとも小さな磁場で磁化反転させることができる。 The inventor has newly discovered the following findings as a result of this research.
In the magnetoresistive memory element in which the magnetization direction of the free layer described above is used for data storage, the magnetic characteristics may be shifted, deformed, or rotated. The reason is that there is a non-uniform part in the magnetic characteristics due to abnormal shape of the free layer and defects in the magnetic film, stress due to nearby wiring, etc., the use of an adjacent magnetoresistive memory element or magnetic material For example, it is affected by the leakage magnetic field from the dummy pattern. FIG. 3 is an asteroid curve showing conditions under which magnetization reversal occurs in the free layer when a magnetic field is applied. The vertical axis represents the magnitude of the magnetic field in the direction of the hard axis in the free layer. The horizontal axis indicates the magnitude of the magnetic field in the direction of the easy axis of magnetization in the free layer. A thick arrow indicates the magnetization direction of the free layer. In the figure, the magnetization of the free layer is reversed to a data “1” state when a magnetic field exceeding the solid line A of the asteroid curve is applied, and to a data “0” state when a magnetic field exceeding the broken line B is applied. . As can be seen from the figure, the magnetization can be reversed with the smallest magnetic field by applying the magnetic field in the direction of 45 degrees with respect to the easy axis direction.
しかし、磁気特性がシフトや変形すると、図3におけるアステロイドカーブが移動・変形することになる。図4A及び図4Bは、磁気特性の変化したときのアステロイドカーブの例を示している。図4Aに示されるようにアステロイドカーブが例えば右下方向へシフトし、変形していた場合や、図4Bに示されるようにアステロイドカーブが例えば右下方向へシフトし、回転していた場合、磁化反転自体は書き込むデータによらずバランスが良く、値も図3の場合と同程度である。しかし、無磁場のデータ保持状態である原点と、磁化反転が起こる境界を示すアステロイドカーブとが接近している。これは、データ保持中に熱擾乱により磁化反転が発生し、データが破壊され易くなることを意味している。これらの理由から、フリー層のアステロイドカーブがシフト、回転、変形することは望ましくない。このため、このような磁気特性を示す磁気抵抗記憶素子を有するメモリセル(不良セル)を検出し、メモリセルとして使用しないようにするスクリーニング処理が必要である。しかし、熱擾乱による磁化反転は確率的に起こる現象であり、一定時間データを保持したからといって、必ず発生するわけではない。したがって、磁化方向を利用してデータを記憶する磁気抵抗記憶素子では、確率的に磁化反転が起こる不良セルをスクリーニングして、高信頼性の磁気抵抗記憶装置を得ることが困難であるという問題がある。
However, when the magnetic properties are shifted or deformed, the asteroid curve in FIG. 3 moves or deforms. 4A and 4B show an example of an asteroid curve when the magnetic characteristics are changed. When the asteroid curve is shifted and deformed, for example, in the lower right direction as shown in FIG. 4A, or when the asteroid curve is shifted, for example, in the lower right direction as shown in FIG. 4B The magnetization reversal itself has a good balance regardless of the data to be written, and the value is the same as in the case of FIG. However, the origin, which is in the state of holding no magnetic field data, is close to the asteroid curve indicating the boundary where magnetization reversal occurs. This means that magnetization reversal occurs due to thermal disturbance during data retention, and data is easily destroyed. For these reasons, it is not desirable for the asteroid curve in the free layer to shift, rotate or deform. Therefore, it is necessary to perform a screening process for detecting a memory cell (defective cell) having a magnetoresistive memory element exhibiting such magnetic characteristics and not using it as a memory cell. However, magnetization reversal due to thermal disturbance is a phenomenon that occurs stochastically and does not necessarily occur just because data is retained for a certain period of time. Therefore, in the magnetoresistive memory element that stores data using the magnetization direction, it is difficult to screen a defective cell in which magnetization reversal occurs with probability and to obtain a highly reliable magnetoresistive memory device. is there.
本発明の目的は、MRAMのような磁気抵抗記憶装置の不良セルを効果的にスクリーニングする方法を提供することにある。
An object of the present invention is to provide a method for effectively screening defective cells of a magnetoresistive memory device such as an MRAM.
本発明の第1の観点の磁気抵抗記憶装置のスクリーニング方法は、第1の磁性体を含み、第1の磁性体の磁化の向きでデータを記憶する記憶素子を備える磁気抵抗記憶装置のスクリーニング方法である。そのスクリーニング方法は、第1の磁性体の磁化の向きを設定するステップと、第1の磁性体の磁化容易軸方向及び磁化困難軸方向とは異なる向きであり、第1の磁性体の磁化の向きとは逆向きの方向成分を含む第1磁場を記憶素子に印加するステップと、記憶素子の抵抗を評価するステップと、評価結果に基づいて記憶素子が不良か否かを判別するステップと、不良と判別された記憶素子を使用しないように記憶かつ/又は設定するステップとを具備する。
A screening method for a magnetoresistive storage device according to a first aspect of the present invention is a screening method for a magnetoresistive storage device that includes a first magnetic body and includes a storage element that stores data in the direction of magnetization of the first magnetic body. It is. In the screening method, the step of setting the magnetization direction of the first magnetic body is different from the magnetization easy axis direction and the magnetization difficult axis direction of the first magnetic body. Applying a first magnetic field including a direction component opposite to the direction to the storage element; evaluating a resistance of the storage element; determining whether the storage element is defective based on the evaluation result; Storing and / or setting not to use the memory element determined to be defective.
また、本発明の第2の観点の磁気抵抗記憶装置は、記憶素子と、書き込み部と、印加部と、評価部と、制御部とを具備する。記憶素子は、第1の磁性体を含み、第1の磁性体の磁化の向きでデータを記憶する。書き込み部は、第1の磁性体の磁化の向きを設定する。印加部は、第1の磁性体の磁化容易軸方向及び磁化困難軸方向とは異なる向きであり、第1の磁性体の磁化の向きとは逆向きの方向成分を含む第1磁場を記憶素子に印加する。評価部は、記憶素子の抵抗を評価する。制御部は、評価結果に基づいて記憶素子が不良か否かを判別し、不良と判別された記憶素子を使用しないように記憶及び/又は設定する。
Also, the magnetoresistive storage device according to the second aspect of the present invention includes a storage element, a writing unit, an applying unit, an evaluating unit, and a control unit. The storage element includes a first magnetic body and stores data in the magnetization direction of the first magnetic body. The writing unit sets the magnetization direction of the first magnetic body. The application unit stores a first magnetic field that has a direction component that is different from an easy magnetization direction and a hard magnetization direction of the first magnetic body and includes a direction component opposite to the magnetization direction of the first magnetic body. Apply to. The evaluation unit evaluates the resistance of the memory element. The control unit determines whether or not the storage element is defective based on the evaluation result, and stores and / or sets the storage element that is determined to be defective so as not to be used.
本発明の磁気抵抗記憶装置のスクリーニング手法により、効率的な不良セルのスクリーニングが可能となる。それにより、信頼性の高い磁気抵抗記憶装置が実現できる。
The screening method of the magnetoresistive memory device of the present invention enables efficient defective cell screening. Thereby, a highly reliable magnetoresistive memory device can be realized.
以下、本発明の磁気抵抗記憶装置のスクリーニング方法の実施の形態に関して、添付図面を参照して説明する。
Hereinafter, an embodiment of a screening method for a magnetoresistive storage device of the present invention will be described with reference to the accompanying drawings.
図5A~図5Dは、本発明の実施の形態に係る磁気抵抗記憶装置のスクリーニング方法の原理を示す模式図である。
5A to 5D are schematic diagrams showing the principle of the screening method for the magnetoresistive memory device according to the embodiment of the present invention.
磁気抵抗記憶装置10は、複数のメモリセルがアレイ状に配列されたMRAMに例示され、そのメモリセルは磁気抵抗記憶素子1を備えている。磁気抵抗記憶装置10は、図5Aや図5Cに示されるように、メモリセル(磁気抵抗記憶素子1)と、書き込み部4と、印加部2と、評価部3と、制御部5とを具備している。
The magnetoresistive memory device 10 is exemplified by an MRAM in which a plurality of memory cells are arranged in an array, and the memory cell includes a magnetoresistive memory element 1. As shown in FIG. 5A and FIG. 5C, the magnetoresistive memory device 10 includes a memory cell (magnetoresistance memory element 1), a writing unit 4, an applying unit 2, an evaluating unit 3, and a control unit 5. is doing.
磁気抵抗記憶素子1は、データにより磁化状態が変化する第1磁性体層11と、磁化の向きが固定された第2磁性体層13と、第1磁性体層11と第2磁性体層13とに挟まれた非磁性体であるトンネルバリヤ層12とを備える。第1磁性体層11とトンネルバリヤ層12と第2磁性体層13とはMTJ素子を構成している。第1磁性体層11は、典型的な又はスピン注入方式の磁気抵抗記憶素子のフリー層や、磁壁移動型の磁気抵抗記憶素子のリファレンス層に例示される。第2磁性体層13は、典型的な又はスピン注入方式の磁気抵抗記憶素子のピン層や、磁壁移動型の磁気抵抗記憶素子の磁化記録層に例示される。図5A及び図5Cは、磁気抵抗記憶素子1(メモリセル)において、第1磁性体層11と第2磁性体層13が垂直磁気異方性を有し、それぞれデータ“0”(第1磁性体層11と第2磁性体層13とが平行な磁化方向を有する)及びデータ“1”(同、反平行な磁化方向を有する)を記憶している場合を示している。
The magnetoresistive memory element 1 includes a first magnetic layer 11 whose magnetization state changes according to data, a second magnetic layer 13 whose magnetization direction is fixed, a first magnetic layer 11 and a second magnetic layer 13. And a tunnel barrier layer 12 which is a nonmagnetic material sandwiched between the two. The first magnetic layer 11, the tunnel barrier layer 12, and the second magnetic layer 13 constitute an MTJ element. The first magnetic layer 11 is exemplified as a free layer of a typical or spin-injection magnetoresistive memory element or a reference layer of a domain wall motion type magnetoresistive memory element. The second magnetic layer 13 is exemplified by a pin layer of a typical or spin-injection magnetoresistive memory element or a magnetization recording layer of a domain wall motion type magnetoresistive memory element. 5A and 5C show that in the magnetoresistive memory element 1 (memory cell), the first magnetic layer 11 and the second magnetic layer 13 have perpendicular magnetic anisotropy, and data “0” (first magnetic layer) is shown. The body layer 11 and the second magnetic layer 13 have parallel magnetization directions) and data “1” (same as the antiparallel magnetization direction) are stored.
書き込み部4は、第1磁性体層11の磁化状態を変化させ、磁気抵抗記憶素子1にデータを書き込む。書き込み部4としては、メモリセルの書き込み用の回路及び書き込み用の配線を用いることができる。印加部2は、スクリーニング時に、少なくとも第1磁性体層11にスクリーニング用の磁場を印加する。印加部2としては、メモリセルに所望の磁場を印加できるものとして、スクリーニング用の電流を流すことが可能なメモリセル近傍の配線や他用途から流用した配線及びそれら用の回路などを用いることができる。外部磁場であっても良い。評価部3は、磁気抵抗記憶素子1の抵抗の大きさを評価し、磁気抵抗記憶素子1のデータを読み出す。評価部3としては、メモリセルの読み出し用の回路及び読み出し用の配線を用いることができる。制御部5は、評価された抵抗値又は抵抗値に相当する特性値を用いてメモリセルの良/不良を判別し、不良と判別されたメモリセル(不良セル)を予め設定された取り扱いをするように設定する。図5A及び図5Cは、磁気抵抗記憶素子1(メモリセル)にスクリーニング用の磁場Hsを印加してスクリーニングを行う場合を示している。なお、図中の磁気抵抗記憶素子1、印加部2、評価部3、書き込み部4、制御部5の構成、位置、接続は模式的な例示であり、この例に限定されるものではない。
The writing unit 4 changes the magnetization state of the first magnetic layer 11 and writes data to the magnetoresistive memory element 1. As the writing unit 4, a circuit for writing a memory cell and a wiring for writing can be used. The application unit 2 applies a screening magnetic field to at least the first magnetic layer 11 during screening. As the application unit 2, it is possible to apply a desired magnetic field to the memory cell, and use a wiring in the vicinity of the memory cell through which a screening current can flow, a wiring diverted from other uses, a circuit for them, and the like. it can. An external magnetic field may be used. The evaluation unit 3 evaluates the magnitude of the resistance of the magnetoresistive memory element 1 and reads data of the magnetoresistive memory element 1. As the evaluation unit 3, a memory cell read circuit and a read wiring can be used. The control unit 5 determines whether the memory cell is good or defective using the evaluated resistance value or the characteristic value corresponding to the resistance value, and handles the memory cell (defective cell) determined as defective in advance. Set as follows. 5A and 5C show a case where screening is performed by applying a magnetic field Hs for screening to the magnetoresistive memory element 1 (memory cell). In addition, the structure of the magnetoresistive memory element 1, the application part 2, the evaluation part 3, the writing part 4, and the control part 5 in a figure are typical illustrations, and are not limited to this example.
スクリーニング方法は、書き込み部4が第1磁性体層11の磁化の向きを設定する(メモリセルにデータを書き込む)ステップと、印加部2が第1磁性体層11にスクリーニング用の磁場Hs(スクリーニング磁場)を印加するステップと、評価部3が磁場Hs印加後の磁気抵抗記憶素子1の抵抗の大きさを評価する(メモリセルのデータを読み出す)ステップと、制御部5が評価された抵抗値又は抵抗値に相当する特性値(読み出されたデータ)を用いてメモリセルの良/不良を判別するステップと、制御部5が不良と判別されたメモリセルを予め設定された取り扱いをするように設定するステップとを備える。ただし、磁場Hsは、不良でないメモリセルに対して磁化反転を生じさせないが、不良なメモリセルでは磁化反転が可能な場合があるという程度の大きさや向きを有する磁場である。
In the screening method, the writing unit 4 sets the direction of magnetization of the first magnetic layer 11 (writes data to the memory cell), and the applying unit 2 applies the screening magnetic field Hs (screening) to the first magnetic layer 11. A magnetic field), a step in which the evaluation unit 3 evaluates the magnitude of the resistance of the magnetoresistive memory element 1 after the magnetic field Hs is applied (reads data in the memory cell), and a resistance value evaluated by the control unit 5 Alternatively, the step of determining whether the memory cell is good or defective using a characteristic value (read data) corresponding to the resistance value, and the control unit 5 to handle the memory cell determined to be defective in advance. And a step of setting to However, the magnetic field Hs is a magnetic field having such a magnitude and direction that does not cause magnetization reversal in a memory cell that is not defective, but may be capable of magnetization reversal in a defective memory cell.
図5B及び図5Dは、それぞれ図5A及び図5Cでスクリーニングを行う場合の印加する磁場Hs(スクリーニング磁場)の範囲を示している。縦軸は第1磁性体層11の磁化容易軸方向(容易軸方向とも言う)、横軸は磁化困難軸(面)方向(困難軸方向とも言う)を夫々示し、特に磁化容易軸方向における矢印の向きは第1磁性体層11の磁化の向きである。印加部2が印加する磁場Hsの向きは、第1磁性体層11の磁化の向きとは逆方向の成分を有し、更に、第1磁性体層11の容易軸方向、および困難軸方向とは異なる向きである。例えば、図5Bの場合、磁場Hsの向きの範囲α1は、第1磁性体層11の磁化の向きとは逆方向の成分を有する範囲であって、困難軸(面)方向から角度θ1の方向から、容易軸方向から角度θ2の方向までの範囲である。一方、図5Dの場合、磁場Hsの向きの範囲α2は、第1磁性体層11の磁化の向きとは逆方向の成分を有する範囲であって、困難軸(面)方向から角度θ3の方向から、容易軸方向から角度θ4の方向までの範囲である。
5B and 5D show the range of the magnetic field Hs (screening magnetic field) to be applied when screening is performed in FIGS. 5A and 5C, respectively. The vertical axis represents the easy axis direction (also referred to as easy axis direction) of the first magnetic layer 11, and the horizontal axis represents the hard axis (plane) direction (also referred to as hard axis direction). Is the direction of magnetization of the first magnetic layer 11. The direction of the magnetic field Hs applied by the application unit 2 has a component opposite to the direction of magnetization of the first magnetic layer 11, and further includes an easy axis direction and a hard axis direction of the first magnetic layer 11. Are in different directions. For example, in the case of FIG. 5B, the range α1 of the direction of the magnetic field Hs is a range having a component opposite to the direction of magnetization of the first magnetic layer 11, and the direction of the angle θ1 from the hard axis (plane) direction. To the direction of the angle θ2 from the easy axis direction. On the other hand, in the case of FIG. 5D, the range α2 of the direction of the magnetic field Hs is a range having a component in the opposite direction to the magnetization direction of the first magnetic layer 11, and the direction of the angle θ3 from the hard axis (plane) direction. To the direction from the easy axis direction to the direction of the angle θ4.
特に、印加部2が印加する磁場Hs(スクリーニング磁場)は、第1磁性体層11の容易軸方向から45度方向の角度成分が、容易軸方向成分や困難軸方向成分より大きいことが好ましい。より好ましくは、磁場Hsは、第1磁性体層11の容易軸方向から45度である。これはアステロイドカーブの形状(図3)から分かるように、容易軸方向と困難軸方向との間に最も小さな反転磁場があるため、容易軸方向と困難軸方向との中間の45度の位置が最適であるためである。
In particular, it is preferable that the magnetic field Hs (screening magnetic field) applied by the application unit 2 has an angle component in the direction of 45 degrees from the easy axis direction of the first magnetic layer 11 larger than the easy axis direction component and the difficult axis direction component. More preferably, the magnetic field Hs is 45 degrees from the easy axis direction of the first magnetic layer 11. As can be seen from the shape of the asteroid curve (Fig. 3), there is the smallest reversal magnetic field between the easy axis direction and the hard axis direction, so the position is 45 degrees between the easy axis direction and the hard axis direction. This is because is optimal.
また、書き込み磁場Hwを用いて第1磁性体層11の磁化の向きを設定することで書き込みを行う磁気抵抗記憶装置10において、書き込み部4が印加する書き込み磁場Hwは、設定する磁化の向きの成分を有し、第1磁性体層11の容易軸方向から45度程度の向きが望ましい。一方、既述のように、磁場Hsの向きは第1磁性体層11に設定される磁化の向きとは逆方向の成分を有し、第1磁性体層11の容易軸方向から45度程度の向きである。このため、書き込み磁場Hwから見ると、スクリーニングにおいて印加する磁場Hsの方向は90度程度(45度程度+45度程度)の向きということになる。
Further, in the magnetoresistive storage device 10 that performs writing by setting the magnetization direction of the first magnetic layer 11 using the write magnetic field Hw, the write magnetic field Hw applied by the writing unit 4 has the magnetization direction to be set. It has a component, and the direction of about 45 degrees from the easy axis direction of the first magnetic layer 11 is desirable. On the other hand, as described above, the direction of the magnetic field Hs has a component opposite to the direction of magnetization set in the first magnetic layer 11 and is about 45 degrees from the easy axis direction of the first magnetic layer 11. Direction. For this reason, when viewed from the writing magnetic field Hw, the direction of the magnetic field Hs applied in the screening is about 90 degrees (about 45 degrees + about 45 degrees).
磁場Hsの印加は、データ“0”、“1”に対応して設定される第1磁性体層11の二つの磁化状態のそれぞれについて行い、磁場Hsの印加は二つの磁化状態のそれぞれについて複数の方向で行うと効果的である。これは困難軸方向が面をなす場合に特に有効である。それにより、磁気特性に問題がある場合、保持状態で磁化反転等が発生しやすくなり、スクリーニングを確実に行うことができる。
The application of the magnetic field Hs is performed for each of the two magnetization states of the first magnetic layer 11 set corresponding to the data “0” and “1”, and a plurality of application of the magnetic field Hs is performed for each of the two magnetization states. It is effective when performed in the direction of. This is particularly effective when the hard axis direction forms a surface. Thereby, when there is a problem in the magnetic characteristics, magnetization reversal or the like is likely to occur in the retained state, and screening can be performed reliably.
評価部3は、メモリセル(磁気抵抗記憶素子1)の抵抗評価を、磁場Hsの印加前、磁場Hsを印加して磁場Hsを停止した後、又は、磁場Hsの印加中に行う。又は、それらの評価を組み合わせて行っても良い。制御部5は、評価した抵抗値、又は抵抗値に相当する特性値に基づき、所定の判定基準によりメモリセルの良、不良を判定する。所定の判定基準は、通常のメモリセルの動作で不良セルの判定を行う判定基準とは別に設けられた、スクリーニング専用の判定基準を用いても良い。又は、制御部5は、複数回の抵抗評価を行い、それぞれの値の大小関係や、それぞれの値の差と所定の値との大小関係によりメモリセルの良、不良を判定する。制御部5は、不良セルについて、アドレスを記憶して、以降使用しないように制御したり、不良セルや不良セルを含むメモリセル群を別のメモリセル群と置き換えたり、発生位置や数によっては通常のメモリセルと同様に利用しパリティーチェックによりデータを補正したりする等の制御を行うことができる。
The evaluation unit 3 performs the resistance evaluation of the memory cell (the magnetoresistive memory element 1) before applying the magnetic field Hs, after applying the magnetic field Hs and stopping the magnetic field Hs, or while applying the magnetic field Hs. Or you may perform combining those evaluation. Based on the evaluated resistance value or the characteristic value corresponding to the resistance value, the control unit 5 determines whether the memory cell is good or defective based on a predetermined determination criterion. As the predetermined determination criterion, a screening-determination criterion that is provided separately from the determination criterion for determining a defective cell by normal memory cell operation may be used. Alternatively, the control unit 5 performs resistance evaluation a plurality of times, and determines whether the memory cell is good or bad based on the magnitude relationship between the values or the magnitude relationship between the difference between the values and a predetermined value. The control unit 5 stores the address of the defective cell so as not to be used thereafter, or replaces the defective cell or a memory cell group including the defective cell with another memory cell group, depending on the generation position and number. It can be used in the same way as a normal memory cell and control such as correction of data by parity check can be performed.
本実施の形態に依れば、スクリーニング用の磁場の印加により磁気抵抗記憶素子の特性をシフトさせることで、保持状態で磁化反転を発生させ、もしくは抵抗変化を起こさせ、これを評価することで異常となる可能性のあるセルを効果的に検出することが可能となり、高信頼性の磁気抵抗記憶装置が得られる。
According to the present embodiment, by reversing the characteristics of the magnetoresistive memory element by applying a magnetic field for screening, magnetization reversal occurs in the holding state, or resistance change occurs, and this is evaluated. It is possible to effectively detect a cell that may become abnormal, and a highly reliable magnetoresistive memory device can be obtained.
(第1実施例)
次に、本発明の第1の実施例について説明する。
図6及び図7は、それぞれ本発明の第1の実施例に係るメモリセルの主要部を示す断面図及び平面図である。ただし、図6は図7のAA’断面図である。メモリセルは、Ta膜72、NiFe膜73、PtMn膜74、CoFe膜75、Ru膜76、CoFe膜77、MgO膜78、NiFe膜79、Ta膜84、AlCu膜89をこの順に積層されている。 (First embodiment)
Next, a first embodiment of the present invention will be described.
6 and 7 are a sectional view and a plan view, respectively, showing the main part of the memory cell according to the first embodiment of the present invention. However, FIG. 6 is an AA ′ sectional view of FIG. In the memory cell, aTa film 72, NiFe film 73, PtMn film 74, CoFe film 75, Ru film 76, CoFe film 77, MgO film 78, NiFe film 79, Ta film 84, and AlCu film 89 are laminated in this order. .
次に、本発明の第1の実施例について説明する。
図6及び図7は、それぞれ本発明の第1の実施例に係るメモリセルの主要部を示す断面図及び平面図である。ただし、図6は図7のAA’断面図である。メモリセルは、Ta膜72、NiFe膜73、PtMn膜74、CoFe膜75、Ru膜76、CoFe膜77、MgO膜78、NiFe膜79、Ta膜84、AlCu膜89をこの順に積層されている。 (First embodiment)
Next, a first embodiment of the present invention will be described.
6 and 7 are a sectional view and a plan view, respectively, showing the main part of the memory cell according to the first embodiment of the present invention. However, FIG. 6 is an AA ′ sectional view of FIG. In the memory cell, a
NiFe膜79は、図5Aや図5Cの第1磁性体層11としてのフリー層であり、膜面内方向に磁化方向を有し、楕円形パターンを有する。導電体層のRu膜76を介して反強磁性結合したCoFe膜75、77は、図5Aや図5Cにおける第2磁性体層13としてのピン層である。MgO膜78は、図5Aや図5Cにおけるフリー層とピン層との間に設けられたトンネルバリヤ層12である。これらフリー層、ピン層、及びトンネルバリヤ層がMTJ素子(磁気抵抗記憶素子1)として機能する。ピン層部分(Ta膜72/NiFe膜73/PtMn膜74/CoFe膜75/Ru膜76/CoFe膜77)を一方向に延在させたものは、書き込み配線として機能する。フリー層に上部電極であるTa膜84を介して電気的に接続されたAlCu膜89は、読み出し配線及びスクリーニング磁場を誘起する電流用の配線として機能する。ピン層に下部電極であるTa膜72には、Wプラグ70を介して読み出し電流、及び書き込み電流用の他の配線が電気的に接続されている。MTJ素子は、書き込み配線の延在方向に対し45度程度傾けた方向に楕円形の長辺方向が向くように配置されている。
The NiFe film 79 is a free layer as the first magnetic layer 11 in FIGS. 5A and 5C, has a magnetization direction in the in-plane direction of the film, and has an elliptical pattern. The CoFe films 75 and 77 antiferromagnetically coupled via the Ru film 76 of the conductor layer are pinned layers as the second magnetic layer 13 in FIGS. 5A and 5C. The MgO film 78 is the tunnel barrier layer 12 provided between the free layer and the pinned layer in FIGS. 5A and 5C. These free layer, pinned layer, and tunnel barrier layer function as an MTJ element (magnetoresistance memory element 1). A pin layer portion (Ta film 72 / NiFe film 73 / PtMn film 74 / CoFe film 75 / Ru film 76 / CoFe film 77) extending in one direction functions as a write wiring. The AlCu film 89 electrically connected to the free layer via the Ta film 84 as the upper electrode functions as a read wiring and a current wiring that induces a screening magnetic field. The Ta film 72 which is a lower electrode in the pin layer is electrically connected with other wiring for read current and write current via a W plug 70. The MTJ element is arranged so that the long side direction of the ellipse is oriented in a direction inclined by about 45 degrees with respect to the extending direction of the write wiring.
次に、図6を参照して、本発明の第1の実施例に係るメモリセルの主要部(MTJ素子を含む)の製造方法について説明する。まず、選択トランジスタ(後述)を含むトランジスタや、ビット線やワード線(後述)を含む配線を半導体基板(図示されず)上に形成する。その後、その半導体基板上に、層間絶縁膜としてのSiO2膜71を300nmの膜厚で形成する。そのSiO2膜71の所定の位置に下層配線と接続するWプラグ70を形成する。次に、膜厚20nmのTa72膜、膜厚2nmのNiFe膜73、膜厚20nmの反強磁性体PtMn膜74、膜厚4nmのピン層下層磁性体のCoFe膜75、膜厚0.8nmのピン層同士を反強磁性結合させる導電体層のRu膜76、膜厚4nmのピン層上層磁性体のCoFe膜77、膜厚1nmのトンネル絶縁膜MgO膜78、膜厚2nmのフリー層NiFe膜79、及び、膜厚100nmのTa膜84をそれぞれスパッタリング法により成膜する。275℃2時間1T(テスラ)程度の膜面内方向磁場中でアニールし、PtMn膜74と交換結合させることでピン層の磁化方向を設定する。フォトリソグラフィ技術と反応性イオンエッチング技術(RIE:Reactive Ion Etching)によりTa膜84を加工する。アッシング処理によりレジストを除去した後、Ta膜84をマスクとして、ミリング法によりNiFe膜79をMTJ形状に加工する。本実施例のフリー層形状は図7に示すように長辺が0.4μm、短辺が0.2μmの楕円形である。次に、膜厚30nmのSiN膜86をCVD法により形成し、NiFe膜79の側壁を保護する。続いて、フォトリソグラフィ技術とミリング法により、MgO膜78からTa膜72までを書き込み配線形状に加工する。それにより、書き込み配線(Ta膜72、NiFe膜73、PtMn膜74、CoFe膜75、Ru膜76、CoFe膜77)が形成される。続いて、膜厚200nmのSiO2膜88をCVD法で成膜する。その後、化学的機械研磨技術(CMP:Chemical Mechanical Polishing)により平坦化し、Ta膜84表面を露出させる。次に、AlCu膜89を成膜し、読み出し配線形状に加工する。それにより、読み出し配線(AlCu膜89)が形成される。これらの工程によりMTJ素子(磁気抵抗記憶素子1)が形成できる。
Next, with reference to FIGS. 6A and 6B, description will be made on a manufacturing method of the main part (including the MTJ element) of the memory cell according to the first embodiment of the present invention. First, a transistor including a selection transistor (described later) and a wiring including a bit line and a word line (described later) are formed on a semiconductor substrate (not shown). Thereafter, a SiO 2 film 71 as an interlayer insulating film is formed with a film thickness of 300 nm on the semiconductor substrate. A W plug 70 connected to the lower layer wiring is formed at a predetermined position of the SiO 2 film 71. Next, a Ta72 film with a film thickness of 20 nm, a NiFe film 73 with a film thickness of 2 nm, an antiferromagnetic PtMn film 74 with a film thickness of 20 nm, a CoFe film 75 with a pin layer underlayer magnetic material with a film thickness of 4 nm, Conductor layer Ru film 76 for antiferromagnetic coupling between pinned layers, 4 nm thick pinned layer magnetic CoFe film 77, 1 nm thick tunnel insulating film MgO film 78, 2 nm thick free layer NiFe film A Ta film 84 having a thickness of 79 and a thickness of 100 nm is formed by sputtering. Annealing is performed in the in-plane magnetic field of about 1 T (Tesla) at 275 ° C. for 2 hours, and the magnetization direction of the pinned layer is set by exchange coupling with the PtMn film 74. The Ta film 84 is processed by a photolithography technique and a reactive ion etching technique (RIE: Reactive Ion Etching). After removing the resist by ashing, the NiFe film 79 is processed into an MTJ shape by a milling method using the Ta film 84 as a mask. The free layer shape of this example is an ellipse having a long side of 0.4 μm and a short side of 0.2 μm as shown in FIG. Next, a SiN film 86 having a thickness of 30 nm is formed by a CVD method to protect the sidewall of the NiFe film 79. Subsequently, the MgO film 78 to the Ta film 72 are processed into a write wiring shape by a photolithography technique and a milling method. Thereby, a write wiring (Ta film 72, NiFe film 73, PtMn film 74, CoFe film 75, Ru film 76, CoFe film 77) is formed. Subsequently, a 200 nm thick SiO 2 film 88 is formed by a CVD method. Thereafter, the surface is flattened by chemical mechanical polishing (CMP) to expose the surface of the Ta film 84. Next, an AlCu film 89 is formed and processed into a readout wiring shape. Thereby, a read wiring (AlCu film 89) is formed. Through these steps, the MTJ element (magnetoresistance memory element 1) can be formed.
次に、メモリセル及びメモリセルを含む磁気抵抗記憶装置の構成及び動作について説明する。
図8は、本発明の第1の実施例に係るメモリセルの構成例を示す回路図である。メモリセル180の磁気抵抗効果素子1において、フリー層としての第1磁性体層11(第1の実施例ではNiFe膜79、以下同じ)に接続される端子は、読み出しのための読み出しワード線WR(AlCu膜89)に接続される。ピン層としての第2磁性体層13(Ta膜72/NiFe膜73/PtMn膜74/CoFe膜75/Ru膜76/CoFe膜77)に接続される二つの端子は、一方がトランジスタTRaのソース/ドレインの一方に接続され、他方がトランジスタTRbのソース/ドレインの一方に接続される。また、トランジスタTRa、TRbのソース/ドレインの他方は、それぞれ書き込みのためのビット線BLa、BLbに接続される。更に、トランジスタTRa、TRbのゲートはワード線WLに接続される。ただし、メモリセル180の構成はこの例に限定されるものではない。 Next, the configuration and operation of the memory cell and the magnetoresistive memory device including the memory cell will be described.
FIG. 8 is a circuit diagram showing a configuration example of the memory cell according to the first embodiment of the present invention. In themagnetoresistive effect element 1 of the memory cell 180, a terminal connected to the first magnetic layer 11 (NiFe film 79 in the first embodiment, the same applies hereinafter) as a free layer is a read word line WR for reading. Connected to (AlCu film 89). One of the two terminals connected to the second magnetic layer 13 (Ta film 72 / NiFe film 73 / PtMn film 74 / CoFe film 75 / Ru film 76 / CoFe film 77) as the pinned layer is the source of the transistor TRa. The other is connected to one of the source / drain of the transistor TRb. The other of the sources / drains of the transistors TRa and TRb is connected to the bit lines BLa and BLb for writing, respectively. Further, the gates of the transistors TRa and TRb are connected to the word line WL. However, the configuration of the memory cell 180 is not limited to this example.
図8は、本発明の第1の実施例に係るメモリセルの構成例を示す回路図である。メモリセル180の磁気抵抗効果素子1において、フリー層としての第1磁性体層11(第1の実施例ではNiFe膜79、以下同じ)に接続される端子は、読み出しのための読み出しワード線WR(AlCu膜89)に接続される。ピン層としての第2磁性体層13(Ta膜72/NiFe膜73/PtMn膜74/CoFe膜75/Ru膜76/CoFe膜77)に接続される二つの端子は、一方がトランジスタTRaのソース/ドレインの一方に接続され、他方がトランジスタTRbのソース/ドレインの一方に接続される。また、トランジスタTRa、TRbのソース/ドレインの他方は、それぞれ書き込みのためのビット線BLa、BLbに接続される。更に、トランジスタTRa、TRbのゲートはワード線WLに接続される。ただし、メモリセル180の構成はこの例に限定されるものではない。 Next, the configuration and operation of the memory cell and the magnetoresistive memory device including the memory cell will be described.
FIG. 8 is a circuit diagram showing a configuration example of the memory cell according to the first embodiment of the present invention. In the
図9は、本発明の第1の実施例に係るメモリセルが集積化された磁気抵抗記憶装置の構成例を示すブロック図である。磁気抵抗記憶装置としてのMRAM190は、複数のメモリセル180が行列状に配置されたメモリアレイ191を具備している。このメモリアレイ191は、図8で説明されたデータの記録に用いられるメモリセル180と共に、データ読み出しの際に参照されるリファレンスセル180rを含んでいる。この図の例では、1列分がリファレンスセル180rである。リファレンスセル180rの構造は、メモリセル180と同じである。この場合、リファレンスセル180rのMTJ素子は、データ“0”を記憶した場合の抵抗値R0とデータ“1”を記憶した場合の抵抗値R1との中間の抵抗値R0.5を有する。ただし、2列分をリファレンスセル180rとし、そのうち一方の1列を抵抗値R0のリファレンスセル180rとし、他の1列を抵抗値R1のリファレンスセル180rとすることもできる。その場合、抵抗値R0のリファレンスセル180rと抵抗値R1のリファレンスセル180rとから、抵抗値0.5を作り出し、読出しに用いる。ただし、参照電圧発生回路からの参照電圧との比較でデータを判定しても良い。
FIG. 9 is a block diagram showing a configuration example of a magnetoresistive memory device in which memory cells according to the first embodiment of the present invention are integrated. An MRAM 190 as a magnetoresistive storage device includes a memory array 191 in which a plurality of memory cells 180 are arranged in a matrix. The memory array 191 includes a reference cell 180r that is referred to when reading data, in addition to the memory cell 180 used for data recording described in FIG. In the example of this figure, one column is a reference cell 180r. The structure of the reference cell 180r is the same as that of the memory cell 180. In this case, the MTJ element of the reference cell 180r has an intermediate resistance value R0.5 between the resistance value R0 when data “0” is stored and the resistance value R1 when data “1” is stored. However, two columns can be used as reference cells 180r, one of which can be used as a reference cell 180r having a resistance value R0, and the other column can be used as a reference cell 180r having a resistance value R1. In this case, a resistance value of 0.5 is created from the reference cell 180r having the resistance value R0 and the reference cell 180r having the resistance value R1, and is used for reading. However, the data may be determined by comparison with a reference voltage from the reference voltage generation circuit.
ワード線WL及び読み出しワード線WRは、それぞれX方向に延在している。ワード線WLは、一端をX側制御回路192に接続されている。X側制御回路192は、データの書込み動作時、及び読出し動作時において、対象のメモリセル180につながるワード線WLを選択ワード線WLとして選択する。また、読出し動作時において、対象のメモリセル180につながる読み出しワード線WRを選択読み出しワード線WRとして選択する。ビット線BLa、BLbは、それぞれ、Y方向に延在し、一端をY側制御回路193に接続されている。Y側制御回路193は、データの書込み動作時、及び読出し動作時において、対象のメモリセル180につながるビット線BLa、BLbを選択ビット線BLa、BLbとして選択する。制御回路194は、データの書込み動作時、及び読出し動作時において、X側制御回路192及びY側制御回路193を制御する。また、制御回路194は、メモリセルの良、不良を判定し、不良セルについて、アドレスを記憶して、以降使用しないように制御したり、不良セルや不良セルを含むメモリセル群を別のメモリセル群と置き換えたり、発生位置や数によっては通常のメモリセルと同様に利用しパリティーチェックによりデータを補正したりする等の制御を行う。
The word line WL and the read word line WR each extend in the X direction. One end of the word line WL is connected to the X-side control circuit 192. The X-side control circuit 192 selects the word line WL connected to the target memory cell 180 as the selected word line WL during the data write operation and the read operation. In the read operation, the read word line WR connected to the target memory cell 180 is selected as the selected read word line WR. Each of the bit lines BLa and BLb extends in the Y direction, and one end thereof is connected to the Y side control circuit 193. The Y-side control circuit 193 selects the bit lines BLa and BLb connected to the target memory cell 180 as the selected bit lines BLa and BLb during the data write operation and the read operation. The control circuit 194 controls the X-side control circuit 192 and the Y-side control circuit 193 during a data write operation and a read operation. In addition, the control circuit 194 determines whether the memory cell is good or bad, stores an address for the defective cell, and controls the memory cell so as not to be used thereafter, or sets a memory cell group including the defective cell or the defective cell to another memory. Control is performed such as replacement with a cell group, correction of data by parity check using the same as a normal memory cell depending on the generation position and number.
次に、図6~図9に示されるMRAMにおける書き込み方法、読み出し方法について説明する。
まず、書き込みを行う場合について説明する。制御回路194の制御に基づいて、X側制御回路192は、選択ワード線WLを選択する。それにより、選択ワード線WLが“high”レベルにプルアップされ、トランジスタTRa、TRbが“ON”になる。また、Y側制御回路193は、選択ビット線BLa、BLbを選択する。それにより、選択ビット線BLa、BLbのいずれか一方が“high”レベルにプルアップされ、他方が“Low”レベルにプルダウンされる。その結果、書き込み配線として機能するピン層13に書き込み電流Iwが流れる。選択ビット線BLa、BLbのどちらを“high”レベルにプルアップし、どちらを“Low”レベルにプルダウンするかは、磁気抵抗効果素子1に書き込まれるべきデータにより決定される。すなわち、書き込み配線として機能するピン層部分に流す書込み電流Iwの方向に応じて決定される。X側制御回路192、Y側制御回路193、ワード線WL及び読み出しワード線WR、ビット線BLa、BLb、それらを制御する制御回路194は、書き込み部4を構成している。 Next, a writing method and a reading method in the MRAM shown in FIGS. 6 to 9 will be described.
First, a case where writing is performed will be described. Based on the control of thecontrol circuit 194, the X-side control circuit 192 selects the selected word line WL. As a result, the selected word line WL is pulled up to the “high” level, and the transistors TRa and TRb are turned “ON”. The Y-side control circuit 193 selects the selected bit lines BLa and BLb. Accordingly, one of the selected bit lines BLa and BLb is pulled up to the “high” level, and the other is pulled down to the “Low” level. As a result, a write current Iw flows through the pinned layer 13 that functions as a write wiring. Which of the selected bit lines BLa and BLb is pulled up to a “high” level and which is pulled down to a “Low” level is determined by data to be written in the magnetoresistive effect element 1. That is, it is determined according to the direction of the write current Iw that flows through the pinned layer functioning as the write wiring. The X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit lines BLa and BLb, and the control circuit 194 that controls them constitute the writing unit 4.
まず、書き込みを行う場合について説明する。制御回路194の制御に基づいて、X側制御回路192は、選択ワード線WLを選択する。それにより、選択ワード線WLが“high”レベルにプルアップされ、トランジスタTRa、TRbが“ON”になる。また、Y側制御回路193は、選択ビット線BLa、BLbを選択する。それにより、選択ビット線BLa、BLbのいずれか一方が“high”レベルにプルアップされ、他方が“Low”レベルにプルダウンされる。その結果、書き込み配線として機能するピン層13に書き込み電流Iwが流れる。選択ビット線BLa、BLbのどちらを“high”レベルにプルアップし、どちらを“Low”レベルにプルダウンするかは、磁気抵抗効果素子1に書き込まれるべきデータにより決定される。すなわち、書き込み配線として機能するピン層部分に流す書込み電流Iwの方向に応じて決定される。X側制御回路192、Y側制御回路193、ワード線WL及び読み出しワード線WR、ビット線BLa、BLb、それらを制御する制御回路194は、書き込み部4を構成している。 Next, a writing method and a reading method in the MRAM shown in FIGS. 6 to 9 will be described.
First, a case where writing is performed will be described. Based on the control of the
すなわち、書き込み部4は、データを書き込むメモリセル180の書き込み配線として機能するピン層部分(Ta膜72/NiFe膜73/PtMn膜74/CoFe膜75/Ru膜76/CoFe膜77)に書き込み電流Iw、たとえば1mAを流す。書き込み電流Iwにより発生する磁場HwはMTJ素子(CoFe膜75/Ru膜76/CoFe膜77、MgO膜78、NiFe膜79)のフリー層(NiFe膜79)の磁化方向を変化させる。このとき、書き込み配線に流す書き込み電流Iwの方向によりフリー層の磁化の向きが設定される。このように、書き込み電流Iwの方向により、MTJ素子へ所望のデータ“0”、“1”を書き込むことができる。
That is, the write unit 4 writes a write current to the pin layer portion (Ta film 72 / NiFe film 73 / PtMn film 74 / CoFe film 75 / Ru film 76 / CoFe film 77) that functions as a write wiring of the memory cell 180 that writes data. Iw, for example, 1 mA is applied. The magnetic field Hw generated by the write current Iw changes the magnetization direction of the free layer (NiFe film 79) of the MTJ element (CoFe film 75 / Ru film 76 / CoFe film 77, MgO film 78, NiFe film 79). At this time, the direction of magnetization of the free layer is set by the direction of the write current Iw flowing through the write wiring. Thus, desired data “0” and “1” can be written to the MTJ element according to the direction of the write current Iw.
次に、読み出しを行う場合について説明する。制御回路194の制御に基づいて、X側制御回路192は、選択ワード線WL及び選択読み出しワード線WRを選択する。それにより、選択ワード線WLが“high”レベルにプルアップされ、トランジスタTRa、TRbが“ON”になる。また、選択読み出しワード線WRからメモリセル180に所定の読み出し電流IRが供給される。一方、Y側制御回路193は、選択ビット線BLa、BLbを選択する。それにより、選択ビット線BLa、BLbのいずれか一方がグランドレベルに設定され、他方が“open”(フローティング)に設定される。このとき選択読み出しワード線WRから読み出し電流IRが、MTJ素子(第1磁性体層11、トンネルバリヤ層12、第2磁性体層13)を経由して選択ビット線BLa、BLbの一方へ流れる。読み出し電流IRが流される選択読み出しワード線WRの電位、又は、読み出し電流IRの大きさは、磁気抵抗効果による磁気抵抗効果素子1の抵抗値の変化に依存する。したがって、同様に読み出し電流IRが流されるリファレンスセル180rのリファレンスビット線BLrの出力(又は参照電圧発生回路からの参照電圧)と比較して、この抵抗値の変化を電圧信号、又は電流信号として、例えばX側制御回路192又はY側制御回路193において検知することにより高速での読み出しが可能となる。X側制御回路192、Y側制御回路193、ワード線WL及び読み出しワード線WR、ビット線BLa、BLb、それらを制御する制御回路194は、評価部3を構成している
Next, a case where reading is performed will be described. Based on the control of the control circuit 194, the X-side control circuit 192 selects the selected word line WL and the selected read word line WR. As a result, the selected word line WL is pulled up to the “high” level, and the transistors TRa and TRb are turned “ON”. A predetermined read current IR is supplied to the memory cell 180 from the selected read word line WR. On the other hand, the Y-side control circuit 193 selects the selected bit lines BLa and BLb. Accordingly, one of the selected bit lines BLa and BLb is set to the ground level, and the other is set to “open” (floating). At this time, the read current IR flows from the selected read word line WR to one of the selected bit lines BLa and BLb via the MTJ element (the first magnetic layer 11, the tunnel barrier layer 12, and the second magnetic layer 13). The potential of the selected read word line WR through which the read current IR flows or the magnitude of the read current IR depends on a change in the resistance value of the magnetoresistive element 1 due to the magnetoresistive effect. Therefore, compared with the output of the reference bit line BLr of the reference cell 180r through which the read current IR flows (or the reference voltage from the reference voltage generation circuit), the change in resistance value is expressed as a voltage signal or a current signal. For example, high-speed reading can be performed by detection in the X-side control circuit 192 or the Y-side control circuit 193. The X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit lines BLa and BLb, and the control circuit 194 for controlling them constitute the evaluation unit 3.
すなわち、評価部3は、ピン層部分(Ta膜72/NiFe膜73/PtMn膜74/CoFe膜75/Ru膜76/CoFe膜77)を0Vにして、選択読み出しワード線WRとしての読み出し配線(AlCu膜89)に読み出し電流20μAを印加する。MTJ素子(CoFe膜75/Ru膜76/CoFe膜77、MgO膜78、NiFe膜79)がデータ“0”及び“1”によりそれぞれ10kΩ及び20kΩの抵抗値となるとき、ピン層に接続された選択トランジスタTRa(又はTRb)のオン抵抗が1kΩとすると、MTJ素子を介した読み出し配線の電位はそれぞれ0.21V及び0.41Vを示す。評価部3の差動センスアンプは、その読み出し配線の電位、及び、0.3Vに設定された参照電位Vref(又は参照セルの出力電位)を入力として、データを判別することができる。
That is, the evaluation unit 3 sets the pin layer portion (Ta film 72 / NiFe film 73 / PtMn film 74 / CoFe film 75 / Ru film 76 / CoFe film 77) to 0 V, and the read wiring as the selective read word line WR ( A read current of 20 μA is applied to the AlCu film 89). When the MTJ element (CoFe film 75 / Ru film 76 / CoFe film 77, MgO film 78, NiFe film 79) has a resistance value of 10 kΩ and 20 kΩ according to data “0” and “1”, it is connected to the pinned layer. When the on-resistance of the selection transistor TRa (or TRb) is 1 kΩ, the potential of the read wiring through the MTJ element is 0.21 V and 0.41 V, respectively. The differential sense amplifier of the evaluation unit 3 can discriminate data by using the potential of the read wiring and the reference potential Vref (or the output potential of the reference cell) set to 0.3V as inputs.
次に、メモリセルのスクリーニング方法について説明する。図10A及び図10Bは、本発明の第1の実施例に係るメモリセルのスクリーニング方法を示す概念図である。図10Aに示すように、まず、書き込み部4は、図の右上方向(+x方向及び+y方向から45度方向)に磁化が向くように、その磁化の向きに対応するデータの書き込みをメモリセル180に行う。すなわち、書き込み配線に、書き込むデータに対応した-x方向に書き込み電流Iw1を流す。それにより、書き込みが良好に行われた場合、所望の方向(+x方向及び+y方向から45度の方向)に向いた磁化M1が生成される。このとき、磁化M1は、容易軸方向(+側)に平行な方向である。データの書き込み動作は既述のとおりである。
Next, a memory cell screening method will be described. 10A and 10B are conceptual diagrams illustrating a memory cell screening method according to the first embodiment of the present invention. As shown in FIG. 10A, first, the writing unit 4 writes data corresponding to the magnetization direction in the memory cell 180 so that the magnetization is oriented in the upper right direction (45 degrees direction from the + x direction and the + y direction). To do. That is, the write current Iw1 is supplied to the write wiring in the −x direction corresponding to the data to be written. Thereby, when writing is performed satisfactorily, a magnetization M1 oriented in a desired direction (direction of 45 degrees from the + x direction and the + y direction) is generated. At this time, the magnetization M1 is a direction parallel to the easy axis direction (+ side). The data write operation is as described above.
次に、評価部3は、書き込みが行われたメモリセル180の抵抗値を評価することによりデータを読み出す。制御回路194としての制御部5は、評価部3の読み出したデータに基づいて、書き込んだデータが実際に書き込まれているか、すなわち磁化M1の向きが所望の方向に向いているかを評価する。その結果、書き込んだデータと読み出したデータとが一致していない場合、そのメモリセル180を不良ビットとして検出し、記憶する。データの読み出し動作は既述のとおりである。
Next, the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written. The control unit 5 as the control circuit 194 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M1 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell 180 is detected as a defective bit and stored. The data read operation is as described above.
続いて、制御回路194の制御に基づいて、X側制御回路192は、選択読み出しワード線WRを選択する。それにより、メモリセル180の近傍を通る選択読み出しワード線WRに所定のスクリーニング電流Isが流される。ただし、この場合、そのスクリーニング電流IsはMTJ素子へ流れ込まない。その選択読み出しワード線WRに流れるスクリーニング電流Isにより発生する磁場Hsは、メモリセル180のフリー層の磁化に影響を及ぼす。X側制御回路192、読み出しワード線WR、それらを制御する制御回路194は、印加部2を構成している
Subsequently, based on the control of the control circuit 194, the X-side control circuit 192 selects the selected read word line WR. As a result, a predetermined screening current Is flows through the selected read word line WR passing through the vicinity of the memory cell 180. However, in this case, the screening current Is does not flow into the MTJ element. The magnetic field Hs generated by the screening current Is flowing through the selected read word line WR affects the magnetization of the free layer of the memory cell 180. The X-side control circuit 192, the read word line WR, and the control circuit 194 that controls them constitute the application unit 2.
すなわち、印加部2は、読み出し配線としての選択読み出しワード線WRに+y方向にスクリーニング電流Is1を流し、フリー層に左向き(-x方向)の磁場Hs1を印加する。この場合、磁場Hs1の向き(-x方向)はフリー層の容易軸方向(-側)から45度傾き、フリー層の磁化方向(+x方向及び+y方向から45度方向)とは逆向きの成分を持つ向きとなる。このとき、図4Aや図4Bに示されるような磁気特性のメモリセル180では、正常なメモリセルでは磁化反転が発生しない磁場Hs1により磁化反転が発生する。
That is, the application unit 2 applies a screening current Is1 in the + y direction to the selected read word line WR as a read wiring, and applies a leftward (−x direction) magnetic field Hs1 to the free layer. In this case, the direction of the magnetic field Hs1 (−x direction) is inclined 45 degrees from the easy axis direction (− side) of the free layer, and the component is opposite to the magnetization direction of the free layer (45 degrees direction from the + x direction and the + y direction). It becomes the direction with. At this time, in the memory cell 180 having magnetic characteristics as shown in FIGS. 4A and 4B, magnetization reversal occurs due to the magnetic field Hs1 that does not cause magnetization reversal in a normal memory cell.
その後、スクリーニング電流Is1の停止後、評価部3は、そのメモリセル180のデータの読み出し処理を行う。制御部5は、不良ビットを検出、記憶する。データの読み出し動作及び不良ビットの判定は既述のとおりである。
Thereafter, after the screening current Is1 is stopped, the evaluation unit 3 performs a data read process of the memory cell 180. The control unit 5 detects and stores defective bits. The data read operation and defective bit determination are as described above.
更に、これらの手順を、逆向きに磁化M2を書き込み後、逆向きの磁場Hs2を印加することで実施する。すなわち、図10Bに示すように、まず、書き込み部4は、図の左下方向(-x方向及び-y方向から45度方向)に磁化が向くように、その磁化の向きに対応するデータの書き込みをメモリセル180に行う。すなわち、書き込み配線に、書き込むデータに対応した+x方向に書き込み電流Iw2を流す。それにより、書き込みが良好に行われた場合、所望の方向(-x方向及び-y方向から45度の方向)に向いた磁化M2が生成される。このとき、磁化M2は、容易軸方向(-側)に平行な方向である。次に、評価部3は、書き込みが行われたメモリセル180の抵抗値を評価することによりデータを読み出す。制御部5は、評価部3の読み出したデータに基づいて、書き込んだデータが実際に書き込まれているか、すなわち磁化M2の向きが所望の方向に向いているかを評価する。その結果、書き込んだデータと読み出したデータとが一致していない場合、そのMTJ素子を有するメモリセルを不良ビットとして検出し、記憶する。
Furthermore, these procedures are performed by applying a magnetic field Hs2 in the reverse direction after writing the magnetization M2 in the reverse direction. That is, as shown in FIG. 10B, first, the writing unit 4 writes data corresponding to the magnetization direction so that the magnetization is directed in the lower left direction (45 ° direction from the −x direction and the −y direction). To the memory cell 180. That is, the write current Iw2 is supplied to the write wiring in the + x direction corresponding to the data to be written. Thereby, when writing is performed satisfactorily, a magnetization M2 oriented in a desired direction (a direction of 45 degrees from the −x direction and the −y direction) is generated. At this time, the magnetization M2 is a direction parallel to the easy axis direction (− side). Next, the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written. The control unit 5 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M2 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell having the MTJ element is detected as a defective bit and stored.
続いて、印加部2は、読み出し配線に-y方向にスクリーニング電流Is2を流し、フリー層に右向き(+x方向)の磁場Hs2を印加する。この場合、磁場Hs2の向き(+x方向)はフリー層の容易軸方向(+側)から45度傾き、フリー層の磁化方向(-x方向及び-y方向から45度方向)とは逆向きの成分を持つ向きとなる。このとき、図4Aや図4Bに示されるような磁気特性のメモリセル180では、正常なメモリセルでは磁化反転が発生しない磁場Hs2により磁化反転が発生する。次に、スクリーニング電流Is2の停止後、評価部3は、前述と同様に読み出し処理を行い、不良ビットを検出、記憶する。
Subsequently, the application unit 2 applies a screening current Is2 in the −y direction to the readout wiring, and applies a magnetic field Hs2 in the right direction (+ x direction) to the free layer. In this case, the direction of the magnetic field Hs2 (+ x direction) is inclined 45 degrees from the easy axis direction (+ side) of the free layer, and is opposite to the magnetization direction of the free layer (45 degrees direction from the -x direction and -y direction). The direction has a component. At this time, in the memory cell 180 having magnetic characteristics as shown in FIGS. 4A and 4B, magnetization reversal occurs due to the magnetic field Hs2 that does not cause magnetization reversal in a normal memory cell. Next, after the screening current Is2 is stopped, the evaluation unit 3 performs a reading process in the same manner as described above to detect and store a defective bit.
以上の各一連の作業で不良として記憶されたメモリセルは、メモリセルとして使わず、制御部5は、代替えのメモリセルを割り当てるよう制御する。
The memory cells stored as defective in each of the series of operations described above are not used as memory cells, and the control unit 5 performs control so that alternative memory cells are allocated.
スクリーニング電流Isを流す代わりに、ウェハ全体に所望の向き、強さの外部磁場Hsを印加しても良い。図11は、本発明の第1の実施例に係る外部磁場の例を示す平面図である。図に示されるように、外部磁場Hsの方向としては、フリー層面内方向でフリー層の磁化Mの向きとは逆向きの成分を有し、容易軸方向からたとえば5度、30度、60度、85度等の傾きを有する向きとする。一つの向きだけでなく、複数の向き(角度)について、次々に印加して試験しても良い。フリー層の膜厚方向の角度も考えられるが、本事例の場合、膜厚が薄いため、膜面内の方向で印加すればよい。
Instead of passing the screening current Is, an external magnetic field Hs having a desired direction and strength may be applied to the entire wafer. FIG. 11 is a plan view showing an example of an external magnetic field according to the first embodiment of the present invention. As shown in the figure, the direction of the external magnetic field Hs has a component opposite to the direction of the magnetization M of the free layer in the in-plane direction of the free layer and is, for example, 5 degrees, 30 degrees, 60 degrees from the easy axis direction. , With an inclination of 85 degrees or the like. You may test by applying one after another about not only one direction but several directions (angle). Although the angle in the film thickness direction of the free layer is also conceivable, in this case, since the film thickness is thin, it may be applied in the direction in the film plane.
これらの一連の作業、もしくは磁場Hsの印加の一部の時間を室温より高い温度で行っても良い。高温下では一般的にアステロイドカーブが小さくなるため、より不良セルを検出しやすくなるからである。また、前述の例では磁場Hsの印加をしていないときに読み出しを行ったが、磁場Hsの印加中に読み出しを行っても良い。このとき、制御部5が不良と判別する閾値を通常の読み出し条件とは別にスクリーニング用に設け、通常の読み出し時とスクリーニング時に切り替えて使用しても良い。このように不良判別を調整できるようにすることで、スクリーニング処理により反転まではいかなくても、磁場Hsの印加により抵抗が正常なセルより一時的に大きく変化するものを異常セルとして検出できるようになる。
These series of operations or a part of time for applying the magnetic field Hs may be performed at a temperature higher than room temperature. This is because an asteroid curve is generally small at high temperatures, and it becomes easier to detect defective cells. In the above example, the reading is performed when the magnetic field Hs is not applied. However, the reading may be performed while the magnetic field Hs is being applied. At this time, a threshold for determining that the controller 5 is defective may be provided for screening separately from the normal reading condition, and may be used by switching between normal reading and screening. By making it possible to adjust the defect determination in this way, it is possible to detect a cell whose resistance is temporarily changed significantly by applying the magnetic field Hs as an abnormal cell even if it is not reversed by the screening process. become.
本実施例では、スクリーニング処理において、スクリーニング磁場Hsを印加してアステロイドカーブをシフトさせることで、磁気特性が異常なメモリセルに磁化反転又は大きな抵抗変化を起こさせ、これを抵抗値のような値の大小、もしくは複数の値の差の大小として検出し、判別することにより、効果的に不良セルを検出できるようになる。
In the present embodiment, in the screening process, the asteroid curve is shifted by applying the screening magnetic field Hs to cause magnetization reversal or a large resistance change in a memory cell having an abnormal magnetic characteristic. By detecting and discriminating as the magnitude of a value or the difference between a plurality of values, a defective cell can be detected effectively.
(第2実施例)
次に、本発明の第2の実施例について説明する。
図12及び図13は、それぞれ本発明の第2の実施例に係るメモリセルの主要部を示す断面図及び平面図である。ただし、図12は図13のBB’断面図である。メモリセルは、Cu膜90、Ta膜91、PtMn膜92、CoPt膜93、Ru膜94、CoPt膜95、MgO膜78、CoPt膜96、Ta膜84、AlCu膜89をこの順に積層されている。 (Second embodiment)
Next, a second embodiment of the present invention will be described.
12 and 13 are a sectional view and a plan view, respectively, showing the main part of the memory cell according to the second embodiment of the present invention. However, FIG. 12 is a BB ′ sectional view of FIG. In the memory cell, aCu film 90, Ta film 91, PtMn film 92, CoPt film 93, Ru film 94, CoPt film 95, MgO film 78, CoPt film 96, Ta film 84, and AlCu film 89 are laminated in this order. .
次に、本発明の第2の実施例について説明する。
図12及び図13は、それぞれ本発明の第2の実施例に係るメモリセルの主要部を示す断面図及び平面図である。ただし、図12は図13のBB’断面図である。メモリセルは、Cu膜90、Ta膜91、PtMn膜92、CoPt膜93、Ru膜94、CoPt膜95、MgO膜78、CoPt膜96、Ta膜84、AlCu膜89をこの順に積層されている。 (Second embodiment)
Next, a second embodiment of the present invention will be described.
12 and 13 are a sectional view and a plan view, respectively, showing the main part of the memory cell according to the second embodiment of the present invention. However, FIG. 12 is a BB ′ sectional view of FIG. In the memory cell, a
このメモリセルは、第1の実施例と異なりスピン注入型のメモリセルである。CoPt膜96は、第1磁性体層11としてのフリー層であり、膜面に垂直方向に磁化方向を有し、円形パターンを有する。導電体層のRu膜94を介して反強磁性結合したCoPt膜93、95は、第2磁性体層13としてのピン層13である。MgO膜78は、フリー層とピン層との間に設けられたトンネルバリヤ層12である。これらフリー層、ピン層、及びトンネルバリヤ層がMTJ素子(磁気抵抗記憶素子1)として機能する。フリー層に上部電極であるTa膜84を介して電気的に接続されたAlCu膜89は、読み出し電流、及び書き込み電流用の配線として機能する。ピン層に下部電極であるCu膜90には、Wプラグ70を介して読み出し電流、及び書き込み電流用の他の配線が電気的に接続されている。スクリーニング配線130は、スクリーニング磁場を誘起する電流のための配線であり、電流誘起磁界をフリー層に印加可能な距離に設けられている。
Unlike the first embodiment, this memory cell is a spin injection type memory cell. The CoPt film 96 is a free layer as the first magnetic layer 11, has a magnetization direction perpendicular to the film surface, and has a circular pattern. The CoPt films 93 and 95 antiferromagnetically coupled through the Ru film 94 of the conductor layer are the pinned layer 13 as the second magnetic layer 13. The MgO film 78 is the tunnel barrier layer 12 provided between the free layer and the pinned layer. These free layer, pinned layer, and tunnel barrier layer function as an MTJ element (magnetoresistance memory element 1). The AlCu film 89 that is electrically connected to the free layer via the Ta film 84 that is the upper electrode functions as a read current and write current wiring. The Cu film 90 as the lower electrode is electrically connected to the pin layer through the W plug 70 and other wiring for the read current and the write current. The screening wiring 130 is a wiring for a current that induces a screening magnetic field, and is provided at a distance that allows the current-induced magnetic field to be applied to the free layer.
次に、図12を参照して、本発明の第2の実施例に係るメモリセルの主要部(MTJ素子を含む)の製造方法について説明する。まず、選択トランジスタを含むトランジスタや、ビット線やワード線を含む配線を半導体基板(図示されず)上に形成する。その後、その半導体基板上に、層間絶縁膜としてのSiO2膜71を300nmの膜厚で形成する。そのSiO2膜71の所定の位置に下層配線と接続するWプラグ70を形成する。次に、膜厚20nmのCu膜90、膜厚2nmのTa膜91、膜厚20nmの反強磁性体PtMn膜92、膜厚4nmのピン層下層磁性体のCoPt膜93、膜厚0.8nmのピン層同士を反強磁性結合させる導電体層のRu膜94、膜厚4nmのピン層上層磁性体のCoPt膜95、膜厚1nmのトンネル絶縁膜MgO膜78、膜厚2nmのフリー層CoPt膜96、及び、膜厚100nmのTa膜84をそれぞれスパッタリング法により成膜する。275℃2時間1T(テスラ)程度の膜面垂直方向磁場中でアニールし、PtMn膜92と交換結合させることでピン層の磁化方向を設定する。フォトリソグラフィ技術とRIEによりTa膜84を加工する。アッシング処理によりレジストを除去した後、Ta膜84をマスクとして、ミリング法によりCoPt膜96をMTJ形状に加工する。本実施例のフリー層形状は図13に示すように円形である。次に、膜厚30nmのSiN膜86をCVD法により形成し、CoPt膜96の側壁を保護する。続いて、フォトリソグラフィ技術とミリング法により、MgO膜78からCu膜90までを加工する。その後、全面に膜厚30nmのSiN膜87を成膜し、MTJの側壁を保護する。次に、膜厚200nmのSiO2膜88をCVD法で成膜した後、CMPにより平坦化し、Ta膜84表面を露出させる。次に、AlCu膜89を成膜し、読み出し配線形状に加工する。これらの工程によりMTJ素子(磁気抵抗記憶素子1)が形成できる。
Next, with reference to FIGS. 12A to 12C, description will be made on a manufacturing method of the main part (including the MTJ element) of the memory cell according to the second embodiment of the present invention. First, a transistor including a selection transistor and a wiring including a bit line and a word line are formed on a semiconductor substrate (not shown). Thereafter, a SiO 2 film 71 as an interlayer insulating film is formed with a film thickness of 300 nm on the semiconductor substrate. A W plug 70 connected to the lower layer wiring is formed at a predetermined position of the SiO 2 film 71. Next, a Cu film 90 having a thickness of 20 nm, a Ta film 91 having a thickness of 2 nm, an antiferromagnetic PtMn film 92 having a thickness of 20 nm, a CoPt film 93 having a pin layer lower magnetic layer having a thickness of 4 nm, and a thickness of 0.8 nm. Conductor layer Ru film 94 that antiferromagnetically couples the pinned layers of each other, 4 nm thick pinned layer upper magnetic CoPt film 95, 1 nm thick tunnel insulating film MgO film 78, 2 nm thick free layer CoPt A film 96 and a Ta film 84 with a thickness of 100 nm are formed by sputtering. The magnetization direction of the pinned layer is set by annealing in a perpendicular magnetic field of about 1 T (Tesla) at 275 ° C. for 2 hours, and exchange coupling with the PtMn film 92. The Ta film 84 is processed by photolithography and RIE. After removing the resist by ashing, the CoPt film 96 is processed into an MTJ shape by a milling method using the Ta film 84 as a mask. The free layer shape of this embodiment is circular as shown in FIG. Next, a SiN film 86 having a thickness of 30 nm is formed by a CVD method to protect the side wall of the CoPt film 96. Subsequently, the MgO film 78 to the Cu film 90 are processed by a photolithography technique and a milling method. Thereafter, a SiN film 87 having a film thickness of 30 nm is formed on the entire surface to protect the side wall of the MTJ. Next, after a 200 nm-thickness SiO 2 film 88 is formed by a CVD method, it is flattened by CMP to expose the surface of the Ta film 84. Next, an AlCu film 89 is formed and processed into a readout wiring shape. Through these steps, the MTJ element (magnetoresistance memory element 1) can be formed.
次に、メモリセル及びメモリセルを含む磁気抵抗記憶装置の構成及び動作について説明する。
まず、メモリセルの構成例については、第1の実施例に係る図8の場合と基本的に同じである。ただし、トランジスタTRbが不要であるので省略される点、ビット線BLbは独立して図13におけるスクリーニング配線130として機能する点で第1の実施例と異なる。 Next, the configuration and operation of the memory cell and the magnetoresistive memory device including the memory cell will be described.
First, the configuration example of the memory cell is basically the same as the case of FIG. 8 according to the first embodiment. However, the transistor TRb is unnecessary and is omitted, and the bit line BLb is different from the first embodiment in that it functions as thescreening wiring 130 in FIG. 13 independently.
まず、メモリセルの構成例については、第1の実施例に係る図8の場合と基本的に同じである。ただし、トランジスタTRbが不要であるので省略される点、ビット線BLbは独立して図13におけるスクリーニング配線130として機能する点で第1の実施例と異なる。 Next, the configuration and operation of the memory cell and the magnetoresistive memory device including the memory cell will be described.
First, the configuration example of the memory cell is basically the same as the case of FIG. 8 according to the first embodiment. However, the transistor TRb is unnecessary and is omitted, and the bit line BLb is different from the first embodiment in that it functions as the
次に、メモリセルを含む磁気抵抗記憶装置の構成例については、第1の実施例に係る図9の場合と基本的に同じである。ただし、上述のように、ビット線BLbはスクリーニング配線130として機能する点で第1の実施例と異なる。
Next, the configuration example of the magnetoresistive memory device including the memory cells is basically the same as that in FIG. 9 according to the first embodiment. However, as described above, the bit line BLb is different from the first embodiment in that it functions as the screening wiring 130.
次に、図12~図13、図8~図9に示されるMRAMにおける書き込み方法、読み出し方法について説明する。
まず、書き込みを行う場合について説明する。制御回路194の制御に基づいて、X側制御回路192は、対である選択ワード線WL及び選択読み出しワード線WRを選択する。それにより、選択ワード線WLが“high”レベルにプルアップされ、トランジスタTRaが“ON”になる。また、Y側制御回路193は、選択ビット線BLaを選択する。そして、選択読み出しワード線WR及び選択ビット線BLaのいずれかが“high”レベルにプルアップされ、他方が“Low”レベルにプルダウンされる。その結果、第1磁性体層11/トンネルバリヤ層12/第2磁性体層13を介して書き込み電流Iwが流れる。選択読み出しワード線WR及び選択ビット線BLaのどちらを“high”レベルにプルアップし、どちらを“Low”レベルにプルダウンするかは、磁気抵抗効果素子1に書き込まれるべきデータにより決定される。すなわち、磁気抵抗効果素子1に流す書込み電流Iwの方向に応じて決定される。X側制御回路192、Y側制御回路193、ワード線WL及び読み出しワード線WR、ビット線BLa、それらを制御する制御回路194は、書き込み部4を構成している。 Next, a writing method and a reading method in the MRAM shown in FIGS. 12 to 13 and FIGS. 8 to 9 will be described.
First, a case where writing is performed will be described. Based on the control of thecontrol circuit 194, the X-side control circuit 192 selects the paired selected word line WL and selected read word line WR. As a result, the selected word line WL is pulled up to the “high” level, and the transistor TRa is turned “ON”. The Y-side control circuit 193 selects the selected bit line BLa. One of the selected read word line WR and the selected bit line BLa is pulled up to the “high” level, and the other is pulled down to the “Low” level. As a result, the write current Iw flows through the first magnetic layer 11 / tunnel barrier layer 12 / second magnetic layer 13. Which of the selected read word line WR and the selected bit line BLa is pulled up to the “high” level and which is pulled down to the “Low” level is determined by data to be written in the magnetoresistive effect element 1. That is, it is determined according to the direction of the write current Iw flowing through the magnetoresistive effect element 1. The X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit line BLa, and the control circuit 194 for controlling them constitute the writing unit 4.
まず、書き込みを行う場合について説明する。制御回路194の制御に基づいて、X側制御回路192は、対である選択ワード線WL及び選択読み出しワード線WRを選択する。それにより、選択ワード線WLが“high”レベルにプルアップされ、トランジスタTRaが“ON”になる。また、Y側制御回路193は、選択ビット線BLaを選択する。そして、選択読み出しワード線WR及び選択ビット線BLaのいずれかが“high”レベルにプルアップされ、他方が“Low”レベルにプルダウンされる。その結果、第1磁性体層11/トンネルバリヤ層12/第2磁性体層13を介して書き込み電流Iwが流れる。選択読み出しワード線WR及び選択ビット線BLaのどちらを“high”レベルにプルアップし、どちらを“Low”レベルにプルダウンするかは、磁気抵抗効果素子1に書き込まれるべきデータにより決定される。すなわち、磁気抵抗効果素子1に流す書込み電流Iwの方向に応じて決定される。X側制御回路192、Y側制御回路193、ワード線WL及び読み出しワード線WR、ビット線BLa、それらを制御する制御回路194は、書き込み部4を構成している。 Next, a writing method and a reading method in the MRAM shown in FIGS. 12 to 13 and FIGS. 8 to 9 will be described.
First, a case where writing is performed will be described. Based on the control of the
すなわち、書き込み部4は、データを書き込むメモリセル180のフリー層(CoPt膜96)とピン層(CoPt膜95/Ru膜94/CoPt膜93)との間に書き込み電流Iw、たとえば0.5mAを流す。書き込み電流Iwによりフリー層とピン層との間にスピン電子の授受が行われる。これにより、前述のように書き込み電流Iwの方向によりフリー層の磁化方向を設定できる。このように、書き込み電流Iwの方向により、MTJ素子へ所望のデータ“0”、“1”を書き込むことができる。
That is, the write unit 4 applies a write current Iw, for example, 0.5 mA, between the free layer (CoPt film 96) and the pinned layer (CoPt film 95 / Ru film 94 / CoPt film 93) of the memory cell 180 into which data is written. Shed. Spin electrons are transferred between the free layer and the pinned layer by the write current Iw. Thereby, the magnetization direction of the free layer can be set by the direction of the write current Iw as described above. Thus, desired data “0” and “1” can be written to the MTJ element according to the direction of the write current Iw.
次に、読み出しを行う場合について説明する。制御回路194の制御に基づいて、X側制御回路192は、選択ワード線WL及び選択読み出しワード線WRを選択する。それにより、選択ワード線WLが“high”レベルにプルアップされ、トランジスタTRaが“ON”になる。また、選択読み出しワード線WRからメモリセル180に所定の読み出し電流IRが供給される。一方、Y側制御回路193は、選択ビット線BLaを選択する。それにより、選択ビット線BLaがグランドレベルに設定される。このとき選択読み出しワード線WRから読み出し電流IRが、MTJ素子(第1磁性体層11、トンネルバリヤ層12、第2磁性体層13)を経由して選択ビット線BLaへ流れる。選択読み出しワード線WRの電位、又は、読み出し電流IRの大きさとリファレンスセル180rのリファレンスビット線BLrの出力(又は参照電圧発生回路からの参照電圧)と比較して、この抵抗値の変化を電圧信号、又は電流信号として、例えばX側制御回路192又はY側制御回路193において検知することにより高速での読み出しが可能となる。X側制御回路192、Y側制御回路193、ワード線WL及び読み出しワード線WR、ビット線BLa、それらを制御する制御回路194は、評価部3を構成している
Next, a case where reading is performed will be described. Based on the control of the control circuit 194, the X-side control circuit 192 selects the selected word line WL and the selected read word line WR. As a result, the selected word line WL is pulled up to the “high” level, and the transistor TRa is turned “ON”. A predetermined read current IR is supplied to the memory cell 180 from the selected read word line WR. On the other hand, the Y-side control circuit 193 selects the selected bit line BLa. Thereby, the selected bit line BLa is set to the ground level. At this time, the read current IR flows from the selected read word line WR to the selected bit line BLa via the MTJ element (the first magnetic layer 11, the tunnel barrier layer 12, and the second magnetic layer 13). Compared with the potential of the selected read word line WR or the magnitude of the read current IR and the output of the reference bit line BLr of the reference cell 180r (or the reference voltage from the reference voltage generation circuit), this change in resistance value is a voltage signal. Alternatively, as a current signal, for example, detection at the X-side control circuit 192 or the Y-side control circuit 193 enables high-speed reading. The X-side control circuit 192, the Y-side control circuit 193, the word line WL, the read word line WR, the bit line BLa, and the control circuit 194 that controls them constitute the evaluation unit 3.
すなわち、評価部3は、ピン層13(CoPt膜95/Ru膜94/CoPt膜93)を0Vにして、選択読み出しワード線WRとしての読み出し配線(AlCu膜89)に読み出し電流20μAを印加する。MTJ素子(CoPt膜95/Ru膜94/CoPt膜93、MgO膜78、CoPt膜96)がデータ“0”及び“1”によりそれぞれ10kΩ及び20kΩの抵抗値となるとき、ピン層に接続された選択トランジスタTRaのオン抵抗が1kΩとすると、MTJ素子を介した読み出し配線の電位はそれぞれ0.21V及び0.41Vを示す。評価部3の差動センスアンプは、その読み出し配線の電位、及び、0.3Vに設定された参照電位Vref(又は参照セルの出力電位)を入力として、データを判別することができる。
That is, the evaluation unit 3 sets the pinned layer 13 (CoPt film 95 / Ru film 94 / CoPt film 93) to 0 V and applies a read current of 20 μA to the read wiring (AlCu film 89) as the selected read word line WR. When the MTJ element (CoPt film 95 / Ru film 94 / CoPt film 93, MgO film 78, CoPt film 96) has a resistance value of 10 kΩ and 20 kΩ respectively by data “0” and “1”, it is connected to the pinned layer. When the on-resistance of the selection transistor TRa is 1 kΩ, the potential of the read wiring through the MTJ element is 0.21 V and 0.41 V, respectively. The differential sense amplifier of the evaluation unit 3 can discriminate data by using the potential of the read wiring and the reference potential Vref (or the output potential of the reference cell) set to 0.3V as inputs.
次に、メモリセルのスクリーニング方法について説明する。図14A及び図14Bは、本発明の第2の実施例に係るメモリセルのスクリーニング方法を示す概念図である。図14Aに示すように、まず、書き込み部4は、図の上方向(+z方向)に磁化が向くように、その磁化の向きに対応するデータの書き込みをメモリセル180に行う。すなわち、MTJ素子に、書き込むデータに対応した-z方向に書き込み電流Iw1を流す。それにより、書き込みが良好に行われた場合、所望の方向(+z方向)に向いた磁化M1が生成される。このとき、磁化M1は、容易軸方向(+側)に平行な方向である。データの書き込み動作は既述のとおりである。
Next, a memory cell screening method will be described. 14A and 14B are conceptual diagrams illustrating a memory cell screening method according to a second embodiment of the present invention. As shown in FIG. 14A, first, the writing unit 4 writes data corresponding to the magnetization direction to the memory cell 180 so that the magnetization is directed upward (+ z direction) in the figure. That is, the write current Iw1 is supplied to the MTJ element in the −z direction corresponding to the data to be written. Thereby, when writing is performed satisfactorily, magnetization M1 oriented in a desired direction (+ z direction) is generated. At this time, the magnetization M1 is a direction parallel to the easy axis direction (+ side). The data write operation is as described above.
次に、評価部3は、書き込みが行われたメモリセル180の抵抗値を評価することによりデータを読み出す。制御回路194としての制御部5は、評価部3の読み出したデータに基づいて、書き込んだデータが実際に書き込まれているか、すなわち磁化M1の向きが所望の方向に向いているかを評価する。その結果、書き込んだデータと読み出したデータとが一致していない場合、そのメモリセル180を不良ビットとして検出し、記憶する。データの読み出し動作は既述のとおりである。
Next, the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written. The control unit 5 as the control circuit 194 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M1 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell 180 is detected as a defective bit and stored. The data read operation is as described above.
続いて、制御回路194の制御に基づいて、Y側制御回路193は、選択ビット線BLbを選択する。それにより、メモリセル180の近傍を通るスクリーニング配線130としての選択ビット線BLbに所定のスクリーニング電流Isが流される。その選択ビット線BLbに流れるスクリーニング電流Isにより発生する磁場Hs1は、メモリセル180のフリー層(第1磁性体層11)の磁化に影響を及ぼす。Y側制御回路192、ビット線BLb、それらを制御する制御回路194は、印加部2を構成している。
Subsequently, based on the control of the control circuit 194, the Y-side control circuit 193 selects the selected bit line BLb. As a result, a predetermined screening current Is flows through the selected bit line BLb as the screening wiring 130 passing through the vicinity of the memory cell 180. The magnetic field Hs1 generated by the screening current Is flowing through the selected bit line BLb affects the magnetization of the free layer (first magnetic layer 11) of the memory cell 180. The Y-side control circuit 192, the bit line BLb, and the control circuit 194 that controls them constitute the application unit 2.
すなわち、印加部2は、スクリーニング配線130としての選択ビット線BLbに-y方向にスクリーニング電流Is1を流し、フリー層(第1磁性体層11)に下向き(-z方向)の成分を有する磁場Hs1を印加する。この場合、磁場Hs1の向き(-z方向成分を有す)はフリー層の容易軸方向(-側)からやや傾き、フリー層の磁化方向(+z方向)とは逆向きの成分を持つ向きとなる。このとき、図4Aや図4Bに示されるような磁気特性のメモリセル180では、正常なメモリセルでは磁化反転が発生しない磁場Hs1により磁化反転が発生する。
That is, the application unit 2 causes the screening current Is1 to flow in the −y direction through the selected bit line BLb as the screening wiring 130, and the magnetic field Hs1 having a downward (−z direction) component to the free layer (first magnetic layer 11). Is applied. In this case, the direction of the magnetic field Hs1 (having a −z direction component) is slightly inclined from the easy axis direction (− side) of the free layer, and has a direction opposite to the magnetization direction of the free layer (+ z direction). Become. At this time, in the memory cell 180 having magnetic characteristics as shown in FIGS. 4A and 4B, magnetization reversal occurs due to the magnetic field Hs1 that does not cause magnetization reversal in a normal memory cell.
その後、スクリーニング電流Is1の停止後、評価部3は、そのメモリセル180のデータの読み出し処理を行う。制御部5は、不良ビットを検出、記憶する。データの読み出し動作及び不良ビットの判定は既述のとおりである。
Thereafter, after the screening current Is1 is stopped, the evaluation unit 3 performs a data read process of the memory cell 180. The control unit 5 detects and stores defective bits. The data read operation and defective bit determination are as described above.
更に、これらの手順を、逆向きに磁化M2を書き込み後、逆向きの磁場Hs2を印加することで実施する。すなわち、図14Bに示すように、まず、書き込み部4は、図の下方向(-z方向)に磁化が向くように、その磁化の向きに対応するデータの書き込みをメモリセル180に行う。すなわち、MTJ素子に、書き込むデータに対応した+z方向に書き込み電流Iw2を流す。それにより、書き込みが良好に行われた場合、所望の方向(-z方向)に向いた磁化M2が生成される。このとき、磁化M2は、容易軸方向(-側)に平行な方向である。次に、評価部3は、書き込みが行われたメモリセル180の抵抗値を評価することによりデータを読み出す。制御部5は、評価部3の読み出したデータに基づいて、書き込んだデータが実際に書き込まれているか、すなわち磁化M2の向きが所望の方向に向いているかを評価する。その結果、書き込んだデータと読み出したデータとが一致していない場合、そのメモリセル180を不良ビットとして検出し、記憶する。
Furthermore, these procedures are performed by applying a magnetic field Hs2 in the reverse direction after writing the magnetization M2 in the reverse direction. That is, as shown in FIG. 14B, the writing unit 4 first writes data corresponding to the magnetization direction to the memory cell 180 so that the magnetization is directed downward (−z direction) in the figure. That is, the write current Iw2 is supplied to the MTJ element in the + z direction corresponding to the data to be written. Thereby, when writing is performed satisfactorily, magnetization M2 oriented in a desired direction (−z direction) is generated. At this time, the magnetization M2 is a direction parallel to the easy axis direction (− side). Next, the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written. The control unit 5 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M2 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell 180 is detected as a defective bit and stored.
続いて、印加部2は、スクリーニング配線130に+y方向にスクリーニング電流Is2を流し、フリー層(第1磁性体層11)に上向き(+z方向)の成分を有する磁場Hs2を印加する。この場合、磁場Hs2の向き(+z方向成分を有す)はフリー層11の容易軸方向(+側)からやや傾き、フリー層11の磁化方向(-z方向)とは逆向きの成分を持つ向きとなる。このとき、図4Aや図4Bに示されるような磁気特性のメモリセル180では、正常なメモリセルでは磁化反転が発生しない磁場Hs2により磁化反転が発生する。
Subsequently, the application unit 2 applies a screening current Is2 in the + y direction to the screening wiring 130, and applies a magnetic field Hs2 having an upward component (+ z direction) to the free layer (first magnetic layer 11). In this case, the direction of the magnetic field Hs2 (having a + z direction component) is slightly inclined from the easy axis direction (+ side) of the free layer 11 and has a component opposite to the magnetization direction of the free layer 11 (−z direction). It becomes the direction. At this time, in the memory cell 180 having magnetic characteristics as shown in FIGS. 4A and 4B, magnetization reversal occurs due to the magnetic field Hs2 that does not cause magnetization reversal in a normal memory cell.
次に、スクリーニング電流Is2の停止後、評価部3は、そのメモリセル180のデータの読み出し処理を行う。制御部5は、不良ビットを検出、記憶する。データの読み出し動作及び不良ビットの判定は既述のとおりである。
Next, after the screening current Is2 is stopped, the evaluation unit 3 performs a process of reading data from the memory cell 180. The control unit 5 detects and stores defective bits. The data read operation and defective bit determination are as described above.
以上の各一連の作業で不良として記憶されたメモリセルは、メモリセルとして使わず、制御部5は、代替えのメモリセルを割り当てるよう制御する。
The memory cells stored as defective in each of the series of operations described above are not used as memory cells, and the control unit 5 performs control so as to allocate alternative memory cells.
スクリーニング電流Isを流す代わりに、ウェハ全体に所望の向き、強さの外部磁場Hsを印加しても良い。磁化方向としてはフリー層の磁化方向とは逆向き(-z方向又は+z方向)の成分を有し、容易軸方向からたとえば5度、30度、60度、85度等の傾きを有する向きとする。本実施例の困難軸方向は面(xy平面)であるため、印加磁場Hsのフリー層の面内方向としては0度から360度まですべて可能である。一つの向きだけでなく、複数の向き(角度)について、次々に印加して試験しても良い。特に同一平面内にない3角度の印加を行うと効果的に不良セルの磁化反転を誘発できることは明らかである。
Instead of passing the screening current Is, an external magnetic field Hs having a desired direction and strength may be applied to the entire wafer. The magnetization direction has a component opposite to the magnetization direction of the free layer (−z direction or + z direction) and has an inclination of, for example, 5 degrees, 30 degrees, 60 degrees, 85 degrees, etc. from the easy axis direction. To do. Since the difficult axis direction of the present embodiment is a plane (xy plane), the in-plane direction of the free layer of the applied magnetic field Hs can be all 0 ° to 360 °. You may test by applying one after another about not only one direction but several directions (angle). It is clear that the magnetization reversal of the defective cell can be effectively induced when the application of the three angles not in the same plane is performed.
これらの一連の作業、もしくは磁場Hsの印加の一部の時間を室温より高い温度で行っても良い。高温下では一般的にアステロイドカーブが小さくなるため、より不良セルを検出しやすくなるからである。また、前述の例では磁場Hsの印加をしていないときに読み出しを行ったが、磁場Hsの印加中に読み出しを行っても良い。このとき、制御部5が不良と判別する閾値を通常の読み出し条件とは別にスクリーニング用に設け、通常の読み出し時とスクリーニング時に切り替えて使用しても良い。このように不良判別を調整できるようにすることで、スクリーニング処理により反転まではいかなくても、磁場Hsの印加により抵抗が正常なセルより一時的に大きく変化するものを異常セルとして検出できるようになる。
These series of operations or a part of time for applying the magnetic field Hs may be performed at a temperature higher than room temperature. This is because an asteroid curve is generally small at high temperatures, and it becomes easier to detect defective cells. In the above example, the reading is performed when the magnetic field Hs is not applied. However, the reading may be performed while the magnetic field Hs is being applied. At this time, a threshold for determining that the controller 5 is defective may be provided for screening separately from the normal reading condition, and may be used by switching between normal reading and screening. By making it possible to adjust the defect determination in this way, it is possible to detect a cell whose resistance is temporarily changed significantly from a normal cell by application of the magnetic field Hs as an abnormal cell without going through reversal by the screening process. become.
本実施例では、スピン電子注入書き込み方式のメモリセルでも、スクリーニング処理において、スクリーニング磁場Hsを印加してアステロイドカーブをシフトさせることで、磁気特性が異常なメモリセルに磁化反転又は大きな抵抗変化を起こさせ、これを検出、判別することにより、効果的に不良セルを検出できるようになる。
In this embodiment, even in a spin-electron-injection write-type memory cell, in a screening process, a magnetic field reversal or a large resistance change is applied to a memory cell with abnormal magnetic characteristics by applying a screening magnetic field Hs to shift the asteroid curve. By causing this to occur, and detecting and discriminating this, a defective cell can be detected effectively.
(第3実施例)
次に、本発明の第3の実施例について説明する。
図15及び図16は、それぞれ本発明の第3の実施例に係るメモリセルの主要部を示す断面図及び平面図である。ただし、図15は図16のBB’断面図である。メモリセルは、Ta膜100、Pt膜101、CoPt膜93、Ru膜94、CoPt膜95、MgO膜78、CoPt膜96、Ru膜102、PtMn膜103、CoPt膜104、Ta膜83、Ta膜84、AlCu膜89をこの順に積層されている。 (Third embodiment)
Next, a third embodiment of the present invention will be described.
15 and 16 are a cross-sectional view and a plan view, respectively, showing the main part of the memory cell according to the third embodiment of the present invention. 15 is a cross-sectional view taken along the line BB ′ of FIG. The memory cell includesTa film 100, Pt film 101, CoPt film 93, Ru film 94, CoPt film 95, MgO film 78, CoPt film 96, Ru film 102, PtMn film 103, CoPt film 104, Ta film 83, Ta film. 84 and an AlCu film 89 are laminated in this order.
次に、本発明の第3の実施例について説明する。
図15及び図16は、それぞれ本発明の第3の実施例に係るメモリセルの主要部を示す断面図及び平面図である。ただし、図15は図16のBB’断面図である。メモリセルは、Ta膜100、Pt膜101、CoPt膜93、Ru膜94、CoPt膜95、MgO膜78、CoPt膜96、Ru膜102、PtMn膜103、CoPt膜104、Ta膜83、Ta膜84、AlCu膜89をこの順に積層されている。 (Third embodiment)
Next, a third embodiment of the present invention will be described.
15 and 16 are a cross-sectional view and a plan view, respectively, showing the main part of the memory cell according to the third embodiment of the present invention. 15 is a cross-sectional view taken along the line BB ′ of FIG. The memory cell includes
このメモリセルは、第1の実施例と異なり磁壁移動型のメモリセルである。CoPt膜96は、第2磁性体層13としての磁化記録層であり、膜面に垂直方向に磁化方向を有し、線パターン(直方体形状)を有する。磁化記録層の一端部は、導電体層のRu膜102を介してPtMn膜103と反強磁性結合して第1ピン領域(第1磁化固定領域とも言う)14aを形成している。同様に、磁化記録層の他端部は、導電体層のRu膜102を介してCoPt膜104と反強磁性結合して第2ピン領域(第2磁化固定領域とも言う)14bを形成している。第1磁化固定領域14a及び第2磁化固定領域14bの磁化方向はそれぞれ-z方向及び+z方向であり、互いに反平行の関係にある。磁化記録層の中央の磁化自由領域15(フリー層として機能)は、-z方向及び+z方向の両方の磁化方向をとることが可能であり、その磁化の方向によりデータを記憶する。互いに磁化方向が反平行な磁化自由領域15と磁化固定領域14との境界に、磁壁が形成される。書き込み動作時には、第1磁化固定領域14a及び第2磁化固定領域14bのいずれか一方から他方へ書き込み電流Iwを流すことによるスピン電子の授受により磁壁を移動させ、データを書き込む。また、第1磁化固定領域14aは、Ta膜83を介して第2の配線としてのAlCu膜89に接続されている。第2磁化固定領域14bは、Ta膜84を介して第3の配線としての他のAlCu膜89に接続されている。
Unlike the first embodiment, this memory cell is a domain wall motion type memory cell. The CoPt film 96 is a magnetization recording layer as the second magnetic layer 13, has a magnetization direction perpendicular to the film surface, and has a line pattern (cuboid shape). One end of the magnetization recording layer is antiferromagnetically coupled to the PtMn film 103 via the Ru film 102 of the conductor layer to form a first pin region (also referred to as a first magnetization fixed region) 14a. Similarly, the other end of the magnetization recording layer is antiferromagnetically coupled to the CoPt film 104 via the Ru film 102 of the conductor layer to form a second pin region (also referred to as a second magnetization fixed region) 14b. Yes. The magnetization directions of the first magnetization fixed region 14a and the second magnetization fixed region 14b are the -z direction and the + z direction, respectively, and are in antiparallel relation to each other. The magnetization free region 15 (functioning as a free layer) in the center of the magnetization recording layer can take both the −z direction and the + z direction, and stores data according to the magnetization direction. A domain wall is formed at the boundary between the magnetization free region 15 and the magnetization fixed region 14 whose magnetization directions are antiparallel to each other. During the write operation, data is written by moving the domain wall by exchanging spin electrons by passing a write current Iw from one of the first magnetization fixed region 14a and the second magnetization fixed region 14b to the other. The first magnetization fixed region 14 a is connected to the AlCu film 89 as the second wiring through the Ta film 83. The second magnetization fixed region 14 b is connected to another AlCu film 89 as a third wiring via the Ta film 84.
導電体層のRu膜94を介して反強磁性結合したCoPt膜93、95は、第1磁性体層11としてのリファレンス層(ピン層として機能)である。リファレンス層は、Wプラグ70を介して第1の配線(図示されず)に接続されている。MgO膜78は、磁化記録層とリファレンス層との間に設けられたトンネルバリヤ層12である。これら磁化記録層の磁化自由領域15(フリー層)、リファレンス層(ピン層)、及びトンネルバリヤ層がMTJ素子(磁気抵抗記憶素子1)として機能する。
The CoPt films 93 and 95 antiferromagnetically coupled via the Ru film 94 of the conductor layer are reference layers (functioning as pinned layers) as the first magnetic layer 11. The reference layer is connected to the first wiring (not shown) via the W plug 70. The MgO film 78 is the tunnel barrier layer 12 provided between the magnetization recording layer and the reference layer. The magnetization free region 15 (free layer), reference layer (pinned layer), and tunnel barrier layer of the magnetization recording layer function as an MTJ element (magnetoresistance memory element 1).
次に、図15を参照して、本発明の第3の実施例に係るメモリセルの主要部(MTJ素子を含む)の製造方法について説明する。まず、選択トランジスタを含むトランジスタや、ビット線やワード線を含む配線を半導体基板(図示されず)上に形成する。その後、その半導体基板上に、層間絶縁膜としてのSiO2膜71を300nmの膜厚で形成する。そのSiO2膜71の所定の位置に下層配線と接続するWプラグ70を形成する。次に、膜厚2nmのTa膜100、膜厚20nmのPt膜101、膜厚4nmのリファレンス層下層磁性体のCoPt膜93、膜厚0.8nmのリファレンス層同士を反強磁性結合させる導電体層のRu膜94、膜厚4nmのリファレンス層上層磁性体のCoPt膜95、膜厚1nmのトンネル絶縁膜MgO膜78、膜厚2nmのフリー層CoPt膜96、膜厚1nmのRu膜102、膜厚30nmのPtMn膜103、及び膜厚100nmのTa膜83をそれぞれスパッタリング法により成膜する。フォトリソグラフィ技術とミリングによりTa膜83とPtMn膜103をパターニングしたのち、全面に、膜厚3nmのCoPt膜104、及び膜厚100nmのTa膜84をそれぞれスパッタリング法により成膜し、パターニングする。275℃2時間1T(テスラ)程度の膜面垂直方向磁場中でアニールし、PtMn膜103を用いた第1ピン領域(第1磁化固定領域)の磁化方向を設定する。次に、室温で逆向きに磁場をかけ、CoPt膜104、93、95を用いた第2ピン領域(第2磁化固定領域)及びリファレンス層の磁化方向を逆向きに設定する。これにより二つのピン領域の磁化方向が逆向きに設定できる。このため、フリー層(磁化記録層)には磁壁が形成される。続いて、フリー層部分をレジストとピン層とをマスクにして加工し、形成する。以降は第2の実施例と同様である。これらの工程によりMTJ素子(磁気抵抗記憶素子1)が形成できる。
Next, with reference to FIGS. 15A to 15C, description will be made on a manufacturing method of the main part (including the MTJ element) of the memory cell according to the third embodiment of the present invention. First, a transistor including a selection transistor and a wiring including a bit line and a word line are formed on a semiconductor substrate (not shown). Thereafter, a SiO 2 film 71 as an interlayer insulating film is formed with a film thickness of 300 nm on the semiconductor substrate. A W plug 70 connected to the lower layer wiring is formed at a predetermined position of the SiO 2 film 71. Next, a Ta film 100 having a thickness of 2 nm, a Pt film 101 having a thickness of 20 nm, a CoPt film 93 of a magnetic material having a lower reference layer having a thickness of 4 nm, and a conductor that antiferromagnetically couples the reference layers having a thickness of 0.8 nm. Ru film 94 as a layer, CoPt film 95 as a reference layer upper layer magnetic material with a thickness of 4 nm, tunnel insulating film MgO film 78 with a thickness of 1 nm, free CoPt film 96 with a thickness of 2 nm, Ru film 102 with a thickness of 1 nm, film A PtMn film 103 with a thickness of 30 nm and a Ta film 83 with a thickness of 100 nm are formed by sputtering. After patterning the Ta film 83 and the PtMn film 103 by photolithography and milling, a CoPt film 104 having a thickness of 3 nm and a Ta film 84 having a thickness of 100 nm are respectively formed on the entire surface by sputtering and patterned. Annealing is performed in a film surface vertical direction magnetic field of about 1 T (Tesla) at 275 ° C. for 2 hours, and the magnetization direction of the first pin region (first magnetization fixed region) using the PtMn film 103 is set. Next, a magnetic field is applied in the opposite direction at room temperature, and the magnetization directions of the second pin region (second magnetization fixed region) and the reference layer using the CoPt films 104, 93, and 95 are set in the opposite directions. Thereby, the magnetization directions of the two pin regions can be set in opposite directions. For this reason, a domain wall is formed in a free layer (magnetization recording layer). Subsequently, the free layer portion is processed and formed using the resist and the pinned layer as a mask. The subsequent steps are the same as in the second embodiment. Through these steps, the MTJ element (magnetoresistance memory element 1) can be formed.
次に、メモリセル及びメモリセルを含む磁気抵抗記憶装置の構成及び動作について説明する。
まず、メモリセルの構成例については、第1の実施例に係る図8の場合と基本的に同じである。ただし、トランジスタTRa、TRbはそれぞれ磁化記録層の第1磁化固定領域14a及び第2磁化固定領域14bに接続され、読み出しワード線WRはリファレンス層に接続されている。この場合、第1ピン領域に接続される第2の配線(AlCu膜89)及び第2ピン領域に接続される第3の配線(AlCu膜89)は、それぞれビット線BLa、BLbである。リファレンス層に接続される第1の配線は、読み出しワード線WRである。 Next, the configuration and operation of the memory cell and the magnetoresistive memory device including the memory cell will be described.
First, the configuration example of the memory cell is basically the same as the case of FIG. 8 according to the first embodiment. However, the transistors TRa and TRb are respectively connected to the first magnetization fixedregion 14a and the second magnetization fixed region 14b of the magnetization recording layer, and the read word line WR is connected to the reference layer. In this case, the second wiring (AlCu film 89) connected to the first pin region and the third wiring (AlCu film 89) connected to the second pin region are the bit lines BLa and BLb, respectively. The first wiring connected to the reference layer is the read word line WR.
まず、メモリセルの構成例については、第1の実施例に係る図8の場合と基本的に同じである。ただし、トランジスタTRa、TRbはそれぞれ磁化記録層の第1磁化固定領域14a及び第2磁化固定領域14bに接続され、読み出しワード線WRはリファレンス層に接続されている。この場合、第1ピン領域に接続される第2の配線(AlCu膜89)及び第2ピン領域に接続される第3の配線(AlCu膜89)は、それぞれビット線BLa、BLbである。リファレンス層に接続される第1の配線は、読み出しワード線WRである。 Next, the configuration and operation of the memory cell and the magnetoresistive memory device including the memory cell will be described.
First, the configuration example of the memory cell is basically the same as the case of FIG. 8 according to the first embodiment. However, the transistors TRa and TRb are respectively connected to the first magnetization fixed
次に、メモリセルを含む磁気抵抗記憶装置の構成例については、第1の実施例に係る図9の場合と基本的に同じである。
Next, the configuration example of the magnetoresistive memory device including the memory cells is basically the same as that in FIG. 9 according to the first embodiment.
次に、図15~図16、図8~図9に示されるMRAMにおける書き込み方法、読み出し方法について説明する。
まず、書き込みを行う場合について説明する。制御回路194の制御に基づいて、X側制御回路192は、選択ワード線WLを選択する。それにより、選択ワード線WLが“high”レベルにプルアップされ、トランジスタTRa、TRbが“ON”になる。また、Y側制御回路193は、選択ビット線BLa、BLbを選択する。それにより、選択ビット線BLa、BLbのいずれか一方が“high”レベルにプルアップされ、他方が“Low”レベルにプルダウンされる。その結果、磁化記録層(第2磁性体層13)の一方のピン領域から他方のピン領域へ書き込み電流Iwが流れる。選択ビット線BLa、BLbのどちらを“high”レベルにプルアップし、どちらを“Low”レベルにプルダウンするかは、当該磁気抵抗効果素子1に書き込まれるべきデータにより決定される。すなわち、磁化記録層(第2磁性体層13)に流す書込み電流Iwの方向に応じて決定される。X側制御回路192、Y側制御回路193、ワード線WL及び読み出しワード線WR、ビット線BLa、BLb、それらを制御する制御回路194は、書き込み部4を構成している。 Next, a writing method and a reading method in the MRAM shown in FIGS. 15 to 16 and FIGS. 8 to 9 will be described.
First, a case where writing is performed will be described. Based on the control of thecontrol circuit 194, the X-side control circuit 192 selects the selected word line WL. As a result, the selected word line WL is pulled up to the “high” level, and the transistors TRa and TRb are turned “ON”. The Y-side control circuit 193 selects the selected bit lines BLa and BLb. Accordingly, one of the selected bit lines BLa and BLb is pulled up to the “high” level, and the other is pulled down to the “Low” level. As a result, the write current Iw flows from one pin region of the magnetization recording layer (second magnetic layer 13) to the other pin region. Which of the selected bit lines BLa and BLb is pulled up to a “high” level and which is pulled down to a “Low” level is determined by data to be written in the magnetoresistive element 1. That is, it is determined according to the direction of the write current Iw flowing through the magnetization recording layer (second magnetic layer 13). The X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit lines BLa and BLb, and the control circuit 194 that controls them constitute the writing unit 4.
まず、書き込みを行う場合について説明する。制御回路194の制御に基づいて、X側制御回路192は、選択ワード線WLを選択する。それにより、選択ワード線WLが“high”レベルにプルアップされ、トランジスタTRa、TRbが“ON”になる。また、Y側制御回路193は、選択ビット線BLa、BLbを選択する。それにより、選択ビット線BLa、BLbのいずれか一方が“high”レベルにプルアップされ、他方が“Low”レベルにプルダウンされる。その結果、磁化記録層(第2磁性体層13)の一方のピン領域から他方のピン領域へ書き込み電流Iwが流れる。選択ビット線BLa、BLbのどちらを“high”レベルにプルアップし、どちらを“Low”レベルにプルダウンするかは、当該磁気抵抗効果素子1に書き込まれるべきデータにより決定される。すなわち、磁化記録層(第2磁性体層13)に流す書込み電流Iwの方向に応じて決定される。X側制御回路192、Y側制御回路193、ワード線WL及び読み出しワード線WR、ビット線BLa、BLb、それらを制御する制御回路194は、書き込み部4を構成している。 Next, a writing method and a reading method in the MRAM shown in FIGS. 15 to 16 and FIGS. 8 to 9 will be described.
First, a case where writing is performed will be described. Based on the control of the
すなわち、書き込み部4は、データを書き込むメモリセル180の磁化記録層(CoPt膜96)の両端部の2つのピン領域14a(PtMn膜103/Ru膜102/CoPt膜96)、14b(CoPt膜104/Ru膜102/CoPt膜96)の一方から他方のへ書き込み電流Iw、例えば0.5mAを流す。書き込み電流Iwにより磁化記録層内の磁壁部分でスピン電子の授受が行われる。これにより、磁化記録層に流す書き込み電流Iwの方向により2つのピン領域14a、14bのいずれかの磁化方向に磁化自由領域15の磁化方向を設定できる。このように、書き込み電流Iwの方向により、MTJ素子へ所望のデータ“0”、“1”を書き込むことができる。
That is, the writing unit 4 includes two pin regions 14a (PtMn film 103 / Ru film 102 / CoPt film 96) and 14b (CoPt film 104) at both ends of the magnetization recording layer (CoPt film 96) of the memory cell 180 to which data is written. / Ru film 102 / CoPt film 96) is supplied with a write current Iw, for example, 0.5 mA from one to the other. Spin electrons are exchanged in the domain wall portion in the magnetization recording layer by the write current Iw. Thereby, the magnetization direction of the magnetization free region 15 can be set to one of the magnetization directions of the two pin regions 14a and 14b depending on the direction of the write current Iw flowing in the magnetization recording layer. Thus, desired data “0” and “1” can be written to the MTJ element according to the direction of the write current Iw.
次に、読み出しを行う場合について説明する。制御回路194の制御に基づいて、X側制御回路192は、選択ワード線WL及び選択読み出しワード線WRを選択する。それにより、選択ワード線WLが“high”レベルにプルアップされ、トランジスタTRa、TRbが“ON”になる。また、選択読み出しワード線WRからメモリセル180に所定の読み出し電流IRが供給される。一方、Y側制御回路193は、選択ビット線BLa、BLbを選択する。それにより、選択ビット線BLa、BLbのいずれか一方がグランドレベルに設定され、他方が“open”(フローティング)に設定される。このとき選択読み出しワード線WRから読み出し電流IRが、MTJ素子(第1磁性体層11、トンネルバリヤ層12、第2磁性体層13)を経由して選択ビット線BLa、BLbの一方へ流れる。読み出し電流IRが流される選択読み出しワード線WRの電位、又は、読み出し電流IRの大きさは、磁気抵抗効果による磁気抵抗効果素子1の抵抗値の変化に依存する。したがって、同様に読み出し電流IRが流されるリファレンスセル180rのリファレンスビット線BLrの出力(又は参照電圧発生回路からの参照電圧)と比較して、この抵抗値の変化を電圧信号、又は電流信号として、例えばX側制御回路192又はY側制御回路193において検知することにより高速での読み出しが可能となる。X側制御回路192、Y側制御回路193、ワード線WL及び読み出しワード線WR、ビット線BLa、BLb、それらを制御する制御回路194は、評価部3を構成している。
Next, a case where reading is performed will be described. Based on the control of the control circuit 194, the X-side control circuit 192 selects the selected word line WL and the selected read word line WR. As a result, the selected word line WL is pulled up to the “high” level, and the transistors TRa and TRb are turned “ON”. A predetermined read current IR is supplied to the memory cell 180 from the selected read word line WR. On the other hand, the Y-side control circuit 193 selects the selected bit lines BLa and BLb. Accordingly, one of the selected bit lines BLa and BLb is set to the ground level, and the other is set to “open” (floating). At this time, the read current IR flows from the selected read word line WR to one of the selected bit lines BLa and BLb via the MTJ element (the first magnetic layer 11, the tunnel barrier layer 12, and the second magnetic layer 13). The potential of the selected read word line WR through which the read current IR flows or the magnitude of the read current IR depends on a change in the resistance value of the magnetoresistive element 1 due to the magnetoresistive effect. Therefore, compared with the output of the reference bit line BLr of the reference cell 180r through which the read current IR flows (or the reference voltage from the reference voltage generation circuit), the change in resistance value is expressed as a voltage signal or a current signal. For example, the detection can be performed at a high speed by the detection by the X-side control circuit 192 or the Y-side control circuit 193. The X-side control circuit 192, the Y-side control circuit 193, the word line WL and the read word line WR, the bit lines BLa and BLb, and the control circuit 194 for controlling them constitute the evaluation unit 3.
すなわち、評価部3は、選択ビット線BLa(又はBLb)としてのAlCu膜89を介して磁化記録層(CoPt膜96)を0Vにし、選択読み出しワード線WRを介してリファレンス層(CoPt膜93/Ru膜94/CoPt膜95)から読み出し電流20μAを印加する。MTJ素子(CoPt膜93/Ru膜94/CoPt膜95、MgO膜78、CoPt膜96)がデータ“0”及び“1”によりそれぞれ10kΩ及び20kΩの抵抗値となるとき、ピン領域に接続された選択トランジスタTRa(又はTRb)のオン抵抗が1kΩとすると、MTJ素子を介した読み出し配線の電位はそれぞれ0.21V及び0.41Vを示す。評価部3の差動センスアンプは、その読み出し配線の電位、及び、0.3Vに設定された参照電位Vref(又は参照セルの出力電位)を入力として、データを判別することができる。ただし、ピン領域14a、14bとリファレンス層との間の抵抗値はデータに依らず変化しないため、本構造では抵抗変化量が小さいという特徴がある。
That is, the evaluation unit 3 sets the magnetization recording layer (CoPt film 96) to 0 V via the AlCu film 89 as the selected bit line BLa (or BLb), and the reference layer (CoPt film 93/90) via the selective read word line WR. A read current of 20 μA is applied from the Ru film 94 / CoPt film 95). When MTJ elements (CoPt film 93 / Ru film 94 / CoPt film 95, MgO film 78, CoPt film 96) have resistance values of 10 kΩ and 20 kΩ, respectively, by data “0” and “1”, they are connected to the pin region. When the on-resistance of the selection transistor TRa (or TRb) is 1 kΩ, the potential of the read wiring through the MTJ element is 0.21 V and 0.41 V, respectively. The differential sense amplifier of the evaluation unit 3 can discriminate data by using the potential of the read wiring and the reference potential Vref (or the output potential of the reference cell) set to 0.3V as inputs. However, since the resistance value between the pin regions 14a and 14b and the reference layer does not change regardless of data, this structure has a feature that the resistance change amount is small.
次に、メモリセルのスクリーニング方法について説明する。図17A及び図17Bは、本発明の第3の実施例に係るメモリセルのスクリーニング方法を示す概念図である。図17Aに示すように、まず、書き込み部4は、図の上方向(+z方向)に磁化が向くように、その磁化の向きに対応するデータの書き込みをメモリセル180に行う。すなわち、磁化記録層(第1磁性体層11)の磁化自由領域15に、書き込むデータに対応した-x方向に書き込み電流Iw1を流す。それにより、書き込みが良好に行われた場合、所望の方向(+z方向)に向いた磁化M1が生成される。このとき、磁化M1は、容易軸方向(+側)に平行な方向である。データの書き込み動作は既述のとおりである。
Next, a memory cell screening method will be described. 17A and 17B are conceptual diagrams showing a memory cell screening method according to a third embodiment of the present invention. As shown in FIG. 17A, first, the writing unit 4 writes data corresponding to the magnetization direction to the memory cell 180 so that the magnetization is directed upward (+ z direction) in the figure. That is, the write current Iw1 is passed through the magnetization free region 15 of the magnetization recording layer (first magnetic layer 11) in the −x direction corresponding to the data to be written. Thereby, when writing is performed satisfactorily, magnetization M1 oriented in a desired direction (+ z direction) is generated. At this time, the magnetization M1 is a direction parallel to the easy axis direction (+ side). The data write operation is as described above.
次に、評価部3は、書き込みが行われたメモリセル180の抵抗値を評価することによりデータを読み出す。制御回路194としての制御部5は、評価部3の読み出したデータに基づいて、書き込んだデータが実際に書き込まれているか、すなわち磁化M1の向きが所望の方向に向いているかを評価する。その結果、書き込んだデータと読み出したデータとが一致していない場合、そのメモリセル180を不良ビットとして検出し、記憶する。データの読み出し動作は既述のとおりである。
Next, the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written. The control unit 5 as the control circuit 194 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M1 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell 180 is detected as a defective bit and stored. The data read operation is as described above.
続いて、制御回路194の制御に基づいて、Y側制御回路193は、選択ビット線BLaを選択する。それにより、メモリセル180の近傍を通る選択ビット線BLaに所定のスクリーニング電流Is1が流される。その選択ビット線BLaに流れるスクリーニング電流Is1により発生する磁場Hs1は、メモリセル180のフリー層(磁化自由領域15(第1磁性体層11))の磁化に影響を及ぼす。Y側制御回路192、ビット線BLa、それらを制御する制御回路194は、印加部2を構成している。
Subsequently, based on the control of the control circuit 194, the Y-side control circuit 193 selects the selected bit line BLa. As a result, a predetermined screening current Is1 flows through the selected bit line BLa passing through the vicinity of the memory cell 180. The magnetic field Hs1 generated by the screening current Is1 flowing through the selected bit line BLa affects the magnetization of the free layer (magnetization free region 15 (first magnetic layer 11)) of the memory cell 180. The Y-side control circuit 192, the bit line BLa, and the control circuit 194 that controls them constitute the application unit 2.
すなわち、印加部2は、選択ビット線BLaに-y方向にスクリーニング電流Is1を流し、フリー層(磁化自由領域15(第1磁性体層11))に下向き(-z方向)の成分を有する磁場Hs1を印加する。この場合、磁場Hs1の向き(-z方向)はフリー層の容易軸方向(-側)からやや傾き、フリー層の磁化方向(+z方向)とは逆向きの成分を持つ向きとなる。このとき、図4Aや図4Bに示されるような磁気特性のメモリセル180では、正常なメモリセルでは磁化反転が発生しない磁場Hs1により磁化反転が発生する。
That is, the application unit 2 causes the screening current Is1 to flow in the −y direction through the selected bit line BLa, and a magnetic field having a downward (−z direction) component in the free layer (magnetization free region 15 (first magnetic layer 11)). Apply Hs1. In this case, the direction of the magnetic field Hs1 (−z direction) is slightly inclined from the easy axis direction (−side) of the free layer, and has a direction opposite to the magnetization direction (+ z direction) of the free layer. At this time, in the memory cell 180 having magnetic characteristics as shown in FIGS. 4A and 4B, magnetization reversal occurs due to the magnetic field Hs1 that does not cause magnetization reversal in a normal memory cell.
次に、スクリーニング電流Is1の停止後、評価部3は、そのメモリセル180のデータの読み出し処理を行う。制御部5は、不良ビットを検出、記憶する。データの読み出し動作及び不良ビットの判定は既述のとおりである。
Next, after the screening current Is1 is stopped, the evaluation unit 3 performs a data read process for the memory cell 180. The control unit 5 detects and stores defective bits. The data read operation and defective bit determination are as described above.
更に、これらの手順を、逆向きに磁化M2を書き込み後、逆向きの磁場Hs2を印加することで実施する。すなわち、図17Bに示すように、まず、書き込み部4は、図の下方向(-z方向)に磁化が向くように、その磁化の向きに対応するデータの書き込みをメモリセル180に行う。すなわち、磁化記録層(第1磁性体層11)の磁化自由領域15に、書き込むデータに対応した+x方向に書き込み電流Iw2を流す。それにより、書き込みが良好に行われた場合、所望の方向(-z方向)に向いた磁化M2が生成される。このとき、磁化M2は、容易軸方向(-側)に平行な方向である。次に、評価部3は、書き込みが行われたメモリセル180の抵抗値を評価することによりデータを読み出す。制御部5は、評価部3の読み出したデータに基づいて、書き込んだデータが実際に書き込まれているか、すなわち磁化M2の向きが所望の方向に向いているかを評価する。その結果、書き込んだデータと読み出したデータとが一致していない場合、そのMTJ素子を有するメモリセルを不良ビットとして検出し、記憶する。
Furthermore, these procedures are performed by applying a magnetic field Hs2 in the reverse direction after writing the magnetization M2 in the reverse direction. That is, as shown in FIG. 17B, the writing unit 4 first writes data corresponding to the magnetization direction to the memory cell 180 so that the magnetization is directed downward (−z direction) in the figure. That is, the write current Iw2 is passed through the magnetization free region 15 of the magnetization recording layer (first magnetic layer 11) in the + x direction corresponding to the data to be written. Thereby, when writing is performed satisfactorily, magnetization M2 oriented in a desired direction (−z direction) is generated. At this time, the magnetization M2 is a direction parallel to the easy axis direction (− side). Next, the evaluation unit 3 reads data by evaluating the resistance value of the memory cell 180 to which data has been written. The control unit 5 evaluates based on the data read by the evaluation unit 3 whether the written data is actually written, that is, whether the direction of the magnetization M2 is in a desired direction. As a result, when the written data and the read data do not match, the memory cell having the MTJ element is detected as a defective bit and stored.
続いて、印加部2は、選択ビット線BLaに+y方向にスクリーニング電流Is2を流し、フリー層(磁化自由領域15(第1磁性体層11))に上向き(+z方向)の成分を有する磁場Hs2を印加する。この場合、磁場Hs2の向き(+z方向)はフリー層の容易軸方向(+側)からやや傾き、フリー層の磁化方向(-z方向)とは逆向きの成分を持つ向きとなる。このとき、図4Aや図4Bに示されるような磁気特性のメモリセル180では、正常なメモリセルでは磁化反転が発生しない磁場Hs2により磁化反転が発生する。次に、スクリーニング電流Is2の停止後、評価部3は、前述と同様に読み出し処理を行い、不良ビットを検出、記憶する。
Subsequently, the application unit 2 supplies a screening current Is2 to the selected bit line BLa in the + y direction, and a magnetic field Hs2 having an upward (+ z direction) component in the free layer (magnetization free region 15 (first magnetic layer 11)). Is applied. In this case, the direction (+ z direction) of the magnetic field Hs2 is slightly inclined from the easy axis direction (+ side) of the free layer, and has a direction opposite to the magnetization direction (−z direction) of the free layer. At this time, in the memory cell 180 having magnetic characteristics as shown in FIGS. 4A and 4B, magnetization reversal occurs due to the magnetic field Hs2 that does not cause magnetization reversal in a normal memory cell. Next, after the screening current Is2 is stopped, the evaluation unit 3 performs a reading process in the same manner as described above to detect and store a defective bit.
以上の各一連の作業で不良として記憶されたメモリセルは、メモリセルとして使わず、制御部5は、代替えのメモリセルを割り当てるよう制御する。
The memory cells stored as defective in each of the series of operations described above are not used as memory cells, and the control unit 5 performs control so that alternative memory cells are allocated.
本実施例では、スピン電子注入による磁壁移動書き込み方式のメモリセルでも、スクリーニング処理において、スクリーニング磁場Hsを印加してアステロイドカーブをシフトさせることで、磁気特性が異常なメモリセルに磁化反転又は大きな抵抗変化を起こさせ、これを検出、判別することにより、効果的に不良セルを検出できるようになる。
In the present embodiment, even in a domain wall motion writing type memory cell by spin electron injection, a screening magnetic field Hs is applied in the screening process to shift the asteroid curve, whereby a memory cell having an abnormal magnetic characteristic is reversed in magnetization or large. By causing a resistance change and detecting and discriminating this, a defective cell can be detected effectively.
また、本発明は上記各実施例に限定されず、本発明の技術思想の範囲内において、各実施例は適宜変更され得ることは明らかである。また、各実施例に示される技術は、互いに矛盾の発生しない限り組み合わせて実施することが可能である。
Further, the present invention is not limited to the above-described embodiments, and it is obvious that each embodiment can be appropriately changed within the scope of the technical idea of the present invention. Further, the techniques shown in the embodiments can be implemented in combination as long as no contradiction occurs.
以上説明したように、本発明によれば、スクリーニング処理において、スクリーニング磁場Hsを印加してアステロイドカーブをシフトさせることで、磁気特性が異常なセルに磁化反転、もしくは大きな抵抗変化を起こさせることにより、効率的に磁気特性が異常なセルを検出することが可能となる。それにより、信頼性の高い磁気抵抗記憶装置が実現できる。
As described above, according to the present invention, in the screening process, by applying the screening magnetic field Hs and shifting the asteroid curve, magnetization reversal or large resistance change is caused in a cell having abnormal magnetic characteristics. Thus, it is possible to efficiently detect a cell having abnormal magnetic characteristics. Thereby, a highly reliable magnetoresistive memory device can be realized.
本発明は、以下のようにも記載することができる。ただし、その内容に限定されない。
磁気抵抗記憶装置のスクリーニング方法は、第1の磁性体を含み、前記第1の磁性体の磁化の向きでデータを記憶する記憶素子を備える磁気抵抗記憶装置のスクリーニング方法である。磁気抵抗記憶装置のスクリーニング方法は、前記第1の磁性体の磁化の向きを設定するステップと、前記第1の磁性体の磁化容易軸方向及び磁化困難軸方向とは異なる向きであり、前記第1の磁性体の磁化の向きとは逆向きの方向成分を含む第1磁場を前記記憶素子に印加するステップと、前記記憶素子の抵抗を評価するステップと、前記評価結果に基づいて前記記憶素子が不良か否かを判別するステップと、前記不良と判別された前記記憶素子を使用しないように記憶かつ/又は設定するステップとを具備する。 The present invention can also be described as follows. However, the content is not limited.
The screening method for a magnetoresistive storage device is a screening method for a magnetoresistive storage device that includes a first magnetic body and includes a storage element that stores data in the direction of magnetization of the first magnetic body. The method for screening a magnetoresistive storage device includes a step of setting a magnetization direction of the first magnetic body and a direction different from a magnetization easy axis direction and a magnetization difficult axis direction of the first magnetic body, Applying a first magnetic field including a direction component opposite to the direction of magnetization of one magnetic body to the memory element, evaluating a resistance of the memory element, and based on the evaluation result, the memory element Determining whether or not the memory element is defective, and storing and / or setting the storage element determined to be defective so as not to be used.
磁気抵抗記憶装置のスクリーニング方法は、第1の磁性体を含み、前記第1の磁性体の磁化の向きでデータを記憶する記憶素子を備える磁気抵抗記憶装置のスクリーニング方法である。磁気抵抗記憶装置のスクリーニング方法は、前記第1の磁性体の磁化の向きを設定するステップと、前記第1の磁性体の磁化容易軸方向及び磁化困難軸方向とは異なる向きであり、前記第1の磁性体の磁化の向きとは逆向きの方向成分を含む第1磁場を前記記憶素子に印加するステップと、前記記憶素子の抵抗を評価するステップと、前記評価結果に基づいて前記記憶素子が不良か否かを判別するステップと、前記不良と判別された前記記憶素子を使用しないように記憶かつ/又は設定するステップとを具備する。 The present invention can also be described as follows. However, the content is not limited.
The screening method for a magnetoresistive storage device is a screening method for a magnetoresistive storage device that includes a first magnetic body and includes a storage element that stores data in the direction of magnetization of the first magnetic body. The method for screening a magnetoresistive storage device includes a step of setting a magnetization direction of the first magnetic body and a direction different from a magnetization easy axis direction and a magnetization difficult axis direction of the first magnetic body, Applying a first magnetic field including a direction component opposite to the direction of magnetization of one magnetic body to the memory element, evaluating a resistance of the memory element, and based on the evaluation result, the memory element Determining whether or not the memory element is defective, and storing and / or setting the storage element determined to be defective so as not to be used.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記第1磁場は、前記磁化容易軸方向に対して45度の方向成分が、前記磁化容易軸方向の成分より大きくても良い。
In the above-described screening method for a magnetoresistive storage device, the first magnetic field may have a directional component of 45 degrees with respect to the easy axis direction greater than the easy axis direction component.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記第1磁場は、前記磁化容易軸方向に対して45度の方向成分が、前記磁化困難軸方向の成分より大きくても良い。
In the magnetoresistive storage device screening method, the first magnetic field may have a direction component of 45 degrees with respect to the easy axis direction larger than a component in the hard axis direction.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記第1磁場の方向は、前記磁化容易軸方向に対して略45度の方向であっても良い。
In the above-described screening method for a magnetoresistive storage device, the direction of the first magnetic field may be approximately 45 degrees with respect to the easy axis direction.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記第1磁場の方向は、前記第1の磁性体の磁化の向きを設定する第2磁場の方向に対して略90度の方向であっても良い。
In the above-described screening method for a magnetoresistive storage device, the direction of the first magnetic field may be approximately 90 degrees with respect to the direction of the second magnetic field that sets the direction of magnetization of the first magnetic body. .
上記の磁気抵抗記憶装置のスクリーニング方法において、前記判別するステップは、前記評価結果として、前記第1磁場の印加の終了後における前記記憶素子の抵抗値又は前記抵抗値と相関がある特性値を用いても良い。
In the magnetoresistive memory device screening method, the step of determining uses, as the evaluation result, a resistance value of the memory element after the application of the first magnetic field or a characteristic value correlated with the resistance value is used. May be.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記判別するステップは、前記評価結果として、前記第1磁場の印加中における前記記憶素子の抵抗値又は前記抵抗値と相関がある特性値を用いても良い。
In the magnetoresistive memory device screening method, the determining step may use, as the evaluation result, a resistance value of the memory element during application of the first magnetic field or a characteristic value correlated with the resistance value. good.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記判別するステップは、前記評価結果として、前記第1磁場の印加前における前記記憶素子の抵抗値若しくは前記抵抗値と相関がある特性値、又は、前記第1磁場の印加の終了後における前記記憶素子の抵抗値若しくは抵抗値と相関がある特性値と、前記第1磁場の印加中における前記記憶素子の抵抗値若しくは前記抵抗値と相関がある特性値とを用いても良い。
In the magnetoresistive storage device screening method, the determining step includes, as the evaluation result, a resistance value of the storage element before application of the first magnetic field or a characteristic value correlated with the resistance value, or the A characteristic value correlated with the resistance value or resistance value of the memory element after the application of the first magnetic field, and a characteristic value correlated with the resistance value or the resistance value of the memory element during the application of the first magnetic field. And may be used.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記判別するステップは、前記評価結果としての複数の前記抵抗値又は複数の前記抵抗値と相関がある特性値の大小、又は、それらの差と所定の値との大小関係に基づいて、前記記憶素子が不良か否かを判別するステップを備えても良い。
In the screening method of the magnetoresistive storage device, the determining step includes a plurality of the resistance values as the evaluation result or a characteristic value correlated with the plurality of resistance values, or a difference between them and a predetermined value. A step of determining whether or not the storage element is defective based on a magnitude relationship with a value may be provided.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記印加するステップは、前記第1磁場を印加している時間の少なくとも一部において、前記記憶素子の温度を室温より高くするステップを備えても良い。
In the above-described screening method for a magnetoresistive memory device, the applying step may include a step of raising the temperature of the memory element above room temperature during at least a part of the time during which the first magnetic field is applied.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記判別するステップは、前記判別を、通常の読み出し時の不良セル判別部を用いて行っても良い。
In the above-described screening method for a magnetoresistive memory device, the step of determining may be performed using a defective cell determining unit during normal reading.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記判別するステップは、通常の読み出し時の判定基準とは別のスクリーニング時の判定基準を参照して、前記記憶素子が不良か否かを判別するステップを備えても良い。
In the screening method of the magnetoresistive memory device, the determining step refers to a determination criterion at the time of screening different from a determination criterion at the time of normal reading, and determines whether or not the storage element is defective May be provided.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記印加するステップは、複数の方向から複数の前記第1磁場を前記記憶素子に印加するステップを備える。前記評価するステップは、前記複数の第1磁場に関して前記記憶素子の抵抗を評価するステップを備える。前記判別するステップは、前記複数の評価結果基づいて、前記記憶素子が不良か否かを判別するステップを備えても良い。
In the above-described screening method for a magnetoresistive memory device, the applying step includes a step of applying a plurality of the first magnetic fields to the memory element from a plurality of directions. The step of evaluating includes a step of evaluating a resistance of the memory element with respect to the plurality of first magnetic fields. The step of determining may include a step of determining whether or not the storage element is defective based on the plurality of evaluation results.
上記の磁気抵抗記憶装置のスクリーニング方法において、前記印加ステップ、前記評価ステップ、及び、前記判別ステップを、前記第1の磁性体の有する複数の磁化状態磁の各々に対して行っても良い。
In the above-described screening method for a magnetoresistive storage device, the application step, the evaluation step, and the discrimination step may be performed on each of a plurality of magnetization state magnetism possessed by the first magnetic body.
本発明の磁気抵抗記憶装置は、第1の磁性体を含み、前記第1の磁性体の磁化の向きでデータを記憶する記憶素子と、前記第1の磁性体の磁化の向きを設定する書き込み部と、前記第1の磁性体の磁化容易軸方向及び磁化困難軸方向とは異なる向きであり、前記第1の磁性体の磁化の向きとは逆向きの方向成分を含む第1磁場を前記記憶素子に印加する印加部と、前記記憶素子の抵抗を評価する評価部と、前記評価結果に基づいて前記記憶素子が不良か否かを判別し、前記不良と判別された前記記憶素子を使用しないように記憶及び/又は設定する制御部とを具備する。
A magnetoresistive storage device according to the present invention includes a first magnetic body, a storage element that stores data in a magnetization direction of the first magnetic body, and a write that sets a magnetization direction of the first magnetic body And a first magnetic field including a direction component opposite to a magnetization direction of the first magnetic body and having a direction component opposite to the magnetization direction of the first magnetic body. An application unit for applying to the storage element, an evaluation unit for evaluating the resistance of the storage element, and determining whether or not the storage element is defective based on the evaluation result, and using the storage element determined to be defective And a control unit for storing and / or setting so as not to be performed.
この出願は、2009年4月28日に出願された特許出願番号2009-109590号の日本特許出願に基づいており、その出願による優先権の利益を主張し、その出願の開示は、引用することにより、そっくりそのままここに組み込まれている。
This application is based on Japanese Patent Application No. 2009-109590 filed on April 28, 2009, and claims the benefit of the priority of the application, the disclosure of that application should be cited Is incorporated here as it is.
以上、実施の形態を参照して本発明を説明したが、本発明は上記実施の形態に限定されるものではない。本発明の構成や詳細には、本発明のスコープ内で当業者が理解しうる様々な変更をすることができる。
Although the present invention has been described above with reference to the embodiment, the present invention is not limited to the above embodiment. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.
Claims (15)
- 第1の磁性体を含み、前記第1の磁性体の磁化の向きでデータを記憶する記憶素子を備える磁気抵抗記憶装置のスクリーニング方法であって、
前記第1の磁性体の磁化の向きを設定するステップと、
前記第1の磁性体の磁化容易軸方向及び磁化困難軸方向とは異なる向きであり、前記第1の磁性体の磁化の向きとは逆向きの方向成分を含む第1磁場を前記記憶素子に印加するステップと、
前記記憶素子の抵抗を評価するステップと、
前記評価結果に基づいて前記記憶素子が不良か否かを判別するステップと、
前記不良と判別された前記記憶素子を使用しないように記憶かつ/又は設定するステップと
を具備する
磁気抵抗記憶装置のスクリーニング方法。 A screening method for a magnetoresistive storage device including a first magnetic body and comprising a storage element that stores data in the direction of magnetization of the first magnetic body,
Setting the direction of magnetization of the first magnetic body;
A first magnetic field having a direction component different from an easy magnetization axis direction and a hard magnetization axis direction of the first magnetic body and having a direction component opposite to the magnetization direction of the first magnetic body is applied to the storage element. Applying, and
Evaluating the resistance of the memory element;
Determining whether or not the memory element is defective based on the evaluation result;
A method of screening a magnetoresistive storage device, comprising: storing and / or setting the storage element determined to be defective so as not to be used. - 請求項1に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記第1磁場は、前記磁化容易軸方向に対して45度の方向成分が、前記磁化容易軸方向の成分より大きい
磁気抵抗記憶装置のスクリーニング方法。 The method for screening a magnetoresistive storage device according to claim 1,
A screening method for a magnetoresistive storage device, wherein the first magnetic field has a direction component of 45 degrees with respect to the easy axis direction of magnetization greater than a component of the easy axis direction. - 請求項1又は2に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記第1磁場は、前記磁化容易軸方向に対して45度の方向成分が、前記磁化困難軸方向の成分より大きい
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to claim 1 or 2,
A screening method for a magnetoresistive storage device, wherein the first magnetic field has a direction component of 45 degrees with respect to the easy axis direction of magnetization greater than a component of the hard axis direction. - 請求項1乃至3のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記第1磁場の方向は、前記磁化容易軸方向に対して略45度の方向である
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 1 to 3,
The method for screening a magnetoresistive storage device, wherein the direction of the first magnetic field is a direction of approximately 45 degrees with respect to the easy axis direction. - 請求項1乃至4のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記第1磁場の方向は、前記第1の磁性体の磁化の向きを設定する第2磁場の方向に対して略90度の方向である
請磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 1 to 4,
The method of screening a magnetoresistive storage device, wherein the direction of the first magnetic field is approximately 90 degrees with respect to the direction of the second magnetic field that sets the direction of magnetization of the first magnetic body. - 請求項1乃至5のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記判別するステップは、
前記評価結果として、前記第1磁場の印加の終了後における前記記憶素子の抵抗値又は前記抵抗値と相関がある特性値を用いる
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 1 to 5,
The step of determining includes
A screening method for a magnetoresistive memory device, wherein the evaluation result uses a resistance value of the memory element after the application of the first magnetic field or a characteristic value correlated with the resistance value. - 請求項1乃至5のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記判別するステップは、
前記評価結果として、前記第1磁場の印加中における前記記憶素子の抵抗値又は前記抵抗値と相関がある特性値を用いる
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 1 to 5,
The step of determining includes
A screening method for a magnetoresistive memory device, wherein the evaluation result uses a resistance value of the memory element during application of the first magnetic field or a characteristic value correlated with the resistance value. - 請求項1乃至5のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記判別するステップは、
前記評価結果として、前記第1磁場の印加前における前記記憶素子の抵抗値若しくは前記抵抗値と相関がある特性値、又は、前記第1磁場の印加の終了後における前記記憶素子の抵抗値若しくは抵抗値と相関がある特性値と、前記第1磁場の印加中における前記記憶素子の抵抗値若しくは前記抵抗値と相関がある特性値とを用いる
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 1 to 5,
The step of determining includes
As the evaluation result, a resistance value of the memory element before application of the first magnetic field or a characteristic value correlated with the resistance value, or a resistance value or resistance of the memory element after completion of application of the first magnetic field A screening method for a magnetoresistive memory device, using a characteristic value correlated with a value and a resistance value of the memory element during application of the first magnetic field or a characteristic value correlated with the resistance value. - 請求項6乃至8のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記判別するステップは、
前記評価結果としての複数の前記抵抗値又は複数の前記抵抗値と相関がある特性値の大小、又は、それらの差と所定の値との大小関係に基づいて、前記記憶素子が不良か否かを判別するステップを備える
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 6 to 8,
The step of determining includes
Whether or not the storage element is defective based on the magnitude of the plurality of resistance values or the characteristic values correlated with the plurality of resistance values as the evaluation result, or on the magnitude relationship between the difference and a predetermined value A method for screening a magnetoresistive storage device, comprising the step of: - 請求項1乃至9のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記印加するステップは、
前記第1磁場を印加している時間の少なくとも一部において、前記記憶素子の温度を室温より高くするステップを備える
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 1 to 9,
The applying step includes:
A method for screening a magnetoresistive storage device, comprising the step of raising the temperature of the storage element above room temperature during at least a part of time during which the first magnetic field is applied. - 請求項1乃至10のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記判別するステップは、
前記判別を、通常の読み出し時の不良セル判別部を用いて行う
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 1 to 10,
The step of determining includes
A method for screening a magnetoresistive memory device, wherein the discrimination is performed using a defective cell discrimination unit during normal reading. - 請求項1乃至11のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記判別するステップは、
通常の読み出し時の判定基準とは別のスクリーニング時の判定基準を参照して、前記記憶素子が不良か否かを判別するステップを備える
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 1 to 11,
The step of determining includes
A method for screening a magnetoresistive storage device, comprising: determining whether or not the storage element is defective by referring to a determination criterion at the time of screening different from a determination criterion at the time of normal reading. - 請求項1乃至12のいずれか一項に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記印加するステップは、
複数の方向から複数の前記第1磁場を前記記憶素子に印加するステップを備え、
前記評価するステップは、
前記複数の第1磁場に関して前記記憶素子の抵抗を評価するステップを備え、
前記判別するステップは、
前記複数の評価結果基づいて、前記記憶素子が不良か否かを判別するステップを備える
磁気抵抗記憶装置のスクリーニング方法。 In the screening method of the magnetoresistive memory device according to any one of claims 1 to 12,
The applying step includes:
Applying a plurality of the first magnetic fields from a plurality of directions to the storage element,
The step of evaluating comprises
Evaluating the resistance of the memory element with respect to the plurality of first magnetic fields;
The step of determining includes
A method for screening a magnetoresistive storage device, comprising: determining whether or not the storage element is defective based on the plurality of evaluation results. - 請求項13に記載の磁気抵抗記憶装置のスクリーニング方法において、
前記印加ステップ、前記評価ステップ、及び、前記判別ステップを、前記第1の磁性体の有する複数の磁化状態磁の各々に対して行う
磁気抵抗記憶装置のスクリーニング方法。 The method of screening a magnetoresistive memory device according to claim 13,
A method for screening a magnetoresistive storage device, wherein the applying step, the evaluating step, and the determining step are performed on each of a plurality of magnetization state magnetisms of the first magnetic body. - 第1の磁性体を含み、前記第1の磁性体の磁化の向きでデータを記憶する記憶素子と、
前記第1の磁性体の磁化の向きを設定する書き込み部と、
前記第1の磁性体の磁化容易軸方向及び磁化困難軸方向とは異なる向きであり、前記第1の磁性体の磁化の向きとは逆向きの方向成分を含む第1磁場を前記記憶素子に印加する印加部と、
前記記憶素子の抵抗を評価する評価部と、
前記評価結果に基づいて前記記憶素子が不良か否かを判別し、前記不良と判別された前記記憶素子を使用しないように記憶及び/又は設定する制御部と
を具備する
磁気抵抗記憶装置。 A storage element including a first magnetic body and storing data in a magnetization direction of the first magnetic body;
A writing unit for setting the direction of magnetization of the first magnetic body;
A first magnetic field having a direction component different from an easy magnetization axis direction and a hard magnetization axis direction of the first magnetic body and having a direction component opposite to the magnetization direction of the first magnetic body is applied to the storage element. An application unit to apply,
An evaluation unit for evaluating the resistance of the memory element;
A magnetoresistive storage device comprising: a control unit that determines whether or not the storage element is defective based on the evaluation result, and stores and / or sets the storage element determined not to be used.
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