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WO2009072547A1 - サイドチャネル攻撃耐性評価装置、方法及びプログラム - Google Patents

サイドチャネル攻撃耐性評価装置、方法及びプログラム Download PDF

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Publication number
WO2009072547A1
WO2009072547A1 PCT/JP2008/072025 JP2008072025W WO2009072547A1 WO 2009072547 A1 WO2009072547 A1 WO 2009072547A1 JP 2008072025 W JP2008072025 W JP 2008072025W WO 2009072547 A1 WO2009072547 A1 WO 2009072547A1
Authority
WO
WIPO (PCT)
Prior art keywords
side channel
channel information
encryption
channel attack
tolerance evaluation
Prior art date
Application number
PCT/JP2008/072025
Other languages
English (en)
French (fr)
Inventor
Toru Hisakado
Noritaka Yamashita
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Priority to US12/746,341 priority Critical patent/US20100246808A1/en
Priority to JP2009544702A priority patent/JPWO2009072547A1/ja
Publication of WO2009072547A1 publication Critical patent/WO2009072547A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

　サイドチャネル情報の利用による暗号アルゴリズムや処理タイミングの推定、暗号アルゴリズムの処理系列の判定の可否を評価可能なサイドチャネル攻撃耐性評価装置を提供する。サイドチャネル攻撃耐性評価装置は、暗号装置から漏洩するサイドチャネル情報を用いてサイドチャネル攻撃への耐性評価を実施するもので、記憶部（特徴データ記憶装置）、測定部（サイドチャネル情報測定器）、処理部（サイドチャネル攻撃耐性評価手段）を有する。記憶部は、事前に所定の暗号アルゴリズムを暗号装置で実行することによって得たサイドチャネル情報もしくはそれらを処理した特徴データを格納する。測定部は、評価対象の暗号装置から発生するサイドチャネル情報を測定する。処理部は、測定部で得られたサイドチャネル情報と記憶部に格納された特徴データとの間の相関値を計算して評価対象の暗号装置のサイドチャネル攻撃への耐性の可否を判定する。
PCT/JP2008/072025 2007-12-05 2008-12-04 サイドチャネル攻撃耐性評価装置、方法及びプログラム WO2009072547A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/746,341 US20100246808A1 (en) 2007-12-05 2008-12-04 Side channel attack tolerance evaluation apparatus, method and program
JP2009544702A JPWO2009072547A1 (ja) 2007-12-05 2008-12-04 サイドチャネル攻撃耐性評価装置、方法及びプログラム

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-314670 2007-12-05
JP2007314670 2007-12-05

Publications (1)

Publication Number Publication Date
WO2009072547A1 true WO2009072547A1 (ja) 2009-06-11

Family

ID=40717724

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/072025 WO2009072547A1 (ja) 2007-12-05 2008-12-04 サイドチャネル攻撃耐性評価装置、方法及びプログラム

Country Status (3)

Country Link
US (1) US20100246808A1 (ja)
JP (1) JPWO2009072547A1 (ja)
WO (1) WO2009072547A1 (ja)

Cited By (2)

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JP2014006484A (ja) * 2012-06-27 2014-01-16 Tokai Rika Co Ltd サイドチャネル評価装置及びサイドチャネル評価方法
CN106936561A (zh) * 2015-12-29 2017-07-07 航天信息股份有限公司 一种侧信道攻击防护能力评估方法和系统

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US9304795B2 (en) 2013-01-15 2016-04-05 Empire Technology Development Llc Function-targeted virtual machine switching
US9563729B2 (en) 2013-06-21 2017-02-07 Cryptography Research, Inc. Signal transition analysis of a circuit
US10015006B2 (en) 2014-11-05 2018-07-03 Georgia Tech Research Corporation Systems and methods for measuring side-channel signals for instruction-level events
US10025926B2 (en) 2014-11-19 2018-07-17 The Mitre Corporation Side-channel leakage evaluator and analysis kit
JP6555486B2 (ja) * 2015-01-13 2019-08-07 国立大学法人神戸大学 オンチップモニタ回路及び半導体チップ
FR3040513B1 (fr) * 2015-09-02 2018-11-16 Stmicroelectronics (Rousset) Sas Protection d'un algorithme de rijndael
FR3040514B1 (fr) 2015-09-02 2017-09-15 Stmicroelectronics Rousset Protection dpa d'un algorithme de rijndael
FR3040515B1 (fr) * 2015-09-02 2018-07-27 St Microelectronics Rousset Verification de la resistance d'un circuit electronique a des attaques par canaux caches
EP3220305B1 (en) * 2016-02-22 2018-10-31 Eshard Method of testing the resistance of a circuit to a side channel analysis of second order or more
EP3422176A1 (en) * 2017-06-28 2019-01-02 Gemalto Sa Method for securing a cryptographic process with sbox against high-order side-channel attacks
US10521585B2 (en) * 2017-10-02 2019-12-31 Baidu Usa Llc Method and apparatus for detecting side-channel attack
TWI808905B (zh) * 2022-10-04 2023-07-11 財團法人資訊工業策進會 加密訊號辨識裝置與方法

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JP2006146039A (ja) * 2004-11-24 2006-06-08 Kddi Corp 暗号化通信特徴抽出装置、暗号化通信特徴抽出プログラムおよび記録媒体
JP2007240170A (ja) * 2006-03-06 2007-09-20 Tohoku Univ 波形の位置合わせ方法

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EP1090480B1 (en) * 1998-06-03 2019-01-09 Cryptography Research, Inc. Improved des and other cryptographic processes with leak minimization for smartcards and other cryptosystems
DE10201449C1 (de) * 2002-01-16 2003-08-14 Infineon Technologies Ag Rechenwerk, Verfahren zum Ausführen einer Operation mit einem verschlüsselten Operanden, Carry-Select-Addierer und Kryptographieprozessor
US8005209B2 (en) * 2005-01-06 2011-08-23 Polytechnic University Invariance based concurrent error detection for the advanced encryption standard
US20070019805A1 (en) * 2005-06-28 2007-01-25 Trustees Of Boston University System employing systematic robust error detection coding to protect system element against errors with unknown probability distributions
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Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
JP2006146039A (ja) * 2004-11-24 2006-06-08 Kddi Corp 暗号化通信特徴抽出装置、暗号化通信特徴抽出プログラムおよび記録媒体
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Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
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"The 2005 Symposium on Cryptography and Information Security", 25 January 2005, article SASAKI: "Methodology to Evaluate DPA Resistivity of Cryptosystems" *
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014006484A (ja) * 2012-06-27 2014-01-16 Tokai Rika Co Ltd サイドチャネル評価装置及びサイドチャネル評価方法
CN106936561A (zh) * 2015-12-29 2017-07-07 航天信息股份有限公司 一种侧信道攻击防护能力评估方法和系统
CN106936561B (zh) * 2015-12-29 2020-06-02 航天信息股份有限公司 一种侧信道攻击防护能力评估方法和系统

Also Published As

Publication number Publication date
US20100246808A1 (en) 2010-09-30
JPWO2009072547A1 (ja) 2011-04-28

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