WO2008147343A1

WO2008147343A1 - Three-dimensional information processing device and an information processing method

Info

Publication number: WO2008147343A1
Application number: PCT/UA2008/000028
Authority: WO
Inventors: Yuriy Bogdanovych Zarvanytsky
Original assignee: Yuriy Bogdanovych Zarvanytsky
Priority date: 2007-06-01
Filing date: 2008-05-28
Publication date: 2008-12-04
Also published as: UA81208C2

Abstract

The invention relates to information processing in electronic, optical, magnetic and other systems, in particular, to a three-dimensional digital information processing device. The technical result consists in extending the functionality, in increasing the processing speed and the adaptation flexibility for processing complex forms of information. The inventive three-dimensional information processing device comprises interconnected structural logical elements which are connected to input/output units and to information and address buses and which are situated in the nodes of the three-dimensional structure, wherein each of said nodes is formed by at least three differently oriented insulated buses and comprises controllable connecting elements which are connected between the buses and also between the inputs and outputs of the structural logical elements and are designed in such a way that they can irreversibly and reversibly change the physical state thereof under the action of control signals. The inventive method for processing information in the three-dimensional information processing device, apart from the input/output operations and the control of connecting elements, consists in producing links between the structural logic elements which are located in different spatialdirections for forming the functional structure for the three-dimensional information processing device.

Description

SPATIAL DEVICE FOR PROCESSING INFORMATION

AND METHOD FOR PROCESSING INFORMATION

The invention relates to the field of processing digital and / or analog information in electronic, optical, magnetic and other systems, and relates to a spatial device for processing information, as well as a method for processing information in a spatial device for processing information. The increasing complexity of data processing tasks associated, for example, with pattern recognition, real-time multidimensional image processing, neural network modeling, etc., places high demands on the developers of computing devices in terms of performance and structure flexibility.

We are talking about the optimal adaptation of the functional structure of devices for data processing to tasks of processing variable data.

Today, devices for processing information are implemented in the form of planar (planar) systems.

Attempts to create three-dimensional integrated circuits have been carried out by universities, research laboratories and individual scientists since the beginning of the 70s of the last century. In addition to the use of polycrystalline silicon, the structural change of which was supposed to be carried out using a laser beam, other constructive solutions were provided for in these works, which made it possible to place several two-dimensional microcircuits one above the other.

Integrated circuits of the type ((programmable matrix logic) are known, which make it possible to create devices for processing digital information by changing the internal interconnects in the matrices of the “AND” elements with hard-wired connections with the “OR” elements. Integrated circuits are also known as the “programmed logic matrices”, which allow you to create devices for processing digital information by changing the internal interconnects in the matrix of elements "AND" and "OR".

A variety of devices for processing data are known, for example optoelectronic nodes and neurochips / neuroprocessors (for example, RF patents Ns 2158020, Ns 2137192) for processing optical information streams, ferroelectric or other devices based on other physical principles for storing and processing data.

From the patent of the Russian Federation 2248626 (IPC ⁷ G11 F 11/4193, G11C 5/02, publ. 02.20.2004), a multidimensional addressing structure for electronic devices that contain one or more spatial elements is known. Means for enabling addressing in a device that contains one or more spatial elements, which are memory cells, display elements, diodes, transistors and / or switching / modulating elements and together with the specified means create a part of a two-dimensional or three-dimensional matrix as a part of the specified device, contains three sets of conductive lines or tape electrodes that create an additional part of the specified matrix. A device for storing and / or processing data or receiving and / or processing and / or displaying signals comprises said means and more than one matrix, said matrices being made in the form of a foot located on the base, and the device forms a three-dimensional structure depending from the functional properties of each matrix in the foot.

Thus, the volumetric structure of the device is formed by arranging essentially planar matrices in the form of a stack. Therefore, it actually carries out two-dimensional addressing of matrix elements, as well as input and output of information.

The prototype of the claimed device is a reprogrammable computer for information processing systems, known from RF patent Ns 2146389 (MPK7 G06F15 / 00, publication date 03/10/2000), which contains a control circuit that is a processor with a reduced set of instructions, the inputs / outputs of which are connected to the internal bus to which the inputs / outputs of the basic computing elements, the inputs / outputs of two arrays of local static memory and the inputs / outputs of the system bus controller are connected. In this computing device, the basic computing elements are interconnected by communication lines according to the principle of “each with each” and connected by separate communication lines to the control circuit, and the inputs / outputs of the external bus controller are connected to the internal bus, the inputs / outputs of the unit are connected to the inputs / outputs high-speed receivers / transmitters, and the specified block is made on high-speed asynchronous receivers / transmitters, allowing the use of electrical and optical communication lines and designed for I am cascading basic computing elements.

The computer is designed to solve image processing tasks or any other information that runs in real time. The module can be used as a base cell for the implementation of a multilayer neural network with variable parameters.

Basic computational elements are used to perform simple arithmetic operations, such as adding, subtracting, multiplying, and calculating threshold functions.

The computer is based on 8 user-programmable FPGA logic chips. Using user-programmable FPGA chips allows you to solve different types of tasks on the same board and implement neural networks of different types and sizes.

The disadvantage of this calculator is that the device is configured to connect basic computing elements with the formation of a quasi-planar computing structure. Performing it in the form of a spatial structure, which allows to expand the functionality and improve the flexibility of adaptation to the tasks performed, is not provided for in the described patent.

The basis of the invention is the task of developing a spatial device for data processing, in which, by placing structural logical elements in the nodes of the spatial structure formed by buses oriented in different directions, and the formation of controlled connections between these structural logical elements, functionality is expanded, flexibility, speed and compact device for data processing.

Regarding the device, the problem is solved in that in a spatial device for processing digital information containing control devices, input / output devices, structural logic elements, such as logical devices, groups of logical elements, logical elements or components of logical elements connected with each other and with devices I / O information and address buses, according to the invention, the structural logic elements are located in the nodes of the spatial structure, each of which at least three insulated buses oriented in different directions, each node containing controlled connecting elements connected between the buses, as well as between inputs and outputs, for example, information, control, power supply of structural logic elements, and controlled connecting elements are made with the ability irreversibly or reversibly change their physical state under the influence of control signals.

In a preferred embodiment of the invention as structural logical elements, artificial neurons were used, and artificial synapses were used as controlled connecting elements.

In another preferred embodiment of the invention, qubits are used as structural logic elements, the interaction between which is carried out by directional bonds of a quantum mechanical nature.

The connection architecture is determined by the nature of the qubits used and the type of structure of the material (matrix).

In a further preferred embodiment, memory cells are used as structural logic elements. In addition, the structural logic elements may be electronic and / or optical and / or magnetic elements.

Structural logic elements and controlled connecting elements can be made non-volatile.

In addition, the objective of the invention is to develop a method of processing information in a spatial device for processing information, in which by targeted action on controlled connecting elements between structural logical elements located in different spatial directions, the spatial structure of the computing device is modified to adapt this structure to the assignment.

According to the invention, the problem is solved in a method of processing information in a spatial device for processing information, including input / output of the processed data and controlling the calculation process itself, in that according to the invention, signals are supplied to control the physical state of the controlled connecting elements via a protocol; while the inputs and outputs of some logic elements are connected to the inputs and outputs of other logic elements located in different spatial directions, with the formation of the functional structure of a spatial device for processing information adapted to the task of processing information. Due to the spatial structure of the data processing device, according to the proposed method, it is possible to supply arrays of input signals to any number of buses of a selected plane (s), and to remove arrays of output signals simultaneously from any number of buses of a selected plane (s) without intermediate buffering, thereby increasing high-speed input / output and processing of multidimensional information in real time.

The invention is illustrated by figures, which depict: FIG. 1 Three-dimensional spatial node;

FIG. 2 A fragment of a three-dimensional spatial device for processing information, in which the products of the input variables are calculated, which are necessary to calculate the sum of the three variables; FIG. 3 A fragment of a three-dimensional spatial device for processing information in which the sums of the works are calculated and the sum of three variables is determined; FIG. 4 Three-dimensional spatial device for information processing, which calculates the sum of three input logical variables.

The description is given on the example of the structure and functioning of one spatial node, which contains structural logical elements (correspond to the basic computing elements of the prototype), which can be made in the form of separate functional components of logical elements. In the simple case, these are, for example, diodes. The nodes of the spatial computing structure are formed by three isolated buses that are oriented in orthogonal directions. Thanks to the controlled connecting elements, the buses can be connected to each other via diodes in accordance with a given protocol. In FIG. 1 shows a three-dimensional spatial node. The node is formed by three, for example, electrically conductive buses 1, 2, 3 isolated from one another, oriented, for example, along the axes of a rectangular coordinate system. Between each pair of buses 1, 2, 3 are connected the components of logic elements, for example, in the form of diodes 4, 5, 6, 7, 8, 9. Diodes are connected to the buses through controlled connecting elements (for example, keys) 10, 11, 12, 13, 14, 15. The keys are capable of reversibly or irreversibly changing their conductive state. In the simple case, fused jumpers that irreversibly change their physical conductive state as a result of “burning” when programming a device for processing information can be used as controlled connecting elements.

This spatial node, depending on the availability of controlled connecting elements and potentials on the buses, is able to perform simple logical operations "AND" or "OR", that is, implement the corresponding logical elements. Implementation of the And element. In the initial state, the keys 10, 11, 12, 13, 14, 15 are open. Input variables are supplied to buses 1 and 2, voltage E (for example +5 V) is supplied to bus 3 through a resistor. Keys 11 and 13 are closed. Then on bus 3 a logical product of the input variables will be generated.

Implementation of the OR element. In the initial state, the keys 10, 11, 12, 13, 14, 15 are open. Input variables are supplied to buses 1 and 2, voltage “common bus” (voltage 0 V) is applied to bus 3 through a resistor. The keys 10 and 14 are closed. Then on the bus 3 a logical sum of input variables will be generated.

To prove the universality of the proposed spatial device for information processing, an example of organizing an adder of three logical variables is proposed - (X1 + X2 + XЗ). The truth table of the sum of three logical variables has the form

The function of the algebra of logic in the form of a disjunctive normal form, written on the basis of the truth table, has the form

S = X1 + X2 + X3 = X \ X2X3 + X \ X2X3 + X \ X2X3 + X \ X2X3 ₍₁ )

In FIG. 2 shows a fragment of a three-dimensional spatial device for processing information in which the products of input variables are calculated

X \ X2X3 X \ X2X3 X \ X2X3 _t X \ X2X3 in accordance with formula (1). For simplicity, only diodes are shown here; the switches themselves are also not shown. That is, in FIG. 2 shows only the switching result.

The variable ХЗ was applied to the buses 16 and 19 by external switching, on 18 and 21 - ХЗ, on 23 - X2, on 26 - X2, on 17 - X1, on 20 - Xl.

Formation of the product X ^ X2X3 _on bus 22. For this, the variable X2 is supplied to bus 23, and X ^ to bus 20. The product XIX2 is formed on the bus 39 due to the diodes connected in the opposite direction between the tires 23 and 39, 20 and 39, and the external switching of the bus 39 to the voltage source E through resistor (a two-input logic element "AND" is formed). Next work

X \ X1 on the bus 39 and the variable that is fed to the bus 19 is formed due to the on-board diodes between the buses 39 and 22, 19 and 22, and the external switching of the bus 22 to the voltage source E through the resistor, the product X \ X2X3 (a two-input logic element "And").

Similarly, the remaining products X \ X2X3 _{on bus} 27, X \ X2X3 _on bus 25, X \ X2X3 _on bus 24 are formed.

In FIG. Figure 3 shows a fragment of a three-dimensional spatial device for processing information, in which the sums of the products are calculated and the sum of three variables is determined.

An example of the formation of the sum X ^ X2X3 + X \ X2X3 _on bus 31. The product

X \ X2X3 _{on the} bus 25 and the product - ^ 1- ^ 2X3 _{on the} bus 22 are fed to the bus 31 through the diodes connected in the forward direction. To bus 31 to form the amount

X \ X2X3 + X \ X2X3 is also connected via the common bus resistor. In the same way, the sum X \ X2X3 + X \ X2X3 _is formed _{on Step} 33. And, finally, the sum (X \ X2X3 + X \ X2X3) + (X \ X2X3 + X \ X2X3) = s on bus 37.

In FIG. 4 shows an example of a three-dimensional spatial information processing device that calculates the sum of three input logical variables. This figure is formed by combining individual fragments in FIG. 2 and FIG. 3.

The above example of a three-dimensional implementation of the invention by semiconductor technology does not exhaust and does not limit the scope of legal protection. The manufacture of such three-dimensional devices allows the use of modern technological methods, in particular flexonics, that is, layered printing of volumetric structures.

According to the invention, the structural logic elements can also be optical and / or magnetic elements. In this case, for example, optical fibers or electrically conductive paths can be used as tires, and, for example, micromirrors and inductance microcoils, respectively, as functional elements.

When using memory cells as structural logical elements, a spatial storage device can be implemented that is capable of flexibly changing its structure.

As structural logical elements can be used more more complex than in the described example execution elements.

Thus, the spatial device according to the invention is also suitable for forming spatial neural networks that simulate the function of the human brain. At the same time, artificial neurons are used as structural logical elements, and artificial synapses are used as controlled connecting elements.

In the general case, tires can be oriented along the axes of an oblique coordinate system, the number of which can be arbitrary and is limited only by the technological possibilities of implementation. Due to the proposed three-dimensional structure of the information processing device, the compactness of the placement of structural logical elements and functional units is achieved due to the fact that the logical elements are located in the nodes of the spatial structure and can be connected by inputs and outputs with controlled connecting elements to buses that converge in the node and which are oriented in different directions of the volume of the device. This makes it possible to implement any number of connections between elements and functional units, to build digital circuits of arbitrary complexity. The volumetric structure allows the device to load, process and display information in groups (layers), to switch separate structural logic elements in different directions.

Thus, the proposed spatial device for processing information has enhanced functionality, increased speed and flexibility to adapt to the tasks of processing complex types of information, for example, multidimensional graphical information, in real time.

Claims

OPM-83 FORMULATION OF THE INVENTION

1. Spatial device for processing digital and / or analog information, containing control devices, input / output devices, structural logic elements, such as logical devices, groups of logical elements, logical elements or components of logical elements connected with each other and with input devices / output information and address buses, characterized in that the structural logic elements are located in the nodes of the spatial structure, each of which is formed by at least three of iorated buses oriented in different directions, each node containing controlled connecting elements connected between the buses, as well as between inputs and outputs, for example, information, control, power supply of structural logic elements, moreover, controlled connecting elements are made with the ability to irreversibly or reversibly change their physical condition under the influence of control signals.

2. The device according to claim 1, characterized in that artificial neurons are used as structural logical elements, and artificial synapses are used as controlled connecting elements.

3. The device according to claim 1, characterized in that qubits are used as structural logical elements, and directional connections of a quantum-mechanical nature are used as controlled connecting elements.

4. The device according to claim 1, characterized in that the memory cells are used as structural logical elements.

5. The device according to claim 1, characterized in that the structural logic elements are electronic and / or optical and / or magnetic elements.

6. The device according to claim 1, characterized in that the structural logic elements and controlled connecting elements are non-volatile.

7. The device according to p. 1, characterized in that each bus is involved in the formation of at least two spatial nodes.

8. A method of processing information in a spatial device for processing information according to paragraphs. 1-7, which includes the input / output of the processed data and the control of the actual calculation process, characterized in that they provide signals for controlling the physical state of the managed connecting elements according to the protocol, while the inputs and outputs of some logic elements are connected to the inputs and outputs of other logic elements located in different spatial directions, with the formation of the functional structure of the spatial device for processing information adapted to the task of information processing.

9. The method according to p. 8, characterized in that the arrays of input signals are supplied to any number of buses of the selected plane (s) of the spatial device, and the arrays of output signals are removed simultaneously from any number of buses of the selected plane (s).