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WO2007086352A1 - Imaging element and camera module - Google Patents

Imaging element and camera module Download PDF

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Publication number
WO2007086352A1
WO2007086352A1 PCT/JP2007/050936 JP2007050936W WO2007086352A1 WO 2007086352 A1 WO2007086352 A1 WO 2007086352A1 JP 2007050936 W JP2007050936 W JP 2007050936W WO 2007086352 A1 WO2007086352 A1 WO 2007086352A1
Authority
WO
WIPO (PCT)
Prior art keywords
light receiving
receiving element
substrate
photodiode
main surface
Prior art date
Application number
PCT/JP2007/050936
Other languages
French (fr)
Japanese (ja)
Other versions
WO2007086352A8 (en
Inventor
Katsuhide Setoguchi
Original Assignee
Kyocera Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corporation filed Critical Kyocera Corporation
Priority to US12/162,329 priority Critical patent/US8119965B2/en
Priority to JP2007555929A priority patent/JP4907557B2/en
Publication of WO2007086352A1 publication Critical patent/WO2007086352A1/en
Publication of WO2007086352A8 publication Critical patent/WO2007086352A8/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14603Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50Control of the SSIS exposure
    • H04N25/57Control of the dynamic range
    • H04N25/58Control of the dynamic range involving two or more exposures
    • H04N25/581Control of the dynamic range involving two or more exposures acquired simultaneously
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/778Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73257Bump and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers
    • H01L27/14649Infrared imagers
    • H01L27/14652Multispectral infrared imagers, having a stacked pixel-element structure, e.g. npn, npnpn or MQW structures

Definitions

  • the present invention relates to an image sensor such as a CMOS image sensor and a camera module including the image sensor.
  • an image sensor such as a CMOS image sensor and a camera module including the image sensor.
  • CMOS image sensor In a solid-state imaging device such as a CMOS image sensor, a charge corresponding to incident light is generated by a light receiving element, and an image to be imaged is acquired by sequentially reading out charges accumulated in each light receiving element. It is known that when the amount of light received increases, the charge in the light receiving element is saturated, and so-called whiteout occurs.
  • Patent Document 1 two photodiodes are provided in each pixel, and the charge (potential) of one photodiode is reduced by the charge (potential) of the other photodiode in the peripheral pixel, thereby saturating the charge.
  • a technique for preventing the above is disclosed.
  • Patent Document 1 also discloses a technique in which the other photodiode is arranged directly below one photodiode.
  • Patent Document 2 Although not related to a technique for preventing saturation in a light receiving element, a technique is also known in which a photodiode is provided on one main surface of a substrate and a photodiode is provided on the other main surface (Patent Document 2, 3).
  • Patent Document 1 Japanese Unexamined Patent Publication No. 2003-169252
  • Patent Document 2 JP-A-5-243548
  • Patent Document 3 Japanese Patent Application Laid-Open No. 2004-103964
  • the captured image is different from the actual luminance distribution, although the power of lowering the relative charge of the pixels having a larger average light amount in the periphery is relatively low. That is, in the technique of Patent Document 1, the luminance distribution of the obtained image is smoothed more than the actual luminance distribution. Therefore, for example, it is not suitable for application to a technology in which a difference in brightness is important for detection accuracy, such as an in-vehicle camera module that detects a white line on a road based on a captured image, It is desirable to prevent deterioration of image quality due to saturation of the light receiving part while reflecting the actual luminance distribution.
  • the imaging device of the present invention is a light receiving element provided for each of the substrate and the pixels obtained by dividing the substrate into a plurality of pixels, and is provided on the substrate and receives light incident on one main surface of the substrate.
  • a first light receiving element that generates an electric charge according to the amount of light received, and a light receiving element provided for each pixel, provided at a position behind the first light receiving element and incident on the one main surface.
  • a second light receiving element that receives light transmitted through at least one of the first light receiving element and the substrate and generates a charge corresponding to the amount of light received, and a signal of an electric signal based on the charge generated in the first light receiving element
  • An increase unit configured to increase the level so that the amount of increase increases as the signal level of the electric signal based on the charge generated in the second light receiving element of the same pixel increases.
  • the first light receiving element is provided on the one main surface
  • the second light receiving element is provided on the other main surface of the substrate.
  • a second substrate is provided opposite to the other main surface of the substrate, and the second light receiving element is provided on the second substrate.
  • the first light receiving element is provided on the one main surface of the substrate, and the second light receiving element is a main surface of the second substrate facing the other main surface of the substrate. Is provided in
  • the first light receiving element is provided on the other main surface of the substrate, and the second light receiving element is a main surface of the second substrate that faces the other main surface of the substrate. It is provided on the surface.
  • At least a part of the increase unit and the increase control unit that controls the operation of the increase unit is provided on the second substrate.
  • the increase unit generates an electric signal based on an electric charge generated in the first light receiving element. Then, an electric signal based on the electric charge generated in the second light receiving element of the same pixel is added.
  • the increase unit includes an amplifying element that amplifies an electric signal based on the electric charge generated in the first light receiving element, and the amplifying element uses the electric charge generated in the second light receiving element.
  • the amplifying element uses the electric charge generated in the second light receiving element. The higher the signal level of the electric signal based, the higher the amplification factor when amplifying the electric signal based on the electric charge generated in the first light receiving element of the same pixel.
  • a third light receiving element disposed on the same plane as a surface on which a plurality of the second light receiving elements are arranged, and a light shielding member that blocks light from the one main surface side toward the third light receiving element.
  • a signal level force of an electric signal based on the electric charge generated in the second light receiving element, and the increase unit subtracts a signal level of the electric signal based on the electric charge generated in the third light receiving element.
  • the signal level of the electric signal based on the charge generated in the second light receiving element is corrected, and the signal level of the electric signal based on the charge generated in the first light receiving element is corrected based on the corrected signal level. increase.
  • a saturation level control unit configured to control the saturation level of the first light receiving element so that the degree of charge saturation in the one light receiving element is within a predetermined range is provided.
  • the pixels on the outer peripheral side of the pixel array region are arranged such that the second light receiving elements are shifted from the first light receiving element of the same pixel toward the outer peripheral side of the pixel array region.
  • the second light receiving element protrudes to the outer peripheral side of the pixel arrangement region with respect to the first light receiving element having a light receiving area larger than that of the first light receiving element.
  • a camera module of the present invention includes a lens, an image sensor on which light from the lens forms an image, and a signal processing unit configured to process an electrical signal output from the image sensor,
  • the image sensor is a light receiving element provided for each pixel obtained by dividing the substrate and the substrate into a plurality of pixels.
  • the image receiving element is provided on the substrate and receives light incident on one main surface of the substrate.
  • the signal processing unit generates a signal level of an electrical signal based on the charge generated in the first light receiving element in the second light receiving element of the same pixel. It is configured to increase the amount of increase so that the amount of increase increases as the signal level of the electric signal based on the charge increases.
  • the second light receiving element is arranged so as to be shifted in a direction away from the optical axis with respect to the first light receiving element of the same pixel, as the pixel is located away from the optical axis force of the lens. Yes.
  • FIG. 1 is a cross-sectional view schematically showing an imaging element according to a first embodiment of the present invention.
  • FIG. 2 is a diagram for explaining a basic concept of signal processing in the image sensor of FIG.
  • FIG. 3 shows a circuit configuration of a pixel of the image sensor in FIG.
  • FIG. 4 is a diagram for explaining the state of saturation level control in the image sensor of FIG. 1.
  • FIG. 5 is a diagram showing a circuit configuration of a pixel of an image sensor according to a second embodiment of the present invention.
  • FIG. 6 is a diagram showing a circuit configuration of a pixel of an image sensor according to a third embodiment of the present invention.
  • FIG. 7 is a diagram showing a circuit configuration of a pixel of an image sensor according to a fourth embodiment of the present invention.
  • FIG. 8 is a cross-sectional view schematically showing an image sensor according to a fifth embodiment of the present invention.
  • FIG. 9 is a plan view schematically showing the image sensor of FIG.
  • FIG. 10 is a diagram showing a circuit configuration of a pixel of the image sensor in FIG.
  • FIG. 11 is a cross-sectional view and a plan view schematically showing an image sensor according to a sixth embodiment of the present invention.
  • FIG. 12 is a block diagram showing a basic configuration of a camera module according to a seventh embodiment of the present invention.
  • FIG. 13 is a block diagram showing the basic configuration of a camera module according to an eighth embodiment of the present invention.
  • FIG. 14 is a cross-sectional view schematically showing an image sensor of a ninth embodiment of the present invention.
  • FIG. 15 is a cross-sectional view schematically showing an image sensor according to a tenth embodiment of the present invention.
  • FIG. 16 is a cross-sectional view schematically showing an image sensor according to an eleventh embodiment of the present invention.
  • FIG. 1 is a cross-sectional view schematically showing the image sensor 1 according to the first embodiment of the present invention.
  • the image pickup device 1 is configured by, for example, a MOS type image pickup device, and includes a substrate 2 and a first photodiode (first light receiving device, photoelectric detector) provided on the first main surface (one main surface) S 1 of the substrate 2. Conversion element) 5 and a second photodiode (second light receiving element, photoelectric conversion element) 6 provided on the second main surface (other main surface) S2 on the back side.
  • first photodiode first light receiving device, photoelectric detector
  • Conversion element 5 and a second photodiode (second light receiving element, photoelectric conversion element) 6 provided on the second main surface (other main surface) S2 on the back side.
  • the first photodiode 5 and the second photodiode 6 are respectively provided in a plurality of pixels 3 obtained by dividing the substrate 2 into hundreds to thousands of pixels in the X direction (backward direction on the paper surface) and the Y direction (left and right direction on the paper surface). One is provided, and a plurality of arrays are arranged in the X and Y directions.
  • the first photodiode 5 and the second photodiode 6 are arranged so as to face each other with the substrate 2 interposed therebetween.
  • the first photodiode 5 receives light incident on the first main surface S1, and photoelectrically converts the received light to generate a charge corresponding to the amount of light received.
  • the second photodiode 6 is arranged at a position closer to the second main surface S2 side of the substrate 2 than the first photodiode 5 (behind the first photodiode 5), and is incident on the first main surface S1. Light passing through at least one of the first photodiode 5 and the substrate 2 is received, and the received light is photoelectrically converted to generate a charge corresponding to the amount of light received.
  • Each pixel has a first electrode 9 for detecting a signal based on the charge generated in the first photodiode 5, a second electrode 10 for detecting a signal based on the charge generated in the second photodiode 6, and the like. Is provided.
  • the configuration of the substrate 2, the first photodiode 5, and the first electrode 9 may be a known appropriate configuration. Further, the second photodiode 6 and the second electrode 10 are also arranged on the second main surface S2 opposite to the first main surface S1, except for the first photodiode 5 and the first electrode 9. A similar configuration may be used.
  • the substrate 2 is a P-type semiconductor element substrate made of silicon (Si) as a main material, and the first photodiode 5 and the second photodiode 6 are formed by PN junctions and are formed on the force sword side ( N-type semiconductor side) is exposed from substrate 2 and anode side (P-type semiconductor) The body side is buried in the substrate 2.
  • the second photodiode 6 is formed, for example, in the same material and shape as the first photodiode 5, and is manufactured and mounted in the same process as the manufacturing of the first photodiode 5 and the mounting on the substrate 2. .
  • FIG. 2 is a diagram for explaining the basic concept of signal processing in the image sensor 1
  • FIG. 2A shows the output signal of the first photodiode 5
  • FIG. 2B shows the output signal of the second photodiode 6
  • FIG. 2C shows an output signal when the output signal of the first photodiode 5 is corrected based on the output signal of the second photodiode 6.
  • the horizontal axis indicates the position of the image sensor 1 in the X direction (or Y direction)
  • the vertical axis indicates the amount of light received by the image sensor 1 and the signal level corresponding to the amount of received light (or the signal level). (Increased) is shown in a 1: 1 ratio.
  • a solid line L1 shows an example of a light amount distribution of light incident on the first main surface S1 of the image sensor 1 when a predetermined imaging target is imaged.
  • the first main surface The amount of light at the center of S1 is large and the light intensity is decreasing at both ends.
  • the solid line L2 is connected to the first photodiode 5! The amount of light that saturates the charge and the signal level of the electrical signal corresponding to the amount of light, that is, the saturation level, indicate the signal level of the output signal of the first photodiode 5.
  • the light (solid line L1) incident on the first main surface S1 is absorbed by the first photodiode 5 and the substrate 2 by the light quantity Q1, and out of the light quantity indicated by the solid line L1. Only the amount of light above the solid line L4 reaches the second photodiode 6, and is photoelectrically converted by the second photodiode 6 as indicated by the dotted line L6.
  • the range ⁇ to ⁇ 2 ′ where the light incident on the first main surface S1 reaches the second photodiode 6 is at least partially overlapped with the range of xl to x2.
  • the correction method is appropriate. For example, the signal level of the electrical signal of the first photodiode 5 indicated by a dotted line L3 in FIG. 2A and the signal of the electrical signal of the second photodiode 6 indicated by a dotted line L6 in FIG. By adding the level, the electric signal distribution indicated by the dotted line L7 in FIG. 2C can be obtained.
  • the electric signal distribution indicated by the dotted line L7 in FIG. 2C can be obtained. That is, the amplification factor is a constant value in the range of xO to xl (xl ') and ⁇ 2 ( ⁇ 2';) to ⁇ 3, and the amplification factor in the range of xl (x;) to ⁇ 2 ( ⁇ 2 '). More specifically, when the signal level of the electric signal of the second photodiode 6 is higher, the higher the gain is, the higher the gain becomes, so that the electric signal indicated by the dotted line L7 in FIG. Can be obtained.
  • FIG. 3 is a diagram showing a connection relationship between the circuit configuration of the pixel 3 of the image sensor 1 and the vertical drive circuit 20 that controls the readout timing of the pixel 3.
  • the circuit configuration related to the first photodiode 5 may be a known appropriate configuration.
  • each pixel 3 has a reset transistor 11 that switches the storage node SN to a connection state to the power supply line 17 in the floating state, charges the storage node SN with the power supply voltage VAA, and resets the accumulated charge amount.
  • the first transfer transistor 12 for transferring the charge (usually an electron or a hole) generated in the first photodiode 5 to the storage node SN that has been in a floating state after reset, and the drain connected to the power line 17
  • an amplifier transistor 13 that amplifies a pixel signal corresponding to the stored charge transferred to the storage node SN and outputs the amplified signal to the vertical signal line 14.
  • the reset transistor 11 has a drain connected to the power supply line 17, a source connected to the storage node SN, and a gate connected to the first control line 15 that controls voltage application.
  • the first transfer transistor 12 has a drain connected to the storage node SN, a source connected to a semiconductor impurity region (not shown) that serves as a force sword of the first photodiode 5, and a gate connected to a voltage. Is connected to a second control line 16 for controlling the application of.
  • the amplifier transistor 13 has a drain connected to the power supply line 17, a source connected to the vertical signal line 14, and a gate connected to the storage node SN.
  • a vertical drive circuit 20 that supplies various voltages to each of the first control line 15 and the second control line 16 is provided around the pixel portion.
  • a horizontal drive circuit 22 for processing the pixel signal read out to the vertical signal line 14 to convert it into a time-series signal for noise removal or reference level determination (clamping), for example, and reading it out is provided around the pixel portion. Is provided.
  • an operation control circuit (saturation level control unit) 23 for controlling these vertical or horizontal drive circuits is also provided in the image sensor 1.
  • the pixel 3 further has the following configuration for adding the electrical signal of the second photodiode 6 to the electrical signal of the first photodiode 5.
  • the pixel 3 includes a second transfer transistor 25 that transfers the charge generated in the second photodiode 6 to the storage node SN that is again in a floating state after reset.
  • the second transfer transistor 25 has a drain connected to the storage node SN, a source connected to a semiconductor impurity region (not shown) that serves as a force sword of the second photodiode 6, and a gate that controls the application of voltage. Connected to control line 16.
  • the reset transistor 11 is turned on and the power supply voltage VAA is applied to the storage node SN, whereby the charge accumulated in the storage node SN is discharged, and each pixel is reset. Is called. Thereafter, the reset transistor 11 is turned off.
  • Photoelectric conversion is performed in the first photodiode 5 and the second photodiode 6 with the first transfer transistor 12 and the second transfer transistor 25 turned off, and the first photodiode 5 and the second photodiode 6 Charge is accumulated.
  • the signal level of the electric signal based on the electric charge generated in the first photodiode 5 is The increase amount increases as the signal level of the electric signal based on the charge generated in the second photodiode 6 of the same pixel increases.
  • the storage node SN has a signal level of an electric signal based on electric charges generated in the plurality of second light receiving elements of the same pixel as a signal level of electric signals based on electric charges generated in the plurality of first light receiving elements. It functions as an increasing part that adds.
  • the voltage fluctuation generated at the storage node SN is amplified by the amplifier transistor 13 and output to the vertical signal line 14, and the electric signal output to the plurality of vertical signal lines 14 is sequentially output by the horizontal drive circuit 22. .
  • an output signal (voltage Vpix) of each pixel 3 is obtained.
  • the above-described operation in each pixel is repeated for each frame.
  • the operation control circuit of the imaging element 1 is based on at least one of an electric signal based on the electric charge generated in the first photodiode 5 and an electric signal based on the electric charge generated in the second photodiode 6 in one frame.
  • the saturation level of the first photodiode is controlled so that the degree of charge saturation in the plurality of first photodiodes falls within a predetermined range.
  • FIG. 4 is a diagram for explaining the state of saturation level control in the image sensor 1, in which the horizontal axis indicates the number of frames (time), and the vertical axis indicates the amount of light.
  • Legend Ml indicates the incident light amount of pixel 3 having the maximum incident light amount among the plurality of pixels 3 in each frame, and legend M2 indicates the light amount (saturation level) at which charge is saturated in pixel 3.
  • control is performed so as to eliminate saturated pixels will be described as an example.
  • the operation control circuit 23 raises the saturation level in the next frame f 3 relative to the incident light amount.
  • the pixel 3 having the maximum incident light amount and the incident light amount are specified from the output signal (voltage Vpix) corresponding to each pixel output from the horizontal drive circuit 22.
  • the amount of increase in the saturation level is appropriately set according to the light amount dQ2, for example, an amount proportional to the light amount dQ2 of the difference between the incident light amount and the saturation level.
  • the relative increase in the saturation level is performed by shortening the accumulation time and decreasing the amount of photoelectric conversion, or by increasing the power supply voltage VAA applied to the power supply line 17.
  • the increase in the saturation level does not sufficiently follow the increase in the incident light amount, and the incident light amount still exceeds the saturation level.
  • the saturation level exceeds the amount of incident light.
  • the operation control circuit 23 lowers the saturation level when the saturation level becomes too large with respect to the incident light quantity.
  • the first photodiode 5 and the substrate 2 are arranged at a position closer to the second main surface S2 than the first photodiode 5, and enter the first main surface S1.
  • a second photodiode 6 that receives light transmitted through at least one and generates a charge corresponding to the amount of light received is provided, and the signal level of the electrical signal based on the charge generated in the first photodiode 5 is set to the second level of the same pixel. Since the amount of increase increases as the signal level of the electrical signal based on the charge generated in the photodiode 6 increases, even if the contrast in the imaging range is large, imaging can be performed with an appropriate dynamic range.
  • the second photodiode 6 has a signal corresponding to the light intensity distribution.
  • An electrical signal is output with a level distribution. Then, by increasing the signal level distribution of the signal of the first photodiode 5 by an increase amount corresponding to the signal level distribution, the actual luminance distribution is reflected, and deterioration of the image quality due to saturation of the light receiving unit is prevented. be able to.
  • the second photodiode 6 Since the second photodiode 6 is arranged on the second main surface S2 of the substrate 2, compared to the case where the second photodiode 6 is embedded inside the substrate 2, the second photodiode 6 is directed to the substrate 2. Is easy to mount, and the leakage current from the first photodiode 5 prevents the noise from entering the second photodiode 6.
  • the saturation level of the first photodiode 5 When the saturation level of the first photodiode 5 is controlled, a control delay as shown in frames f2 and f3 in FIG. 4 occurs. Conventionally, whiteout occurs in frames f2 and f3. It was. However, the second photodiode 6 receives the light amount dQ2 and the light amount dQ3 that are the difference between the actual incident light amount caused by the control delay and the saturation level of the first photodiode 5, and outputs an electrical signal corresponding to the light amount Since the electric signal of the first photodiode 6 is increased according to the output of the electric signal, whiteout can be prevented. In other words, it is possible to capture an image with an appropriate dynamic range when the light-dark difference changes rapidly. Therefore, for example, even when a sharp contrast difference occurs in the imaging range of the in-vehicle camera when the automobile enters or exits the tunnel, it is possible to detect a white line by imaging with an appropriate dynamic range.
  • the light quantity dQ2 and the light quantity dQ3 that are the difference between the actual incident light quantity caused by the control delay and the saturation level of the first photodiode 5 are specified.
  • the image sensor 1 can receive the light amount dQ2 and the light amount dQ3 by the second photodiode 6, the control amount of the saturation level can be appropriately determined.
  • FIG. 5 is a diagram showing a connection relationship between the circuit configuration of the pixel 53 of the image sensor 51 and the vertical drive circuit 20 that controls the readout timing of the pixel 53 according to the second embodiment of the present invention. Note that the same configurations as those of the first embodiment are denoted by the same reference numerals as those of the first embodiment, and description thereof is omitted.
  • the amplification factor when amplifying the electrical signal of the first photodiode 5 of the same pixel 53 is changed according to the signal level of the electrical signal of the second photodiode 6.
  • the signal level of the electric signal of the first photodiode 5 is increased so that the signal level of the electric signal of the second photodiode of the same pixel 53 increases. Specifically, it is as follows.
  • an amplifier transistor (amplifier element) 63 configured by a variable gain amplifier is arranged. Yes.
  • the connection of the drain, source, and gate of the amplifier transistor 63 is the same as in the first embodiment.
  • the amplifier transistor 63 for example, the larger the signal level applied to the control gate, the higher the amplification factor.
  • the control gate has a second transfer transistor. Connected to the drain of Star 25!
  • the storage node SN2 is also switched to the connection state to the power supply line 27, and the power supply voltage VAA2 is applied to the storage node SN2.
  • a reset transistor 26 is provided for charging and resetting the accumulated charge.
  • the reset transistor 26 has a drain connected to the power supply line 27, a source connected to the storage node SN2, and a gate connected to a control line 28 that controls voltage application. Note that a voltage is applied to the control line 28 by the vertical drive circuit 20 as in the case of the first control line 15.
  • the reset transistor 11 is turned on and the power supply voltage VAA is applied to the storage node SN, thereby being stored in the storage node SN. The charges are discharged and each pixel is reset. Further, in synchronization with this, the reset transistor 26 is turned on and the power supply voltage VAA2 is applied to the storage node SN2, whereby the charge accumulated in the storage node SN2 is discharged.
  • Photoelectric conversion is performed in the first photodiode 5 and the second photodiode 6 with the first transfer transistor 12 and the second transfer transistor 25 turned off, and the first photodiode 5 and the second photodiode 6 Charge is accumulated.
  • the signal level of the electrical signal based on the charge generated in the first photodiode 5 is increased as the signal level of the electrical signal based on the charge generated in the second photodiode 6 of the same pixel is higher. Will be increased to be larger.
  • the same effect as in the first embodiment can be obtained. Further, as the signal level of the electric signal of the second photodiode 6 is increased, the first pixel 53 of the same pixel 53 is increased. Since the amplification factor when the electric signal of the photodiode 5 is amplified is increased, the signal can be corrected when the electric signal of the first photodiode 5 is amplified, and the configuration is simple.
  • FIG. 6 is a diagram illustrating a connection relationship between the circuit configuration of the pixel 103 of the image sensor 101 according to the third embodiment of the present invention and the vertical drive circuit 20 that controls the readout timing of the pixel 103. Note that the same configurations as those of the first and second embodiments are denoted by the same reference numerals as those of the first and second embodiments, and description thereof is omitted.
  • a voltage control circuit (increase control unit, signal level conversion) is connected between the storage node SN2 and the control gate of the amplifier transistor 63.
  • Part 30 is provided.
  • the voltage control circuit 30 may be provided for each pixel, or one (for example, one for each vertical signal line 14) may be provided for a plurality of pixels. One may be provided.
  • the operation of the image sensor 101 of the third embodiment is the same as that of the second embodiment except for the operation of the voltage control circuit 30.
  • Voltage control circuit 30 converts the signal level (voltage) of the electrical signal input from storage node SN2 and outputs it. For example, the voltage control circuit 30 performs various calculations based on the electrical signal of the second photodiode 6 so as to be amplified while being corrected more preferably than the electrical signal strength of the first photodiode 5! ! ⁇ Outputs an electric signal with a signal level corresponding to the calculation result.
  • the photoelectric conversion rate and transmittance of the first photodiode 5, the photoelectric conversion rate of the second photodiode 6, and the distance between the first photodiode 5 and the second photodiode 6 so as to satisfy such a relationship. It is troublesome to set the transmittance of the substrate 2 interposed between the two.
  • the amount of light actually incident on the first main surface S1 and the signal of the electric signal output from the first photodiode 6 are determined by experiments or the like.
  • the correlation between the level and the signal level of the electrical signal output from the second photodiode 6 is specified, and the electrical signal at the saturation level of the first photodiode 5 is suitably amplified based on the correlation.
  • Data indicating the relationship between the signal level of the output signal of the second photodiode 6 and the amplification factor is created and stored in the voltage control circuit 30.
  • the voltage control circuit 30 applies a voltage corresponding to the output signal of the second photodiode 6 to the gate voltage of the amplifier transistor 63 based on the data, the electric signal of the first photodiode 5 is preferably amplified.
  • the output signal of the second photodiode 6 is output from the amplifier transistor 63 with respect to the timing at which the output signal of the first photodiode 5 is output to the amplifier transistor 63 by performing an operation or the like in the voltage control circuit 30. If there is a delay in the timing output to the control gate, the output signal of the first photodiode 5 should be synchronized by an appropriate method such as buffering!
  • FIG. 7 is a diagram showing a connection relationship between the circuit configuration of the pixel 203 of the image sensor 201 according to the fourth embodiment of the present invention and the vertical drive circuit 20 that controls the readout timing of the pixel 203.
  • symbol as 1st-3rd embodiment is attached
  • subjected and description is abbreviate
  • the circuit configuration related to the first photodiode 5 (upper side in the drawing) and the circuit configuration related to the second photodiode 6 (lower side in the drawing) are configured similarly.
  • the ON / OFF timing of the reset transistor 11 and the transfer transistor 12 related to the first photodiode 5 and the ON / OFF timing of the reset transistor 211 and the transfer transistor 212 related to the second photodiode 6 of the same pixel are the operation control circuit 223. Is synchronized.
  • the output signal of the horizontal driving circuit power corresponding to the first photodiode 5 and the output signal of the horizontal driving circuit power corresponding to the second photodiode 6 are added by the adding unit 230.
  • the signal level of the electric signal of the first photodiode 5 increases according to the signal level of the electric signal of the second photodiode 6.
  • the adder 230 is the third embodiment. Like the voltage control unit 30 in the state, the electric signal from the second photodiode 6 may be appropriately corrected and the force may be added to the electric signal of the first photodiode 5.
  • the circuit configuration related to the second photodiode 6 can be made the same as the conventional circuit configuration, and the manufacturing process is almost the same as the first photodiode 5. Manufacturing costs can be reduced.
  • FIG. 8 is a cross-sectional view schematically showing an image sensor 301 according to the fifth embodiment of the present invention.
  • symbol as 1st-4th embodiment is attached
  • subjected and description is abbreviate
  • the imaging device 301 of the fifth embodiment is characterized in that the influence of the dark current of the second photodiode 6 is removed, and the third photodiode 306 for measuring the dark current,
  • the third photodiode 306 is, for example, a photodiode having the same configuration as the second photodiode 6, that is, a photodiode having the same material and shape.
  • the third photodiode 306 is arranged on the same plane as the second photodiode 6. I.e.
  • the configuration for outputting an electrical signal from the third photodiode 306 to the third electrode 310 is the same as the configuration for outputting an electrical signal from the second photodiode 6 to the second electrode 10.
  • the light shielding portion 307 is formed of a non-translucent material and is disposed on the first main surface S1, and the first main surface S1 side force also blocks the directional light to the third photodiode 306.
  • the light shielding unit 307 is, for example, a metal film such as aluminum. Note that a photodiode for measuring the dark current of the first photodiode 5 may or may not be provided between the third photodiode 306 and the light shielding portion 307.
  • FIG. 9 is a plan view schematically showing the image sensor 301.
  • FIG. 9A shows the first main surface S1
  • FIG. 9B shows the second main surface S2.
  • the third photodiode 306 and the light shielding portion 307 are provided around the arrangement area of the first photodiode 5 and the second photodiode 6.
  • a plurality of signal output terminals 4 for outputting signals output from the horizontal drive circuit 22 to the outside are provided at both ends of the substrate 2.
  • FIG. 10 is a diagram showing a circuit configuration of the image sensor 301.
  • the image sensor 301 includes a circuit that corrects the electrical signal of the second photodiode 6 based on the electrical signal output from the third photodiode 306.
  • the imaging element 301 has the same configuration as that of the second embodiment with respect to the first photodiode 5 and the second photodiode 6.
  • the image pickup device 301 includes a transfer transistor 325 and a reset transistor 326 in the same manner as the second photodiode 6 with respect to the third photodiode 306, and the third photodiode 306 has the same length as the second photodiode 6.
  • the electric charge is accumulated in the accumulation time, and an electric signal based on the electric charge is output to the voltage control circuit 330.
  • the voltage control circuit 330 corrects the electric signal from the second photodiode 6 based on the signal level of the electric signal from the third photodiode 306. For example, the signal level force of the electric signal from the second photodiode 6 is also output by subtracting the signal level of the electric signal of the third photodiode 306.
  • the voltage control circuit 330 stores, for example, the signal level of the electric signal from the third photodiode 306, and at the same time the electric current of the third photodiode 330 at a position close to the second photodiode 6 to be corrected. Read the signal level of the signal and correct the signal level of the electrical signal of the second photodiode based on the read signal level. Use in.
  • the first photodiode 5 is based on the signal level distribution of the electric signal of the second photodiode 6.
  • the signal level distribution of the electrical signal is corrected, it can be more accurately approximated to the actual light quantity distribution.
  • FIG. 11A is a cross-sectional view schematically illustrating an image sensor 401 according to the sixth embodiment of the present invention
  • FIG. 11B is a plan view of the image sensor 401 also viewed from the subject side force.
  • symbol as 1st-5th embodiment is attached
  • subjected and description is abbreviate
  • the image sensor 401 includes a second substrate 402 that is disposed to face the second main surface S2 of the substrate 2.
  • the second photodiodes 6 are arranged on the third main surface S3 of the second substrate 402 facing the second main surface S2 of the substrate 2.
  • the second photodiode 6 is provided immediately below the first photodiode 5 as in the first embodiment.
  • the substrate 2 and the second substrate 402 are joined by an appropriate joining means such as a solder ball or an insulating adhesive.
  • the substrate 2 may be thinned to about 100 microns by polishing, for example, to increase the light incident property on the second substrate 402.
  • the electrical signal of the first photodiode 5 is output from, for example, a signal output terminal 404 formed at the end of the substrate 2 and is connected to the second substrate 402 via a wire 431 formed by metal wire bonding such as Au or A1.
  • the signal is input to the signal input terminal 432 formed in
  • the second substrate 402 is formed wider than the substrate 2, and a signal processing unit 435 is formed outside the arrangement region of the substrate 2 on the third main surface S3 of the second substrate 402. .
  • the signal processing unit 435 executes processing of electrical signals from the first photodiode 5 and the second photodiode 6, and the processed signal is formed on the end of the third main surface S3 of the second substrate 402. Output from external output terminal 437.
  • the circuit configuration of the pixels of the image sensor 401 is the same as that of the fourth embodiment shown in FIG. 7, for example.
  • the circuit related to the first photodiode 5 (upper side of the drawing in FIG. 7) is provided on the substrate 2
  • the circuit related to the second photodiode 6 (lower side of the drawing in FIG. 7) is provided on the second substrate 402.
  • the operation control circuit 223 and the adding unit 230 are provided on the second substrate 402, for example, and the adding unit 230 is included in the signal processing unit 435. By adding the adding unit 230 to the signal processing unit 435, at least a part of the increasing unit is provided on the second substrate 402.
  • an amplifier transistor 63 configured by the voltage control circuit 30 and the variable gain amplifier shown in FIG.
  • the voltage control circuit 30 and the amplifier transistor 63 may be formed in the signal processing unit 435.
  • the voltage control circuit 30 is included in the signal processing unit 435, at least a part of the increase control unit that controls the operation of the increase unit is provided on the second substrate 402.
  • the processing becomes easier as compared with the case where the first photodiode 5 and the second photodiode 6 are provided on the front and back of one substrate.
  • Per board Since a process for providing a photodiode or the like on one main surface is performed, the conventional manufacturing process can be used as it is, and the alignment of the first photodiode 5 and the second photodiode 6 is performed on the substrate 2 and the second substrate 402. It is also possible to do it by alignment.
  • FIG. 12 is a block diagram showing the basic configuration of the camera module 501 of the seventh embodiment.
  • the camera module 501 is used for an appropriate application such as an in-vehicle camera or a mobile phone camera, and includes the imaging devices 1, 51, 101, 201, 301, 401 of the first to sixth embodiments. Yes (The image sensor 1 is shown below as a representative.) O
  • the camera module 501 includes an imaging unit 503 including an imaging device 1 and an optical unit 502 including a lens group, an AZD conversion unit 504 that converts a signal from the imaging device 1 into a digital signal, and a post-A / D conversion
  • a video signal processing unit 505 that performs various processing on the digital signal
  • an image memory 507 that stores video signals in units of one frame or one field for video signal processing
  • a register that stores various parameters necessary for video signal processing 508 and a control unit 506 for controlling other units.
  • the video signal processing unit 505 performs various processes such as white balance adjustment, interpolation processing, and ⁇ processing, and outputs the processed image as an RGB or YUV image signal. Or, when the camera module 501 is configured for in-vehicle use, the video signal processing unit 505 detects a white line on the road or detects an obstacle based on a signal from the imaging unit 503.
  • Part or all of the signal processing and control described as being executed in the imaging device in the first to sixth embodiments is shared by the control unit 506 and the video signal processing unit 505 of the camera module 501. It is possible to make it.
  • FIG. 13 is a block diagram showing a basic configuration of a camera module 601 of the eighth embodiment. Note that the same components as those in the seventh embodiment are denoted by the same reference numerals and description thereof is omitted.
  • the image sensor 602 of the camera module 601 is configured in substantially the same manner as the image sensor 201 shown in FIG. 7, for example. However, the image sensor 602 is not provided with the addition unit 230, and the video signal processing unit 605 functions as the addition unit 230 in FIG. That is, the electrical signal of the first photodiode 5 and the electrical signal of the second photodiode 6 are separately output to the AZD conversion unit 604 and AZD converted, and output to the video signal processing unit 605.
  • the video signal processing unit 605 adds the digital signal based on the charge generated in the first photodiode 5 and the digital signal based on the charge generated in the second photodiode 6 to perform the first processing. 1 Increase the signal level of the electrical signal generated by the photodiode 5 in accordance with the signal level of the electrical signal generated by the second photodiode 6.
  • the force video signal processing unit 605 described as increasing the signal output from the image sensor 602 by the video signal processing unit 605 provided outside the image sensor 602 is used. It can be understood as an increasing part of the image sensor of the present invention, in other words, an image sensor can be defined including the video signal processing unit 605.
  • FIG. 14 is a cross-sectional view schematically showing an image sensor 701 according to the ninth embodiment of the present invention.
  • symbol as 1st-8th embodiment is attached
  • subjected and description is abbreviate
  • the first photodiode 5 is provided on the first main surface S1 of the substrate 2, and the second photodiode 6 is provided on the second main surface S2 of the substrate 2.
  • the ninth embodiment is different from the first embodiment in that the second photodiode 6 is arranged so as to be shifted to the outer peripheral side with respect to the first photodiode 5 in the pixel 3 on the outer peripheral side of the pixel arrangement region.
  • the pixel arrangement area is an area where all the pixels 3 are arranged.
  • the image sensor is arranged so that the center of the pixel arrangement region and the optical axis of the lens and Z or the center of the stop are substantially coincident. Therefore, the incident light that passes through the lens and Z or the aperture and enters the imaging device is incident on the first principal surface S1 almost perpendicularly at the center of the pixel array area as indicated by the arrow yl. On the outer periphery side of the area, The light is incident obliquely at an incident angle ⁇ 1 from the center to the outer periphery.
  • the second photodiode 6 is shifted from the first photodiode 5 in the direction away from the optical axis of the lens and Z or the central force of the diaphragm, as the pixel 3 is located at a position away from the optical axis of the lens and the central force of the Z or the diaphragm. Therefore, the light that has passed through the first photodiode 5 can be accurately received by the second photodiode 6.
  • dl tl X tan 0 when the distance between the first photodiode 5 and the second photodiode 6 is tl.
  • the incident angle ⁇ 1 is, for example, 30 ° at the maximum.
  • the configuration in which the position of the second photodiode 6 is shifted with respect to the first photodiode 5 as in the ninth embodiment may be applied to the imaging elements of the first to sixth embodiments.
  • such an image sensor may be applied to the image sensor of the camera module of the seventh and eighth embodiments.
  • FIG. 15 is a cross-sectional view schematically showing an image sensor 711 according to the tenth embodiment of the present invention.
  • symbol as 1st-9th embodiment is attached
  • subjected and description is abbreviate
  • the imaging device 711 is the first in that the first photodiode 5 is provided on the first main surface S1 of the substrate 2 and the second photodiode 6 is provided on the second main surface S2 of the substrate 2.
  • the configuration is the same as that of the embodiment.
  • the tenth embodiment differs from the first embodiment in that the light receiving area of the second photodiode 6 is wider than the light receiving area of the first photodiode 5.
  • the light receiving area is an area of a surface that receives light incident from the first main surface S1 for photoelectric conversion, and is approximately equal to a projected area of each photodiode on the first main surface S1.
  • the first photodiode 5 and the second photodiode 6 are arranged, for example, so that their centers substantially coincide. Then, the second photodiode 6 is increased by the larger area of the second photodiode 6. The diode 6 protrudes to the outer peripheral side of the pixel arrangement region with respect to the first photodiode.
  • the incident light is incident at an incident angle ⁇ 1 and passes through the first photodiode 5, and then enters the non-arranged region of the second photodiode 6. This is suppressed. Furthermore, the light beam imaged in the first photodiode 5 advances while radially spreading after passing through the first photodiode 5, and the cross-sectional area increases. By making the area larger than the light receiving area, the light beam that has passed through the first photodiode 5 can be received without leakage.
  • the light receiving area of the second photodiode 6 is made larger than the light receiving area of the first photodiode 5, and the second photodiode 6 is connected to the first photodiode 5. Therefore, the configuration that protrudes to the outer peripheral side of the pixel array region may be applied to the imaging elements of the first to sixth and ninth embodiments, and such imaging elements are used in the seventh and eighth embodiments.
  • the power of the camera can be applied to the image sensor of the Mera module.
  • FIG. 16 is a cross-sectional view schematically showing an image sensor 721 according to the eleventh embodiment of the present invention.
  • symbol as 1st-10th embodiment is attached
  • subjected and description is abbreviate
  • the image sensor 721 has a second substrate 402 disposed opposite to the second main surface S2 of the substrate 2, and the second substrate 402
  • the photodiodes 6 are arranged on the third main surface S3 of the second substrate 402 facing the second main surface S2 of the substrate 2.
  • the circuit configuration is the same as that of the sixth embodiment.
  • the eleventh embodiment is different from the sixth embodiment in that the first photodiode 5 is arranged on the second main surface S2 of the substrate 2.
  • the second photodiode 6 is disposed, for example, immediately below the first photodiode 5, and the light receiving areas of the first photodiode 5 and the second photodiode 6 are equal.
  • the second main surface S2 and the third main surface S3 face each other with a plurality of spacers 415 interposed therebetween.
  • the spacer 415 is, for example, a solder bump, and keeps the second main surface S2 and the third main surface S3 at a predetermined interval.
  • the distance between the second main surface S2 and the third main surface S3 is, for example, 10 m or less.
  • the distance between the second main surface S2 and the third main surface S3 is reduced. Therefore, it is possible to suppress the light that has entered the first main surface SI at the incident angle ⁇ 1 and has passed through the first photodiode 5 from being shifted from the second photodiode 6.
  • the image sensor 721 can be suitably used for an infrared camera, an infrared sensor, or the like.
  • the image sensor 721 of the eleventh embodiment may be applied to the image sensor of the camera module of the seventh and eighth embodiments.
  • the position of the second photodiode 6 is shifted from the first photodiode 5 as in the ninth embodiment, or the light receiving area of the second photodiode 6 as in the tenth embodiment. To make the light receiving area of the fifth photodiode 5 larger, it is a matter of course.
  • the present invention is not limited to the above embodiment, and may be implemented in various modes.
  • the image sensor may be an XY address type such as a MOS type or a charge transfer type such as a CCD.
  • the embodiment discloses a so-called amplification type imaging device in which an amplifying device is provided for each pixel. However, amplification is performed for all pixels of the imaging device or a part of a plurality of pixels. One element may be provided. Combine the configurations of the first to eighth embodiments as appropriate.
  • the amplifier transistors 13 and 213 are omitted, and the voltage control circuit 30 and the third embodiment shown in FIG.
  • a pair of amplifier transistors 63 composed of variable gain amplifiers may be provided.
  • the amplification factor of the electric signal of the first light receiving element can be controlled for each pixel based on the electric signal of the second light receiving element by one variable gain amplifier provided for all the pixels of the image pickup element.
  • the voltage control circuit 30 (signal level control in the third embodiment shown in FIG. 6 is interposed between the transfer transistor 25 and the storage node SN. Circuit) and correct the signal level of the electrical signal from the second photodiode 6 so that it more closely approximates the signal level of the electrical signal corresponding to the amount of light that has been photoelectrically converted by the first photodiode 5. Thereafter, addition may be performed.
  • the amount of voltage conversion in the voltage control circuit 30 is determined by the amount of incident light on the first main surface S1 and the signal level of the electrical signal of the first photodiode 5 by experiments or the like. It may be determined by specifying the correlation with the signal level of the electrical signal of the second photodiode 6.
  • the second photodiode 6 having a light receiving area larger than that of the first photodiode 5 is changed as in the ninth embodiment shown in FIG.
  • One photodiode 5 may be shifted from the outer peripheral side of the pixel array region.
  • the first light receiving element only needs to be able to receive light incident on one main surface (first main surface S1 in the embodiment) of the substrate. Therefore, it may be disposed on the first main surface S1 as in the first embodiment, or may be disposed on the second main surface S2 as the other main surface as in the eleventh embodiment. It may be embedded in the substrate.
  • the second light receiving element is positioned at the back side of the first light receiving element, that is, at a position where it can receive light that is incident on one main surface of the substrate and passes through at least one of the first light receiving element and the substrate. Anything provided is acceptable. If the incident light energy is absorbed by at least part of the first light receiving element or at least part of the substrate, the amount of light received by the second light receiving element is less than the amount of light received by the first light receiving element. Even if the saturation level is exceeded, the light quantity distribution can be specified in the second light receiving element. Therefore, for example, the second light receiving element may be embedded in the substrate. When the second light receiving element is embedded in the substrate, it may be embedded in the substrate on which the first light receiving element is provided, or another substrate (for example, the second substrate 402 in the embodiment). / That's okay.
  • the distance between the substrate on which the first light receiving element is provided (substrate 2 in the embodiment) and the second substrate is It may be set appropriately. If the insulation between the first light receiving element and the second light receiving element is ensured, the substrate on which the first light receiving element is provided and the second substrate may be in contact with each other. For example, in the sixth embodiment, the substrate 2 and the second substrate 402 may be in contact with each other.
  • the shape and size of the first light receiving element and the shape and size of the second light receiving element are different from each other. May be.
  • the case where the light receiving area of the second photodiode 6 as the second light receiving element is larger than the light receiving area of the first photodiode 5 as the first light receiving element is illustrated.
  • the light receiving area of the second light receiving element may be smaller than the light receiving area of the first light receiving element. If the shape and size of the first light receiving element are different from the shape and size of the second light receiving element, the second light receiving element has a pixel relative to the first light receiving element as in the ninth embodiment shown in FIG.
  • whether the center of the light receiving surface of the second light receiving element is shifted to the outer peripheral side of the pixel array region with respect to the center of the light receiving surface of the first light receiving element is determined as to whether or not it is shifted to the outer peripheral side of the array region. It can be specified by whether or not the power is.
  • the saturation level control unit that controls the saturation level of the first light receiving element may control the saturation level based on at least one of the electric signal of the first light receiving element and the electric signal of the second light receiving element. Therefore, the present invention is not limited to the one that controls the saturation level based on both the electric signal of the first light receiving element and the electric signal of the second light receiving element as described in the first embodiment. As in the past, the saturation level may be controlled based only on the electrical signal of the first light receiving element! /, And the saturation level may be controlled based only on the electrical signal of the second light receiving element. Also good.
  • the saturation level is controlled based on the electrical signal of the second light receiving element, the difference between the incident light amount and the saturation level is smaller than when the saturation level is controlled only based on the electrical signal of the first light receiving element. This makes it easier to identify and to make the saturation level follow the amount of incident light.
  • the saturation level control unit is a pixel that saturates as long as it controls the saturation level of the first light receiving element so that the degree of charge saturation in the first light receiving element is within a predetermined range.
  • the present invention is not limited to the one that controls the saturation level so that is completely eliminated. For example, it is possible to control so that saturated pixels become a predetermined number.

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Abstract

Provided is an imaging element capable of performing imaging with an appropriate dynamic range even if the bright-dark difference in the imaging range is large. An imaging element (1) includes: a substrate (2); a plurality of first photo diodes (5) arranged to correspond to a plurality of pixels (3) on the substrate (2) to receive light coming to a first main surface (S1) and generate an electric charge in accordance with the received light quantity; and a plurality of second photo diodes (6) arranged to correspond to a plurality of pixels (3) on the rear side of the first photo diodes (5) to receive light which has come to the first main surface (S1) and has passed through at least one of the plurality of first photo diodes (5) and the substrate (2) and generate an electric charge in accordance with the received light quantity. An electric signal based on the electric charge generated by the plurality of first photo diodes (5) is added by an electric signal based on the electric charge generated by the second photo diodes (6) of the same pixel.

Description

明 細 書  Specification
撮像素子及びカメラモジュール  Image sensor and camera module
技術分野  Technical field
[0001] 本発明は、 CMOSイメージセンサ等の撮像素子及び撮像素子を備えたカメラモジ ユールに関する。 背景技術  The present invention relates to an image sensor such as a CMOS image sensor and a camera module including the image sensor. Background art
[0002] CMOSイメージセンサ等の固体撮像素子では、受光素子により入射光に応じた電 荷を生じさせ、各受光素子において蓄積した電荷を順次読み出すことにより撮像対 象の画像を取得しており、受光量が多くなると受光素子において電荷が飽和してしま い、いわゆる白とびが生じることが知られている。  [0002] In a solid-state imaging device such as a CMOS image sensor, a charge corresponding to incident light is generated by a light receiving element, and an image to be imaged is acquired by sequentially reading out charges accumulated in each light receiving element. It is known that when the amount of light received increases, the charge in the light receiving element is saturated, and so-called whiteout occurs.
[0003] 特許文献 1では、各画素にフォトダイオードを 2つずつ設け、一方のフォトダイオード 電荷 (電位)を、周辺画素の他方のフォトダイオードの電荷 (電位)により下げることに より、電荷の飽和を防止する技術が開示されている。また、特許文献 1では、他方の フォトダイオードを一方のフォトダイオードの直下に配置する技術も開示されている。  [0003] In Patent Document 1, two photodiodes are provided in each pixel, and the charge (potential) of one photodiode is reduced by the charge (potential) of the other photodiode in the peripheral pixel, thereby saturating the charge. A technique for preventing the above is disclosed. Patent Document 1 also discloses a technique in which the other photodiode is arranged directly below one photodiode.
[0004] なお、受光素子における飽和を防止する技術に関するものではないが、基板の一 主面にフォトダイオードを設けるとともに、他主面にフォトダイオードを設ける技術も知 られている(特許文献 2、 3)。  [0004] Although not related to a technique for preventing saturation in a light receiving element, a technique is also known in which a photodiode is provided on one main surface of a substrate and a photodiode is provided on the other main surface (Patent Document 2, 3).
特許文献 1 :特開 2003— 169252号公報  Patent Document 1: Japanese Unexamined Patent Publication No. 2003-169252
特許文献 2:特開平 5 - 243548号公報  Patent Document 2: JP-A-5-243548
特許文献 3 :特開 2004— 103964号公報  Patent Document 3: Japanese Patent Application Laid-Open No. 2004-103964
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0005] 特許文献 1の技術では、周辺の平均光量が多い画素ほど相対的に電荷を低くする こと〖こなる力ゝら、撮像された画像は、実際の輝度分布とは異なる。すなわち、特許文 献 1の技術では、得られた画像の輝度分布は、実際の輝度分布よりも平滑化されて いる。従って、例えば、撮像画像に基づいて道路の白線を検知する車載用のカメラ モジュール等、明暗差が検知精度に重要となる技術への適用等には不向きであり、 実際の輝度分布を反映しつつ、受光部の飽和による画質の低下を防止することが望 まれる。 [0005] With the technique of Patent Document 1, the captured image is different from the actual luminance distribution, although the power of lowering the relative charge of the pixels having a larger average light amount in the periphery is relatively low. That is, in the technique of Patent Document 1, the luminance distribution of the obtained image is smoothed more than the actual luminance distribution. Therefore, for example, it is not suitable for application to a technology in which a difference in brightness is important for detection accuracy, such as an in-vehicle camera module that detects a white line on a road based on a captured image, It is desirable to prevent deterioration of image quality due to saturation of the light receiving part while reflecting the actual luminance distribution.
[0006] すなわち、撮像範囲内の明暗差が大き!ヽ場合でも、適切なダイナミックレンジで撮 像できる撮像素子及び撮像素子を備えたカメラモジュールを提供することが望まれて いる。  [0006] That is, it is desired to provide an image sensor that can capture an image with an appropriate dynamic range and a camera module that includes the image sensor even when the difference in brightness within the imaging range is large.
課題を解決するための手段  Means for solving the problem
[0007] 本発明の撮像素子は、基板と、前記基板を複数に分割した画素毎に設けられる受 光素子であって、前記基板に設けられ、前記基板の一主面に入射する光を受光し、 受光量に応じた電荷を生じる第 1受光素子と、前記画素毎に設けられる受光素子で あって、前記第 1受光素子の背後側の位置に設けられ、前記一主面に入射して前記 第 1受光素子及び前記基板の少なくとも一方を透過した光を受光し、受光量に応じ た電荷を生じる第 2受光素子と、前記第 1受光素子にて生じた電荷に基づく電気信 号の信号レベルを、同一画素の前記第 2受光素子にて生じた電荷に基づく電気信 号の信号レベルが高 、ほど増加量が大きくなるように増カロさせるように構成された増 加部と、を備える。 The imaging device of the present invention is a light receiving element provided for each of the substrate and the pixels obtained by dividing the substrate into a plurality of pixels, and is provided on the substrate and receives light incident on one main surface of the substrate. A first light receiving element that generates an electric charge according to the amount of light received, and a light receiving element provided for each pixel, provided at a position behind the first light receiving element and incident on the one main surface. A second light receiving element that receives light transmitted through at least one of the first light receiving element and the substrate and generates a charge corresponding to the amount of light received, and a signal of an electric signal based on the charge generated in the first light receiving element An increase unit configured to increase the level so that the amount of increase increases as the signal level of the electric signal based on the charge generated in the second light receiving element of the same pixel increases. .
[0008] 好適には、前記第 1受光素子は、前記一主面に設けられ、前記第 2受光素子は、 前記基板の他主面に設けられて 、る。  Preferably, the first light receiving element is provided on the one main surface, and the second light receiving element is provided on the other main surface of the substrate.
[0009] 好適には、前記基板の他主面に対向して配置される第 2基板を備え、前記第 2受 光素子は、前記第 2基板に設けられている。 [0009] Preferably, a second substrate is provided opposite to the other main surface of the substrate, and the second light receiving element is provided on the second substrate.
[0010] 好適には、前記第 1受光素子は、前記基板の前記一主面に設けられ、前記第 2受 光素子は、前記第 2基板のうち前記基板の他主面に対向する主面に設けられている [0010] Preferably, the first light receiving element is provided on the one main surface of the substrate, and the second light receiving element is a main surface of the second substrate facing the other main surface of the substrate. Is provided in
[0011] 好適には、前記第 1受光素子は、前記基板の前記他主面に設けられ、前記第 2受 光素子は、前記第 2基板のうち前記基板の前記他主面に対向する主面に設けられて いる。 [0011] Preferably, the first light receiving element is provided on the other main surface of the substrate, and the second light receiving element is a main surface of the second substrate that faces the other main surface of the substrate. It is provided on the surface.
[0012] 好適には、前記増加部及び当該増加部の動作を制御する増加制御部のうち少なく とも一部は前記第 2基板に設けられている。  [0012] Preferably, at least a part of the increase unit and the increase control unit that controls the operation of the increase unit is provided on the second substrate.
[0013] 好適には、前記増加部は、前記第 1受光素子にて生じた電荷に基づく電気信号に 、同一画素の前記第 2受光素子にて生じた電荷に基づく電気信号を加算する。 [0013] Preferably, the increase unit generates an electric signal based on an electric charge generated in the first light receiving element. Then, an electric signal based on the electric charge generated in the second light receiving element of the same pixel is added.
[0014] 好適には、前記増加部は、前記第 1受光素子にて生じた電荷に基づく電気信号を 増幅する増幅素子を備え、前記増幅素子は、前記第 2受光素子にて生じた電荷に基 づく電気信号の信号レベルが大きいほど、同一画素の前記第 1受光素子にて生じた 電荷に基づく電気信号を増幅するときの増幅率を高くする。 [0014] Preferably, the increase unit includes an amplifying element that amplifies an electric signal based on the electric charge generated in the first light receiving element, and the amplifying element uses the electric charge generated in the second light receiving element. The higher the signal level of the electric signal based, the higher the amplification factor when amplifying the electric signal based on the electric charge generated in the first light receiving element of the same pixel.
[0015] 好適には、前記第 2受光素子が複数配列される面と同一平面に配置された第 3受 光素子と、前記一主面側から前記第 3受光素子へ向かう光を遮断する遮光部と、を 備え、前記増加部は、前記第 2受光素子にて生じた電荷に基づく電気信号の信号レ ベル力 前記第 3受光素子にて生じた電荷に基づく電気信号の信号レベルを減算し て前記第 2受光素子にて生じた電荷に基づく電気信号の信号レベルを補正し、その 補正後の信号レベルに基づいて前記第 1受光素子にて生じた電荷に基づく電気信 号の信号レベルを増加させる。 [0015] Preferably, a third light receiving element disposed on the same plane as a surface on which a plurality of the second light receiving elements are arranged, and a light shielding member that blocks light from the one main surface side toward the third light receiving element. A signal level force of an electric signal based on the electric charge generated in the second light receiving element, and the increase unit subtracts a signal level of the electric signal based on the electric charge generated in the third light receiving element. The signal level of the electric signal based on the charge generated in the second light receiving element is corrected, and the signal level of the electric signal based on the charge generated in the first light receiving element is corrected based on the corrected signal level. increase.
[0016] 好適には、前記第 1受光素子にて生じた電荷に基づく電気信号及び前記第 2受光 素子にて生じた電荷に基づく電気信号のうち少なくとも一方に基づいて、以降にお いて前記第 1受光素子における電荷の飽和の程度が所定の範囲内に収まるように、 前記第 1受光素子の飽和レベルを制御するように構成された飽和レベル制御部を備 える。 [0016] Preferably, based on at least one of an electric signal based on the electric charge generated in the first light receiving element and an electric signal based on the electric charge generated in the second light receiving element, and thereafter A saturation level control unit configured to control the saturation level of the first light receiving element so that the degree of charge saturation in the one light receiving element is within a predetermined range is provided.
[0017] 好適には、画素配列領域の外周側の画素ほど、前記第 2受光素子が同一画素の 前記第 1受光素子に対して画素配列領域の外周側にずれて配置されている。  [0017] Preferably, the pixels on the outer peripheral side of the pixel array region are arranged such that the second light receiving elements are shifted from the first light receiving element of the same pixel toward the outer peripheral side of the pixel array region.
[0018] 好適には、前記第 2受光素子は、前記第 1受光素子よりも受光面積が広ぐ前記第 1受光素子に対して画素配列領域の外周側へはみ出している。  [0018] Preferably, the second light receiving element protrudes to the outer peripheral side of the pixel arrangement region with respect to the first light receiving element having a light receiving area larger than that of the first light receiving element.
[0019] 本発明のカメラモジュールは、レンズと、前記レンズからの光が結像する撮像素子と 、前記撮像素子の出力する電気信号を処理するように構成された信号処理部と、を 備え、前記撮像素子は、基板と、前記基板を複数に分割した画素毎に設けられる受 光素子であって、前記基板に設けられ、前記基板の一主面に入射する光を受光し、 受光量に応じた電荷を生じる第 1受光素子と、前記画素毎に設けられる受光素子で あって、前記第 1受光素子の背後側の位置に設けられ、前記一主面に入射して前記 第 1受光素子及び前記基板の少なくとも一方を透過した光を受光し、受光量に応じ た電荷を生じる第 2受光素子と、を備え、前記信号処理部は、前記第 1受光素子にて 生じた電荷に基づく電気信号の信号レベルを、同一画素の前記第 2受光素子にて 生じた電荷に基づく電気信号の信号レベルが高 、ほど増加量が大きくなるように増 カロさせるように構成されて 、る。 [0019] A camera module of the present invention includes a lens, an image sensor on which light from the lens forms an image, and a signal processing unit configured to process an electrical signal output from the image sensor, The image sensor is a light receiving element provided for each pixel obtained by dividing the substrate and the substrate into a plurality of pixels. The image receiving element is provided on the substrate and receives light incident on one main surface of the substrate. A first light-receiving element that generates a corresponding charge, and a light-receiving element provided for each pixel, provided at a position behind the first light-receiving element, and incident on the one main surface and the first light-receiving element And receiving light transmitted through at least one of the substrates, depending on the amount of light received And the signal processing unit generates a signal level of an electrical signal based on the charge generated in the first light receiving element in the second light receiving element of the same pixel. It is configured to increase the amount of increase so that the amount of increase increases as the signal level of the electric signal based on the charge increases.
[0020] 好適には、前記レンズの光軸力も離れた位置の画素ほど、前記第 2受光素子が同 一画素の前記第 1受光素子に対して前記光軸から離れる方向にずれて配置されて いる。 [0020] Preferably, the second light receiving element is arranged so as to be shifted in a direction away from the optical axis with respect to the first light receiving element of the same pixel, as the pixel is located away from the optical axis force of the lens. Yes.
発明の効果  The invention's effect
[0021] 本発明によれば、撮像範囲内の明暗差が大きい場合でも適切なダイナミックレンジ で撮像できる。  [0021] According to the present invention, it is possible to capture an image with an appropriate dynamic range even when the brightness difference within the imaging range is large.
図面の簡単な説明  Brief Description of Drawings
[0022] [図 1]本発明の第 1の実施形態の撮像素子を模式的に示す断面図。  FIG. 1 is a cross-sectional view schematically showing an imaging element according to a first embodiment of the present invention.
[図 2]図 1の撮像素子における信号処理の基本的な概念を説明する図。  FIG. 2 is a diagram for explaining a basic concept of signal processing in the image sensor of FIG.
[図 3]図 1の撮像素子の画素の回路構成を示す。  FIG. 3 shows a circuit configuration of a pixel of the image sensor in FIG.
[図 4]図 1の撮像素子における飽和レベルの制御の様子を説明する図。  4 is a diagram for explaining the state of saturation level control in the image sensor of FIG. 1.
[図 5]本発明の第 2の実施形態の撮像素子の画素の回路構成を示す図。  FIG. 5 is a diagram showing a circuit configuration of a pixel of an image sensor according to a second embodiment of the present invention.
[図 6]本発明の第 3の実施形態の撮像素子の画素の回路構成を示す図。  FIG. 6 is a diagram showing a circuit configuration of a pixel of an image sensor according to a third embodiment of the present invention.
[図 7]本発明の第 4の実施形態の撮像素子の画素の回路構成を示す図。  FIG. 7 is a diagram showing a circuit configuration of a pixel of an image sensor according to a fourth embodiment of the present invention.
[図 8]本発明の第 5の実施形態の撮像素子を模式的に示す断面図。  FIG. 8 is a cross-sectional view schematically showing an image sensor according to a fifth embodiment of the present invention.
[図 9]図 8の撮像素子を模式的に示す平面図。  FIG. 9 is a plan view schematically showing the image sensor of FIG.
[図 10]図 8の撮像素子の画素の回路構成を示す図。  10 is a diagram showing a circuit configuration of a pixel of the image sensor in FIG.
[図 11]本発明の第 6の実施形態の撮像素子を模式的に示す断面図及び平面図。  FIG. 11 is a cross-sectional view and a plan view schematically showing an image sensor according to a sixth embodiment of the present invention.
[図 12]本発明の第 7の実施形態のカメラモジュールの基本構成を示すブロック図。  FIG. 12 is a block diagram showing a basic configuration of a camera module according to a seventh embodiment of the present invention.
[図 13]本発明の第 8の実施形態のカメラモジュールの基本構成を示すブロック図。  FIG. 13 is a block diagram showing the basic configuration of a camera module according to an eighth embodiment of the present invention.
[図 14]本発明の第 9の実施形態の撮像素子を模式的に示す断面図。  FIG. 14 is a cross-sectional view schematically showing an image sensor of a ninth embodiment of the present invention.
[図 15]本発明の第 10の実施形態の撮像素子を模式的に示す断面図。  FIG. 15 is a cross-sectional view schematically showing an image sensor according to a tenth embodiment of the present invention.
[図 16]本発明の第 11の実施形態の撮像素子を模式的に示す断面図。  FIG. 16 is a cross-sectional view schematically showing an image sensor according to an eleventh embodiment of the present invention.
符号の説明 [0023] 2…基板、 3…画素、 5…第 1受光素子、 6…第 2受光素子、 SN…ノード (増加部)、 S1 主面、 S2"-他主面。 Explanation of symbols [0023] 2 ... substrate, 3 ... pixel, 5 ... first light receiving element, 6 ... second light receiving element, SN ... node (increasing part), S1 main surface, S2 "-other main surface.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0024] (第 1の実施形態)  [0024] (First embodiment)
図 1は本発明の第 1の実施形態の撮像素子 1を模式的に示す断面図である。撮像 素子 1は、例えば MOS型の撮像素子により構成されており、基板 2と、基板 2の第 1 主面 (一主面) S 1に設けられた第 1フォトダイオード (第 1受光素子、光電変換素子) 5 と、その裏側の第 2主面 (他主面) S2に設けられた第 2フォトダイオード (第 2受光素子 、光電変換素子) 6とを備えている。  FIG. 1 is a cross-sectional view schematically showing the image sensor 1 according to the first embodiment of the present invention. The image pickup device 1 is configured by, for example, a MOS type image pickup device, and includes a substrate 2 and a first photodiode (first light receiving device, photoelectric detector) provided on the first main surface (one main surface) S 1 of the substrate 2. Conversion element) 5 and a second photodiode (second light receiving element, photoelectric conversion element) 6 provided on the second main surface (other main surface) S2 on the back side.
[0025] 第 1フォトダイオード 5及び第 2フォトダイオード 6は、基板 2を X方向(紙面奥手方向 )及び Y方向(紙面左右方向)において数百〜数千に画素分割した複数の画素 3に それぞれ 1つずつ設けられており、 X方向及び Y方向に複数配列されている。第 1フ オトダイオード 5及び第 2フォトダイオード 6は基板 2を挟んで対向するように配置され ている。  [0025] The first photodiode 5 and the second photodiode 6 are respectively provided in a plurality of pixels 3 obtained by dividing the substrate 2 into hundreds to thousands of pixels in the X direction (backward direction on the paper surface) and the Y direction (left and right direction on the paper surface). One is provided, and a plurality of arrays are arranged in the X and Y directions. The first photodiode 5 and the second photodiode 6 are arranged so as to face each other with the substrate 2 interposed therebetween.
[0026] 第 1フォトダイオード 5は、第 1主面 S1に入射する光を受光し、受光した光を光電変 換して受光量に応じた電荷を生じる。第 2フォトダイオード 6は、第 1フォトダイオード 5 よりも基板 2の第 2主面 S2側 (第 1フォトダイオード 5の背後側)の位置に配列されて おり、第 1主面 S1に入射して第 1フォトダイオード 5及び基板 2の少なくとも一方を透 過した光を受光し、受光した光を光電変換して受光量に応じた電荷を生じる。各画素 には、第 1フォトダイオード 5に生じた電荷に基づく信号を検出するための第 1電極 9 、第 2フォトダイオード 6に生じた電荷に基づく信号を検出するための第 2電極 10等 が設けられている。  [0026] The first photodiode 5 receives light incident on the first main surface S1, and photoelectrically converts the received light to generate a charge corresponding to the amount of light received. The second photodiode 6 is arranged at a position closer to the second main surface S2 side of the substrate 2 than the first photodiode 5 (behind the first photodiode 5), and is incident on the first main surface S1. Light passing through at least one of the first photodiode 5 and the substrate 2 is received, and the received light is photoelectrically converted to generate a charge corresponding to the amount of light received. Each pixel has a first electrode 9 for detecting a signal based on the charge generated in the first photodiode 5, a second electrode 10 for detecting a signal based on the charge generated in the second photodiode 6, and the like. Is provided.
[0027] なお、基板 2、第 1フォトダイオード 5、第 1電極 9の構成は、公知の適宜な構成とし てよい。また、第 2フォトダイオード 6及び第 2電極 10についても、第 1主面 S1の反対 側の第 2主面 S2に配置されていることを除けば、第 1フォトダイオード 5及び第 1電極 9と同様の構成にしてよい。例えば、基板 2は、シリコン (Si)を主原料とする P型半導 体素子基板であり、第 1フォトダイオード 5及び第 2フォトダイオード 6は、 PN接合によ り形成され、力ソード側 (N型半導体側)を基板 2から露出させ、アノード側 (P型半導 体側)を基板 2に埋没させて配置されている。第 2フォトダイオード 6は、例えば第 1フ オトダイオード 5と同一材質、同一形状に形成されており、第 1フォトダイオード 5の製 造及び基板 2への実装と同一の工程により製造及び実装される。 [0027] The configuration of the substrate 2, the first photodiode 5, and the first electrode 9 may be a known appropriate configuration. Further, the second photodiode 6 and the second electrode 10 are also arranged on the second main surface S2 opposite to the first main surface S1, except for the first photodiode 5 and the first electrode 9. A similar configuration may be used. For example, the substrate 2 is a P-type semiconductor element substrate made of silicon (Si) as a main material, and the first photodiode 5 and the second photodiode 6 are formed by PN junctions and are formed on the force sword side ( N-type semiconductor side) is exposed from substrate 2 and anode side (P-type semiconductor) The body side is buried in the substrate 2. The second photodiode 6 is formed, for example, in the same material and shape as the first photodiode 5, and is manufactured and mounted in the same process as the manufacturing of the first photodiode 5 and the mounting on the substrate 2. .
[0028] 図 2は撮像素子 1における信号処理の基本的な概念を説明する図であり、図 2Aは 第 1フォトダイオード 5の出力信号を、図 2Bは第 2フォトダイオード 6の出力信号を、図 2Cは第 2フォトダイオード 6の出力信号に基づいて第 1フォトダイオード 5の出力信号 を補正した場合の出力信号を示している。各図において、横軸は撮像素子 1の X方 向(又は Y方向)の位置を示しており、縦軸は撮像素子 1の受光量及び当該受光量 に対応する信号レベル (あるいは当該信号レベルを増加させたもの)を 1: 1の比率で 示している。 FIG. 2 is a diagram for explaining the basic concept of signal processing in the image sensor 1, FIG. 2A shows the output signal of the first photodiode 5, FIG. 2B shows the output signal of the second photodiode 6, FIG. 2C shows an output signal when the output signal of the first photodiode 5 is corrected based on the output signal of the second photodiode 6. In each figure, the horizontal axis indicates the position of the image sensor 1 in the X direction (or Y direction), and the vertical axis indicates the amount of light received by the image sensor 1 and the signal level corresponding to the amount of received light (or the signal level). (Increased) is shown in a 1: 1 ratio.
[0029] 図 2Aにおいて、実線 L1は所定の撮像対象を撮像したときに撮像素子 1の第 1主面 S1に入射する光の光量分布の例を示しており、この例では、第 1主面 S1の中央の光 量が多ぐ両端において光量が少なくなつている。実線 L2は第 1フォトダイオード 5に お!ヽて電荷が飽和する光量及び当該光量に対応する電気信号の信号レベル、すな わち、飽和レベルを示しており、点線 L3は第 1フォトダイオード 5の出力信号の信号 レベルを示している。  In FIG. 2A, a solid line L1 shows an example of a light amount distribution of light incident on the first main surface S1 of the image sensor 1 when a predetermined imaging target is imaged. In this example, the first main surface The amount of light at the center of S1 is large and the light intensity is decreasing at both ends. The solid line L2 is connected to the first photodiode 5! The amount of light that saturates the charge and the signal level of the electrical signal corresponding to the amount of light, that is, the saturation level, indicate the signal level of the output signal of the first photodiode 5.
[0030] 第 1主面 S1に入射する光の光量は、 xl〜x2の範囲において飽和レベルを超えて いる。このため、第 1フォトダイオード 5の電気信号の信号レベルは、 xl〜x2の範囲 の間において飽和レベルの高さでフラットになってしまい、第 1フォトダイオード 5の電 気信号だけでは xl〜x2の範囲における光量分布を特定することができない。  [0030] The amount of light incident on the first major surface S1 exceeds the saturation level in the range of xl to x2. For this reason, the signal level of the electric signal of the first photodiode 5 becomes flat at the level of the saturation level in the range of xl to x2, and xl to x2 with the electric signal of the first photodiode 5 alone. The light quantity distribution in the range cannot be specified.
[0031] 一方、図 2Bに示すように、第 1主面 S1に入射した光(実線 L1)は、第 1フォトダイォ ード 5や基板 2により光量 Q1だけ吸収され、実線 L1で示す光量のうち実線 L4より上 の部分の光量だけが第 2フォトダイオード 6に到達し、点線 L6で示すように第 2フォト ダイオード 6により光電変換される。ここで、第 1主面 S1に入射した光が第 2フォトダイ オード 6に到達する範囲 χΐ 〜χ2' は、 xl〜x2の範囲と少なくとも一部が重複する  On the other hand, as shown in FIG. 2B, the light (solid line L1) incident on the first main surface S1 is absorbed by the first photodiode 5 and the substrate 2 by the light quantity Q1, and out of the light quantity indicated by the solid line L1. Only the amount of light above the solid line L4 reaches the second photodiode 6, and is photoelectrically converted by the second photodiode 6 as indicated by the dotted line L6. Here, the range χΐ to χ2 ′ where the light incident on the first main surface S1 reaches the second photodiode 6 is at least partially overlapped with the range of xl to x2.
[0032] そこで、図 2Αの点線 L3で示す第 1フォトダイオード 5の電気信号の信号レベルを、 図 2Βの点線 L6で示す第 2フォトダイオード 6の電気信号の信号レベルにより補正す ることにより、図 2Cに示すように、第 1主面 S 1に入射した光の光量分布(実線 L1)を 適切に反映した電気信号の分布(点線 L7)を得ることができる。 Therefore, the signal level of the electrical signal of the first photodiode 5 indicated by the dotted line L3 in FIG. 2B is corrected by the signal level of the electrical signal of the second photodiode 6 indicated by the dotted line L6 in FIG. Thus, as shown in FIG. 2C, an electric signal distribution (dotted line L7) appropriately reflecting the light quantity distribution (solid line L1) of the light incident on the first main surface S1 can be obtained.
[0033] 補正方法は適宜であるが、例えば、図 2Aの点線 L3で示す第 1フォトダイオード 5の 電気信号の信号レベルと、図 2Bの点線 L6で示す第 2フォトダイオード 6の電気信号 の信号レベルとを加算することにより、図 2Cの点線 L7で示す電気信号の分布が得ら れる。 [0033] The correction method is appropriate. For example, the signal level of the electrical signal of the first photodiode 5 indicated by a dotted line L3 in FIG. 2A and the signal of the electrical signal of the second photodiode 6 indicated by a dotted line L6 in FIG. By adding the level, the electric signal distribution indicated by the dotted line L7 in FIG. 2C can be obtained.
[0034] また、例えば、図 2Bの点線 L6で示す第 2フォトダイオード 6の信号レベルの分布に 応じて図 2Aの点線 L3で示す第 1フォトダイオード 5の信号を増幅する際の増幅率の 分布を変化させることにより、図 2Cの点線 L7で示す電気信号の分布を得ることがで きる。すなわち、 xO〜xl (xl' )及び χ2 (χ2' ;)〜 χ3の範囲においては増幅率を一 定の値とし、 xl (x ;)〜 χ2 (χ2' )の範囲においては増幅率を前記一定の増幅率 よりも高ぐより具体的には、第 2フォトダイオード 6の電気信号の信号レベルが高いと ころほど増幅率が高くなるようにすることにより、図 2Cの点線 L7で示す電気信号の分 布を得ることができる。  [0034] Further, for example, the distribution of amplification factors when the signal of the first photodiode 5 indicated by the dotted line L3 in Fig. 2A is amplified according to the distribution of the signal level of the second photodiode 6 indicated by the dotted line L6 in Fig. 2B. By changing, the electric signal distribution indicated by the dotted line L7 in FIG. 2C can be obtained. That is, the amplification factor is a constant value in the range of xO to xl (xl ') and χ2 (χ2';) to χ3, and the amplification factor in the range of xl (x;) to χ2 (χ2 '). More specifically, when the signal level of the electric signal of the second photodiode 6 is higher, the higher the gain is, the higher the gain becomes, so that the electric signal indicated by the dotted line L7 in FIG. Can be obtained.
[0035] 図 3は撮像素子 1の画素 3の回路構成と、画素 3の読み出しタイミングを制御する垂 直駆動回路 20との接続関係を示す図である。  FIG. 3 is a diagram showing a connection relationship between the circuit configuration of the pixel 3 of the image sensor 1 and the vertical drive circuit 20 that controls the readout timing of the pixel 3.
[0036] 第 1フォトダイオード 5に係る回路構成は、公知の適宜な構成としてよい。例えば、 各画素 3は、記憶ノード SNをフローティング状態力も電源線 17への接続状態に切り 替え、記憶ノード SNに電源電圧 VAAを充電して、その蓄積電荷量をリセットするリセ ットトランジスタ 11と、リセット後に再びフローティング状態となった記憶ノード SNに第 1フォトダイオード 5で発生した電荷 (通常、電子。正孔でもよい。)を転送する第 1転 送トランジスタ 12と、ドレインが電源線 17に接続され、記憶ノード SNに転送した蓄積 電荷に応じた画素信号を増幅して、垂直信号線 14に出力するアンプトランジスタ 13 とを備えている。  The circuit configuration related to the first photodiode 5 may be a known appropriate configuration. For example, each pixel 3 has a reset transistor 11 that switches the storage node SN to a connection state to the power supply line 17 in the floating state, charges the storage node SN with the power supply voltage VAA, and resets the accumulated charge amount. The first transfer transistor 12 for transferring the charge (usually an electron or a hole) generated in the first photodiode 5 to the storage node SN that has been in a floating state after reset, and the drain connected to the power line 17 And an amplifier transistor 13 that amplifies a pixel signal corresponding to the stored charge transferred to the storage node SN and outputs the amplified signal to the vertical signal line 14.
[0037] リセットトランジスタ 11は、そのドレインが電源線 17に接続され、ソースが記憶ノード SNに接続され、ゲートが電圧の印加を制御する第 1制御線 15に接続されている。第 1転送トランジスタ 12は、そのドレインが記憶ノード SNに接続され、ソースが第 1フォト ダイオード 5の力ソードとなる半導体不純物領域 (不図示)に接続され、ゲートが電圧 の印加を制御する第 2制御線 16に接続されている。アンプトランジスタ 13は、そのド レインが電源線 17に接続され、ソースが垂直信号線 14に接続され、ゲートが記憶ノ ード SNに接続されている。 The reset transistor 11 has a drain connected to the power supply line 17, a source connected to the storage node SN, and a gate connected to the first control line 15 that controls voltage application. The first transfer transistor 12 has a drain connected to the storage node SN, a source connected to a semiconductor impurity region (not shown) that serves as a force sword of the first photodiode 5, and a gate connected to a voltage. Is connected to a second control line 16 for controlling the application of. The amplifier transistor 13 has a drain connected to the power supply line 17, a source connected to the vertical signal line 14, and a gate connected to the storage node SN.
[0038] 第 1制御線 15及び第 2制御線 16のそれぞれに各種電圧を供給する垂直駆動回路 20が画素部の周囲に設けられている。また、垂直信号線 14に読み出された画素信 号を、例えばノイズ除去や基準レベル確定 (クランプ)のために処理し時系列信号に 変換して読み出すための水平駆動回路 22が画素部の周囲に設けられている。さら に、これらの垂直又は水平の駆動回路を制御する動作制御回路 (飽和レベル制御部 ) 23も撮像素子 1内に設けられて 、る。  A vertical drive circuit 20 that supplies various voltages to each of the first control line 15 and the second control line 16 is provided around the pixel portion. In addition, a horizontal drive circuit 22 for processing the pixel signal read out to the vertical signal line 14 to convert it into a time-series signal for noise removal or reference level determination (clamping), for example, and reading it out is provided around the pixel portion. Is provided. Further, an operation control circuit (saturation level control unit) 23 for controlling these vertical or horizontal drive circuits is also provided in the image sensor 1.
[0039] 画素 3は更に、第 2フォトダイオード 6の電気信号を第 1フォトダイオード 5の電気信 号に加算するために以下の構成を有して 、る。  The pixel 3 further has the following configuration for adding the electrical signal of the second photodiode 6 to the electrical signal of the first photodiode 5.
[0040] すなわち、画素 3は、リセット後に再びフローティング状態となった記憶ノード SNに 第 2フォトダイオード 6で発生した電荷を転送する第 2転送トランジスタ 25を備えてい る。第 2転送トランジスタ 25は、そのドレインが記憶ノード SNに接続され、ソースが第 2フォトダイオード 6の力ソードとなる半導体不純物領域 (不図示)に接続され、ゲート が電圧の印加を制御する第 2制御線 16に接続されている。  That is, the pixel 3 includes a second transfer transistor 25 that transfers the charge generated in the second photodiode 6 to the storage node SN that is again in a floating state after reset. The second transfer transistor 25 has a drain connected to the storage node SN, a source connected to a semiconductor impurity region (not shown) that serves as a force sword of the second photodiode 6, and a gate that controls the application of voltage. Connected to control line 16.
[0041] 以上の構成を有する撮像素子 1の動作を説明する。  The operation of the image sensor 1 having the above configuration will be described.
[0042] 撮像素子 1の画素 3では、リセットトランジスタ 11がオンされて記憶ノード SNに電源 電圧 VAAが印加されることにより、記憶ノード SNに蓄積された電荷が排出され、各 画素のリセットが行われる。その後、リセットトランジスタ 11はオフされる。  [0042] In the pixel 3 of the image sensor 1, the reset transistor 11 is turned on and the power supply voltage VAA is applied to the storage node SN, whereby the charge accumulated in the storage node SN is discharged, and each pixel is reset. Is called. Thereafter, the reset transistor 11 is turned off.
[0043] 第 1転送トランジスタ 12及び第 2転送トランジスタ 25がオフされた状態で第 1フォトダ ィオード 5及び第 2フォトダイオード 6において光電変換が行われ、第 1フォトダイォー ド 5及び第 2フォトダイオード 6には電荷が蓄積される。  [0043] Photoelectric conversion is performed in the first photodiode 5 and the second photodiode 6 with the first transfer transistor 12 and the second transfer transistor 25 turned off, and the first photodiode 5 and the second photodiode 6 Charge is accumulated.
[0044] そして、第 2制御線 16に電圧が印加されると、第 1転送トランジスタ 12及び第 2転送 トランジスタ 25は同時にオンされ、第 1フォトダイオード 5及び第 2フォトダイオード 6に 蓄積された電荷 (電気信号)は記憶ノード SNにて合流し、合流した電荷に応じた電 圧変動が生じる。  [0044] When a voltage is applied to the second control line 16, the first transfer transistor 12 and the second transfer transistor 25 are turned on simultaneously, and the charges accumulated in the first photodiode 5 and the second photodiode 6 are turned on. (Electrical signals) merge at the storage node SN, and voltage fluctuations occur according to the merged charges.
[0045] 従って、第 1フォトダイオード 5にて生じた電荷に基づく電気信号の信号レベルが、 同一画素の第 2フォトダイオード 6にて生じた電荷に基づく電気信号の信号レベルが 高いほど増加量が大きくなるように増加されることになる。なお、記憶ノード SNは、複 数の前記第 1受光素子にて生じた電荷に基づく電気信号の信号レベルに同一画素 の前記複数の第 2受光素子にて生じた電荷に基づく電気信号の信号レベルを加算 する増加部として機能して 、る。 Therefore, the signal level of the electric signal based on the electric charge generated in the first photodiode 5 is The increase amount increases as the signal level of the electric signal based on the charge generated in the second photodiode 6 of the same pixel increases. The storage node SN has a signal level of an electric signal based on electric charges generated in the plurality of second light receiving elements of the same pixel as a signal level of electric signals based on electric charges generated in the plurality of first light receiving elements. It functions as an increasing part that adds.
[0046] 記憶ノード SNにて生じた電圧変動はアンプトランジスタ 13により増幅されて垂直信 号線 14に出力され、複数の垂直信号線 14に出力された電気信号は水平駆動回路 22により順次出力される。これにより、各画素 3の出力信号 (電圧 Vpix)が得られる。  The voltage fluctuation generated at the storage node SN is amplified by the amplifier transistor 13 and output to the vertical signal line 14, and the electric signal output to the plurality of vertical signal lines 14 is sequentially output by the horizontal drive circuit 22. . As a result, an output signal (voltage Vpix) of each pixel 3 is obtained.
[0047] 撮像素子 1では、以上の各画素における動作がフレーム毎に繰り返される。撮像素 子 1の動作制御回路は、 1のフレームにおける第 1フォトダイオード 5にて生じた電荷 に基づく電気信号及び第 2フォトダイオード 6にて生じた電荷に基づく電気信号のう ち少なくとも一方に基づいて、次のフレームにおいて複数の第 1フォトダイオードにお ける電荷の飽和の程度が所定の範囲内に収まるように、第 1フォトダイオードの飽和 レベルを制御する。  [0047] In the image sensor 1, the above-described operation in each pixel is repeated for each frame. The operation control circuit of the imaging element 1 is based on at least one of an electric signal based on the electric charge generated in the first photodiode 5 and an electric signal based on the electric charge generated in the second photodiode 6 in one frame. In the next frame, the saturation level of the first photodiode is controlled so that the degree of charge saturation in the plurality of first photodiodes falls within a predetermined range.
[0048] 図 4は、撮像素子 1における飽和レベルの制御の様子を説明する図であり、横軸は フレーム数(時間)を、縦軸は光量を示している。凡例 Mlは、各フレームにおいて、 複数の画素 3のうち入射光量が最大となる画素 3の入射光量を示し、凡例 M2は、画 素 3において電荷が飽和する光量 (飽和レベル)を示している。以下では、飽和する 画素がなくなるように制御する場合を例にとって説明する。  FIG. 4 is a diagram for explaining the state of saturation level control in the image sensor 1, in which the horizontal axis indicates the number of frames (time), and the vertical axis indicates the amount of light. Legend Ml indicates the incident light amount of pixel 3 having the maximum incident light amount among the plurality of pixels 3 in each frame, and legend M2 indicates the light amount (saturation level) at which charge is saturated in pixel 3. In the following, a case where control is performed so as to eliminate saturated pixels will be described as an example.
[0049] フレーム f 1にお!/、ては、入射光量は飽和レベルを下回って!/、る。フレーム f 2にお!/ヽ ては、入射光量が飽和レベルを超える。そこで、動作制御回路 23は、次のフレーム f 3における飽和レベルを入射光量に対して相対的に上昇させる。なお、入射光量が 最大となる画素 3及びその入射光量は、水平駆動回路 22から出力される各画素に対 応する出力信号 (電圧 Vpix)から特定される。飽和レベルの上昇量は、例えば入射 光量と飽和レベルとの差の光量 dQ2に比例した量にするなど、光量 dQ2に応じて適 宜に設定される。飽和レベルの相対的な上昇は、蓄積時間を短縮して光電変換する 光量を下げることにより、あるいは、電源線 17に印加する電源電圧 VAAを上げること により行われる。 [0050] フレーム f3では、入射光量の上昇に対して飽和レベルの上昇が十分に追従してお らず、依然として入射光量が飽和レベルを上回っている。そして、次のフレーム f4に おいて飽和レベルは入射光量を超える。なお、動作制御回路 23は、入射光量に対 して飽和レベルが大きくなり過ぎた場合には、逆に飽和レベルを下げる。 [0049] In frame f 1! /, The incident light intensity falls below the saturation level! /. For frame f 2, the incident light intensity exceeds the saturation level. Therefore, the operation control circuit 23 raises the saturation level in the next frame f 3 relative to the incident light amount. Note that the pixel 3 having the maximum incident light amount and the incident light amount are specified from the output signal (voltage Vpix) corresponding to each pixel output from the horizontal drive circuit 22. The amount of increase in the saturation level is appropriately set according to the light amount dQ2, for example, an amount proportional to the light amount dQ2 of the difference between the incident light amount and the saturation level. The relative increase in the saturation level is performed by shortening the accumulation time and decreasing the amount of photoelectric conversion, or by increasing the power supply voltage VAA applied to the power supply line 17. [0050] In frame f3, the increase in the saturation level does not sufficiently follow the increase in the incident light amount, and the incident light amount still exceeds the saturation level. In the next frame f4, the saturation level exceeds the amount of incident light. The operation control circuit 23 lowers the saturation level when the saturation level becomes too large with respect to the incident light quantity.
[0051] 以上の実施形態によれば、第 1フォトダイオード 5よりも第 2主面 S2側の位置にて配 列され、第 1主面 S1に入射して第 1フォトダイオード 5及び基板 2の少なくとも一方を 透過した光を受光し、受光量に応じた電荷を生じる第 2フォトダイオード 6を設け、第 1 フォトダイオード 5にて生じた電荷に基づく電気信号の信号レベルを、同一画素の第 2フォトダイオード 6にて生じた電荷に基づく電気信号の信号レベルが高いほど増加 量が大きくなるように増加させることから、撮像範囲内の明暗差が大きい場合でも、適 切なダイナミックレンジで撮像できる。  [0051] According to the above embodiment, the first photodiode 5 and the substrate 2 are arranged at a position closer to the second main surface S2 than the first photodiode 5, and enter the first main surface S1. A second photodiode 6 that receives light transmitted through at least one and generates a charge corresponding to the amount of light received is provided, and the signal level of the electrical signal based on the charge generated in the first photodiode 5 is set to the second level of the same pixel. Since the amount of increase increases as the signal level of the electrical signal based on the charge generated in the photodiode 6 increases, even if the contrast in the imaging range is large, imaging can be performed with an appropriate dynamic range.
[0052] すなわち、第 1主面 S1に入射した光は、第 1フォトダイオード 5及び基板 2の少なくと も一方に一定量が吸収され、残りが第 2フォトダイオード 6に到達する。このため、第 1 フォトダイオード 5にお!/、て電荷が飽和して電気信号の信号レベルの分布がフラット になってしまった領域においても、第 2フォトダイオード 6においては光量分布に応じ た信号レベル分布で電気信号が出力される。そして、その信号レベル分布に応じた 増加量で第 1フォトダイオード 5の信号の信号レベル分布を増加させることにより、実 際の輝度分布を反映しつつ、受光部の飽和による画質の低下を防止することができ る。  That is, a certain amount of light incident on the first main surface S 1 is absorbed by at least one of the first photodiode 5 and the substrate 2, and the rest reaches the second photodiode 6. Therefore, even in the region where the charge is saturated in the first photodiode 5 and the signal level distribution of the electric signal becomes flat, the second photodiode 6 has a signal corresponding to the light intensity distribution. An electrical signal is output with a level distribution. Then, by increasing the signal level distribution of the signal of the first photodiode 5 by an increase amount corresponding to the signal level distribution, the actual luminance distribution is reflected, and deterioration of the image quality due to saturation of the light receiving unit is prevented. be able to.
[0053] 第 2フォトダイオード 6は、基板 2の第 2主面 S2に配列されていることから、基板 2の 内部に第 2フォトダイオード 6を埋設するような場合に比較して、基板 2への実装が容 易であるとともに、第 1フォトダイオード 5からの漏れ電流により第 2フォトダイオード 6 にノイズが混入することが防止される。  [0053] Since the second photodiode 6 is arranged on the second main surface S2 of the substrate 2, compared to the case where the second photodiode 6 is embedded inside the substrate 2, the second photodiode 6 is directed to the substrate 2. Is easy to mount, and the leakage current from the first photodiode 5 prevents the noise from entering the second photodiode 6.
[0054] 第 2フォトダイオード 6の電気信号を第 1フォトダイオード 5の電気信号に加算するこ とにより、第 1フォトダイオード 6の電気信号の信号レベルを増加させていることから構 成が簡素である。  [0054] By adding the electrical signal of the second photodiode 6 to the electrical signal of the first photodiode 5, the signal level of the electrical signal of the first photodiode 6 is increased, so the configuration is simple. is there.
[0055] 第 1フォトダイオード 5の飽和レベルを制御する場合、図 4のフレーム f2及び f3にお いて示すような制御遅れが生じる。従来は、フレーム f 2及び f3では白飛びが生じて いた。しかし、制御遅れにより生じた実際の入射光量と、第 1フォトダイオード 5の飽和 レベルとの差となる光量 dQ2や光量 dQ3を第 2フォトダイオード 6により受光し、当該 光量に応じた電気信号を出力し、当該電気信号の出力に応じて第 1フォトダイオード 6の電気信号を増カロさせるから、白飛びを防止できる。換言すれば、明暗差が急激に 変化する場合において、適切なダイナミックレンジで撮像することができる。従って、 例えば自動車がトンネルに入出するときに車載カメラの撮像範囲に急激な明暗差が 生じても、適切なダイナミックレンジで撮像して白線の検知等を行うことができる。 [0055] When the saturation level of the first photodiode 5 is controlled, a control delay as shown in frames f2 and f3 in FIG. 4 occurs. Conventionally, whiteout occurs in frames f2 and f3. It was. However, the second photodiode 6 receives the light amount dQ2 and the light amount dQ3 that are the difference between the actual incident light amount caused by the control delay and the saturation level of the first photodiode 5, and outputs an electrical signal corresponding to the light amount Since the electric signal of the first photodiode 6 is increased according to the output of the electric signal, whiteout can be prevented. In other words, it is possible to capture an image with an appropriate dynamic range when the light-dark difference changes rapidly. Therefore, for example, even when a sharp contrast difference occurs in the imaging range of the in-vehicle camera when the automobile enters or exits the tunnel, it is possible to detect a white line by imaging with an appropriate dynamic range.
[0056] さらに、従来は、フレーム f2及び f 3においては、制御遅れにより生じた実際の入射 光量と、第 1フォトダイオード 5の飽和レベルとの差となる光量 dQ2及び光量 dQ3を特 定することができず、次のフレームであるフレーム f3及び f4における飽和レベルの制 御量を適正に定めることが困難であった。しかし、撮像素子 1では、光量 dQ2や光量 dQ3を第 2フォトダイオード 6により受光することができるから、適正に飽和レベルの制 御量を決定することができる。  [0056] Further, conventionally, in the frames f2 and f3, the light quantity dQ2 and the light quantity dQ3 that are the difference between the actual incident light quantity caused by the control delay and the saturation level of the first photodiode 5 are specified. However, it was difficult to properly determine the control level of the saturation level in the next frames, frames f3 and f4. However, since the image sensor 1 can receive the light amount dQ2 and the light amount dQ3 by the second photodiode 6, the control amount of the saturation level can be appropriately determined.
[0057] (第 2の実施形態)  [0057] (Second Embodiment)
図 5は本発明の第 2の実施形態の撮像素子 51の画素 53の回路構成と、画素 53の 読み出しタイミングを制御する垂直駆動回路 20との接続関係を示す図である。なお、 第 1の実施形態と同様の構成については第 1の実施形態と同一符号を付して説明を 省略する。  FIG. 5 is a diagram showing a connection relationship between the circuit configuration of the pixel 53 of the image sensor 51 and the vertical drive circuit 20 that controls the readout timing of the pixel 53 according to the second embodiment of the present invention. Note that the same configurations as those of the first embodiment are denoted by the same reference numerals as those of the first embodiment, and description thereof is omitted.
[0058] 第 2の実施形態では、第 2フォトダイオード 6の電気信号の信号レベルに応じて、同 一画素 53の第 1フォトダイオード 5の電気信号を増幅するときの増幅率を変化させる ことにより、第 1フォトダイオード 5の電気信号の信号レベルを、同一画素 53の第 2フ オトダイオードの電気信号の信号レベルが高 、ほど大きくなるように増加させる。具体 的には以下のとおりである。  In the second embodiment, the amplification factor when amplifying the electrical signal of the first photodiode 5 of the same pixel 53 is changed according to the signal level of the electrical signal of the second photodiode 6. The signal level of the electric signal of the first photodiode 5 is increased so that the signal level of the electric signal of the second photodiode of the same pixel 53 increases. Specifically, it is as follows.
[0059] 第 2の実施形態の撮像素子 51では、第 1の実施形態の撮像素子 1のアンプトランジ スタ 13に代えて、可変利得増幅器により構成されたアンプトランジスタ (増幅素子) 63 が配置されている。アンプトランジスタ 63のドレイン、ソース、ゲートの接続は第 1の実 施形態と同様である。アンプトランジスタ 63は、例えば制御ゲートに印加された信号 レベルが大きいほど、増幅率が大きくなるものであり、制御ゲートは、第 2転送トランジ スタ 25のドレインに接続されて!、る。 In the image sensor 51 of the second embodiment, instead of the amplifier transistor 13 of the image sensor 1 of the first embodiment, an amplifier transistor (amplifier element) 63 configured by a variable gain amplifier is arranged. Yes. The connection of the drain, source, and gate of the amplifier transistor 63 is the same as in the first embodiment. In the amplifier transistor 63, for example, the larger the signal level applied to the control gate, the higher the amplification factor. The control gate has a second transfer transistor. Connected to the drain of Star 25!
[0060] アンプトランジスタ 63の制御ゲートと、第 2転送トランジスタ 25のドレインとの間には 、記憶ノード SN2をフローティング状態力も電源線 27への接続状態に切り替え、記 憶ノード SN2に電源電圧 VAA2を充電して、その蓄積電荷量をリセットするリセットト ランジスタ 26が設けられている。リセットトランジスタ 26は、そのドレインが電源線 27に 接続され、ソースが記憶ノード SN2に接続され、ゲートが電圧の印加を制御する制御 線 28に接続されている。なお、制御線 28は、第 1制御線 15と同様に垂直駆動回路 2 0により電圧が印加される。  [0060] Between the control gate of the amplifier transistor 63 and the drain of the second transfer transistor 25, the storage node SN2 is also switched to the connection state to the power supply line 27, and the power supply voltage VAA2 is applied to the storage node SN2. A reset transistor 26 is provided for charging and resetting the accumulated charge. The reset transistor 26 has a drain connected to the power supply line 27, a source connected to the storage node SN2, and a gate connected to a control line 28 that controls voltage application. Note that a voltage is applied to the control line 28 by the vertical drive circuit 20 as in the case of the first control line 15.
[0061] 以上の第 2の実施形態の撮像素子 51の動作を説明する。  The operation of the image sensor 51 according to the second embodiment will be described.
[0062] 撮像素子 51の画素 53では、第 1の実施形態と同様に、リセットトランジスタ 11がォ ンされて記憶ノード SNに電源電圧 VAAが印加されることにより、記憶ノード SNに蓄 積された電荷が排出され、各画素のリセットが行われる。さらに、これと同期して、リセ ットトランジスタ 26がオンされて記憶ノード SN2に電源電圧 VAA2が印加されること により、記憶ノード SN2に蓄積された電荷が排出される。  [0062] In the pixel 53 of the image sensor 51, similarly to the first embodiment, the reset transistor 11 is turned on and the power supply voltage VAA is applied to the storage node SN, thereby being stored in the storage node SN. The charges are discharged and each pixel is reset. Further, in synchronization with this, the reset transistor 26 is turned on and the power supply voltage VAA2 is applied to the storage node SN2, whereby the charge accumulated in the storage node SN2 is discharged.
[0063] 第 1転送トランジスタ 12及び第 2転送トランジスタ 25がオフされた状態で第 1フォトダ ィオード 5及び第 2フォトダイオード 6において光電変換が行われ、第 1フォトダイォー ド 5及び第 2フォトダイオード 6には電荷が蓄積される。  [0063] Photoelectric conversion is performed in the first photodiode 5 and the second photodiode 6 with the first transfer transistor 12 and the second transfer transistor 25 turned off, and the first photodiode 5 and the second photodiode 6 Charge is accumulated.
[0064] そして、第 2制御線 16に電圧が印加されると、第 1転送トランジスタ 12及び第 2転送 トランジスタ 25は同時にオンされる。第 1フォトダイオード 5に蓄積された電荷に基づく 電気信号は記憶ノード SNを介してアンプトランジスタ 63のゲートに入力されて増幅さ れる。この際、アンプトランジスタ 63の制御ゲートには、第 2フォトダイオード 6に蓄積 された電荷に基づく電気信号が入力され、その電気信号の信号レベルが大きいほど 増幅率が高くなるように増幅率が変化する。  [0064] When a voltage is applied to the second control line 16, the first transfer transistor 12 and the second transfer transistor 25 are simultaneously turned on. An electric signal based on the electric charge accumulated in the first photodiode 5 is input to the gate of the amplifier transistor 63 via the storage node SN and amplified. At this time, an electric signal based on the electric charge accumulated in the second photodiode 6 is input to the control gate of the amplifier transistor 63, and the gain changes as the signal level of the electric signal increases. To do.
[0065] 従って、第 1フォトダイオード 5にて生じた電荷に基づく電気信号の信号レベルが、 同一画素の第 2フォトダイオード 6にて生じた電荷に基づく電気信号の信号レベルが 高 、ほど増加量が大きくなるように増加されることになる。  Therefore, the signal level of the electrical signal based on the charge generated in the first photodiode 5 is increased as the signal level of the electrical signal based on the charge generated in the second photodiode 6 of the same pixel is higher. Will be increased to be larger.
[0066] 以上の第 2の実施形態によれば、第 1の実施形態と同様の効果が得られる。さらに 、第 2フォトダイオード 6の電気信号の信号レベルが大きいほど、同一画素 53の第 1 フォトダイオード 5の電気信号を増幅するときの増幅率を大きくすることから、第 1フォ トダイオード 5の電気信号を増幅する際に当該信号を補正でき、構成が簡素である。 [0066] According to the second embodiment described above, the same effect as in the first embodiment can be obtained. Further, as the signal level of the electric signal of the second photodiode 6 is increased, the first pixel 53 of the same pixel 53 is increased. Since the amplification factor when the electric signal of the photodiode 5 is amplified is increased, the signal can be corrected when the electric signal of the first photodiode 5 is amplified, and the configuration is simple.
[0067] (第 3の実施形態)  [0067] (Third embodiment)
図 6は本発明の第 3の実施形態の撮像素子 101の画素 103の回路構成と、画素 10 3の読み出しタイミングを制御する垂直駆動回路 20との接続関係を示す図である。な お、第 1及び第 2の実施形態と同様の構成については第 1及び第 2の実施形態と同 一符号を付して説明を省略する。  FIG. 6 is a diagram illustrating a connection relationship between the circuit configuration of the pixel 103 of the image sensor 101 according to the third embodiment of the present invention and the vertical drive circuit 20 that controls the readout timing of the pixel 103. Note that the same configurations as those of the first and second embodiments are denoted by the same reference numerals as those of the first and second embodiments, and description thereof is omitted.
[0068] 第 3の実施形態では、第 2の実施形態と同様の構成に加え、記憶ノード SN2とアン プトランジスタ 63の制御ゲートとの間に、電圧制御回路 (増加制御部、信号レベル変 換部) 30が設けられている。電圧制御回路 30は、画素毎に設けられていてもよいし、 複数の画素に対して一つ(例えば垂直信号線 14毎に一つ)設けられて 、てもよ!/、し 、全画素に対して一つ設けられていてもよい。なお、第 3の実施形態の撮像素子 101 の動作は、電圧制御回路 30の動作を除いては第 2の実施形態と同様である。  In the third embodiment, in addition to the configuration similar to that of the second embodiment, a voltage control circuit (increase control unit, signal level conversion) is connected between the storage node SN2 and the control gate of the amplifier transistor 63. Part) 30 is provided. The voltage control circuit 30 may be provided for each pixel, or one (for example, one for each vertical signal line 14) may be provided for a plurality of pixels. One may be provided. The operation of the image sensor 101 of the third embodiment is the same as that of the second embodiment except for the operation of the voltage control circuit 30.
[0069] 電圧制御回路 30は、記憶ノード SN2から入力された電気信号の信号レベル (電圧 )を変換して出力する。例えば、電圧制御回路 30は、第 1フォトダイオード 5の電気信 号力 より好適に補正されつつ増幅されるように、第 2フォトダイオード 6の電気信号 に基づ!/、て種々の演算を行!ヽ、当該演算結果に応じた信号レベルの電気信号を出 力する。  [0069] Voltage control circuit 30 converts the signal level (voltage) of the electrical signal input from storage node SN2 and outputs it. For example, the voltage control circuit 30 performs various calculations based on the electrical signal of the second photodiode 6 so as to be amplified while being corrected more preferably than the electrical signal strength of the first photodiode 5! !ヽ Outputs an electric signal with a signal level corresponding to the calculation result.
[0070] 例えば、図 2においては、説明を簡単にするために、第 1フォトダイオード 5により電 気信号に反映されな力つた光量力 そのまま第 2フォトダイオード 6により電気信号に 変換される場合を例示している。すなわち、実線 L2で示す飽和レベルと、実線 L4で 示す第 1フォトダイオード 5及び基板 2により吸収される光量のレベルとが同程度であ るとともに、 xl〜x2の範囲と χΐ 〜χ2' の範囲とが同程度になっている。  For example, in FIG. 2, in order to simplify the explanation, a case where the light intensity force that is not reflected in the electric signal by the first photodiode 5 is directly converted into an electric signal by the second photodiode 6. Illustrated. That is, the saturation level indicated by the solid line L2 and the level of the amount of light absorbed by the first photodiode 5 and the substrate 2 indicated by the solid line L4 are approximately the same, and the range of xl to x2 and the range of χΐ to χ2 ' Is about the same.
[0071] しかし、そのような関係となるように第 1フォトダイオード 5の光電変換率、透過率、第 2フォトダイオード 6の光電変換率、第 1フォトダイオード 5と第 2フォトダイオード 6との 間に介在させる基板 2の透過率を設定することは煩わ ヽ。  However, the photoelectric conversion rate and transmittance of the first photodiode 5, the photoelectric conversion rate of the second photodiode 6, and the distance between the first photodiode 5 and the second photodiode 6 so as to satisfy such a relationship. It is troublesome to set the transmittance of the substrate 2 interposed between the two.
[0072] そこで、これらの設定は適宜なものにしておき、その代わり、実験等により、実際に 第 1主面 S1に入射する光量、第 1フォトダイオード 6から出力される電気信号の信号 レベル、及び、第 2フォトダイオード 6から出力される電気信号の信号レベルの相関関 係を特定し、当該相関関係に基づいて、第 1フォトダイオード 5の飽和レベルの電気 信号を好適に増幅するための第 2フォトダイオード 6の出力信号の信号レベルと増幅 率との関係を示すデータを作成し、電圧制御回路 30に記憶させる。電圧制御回路 3 0が当該データに基づいて第 2フォトダイオード 6の出力信号に対応する電圧をアン プトランジスタ 63のゲート電圧に印加することにより、好適に第 1フォトダイオード 5の 電気信号が増幅される。 [0072] Therefore, these settings are set appropriately. Instead, the amount of light actually incident on the first main surface S1 and the signal of the electric signal output from the first photodiode 6 are determined by experiments or the like. The correlation between the level and the signal level of the electrical signal output from the second photodiode 6 is specified, and the electrical signal at the saturation level of the first photodiode 5 is suitably amplified based on the correlation. Data indicating the relationship between the signal level of the output signal of the second photodiode 6 and the amplification factor is created and stored in the voltage control circuit 30. When the voltage control circuit 30 applies a voltage corresponding to the output signal of the second photodiode 6 to the gate voltage of the amplifier transistor 63 based on the data, the electric signal of the first photodiode 5 is preferably amplified. The
[0073] なお、電圧制御回路 30において演算等することにより、第 1フォトダイオード 5の出 力信号がアンプトランジスタ 63に出力されるタイミングに対して、第 2フォトダイオード 6の出力信号がアンプトランジスタ 63の制御ゲートに出力されるタイミングに遅れが生 じる場合には、第 1フォトダイオード 5の出力信号をバッファリングするなど、適宜な方 法により同期させるようにすればよ!、。  It should be noted that the output signal of the second photodiode 6 is output from the amplifier transistor 63 with respect to the timing at which the output signal of the first photodiode 5 is output to the amplifier transistor 63 by performing an operation or the like in the voltage control circuit 30. If there is a delay in the timing output to the control gate, the output signal of the first photodiode 5 should be synchronized by an appropriate method such as buffering!
[0074] 以上の第 3の実施形態によれば、第 2の実施形態に比較してより好適な増幅率で 第 1フォトダイオード 5の信号を増幅することが可能となる。  [0074] According to the third embodiment described above, it is possible to amplify the signal of the first photodiode 5 with a more favorable amplification factor than in the second embodiment.
[0075] (第 4の実施形態)  [0075] (Fourth embodiment)
図 7は本発明の第 4の実施形態の撮像素子 201の画素 203の回路構成と、画素 20 3の読み出しタイミングを制御する垂直駆動回路 20等との接続関係を示す図である。 なお、第 1〜第 3の実施形態と同様の構成については第 1〜第 3の実施形態と同一 符号を付して説明を省略する。  FIG. 7 is a diagram showing a connection relationship between the circuit configuration of the pixel 203 of the image sensor 201 according to the fourth embodiment of the present invention and the vertical drive circuit 20 that controls the readout timing of the pixel 203. In addition, about the structure similar to 1st-3rd embodiment, the same code | symbol as 1st-3rd embodiment is attached | subjected and description is abbreviate | omitted.
[0076] 第 4の実施形態では、第 1フォトダイオード 5に係る回路構成 (紙面上方)と、第 2フ オトダイオード 6に係る回路構成 (紙面下方)とが同様に構成されている。第 1フォトダ ィオード 5に係るリセットトランジスタ 11及び転送トランジスタ 12のオンオフのタイミン グと、同一画素の第 2フォトダイオード 6に係るリセットトランジスタ 211及び転送トラン ジスタ 212のオンオフのタイミングとは、動作制御回路 223により同期が取られる。  In the fourth embodiment, the circuit configuration related to the first photodiode 5 (upper side in the drawing) and the circuit configuration related to the second photodiode 6 (lower side in the drawing) are configured similarly. The ON / OFF timing of the reset transistor 11 and the transfer transistor 12 related to the first photodiode 5 and the ON / OFF timing of the reset transistor 211 and the transfer transistor 212 related to the second photodiode 6 of the same pixel are the operation control circuit 223. Is synchronized.
[0077] そして、第 1フォトダイオード 5に対応する水平駆動回路力もの出力信号と、第 2フォ トダイオード 6に対応する水平駆動回路力もの出力信号とが加算部 230にて加算さ れることにより、第 1フォトダイオード 5の電気信号の信号レベルは第 2フォトダイォー ド 6の電気信号の信号レベルに応じて増加する。なお、加算部 230は、第 3の実施形 態の電圧制御部 30のように、第 2フォトダイオード 6からの電気信号を適宜に補正し て力も第 1フォトダイオード 5の電気信号に加算してもよい。 [0077] Then, the output signal of the horizontal driving circuit power corresponding to the first photodiode 5 and the output signal of the horizontal driving circuit power corresponding to the second photodiode 6 are added by the adding unit 230. The signal level of the electric signal of the first photodiode 5 increases according to the signal level of the electric signal of the second photodiode 6. Note that the adder 230 is the third embodiment. Like the voltage control unit 30 in the state, the electric signal from the second photodiode 6 may be appropriately corrected and the force may be added to the electric signal of the first photodiode 5.
[0078] 以上の第 4の実施形態によれば、第 2フォトダイオード 6に係る回路構成を従来の回 路構成と同様にすることができ、また、第 1フォトダイオード 5と略同様の製造工程で 製造できることから製造コストが削減される。 According to the fourth embodiment described above, the circuit configuration related to the second photodiode 6 can be made the same as the conventional circuit configuration, and the manufacturing process is almost the same as the first photodiode 5. Manufacturing costs can be reduced.
[0079] (第 5の実施形態) [0079] (Fifth embodiment)
図 8は、本発明の第 5の実施形態の撮像素子 301を模式的に示す断面図である。 なお、第 1〜第 4の実施形態と同様の構成については第 1〜第 4の実施形態と同一 符号を付して説明を省略する。  FIG. 8 is a cross-sectional view schematically showing an image sensor 301 according to the fifth embodiment of the present invention. In addition, about the structure similar to 1st-4th embodiment, the same code | symbol as 1st-4th embodiment is attached | subjected and description is abbreviate | omitted.
[0080] 第 5の実施形態の撮像素子 301では、第 2フォトダイオード 6の暗電流の影響を除 去することを特徴としており、暗電流を計測するための第 3フォトダイオード 306と、第[0080] The imaging device 301 of the fifth embodiment is characterized in that the influence of the dark current of the second photodiode 6 is removed, and the third photodiode 306 for measuring the dark current,
3フォトダイオード 306を遮光する遮光部 307とを備えている。 A light-shielding portion 307 that shields the three photodiodes 306;
[0081] 第 3フォトダイオード 306は、例えば、第 2フォトダイオード 6と同一構成のフォトダイ オード、すなわち、同一材質及び同一形状のフォトダイオードである。また、第 3フォト ダイオード 306は、第 2フォトダイオード 6と同一平面に配置されている。すなわち、第The third photodiode 306 is, for example, a photodiode having the same configuration as the second photodiode 6, that is, a photodiode having the same material and shape. The third photodiode 306 is arranged on the same plane as the second photodiode 6. I.e.
2主面 S2に設けられている。さらに、第 3フォトダイオード 306から第 3電極 310へ電 気信号を出力する構成も第 2フォトダイオード 6から第 2電極 10へ電気信号を出力す る構成と同様である。 2 Provided on main surface S2. Further, the configuration for outputting an electrical signal from the third photodiode 306 to the third electrode 310 is the same as the configuration for outputting an electrical signal from the second photodiode 6 to the second electrode 10.
[0082] 遮光部 307は、非透光性の材料により形成され、第 1主面 S1に配置されており、第 1主面 S1側力も第 3フォトダイオード 306へ向力 光を遮断する。遮光部 307は、例 えばアルミ等の金属膜である。なお、第 3フォトダイオード 306と遮光部 307との間に は、第 1フォトダイオード 5の暗電流を計測するためのフォトダイオードが設けられても よいし、設けられなくてもよい。  The light shielding portion 307 is formed of a non-translucent material and is disposed on the first main surface S1, and the first main surface S1 side force also blocks the directional light to the third photodiode 306. The light shielding unit 307 is, for example, a metal film such as aluminum. Note that a photodiode for measuring the dark current of the first photodiode 5 may or may not be provided between the third photodiode 306 and the light shielding portion 307.
[0083] 図 9は撮像素子 301を模式的に示す平面図であり、図 9Aは第 1主面 S1を、図 9B は第 2主面 S2を示している。第 3フォトダイオード 306及び遮光部 307は、第 1フォト ダイオード 5及び第 2フォトダイオード 6の配置領域の周囲亘つて設けられている。な お、基板 2の両端には、水平駆動回路 22から出力される信号を外部へ出力するため の信号出力端子 4が複数設けられて 、る。 [0084] 図 10は撮像素子 301の回路構成を示す図である。撮像素子 301は、上述の第 1〜 第 4の実施形態と同様の回路構成に加え、第 3フォトダイオード 306から出力される 電気信号に基づいて第 2フォトダイオード 6の電気信号を補正する回路を備えている FIG. 9 is a plan view schematically showing the image sensor 301. FIG. 9A shows the first main surface S1, and FIG. 9B shows the second main surface S2. The third photodiode 306 and the light shielding portion 307 are provided around the arrangement area of the first photodiode 5 and the second photodiode 6. Note that a plurality of signal output terminals 4 for outputting signals output from the horizontal drive circuit 22 to the outside are provided at both ends of the substrate 2. FIG. 10 is a diagram showing a circuit configuration of the image sensor 301. In addition to the circuit configuration similar to that of the first to fourth embodiments described above, the image sensor 301 includes a circuit that corrects the electrical signal of the second photodiode 6 based on the electrical signal output from the third photodiode 306. Have
[0085] 例えば、撮像素子 301は、第 1フォトダイオード 5及び第 2フォトダイオード 6に関し、 第 2の実施形態と同様の構成を備えている。さらに、撮像素子 301は、第 3フォトダイ オード 306に関し、第 2フォトダイオード 6と同様に転送トランジスタ 325、リセットトラン ジスタ 326を備え、第 3フォトダイオードからは、第 2フォトダイオード 6と同じ長さの蓄 積時間で電荷が蓄積され、当該電荷に基づく電気信号が電圧制御回路 330に出力 される。電圧制御回路 330は、第 3フォトダイオード 306からの電気信号の信号レべ ルに基づいて第 2フォトダイオード 6からの電気信号を補正する。例えば、第 2フォトダ ィオード 6からの電気信号の信号レベル力も第 3フォトダイオード 306の電気信号の 信号レベルを減算して出力する。 For example, the imaging element 301 has the same configuration as that of the second embodiment with respect to the first photodiode 5 and the second photodiode 6. Further, the image pickup device 301 includes a transfer transistor 325 and a reset transistor 326 in the same manner as the second photodiode 6 with respect to the third photodiode 306, and the third photodiode 306 has the same length as the second photodiode 6. The electric charge is accumulated in the accumulation time, and an electric signal based on the electric charge is output to the voltage control circuit 330. The voltage control circuit 330 corrects the electric signal from the second photodiode 6 based on the signal level of the electric signal from the third photodiode 306. For example, the signal level force of the electric signal from the second photodiode 6 is also output by subtracting the signal level of the electric signal of the third photodiode 306.
[0086] なお、電圧制御回路 330は、例えば第 3フォトダイオード 306からの電気信号の信 号レベルを記憶するとともに、補正対象の第 2フォトダイオード 6に近い位置の第 3フ オトダイオード 330の電気信号の信号レベルを読み出して、当該読み出した信号レ ベルに基づ 、て第 2フォトダイオードの電気信号の信号レベルを補正するなど、適宜 な位置の第 3フォトダイオード 306の電気信号を適宜なタイミングで利用する。  Note that the voltage control circuit 330 stores, for example, the signal level of the electric signal from the third photodiode 306, and at the same time the electric current of the third photodiode 330 at a position close to the second photodiode 6 to be corrected. Read the signal level of the signal and correct the signal level of the electrical signal of the second photodiode based on the read signal level. Use in.
[0087] 以上の第 5の実施形態によれば、第 2フォトダイオード 6の暗電流の影響を除去でき るから、第 2フォトダイオード 6の電気信号の信号レベル分布に基づいて第 1フォトダ ィオード 5の電気信号の信号レベル分布を補正する際に、実際の光量分布により正 確に近づけることができる。  According to the fifth embodiment described above, since the influence of the dark current of the second photodiode 6 can be removed, the first photodiode 5 is based on the signal level distribution of the electric signal of the second photodiode 6. When the signal level distribution of the electrical signal is corrected, it can be more accurately approximated to the actual light quantity distribution.
[0088] (第 6の実施形態)  [0088] (Sixth embodiment)
図 11Aは本発明の第 6の実施形態の撮像素子 401を模式的に示す断面図であり、 図 11Bは撮像素子 401を被写体側力も見た平面図である。なお、第 1〜第 5の実施 形態と同様の構成については第 1〜第 5の実施形態と同一符号を付して説明を省略 する。  FIG. 11A is a cross-sectional view schematically illustrating an image sensor 401 according to the sixth embodiment of the present invention, and FIG. 11B is a plan view of the image sensor 401 also viewed from the subject side force. In addition, about the structure similar to 1st-5th embodiment, the same code | symbol as 1st-5th embodiment is attached | subjected and description is abbreviate | omitted.
[0089] 撮像素子 401は、基板 2の第 2主面 S2に対向して配置される第 2基板 402を備えて おり、第 2フォトダイオード 6は、第 2基板 402のうち、基板 2の第 2主面 S2に対向する 第 3主面 S3に配列されている。なお、第 2フォトダイオード 6が第 1フォトダイオード 5 の直下に設けられていることは第 1の実施形態と同様である。 The image sensor 401 includes a second substrate 402 that is disposed to face the second main surface S2 of the substrate 2. The second photodiodes 6 are arranged on the third main surface S3 of the second substrate 402 facing the second main surface S2 of the substrate 2. The second photodiode 6 is provided immediately below the first photodiode 5 as in the first embodiment.
[0090] 基板 2と第 2基板 402とは、半田ボールや絶縁性接着剤など、適宜な接合手段によ り接合されている。基板 2は例えば研磨により 100ミクロン程度まで薄くし、第 2基板 4 02への光入射性を増してよい。第 1フォトダイオード 5の電気信号は、例えば、基板 2 の端部に形成された信号出力端子 404から出力され、 Auや A1等の金属ワイヤーボ ンデイングにより形成されたワイヤー 431を介して第 2基板 402に形成された信号入 力端子 432に入力されて 、る。  [0090] The substrate 2 and the second substrate 402 are joined by an appropriate joining means such as a solder ball or an insulating adhesive. The substrate 2 may be thinned to about 100 microns by polishing, for example, to increase the light incident property on the second substrate 402. The electrical signal of the first photodiode 5 is output from, for example, a signal output terminal 404 formed at the end of the substrate 2 and is connected to the second substrate 402 via a wire 431 formed by metal wire bonding such as Au or A1. The signal is input to the signal input terminal 432 formed in
[0091] 第 2基板 402は、基板 2よりも広く形成されており、第 2基板 402の第 3主面 S3のう ち基板 2の配置領域外には、信号処理部 435が形成されている。信号処理部 435は 、第 1フォトダイオード 5及び第 2フォトダイオード 6からの電気信号の処理等を実行し 、処理後の信号を、第 2基板 402の第 3主面 S3端部に形成された外部取出端子 437 から出力する。  [0091] The second substrate 402 is formed wider than the substrate 2, and a signal processing unit 435 is formed outside the arrangement region of the substrate 2 on the third main surface S3 of the second substrate 402. . The signal processing unit 435 executes processing of electrical signals from the first photodiode 5 and the second photodiode 6, and the processed signal is formed on the end of the third main surface S3 of the second substrate 402. Output from external output terminal 437.
[0092] 撮像素子 401の画素の回路構成は、例えば図 7に示した第 4の実施形態と同様で ある。第 1フォトダイオード 5に係る回路(図 7の紙面上方)は基板 2に、第 2フォトダイ オード 6に係る回路(図 7の紙面下方)は第 2基板 402に設けられる。動作制御回路 2 23や加算部 230は例えば第 2基板 402に設けられ、加算部 230は信号処理部 435 に含まれる。なお、加算部 230が信号処理部 435に形成されることにより、増加部の 少なくとも一部は第 2基板 402に設けられることになる。  The circuit configuration of the pixels of the image sensor 401 is the same as that of the fourth embodiment shown in FIG. 7, for example. The circuit related to the first photodiode 5 (upper side of the drawing in FIG. 7) is provided on the substrate 2, and the circuit related to the second photodiode 6 (lower side of the drawing in FIG. 7) is provided on the second substrate 402. The operation control circuit 223 and the adding unit 230 are provided on the second substrate 402, for example, and the adding unit 230 is included in the signal processing unit 435. By adding the adding unit 230 to the signal processing unit 435, at least a part of the increasing unit is provided on the second substrate 402.
[0093] また、撮像素子 401の画素の回路構成において、例えば図 7の加算部 230に代え て、図 6に示した電圧制御回路 30及び可変利得増幅器により構成されたアンプトラ ンジスタ 63を設け、当該電圧制御回路 30及びアンプトランジスタ 63を信号処理部 4 35に形成してもよい。この場合、電圧制御回路 30が信号処理部 435に含まれること により、増加部の動作を制御する増加制御部の少なくとも一部が第 2基板 402に設け られること〖こなる。  Further, in the circuit configuration of the pixel of the image sensor 401, for example, instead of the adding unit 230 in FIG. 7, an amplifier transistor 63 configured by the voltage control circuit 30 and the variable gain amplifier shown in FIG. The voltage control circuit 30 and the amplifier transistor 63 may be formed in the signal processing unit 435. In this case, since the voltage control circuit 30 is included in the signal processing unit 435, at least a part of the increase control unit that controls the operation of the increase unit is provided on the second substrate 402.
[0094] 以上の第 6の実施形態によれば、一枚の基板の表裏に第 1フォトダイオード 5及び 第 2フォトダイオード 6を設ける場合に比較して加工が容易になる。一枚の基板につき 一主面にフォトダイオード等を設ける加工を施すことから、従来の製造工程をそのま ま利用できること、第 1フォトダイオード 5及び第 2フォトダイオード 6の位置合わせを基 板 2及び第 2基板 402の位置合わせにより行えばよいこと等力もである。 According to the sixth embodiment described above, the processing becomes easier as compared with the case where the first photodiode 5 and the second photodiode 6 are provided on the front and back of one substrate. Per board Since a process for providing a photodiode or the like on one main surface is performed, the conventional manufacturing process can be used as it is, and the alignment of the first photodiode 5 and the second photodiode 6 is performed on the substrate 2 and the second substrate 402. It is also possible to do it by alignment.
[0095] また、第 2基板 402に加算部 230、アンプトランジスタ 63、電圧制御回路 30を設け ることができる力ら、すなわち、増加部の少なくとも一部や増加部の動作を制御する 増加制御部の少なくとも一部を第 2基板 402に設けることができるから、設計の自由 度が向上する。  Further, the power that can provide the addition unit 230, the amplifier transistor 63, and the voltage control circuit 30 on the second substrate 402, that is, an increase control unit that controls at least a part of the increase unit and the operation of the increase unit. Since at least a part of the second substrate 402 can be provided on the second substrate 402, the degree of freedom in design is improved.
[0096] (第 7の実施形態)  [0096] (Seventh embodiment)
図 12は第 7の実施形態のカメラモジュール 501の基本構成を示すブロック図である 。カメラモジュール 501は、車載カメラや携帯電話機用カメラ等の適宜な用途に用い られるものであり、第 1〜第 6の実施形態の撮像素子 1、 51、 101、 201、 301、 401 を備えるものである(以下では撮像素子 1を代表して示す。 ) o  FIG. 12 is a block diagram showing the basic configuration of the camera module 501 of the seventh embodiment. The camera module 501 is used for an appropriate application such as an in-vehicle camera or a mobile phone camera, and includes the imaging devices 1, 51, 101, 201, 301, 401 of the first to sixth embodiments. Yes (The image sensor 1 is shown below as a representative.) O
[0097] カメラモジュール 501は、撮像素子 1と、レンズ群を含む光学部 502とを備える撮像 部 503、撮像素子 1からの信号をデジタル信号に変換する AZD変換部 504、 A/D 変換後のデジタル信号に各種処理を施す映像信号処理部 505、映像信号処理のた めに例えば 1フレーム又は 1フィールドの単位で映像信号を記憶する画像メモリ 507 、映像信号処理に必要な各種パラメータを保持するレジスタ 508、及び、他の各部を 制御する制御部 506を有する。  [0097] The camera module 501 includes an imaging unit 503 including an imaging device 1 and an optical unit 502 including a lens group, an AZD conversion unit 504 that converts a signal from the imaging device 1 into a digital signal, and a post-A / D conversion A video signal processing unit 505 that performs various processing on the digital signal, an image memory 507 that stores video signals in units of one frame or one field for video signal processing, a register that stores various parameters necessary for video signal processing 508 and a control unit 506 for controlling other units.
[0098] 映像信号処理部 505は各種処理として、例えばホワイトバランス調整、補間処理、 γ処理を行い、処理後の画像を RGB又は YUVの画像信号として出力する。あるい は、映像信号処理部 505は、カメラモジュール 501が車載用に構成されている場合 には、撮像部 503からの信号に基づいて、道路の白線検知ゃ障害物検知を行う。  The video signal processing unit 505 performs various processes such as white balance adjustment, interpolation processing, and γ processing, and outputs the processed image as an RGB or YUV image signal. Or, when the camera module 501 is configured for in-vehicle use, the video signal processing unit 505 detects a white line on the road or detects an obstacle based on a signal from the imaging unit 503.
[0099] なお、第 1〜第 6の実施形態において撮像素子において実行されるものとして説明 した信号処理や制御の一部又は全部は、カメラモジュール 501の制御部 506や映像 信号処理部 505に分担させることが可能である。  [0099] Part or all of the signal processing and control described as being executed in the imaging device in the first to sixth embodiments is shared by the control unit 506 and the video signal processing unit 505 of the camera module 501. It is possible to make it.
[0100] (第 8の実施形態)  [0100] (Eighth embodiment)
図 13は第 8の実施形態のカメラモジュール 601の基本構成を示すブロック図である 。なお、第 7の実施形態と同様の構成については同一符号を付して説明を省略する [0101] カメラモジュール 601の撮像素子 602は、例えば図 7に示す撮像素子 201と略同様 に構成される。ただし、撮像素子 602には加算部 230は設けられておらず、映像信 号処理部 605が図 7の加算部 230として機能する。すなわち、第 1フォトダイオード 5 の電気信号と、第 2フォトダイオード 6の電気信号とが、それぞれ別個に AZD変換部 604に出力されるとともに AZD変換され、映像信号処理部 605に出力される。そし て、映像信号処理部 605は、第 1フォトダイオード 5にて生じた電荷に基づくデジタル 信号と、第 2フォトダイオード 6にて生じた電荷に基づくデジタル信号とを加算処理す ることにより、第 1フォトダイオード 5にて生じた電気信号の信号レベルを、第 2フォトダ ィオード 6にて生じた電気信号の信号レベルに応じて増加させる。 FIG. 13 is a block diagram showing a basic configuration of a camera module 601 of the eighth embodiment. Note that the same components as those in the seventh embodiment are denoted by the same reference numerals and description thereof is omitted. The image sensor 602 of the camera module 601 is configured in substantially the same manner as the image sensor 201 shown in FIG. 7, for example. However, the image sensor 602 is not provided with the addition unit 230, and the video signal processing unit 605 functions as the addition unit 230 in FIG. That is, the electrical signal of the first photodiode 5 and the electrical signal of the second photodiode 6 are separately output to the AZD conversion unit 604 and AZD converted, and output to the video signal processing unit 605. Then, the video signal processing unit 605 adds the digital signal based on the charge generated in the first photodiode 5 and the digital signal based on the charge generated in the second photodiode 6 to perform the first processing. 1 Increase the signal level of the electrical signal generated by the photodiode 5 in accordance with the signal level of the electrical signal generated by the second photodiode 6.
[0102] なお、第 8の実施形態では、撮像素子 602から出力された信号を、撮像素子 602の 外部に設けられた映像信号処理部 605により増加させるものとして説明した力 映像 信号処理部 605を本発明の撮像素子の増加部として捉えること、換言すれば、映像 信号処理部 605を含んで撮像素子を定義することも可能である。  Note that in the eighth embodiment, the force video signal processing unit 605 described as increasing the signal output from the image sensor 602 by the video signal processing unit 605 provided outside the image sensor 602 is used. It can be understood as an increasing part of the image sensor of the present invention, in other words, an image sensor can be defined including the video signal processing unit 605.
[0103] (第 9の実施形態)  [0103] (Ninth Embodiment)
図 14は本発明の第 9の実施形態の撮像素子 701を模式的に示す断面図である。 なお、第 1〜第 8の実施形態と同様の構成については第 1〜第 8の実施形態と同一 符号を付して説明を省略する。  FIG. 14 is a cross-sectional view schematically showing an image sensor 701 according to the ninth embodiment of the present invention. In addition, about the structure similar to 1st-8th embodiment, the same code | symbol as 1st-8th embodiment is attached | subjected and description is abbreviate | omitted.
[0104] 第 9の実施形態の撮像素子 701は、第 1フォトダイオード 5が基板 2の第 1主面 S1に 、第 2フォトダイオード 6が基板 2の第 2主面 S2にそれぞれ設けられている点で第 1の 実施形態と同じ構成である。ただし、第 9の実施形態は、画素配列領域の外周側の 画素 3ほど、第 2フォトダイオード 6が第 1フォトダイオード 5に対して外周側にずれるよ うに配置されている点で第 1の実施形態と構成が異なる。なお、画素配列領域は、全 ての画素 3が配列されて!、る領域である。  In the image pickup device 701 of the ninth embodiment, the first photodiode 5 is provided on the first main surface S1 of the substrate 2, and the second photodiode 6 is provided on the second main surface S2 of the substrate 2. This is the same configuration as the first embodiment. However, the ninth embodiment is different from the first embodiment in that the second photodiode 6 is arranged so as to be shifted to the outer peripheral side with respect to the first photodiode 5 in the pixel 3 on the outer peripheral side of the pixel arrangement region. Form and configuration are different. The pixel arrangement area is an area where all the pixels 3 are arranged.
[0105] 一般に、撮像素子は、画素配列領域の中心と、レンズの光軸及び Z又は絞りの中 心とが概ね一致するように配置される。従って、レンズ及び Z又は絞りを通過し、撮像 素子へ入射する入射光線は、矢印 ylで示すように、画素配列領域の中心では、第 1 主面 S1に対してほぼ垂直に入射する力 画素配列領域の外周側では、画素配列領 域の中央側から外周側へ向かうように入射角 Θ 1で斜めに入射する。 In general, the image sensor is arranged so that the center of the pixel arrangement region and the optical axis of the lens and Z or the center of the stop are substantially coincident. Therefore, the incident light that passes through the lens and Z or the aperture and enters the imaging device is incident on the first principal surface S1 almost perpendicularly at the center of the pixel array area as indicated by the arrow yl. On the outer periphery side of the area, The light is incident obliquely at an incident angle Θ 1 from the center to the outer periphery.
[0106] そこで、画素配列領域の外周側の画素 3ほど、第 2フォトダイオード 6を第 1フォトダ ィオード 5に対して画素配列領域の外周側にずれるように配置することによって、換 言すれば、レンズの光軸及び Z又は絞りの中心力も離れた位置の画素 3ほど、第 2フ オトダイオード 6を第 1フォトダイオード 5に対してレンズの光軸及び Z又は絞りの中心 力 離れる方向へずれるように配置することによって、第 1フォトダイオード 5を通過し た光を第 2フォトダイオード 6に正確に受光させることができる。 Therefore, by arranging the second photodiode 6 so as to be shifted to the outer peripheral side of the pixel array region with respect to the first photodiode 5 as the pixel 3 on the outer peripheral side of the pixel array region, in other words, The second photodiode 6 is shifted from the first photodiode 5 in the direction away from the optical axis of the lens and Z or the central force of the diaphragm, as the pixel 3 is located at a position away from the optical axis of the lens and the central force of the Z or the diaphragm. Therefore, the light that has passed through the first photodiode 5 can be accurately received by the second photodiode 6.
[0107] 好適には、第 1フォトダイオード 5と第 2フォトダイオード 6とのずれ dlは、第 1フォトダ ィオード 5と第 2フォトダイオード 6との距離を tlとしたとき、 dl =tl X tan 0 1となるよう に設定する。例えば、 0 1 = 15° 、tl = 50 mの場合、第 1フォトダイオード 5と第 2 フォトダイオード 6とのずれ dlは 13. となる。なお、入射角 θ 1は、例えば最大 で 30° である。 [0107] Preferably, the shift dl between the first photodiode 5 and the second photodiode 6 is dl = tl X tan 0 when the distance between the first photodiode 5 and the second photodiode 6 is tl. Set to be 1. For example, when 0 1 = 15 ° and tl = 50 m, the deviation dl between the first photodiode 5 and the second photodiode 6 is 13. The incident angle θ 1 is, for example, 30 ° at the maximum.
[0108] なお、第 9の実施形態のように第 1フォトダイオード 5に対して第 2フォトダイオード 6 の位置をずらす構成が、第 1〜第 6の実施形態の撮像素子に適用されてもよいこと、 そのような撮像素子が第 7及び第 8の実施形態のカメラモジュールの撮像素子に適 用されてもょ 、ことは 、うまでもな!/、。  Note that the configuration in which the position of the second photodiode 6 is shifted with respect to the first photodiode 5 as in the ninth embodiment may be applied to the imaging elements of the first to sixth embodiments. In addition, such an image sensor may be applied to the image sensor of the camera module of the seventh and eighth embodiments.
[0109] (第 10の実施形態)  [0109] (Tenth embodiment)
図 15は本発明の第 10の実施形態の撮像素子 711を模式的に示す断面図である。 なお、第 1〜第 9の実施形態と同様の構成については第 1〜第 9の実施形態と同一 符号を付して説明を省略する。  FIG. 15 is a cross-sectional view schematically showing an image sensor 711 according to the tenth embodiment of the present invention. In addition, about the structure similar to 1st-9th embodiment, the same code | symbol as 1st-9th embodiment is attached | subjected and description is abbreviate | omitted.
[0110] 撮像素子 711は、第 1フォトダイオード 5が基板 2の第 1主面 S1に、第 2フォトダイォ ード 6が基板 2の第 2主面 S2にそれぞれ設けられている点で第 1の実施形態と同じ構 成である。ただし、第 10の実施形態は、第 2フォトダイオード 6の受光面積が第 1フォ トダイオード 5の受光面積よりも広い点で第 1の実施形態と構成が異なる。なお、受光 面積は、第 1の主面 S1から入射した光を光電変換すべく受光する面の面積であり、 各フォトダイオードの第 1の主面 S1への投影面積と概ね同等である。  [0110] The imaging device 711 is the first in that the first photodiode 5 is provided on the first main surface S1 of the substrate 2 and the second photodiode 6 is provided on the second main surface S2 of the substrate 2. The configuration is the same as that of the embodiment. However, the tenth embodiment differs from the first embodiment in that the light receiving area of the second photodiode 6 is wider than the light receiving area of the first photodiode 5. The light receiving area is an area of a surface that receives light incident from the first main surface S1 for photoelectric conversion, and is approximately equal to a projected area of each photodiode on the first main surface S1.
[0111] 第 1フォトダイオード 5と第 2フォトダイオード 6とは、例えば、中心が概ね一致するよ うに配置されている。そして、第 2フォトダイオード 6の面積が広い分だけ、第 2フォトダ ィオード 6は、第 1フォトダイオードに対して画素配列領域の外周側にはみ出している [0111] The first photodiode 5 and the second photodiode 6 are arranged, for example, so that their centers substantially coincide. Then, the second photodiode 6 is increased by the larger area of the second photodiode 6. The diode 6 protrudes to the outer peripheral side of the pixel arrangement region with respect to the first photodiode.
[0112] 第 10の実施形態では、第 9の実施形態と同様に、入射角 θ 1で入射し、第 1フォト ダイオード 5を通過した光力 第 2フォトダイオード 6の非配置領域へ入射してしまうこ とが抑制される。さらに、第 1フォトダイオード 5において結像した光束は、第 1フォトダ ィオード 5を通過した後に放射状に広がりつつ進み、断面積が大きくなるところ、第 2 フォトダイオード 6の受光面積を第 1フォトダイオードの受光面積よりも広くすることによ り、第 1フォトダイオード 5を通過した光束をより一層漏れなく受光することができる。 [0112] In the tenth embodiment, as in the ninth embodiment, the incident light is incident at an incident angle θ1 and passes through the first photodiode 5, and then enters the non-arranged region of the second photodiode 6. This is suppressed. Furthermore, the light beam imaged in the first photodiode 5 advances while radially spreading after passing through the first photodiode 5, and the cross-sectional area increases. By making the area larger than the light receiving area, the light beam that has passed through the first photodiode 5 can be received without leakage.
[0113] なお、第 10の実施形態のように第 2フォトダイオード 6の受光面積を第 1フォトダイォ ード 5の受光面積よりも広くして、第 2フォトダイオード 6を第 1フォトダイオード 5に対し て画素配列領域の外周側へはみ出させる構成が、第 1〜第 6、第 9の実施形態の撮 像素子に適用されてもよいこと、そのような撮像素子が第 7及び第 8の実施形態の力 メラモジュールの撮像素子に適用されてもょ 、ことは 、うまでもな 、。  Note that, as in the tenth embodiment, the light receiving area of the second photodiode 6 is made larger than the light receiving area of the first photodiode 5, and the second photodiode 6 is connected to the first photodiode 5. Therefore, the configuration that protrudes to the outer peripheral side of the pixel array region may be applied to the imaging elements of the first to sixth and ninth embodiments, and such imaging elements are used in the seventh and eighth embodiments. The power of the camera can be applied to the image sensor of the Mera module.
[0114] (第 11の実施形態)  [0114] (Eleventh embodiment)
図 16は本発明の第 11の実施形態の撮像素子 721を模式的に示す断面図である。 なお、第 1〜第 10の実施形態と同様の構成については第 1〜第 10の実施形態と同 一符号を付して説明を省略する。  FIG. 16 is a cross-sectional view schematically showing an image sensor 721 according to the eleventh embodiment of the present invention. In addition, about the structure similar to 1st-10th embodiment, the same code | symbol as 1st-10th embodiment is attached | subjected and description is abbreviate | omitted.
[0115] 第 11の実施形態では、第 6の実施形態と同様に、撮像素子 721は、基板 2の第 2の 主面 S2に対向配置される第 2基板 402を有しており、第 2フォトダイオード 6は、第 2 基板 402のうち、基板 2の第 2主面 S2に対向する第 3主面 S3に配列されている。回 路構成も第 6の実施形態と同様である。ただし、第 11の実施形態は、第 1フォトダイォ ード 5が基板 2の第 2主面 S2に配置されている点で第 6の実施形態と相違する。なお 、第 2フォトダイオード 6は、例えば、第 1フォトダイオード 5の直下に配置され、第 1フ オトダイオード 5と第 2フォトダイオード 6の受光面積は同等である。  In the eleventh embodiment, as in the sixth embodiment, the image sensor 721 has a second substrate 402 disposed opposite to the second main surface S2 of the substrate 2, and the second substrate 402 The photodiodes 6 are arranged on the third main surface S3 of the second substrate 402 facing the second main surface S2 of the substrate 2. The circuit configuration is the same as that of the sixth embodiment. However, the eleventh embodiment is different from the sixth embodiment in that the first photodiode 5 is arranged on the second main surface S2 of the substrate 2. The second photodiode 6 is disposed, for example, immediately below the first photodiode 5, and the light receiving areas of the first photodiode 5 and the second photodiode 6 are equal.
[0116] 第 2主面 S2と第 3主面 S3とは複数のスぺーサ 415を間に挟んで対向している。ス ぺーサ 415は、例えば半田バンプであり、第 2主面 S2と第 3主面 S3とを所定の間隔 に保っている。第 2主面 S2と第 3主面 S3との間隔は、例えば 10 m以下である。  [0116] The second main surface S2 and the third main surface S3 face each other with a plurality of spacers 415 interposed therebetween. The spacer 415 is, for example, a solder bump, and keeps the second main surface S2 and the third main surface S3 at a predetermined interval. The distance between the second main surface S2 and the third main surface S3 is, for example, 10 m or less.
[0117] 第 11の実施形態によれば、第 2主面 S2と第 3主面 S3との間隔を小さくすることによ つて、入射角 θ 1で第 1主面 SIに入射し、第 1フォトダイオード 5を通過した光が、第 2 フォトダイオード 6に対してずれてしまうことを抑制できる。 [0117] According to the eleventh embodiment, the distance between the second main surface S2 and the third main surface S3 is reduced. Therefore, it is possible to suppress the light that has entered the first main surface SI at the incident angle θ 1 and has passed through the first photodiode 5 from being shifted from the second photodiode 6.
[0118] また、第 1フォトダイオード 5が受光する光は、シリコンを主原料とする基板 2を通過 したものなので可視光はカットされており、赤外線領域の光が大部分を占める。この ため、撮像素子 721は、赤外線カメラ、赤外線センサ等に好適に用いることができる [0118] Since the light received by the first photodiode 5 has passed through the substrate 2 made mainly of silicon, the visible light is cut off, and the light in the infrared region occupies most of the light. For this reason, the image sensor 721 can be suitably used for an infrared camera, an infrared sensor, or the like.
[0119] なお、第 11の実施形態の撮像素子 721が第 7及び第 8の実施形態のカメラモジュ 一ルの撮像素子に適用されてもよいこと、第 11の実施形態の撮像素子 721において 、第 9の実施形態のように第 2のフォトダイオード 6の位置を第 1フォトダイオード 5に対 してずれた位置にしたり、第 10の実施形態のように第 2のフォトダイオード 6の受光面 積を第 5のフォトダイオード 5の受光面積に対して広くしてもょ 、ことは 、うまでもな ヽ Note that the image sensor 721 of the eleventh embodiment may be applied to the image sensor of the camera module of the seventh and eighth embodiments. In the image sensor 721 of the eleventh embodiment, The position of the second photodiode 6 is shifted from the first photodiode 5 as in the ninth embodiment, or the light receiving area of the second photodiode 6 as in the tenth embodiment. To make the light receiving area of the fifth photodiode 5 larger, it is a matter of course.
[0120] 本発明は以上の実施形態に限定されず、種々の態様で実施してよい。 [0120] The present invention is not limited to the above embodiment, and may be implemented in various modes.
[0121] 撮像素子は、 MOS型等の XYアドレス方式のものでも、 CCD等の電荷転送方式の ものでもよい。また、 XYアドレス方式の場合、実施形態では、画素毎に増幅素子が 設けられるいわゆる増幅型撮像素子を開示したが、撮像素子の全ての画素、又は、 一部の複数の画素に対して、増幅素子が一つ設けられるものでもよい。第 1〜第 8の 実施形態の構成は適宜に組み合わせてよ 、。 [0121] The image sensor may be an XY address type such as a MOS type or a charge transfer type such as a CCD. In the case of the XY address system, the embodiment discloses a so-called amplification type imaging device in which an amplifying device is provided for each pixel. However, amplification is performed for all pixels of the imaging device or a part of a plurality of pixels. One element may be provided. Combine the configurations of the first to eighth embodiments as appropriate.
[0122] 例えば、図 7に示す第 4の実施形態において、アンプトランジスタ 13及び 213を省 略するとともに、加算部 230に代えて、図 6に示す第 3の実施形態の電圧制御回路 3 0及び可変利得増幅器により構成されたアンプトランジスタ 63を 1組設けてもょ 、。こ の場合、撮像素子の全ての画素に対して設けられた一つの可変利得増幅器により、 第 2受光素子の電気信号に基づいて第 1受光素子の電気信号の増幅率を画素毎に 制御できる。 [0122] For example, in the fourth embodiment shown in FIG. 7, the amplifier transistors 13 and 213 are omitted, and the voltage control circuit 30 and the third embodiment shown in FIG. A pair of amplifier transistors 63 composed of variable gain amplifiers may be provided. In this case, the amplification factor of the electric signal of the first light receiving element can be controlled for each pixel based on the electric signal of the second light receiving element by one variable gain amplifier provided for all the pixels of the image pickup element.
[0123] また、例えば、図 3に示す第 1の実施形態において、転送トランジスタ 25と記憶ノー ド SNとの間に、図 6に示す第 3の実施形態における電圧制御回路 30 (信号レベル制 御回路)を設け、第 2フォトダイオード 6からの電気信号の信号レベルを、第 1フォトダ ィオード 5により光電変換されな力つた光量に相当する電気信号の信号レベルに、よ り近似させるように補正し、その後、加算するようにしてもよい。なお、近似させるため の電圧制御回路 30における電圧の変換量は、第 3の実施形態において説明したよう に、実験等により、第 1主面 S1への入射光量と、第 1フォトダイオード 5の電気信号の 信号レベルと、第 2フォトダイオード 6の電気信号の信号レベルとの相関関係を特定 することにより決定すればよい。 Further, for example, in the first embodiment shown in FIG. 3, the voltage control circuit 30 (signal level control in the third embodiment shown in FIG. 6 is interposed between the transfer transistor 25 and the storage node SN. Circuit) and correct the signal level of the electrical signal from the second photodiode 6 so that it more closely approximates the signal level of the electrical signal corresponding to the amount of light that has been photoelectrically converted by the first photodiode 5. Thereafter, addition may be performed. To approximate As described in the third embodiment, the amount of voltage conversion in the voltage control circuit 30 is determined by the amount of incident light on the first main surface S1 and the signal level of the electrical signal of the first photodiode 5 by experiments or the like. It may be determined by specifying the correlation with the signal level of the electrical signal of the second photodiode 6.
[0124] また、例えば、図 15に示す第 10の実施形態において、第 1フォトダイオード 5よりも 受光面積の大きい第 2フォトダイオード 6が、図 14に示す第 9の実施形態のように、第 1フォトダイオード 5に対して画素配列領域の外周側にずれて配置されて ヽてもよ 、。 この場合のずれ量は、例えば、第 9の実施形態と同様に dl =t x tan 0 1となるように 設定されてよい。 Further, for example, in the tenth embodiment shown in FIG. 15, the second photodiode 6 having a light receiving area larger than that of the first photodiode 5 is changed as in the ninth embodiment shown in FIG. One photodiode 5 may be shifted from the outer peripheral side of the pixel array region. The amount of deviation in this case may be set so that, for example, dl = t x tan 0 1 as in the ninth embodiment.
[0125] 第 1受光素子は、基板の一主面 (実施形態では、第 1の主面 S1)に入射した光を受 光可能であればよい。従って、第 1の実施形態のように第 1の主面 S1に配置されてい てもよ 、し、第 11の実施形態のように他主面としての第 2の主面 S2に配置されて ヽ てもよいし、基板に埋設されていてもよい。  [0125] The first light receiving element only needs to be able to receive light incident on one main surface (first main surface S1 in the embodiment) of the substrate. Therefore, it may be disposed on the first main surface S1 as in the first embodiment, or may be disposed on the second main surface S2 as the other main surface as in the eleventh embodiment. It may be embedded in the substrate.
[0126] 第 2受光素子は、第 1受光素子の背後側の位置、すなわち、基板の一主面に入射 して第 1受光素子及び基板のうち少なくとも一方を透過した光を受光可能な位置に 設けられるものであればよい。第 1受光素子の少なくとも一部や基板の少なくとも一部 において入射光のエネルギーが吸収されれば、第 2受光素子の受光量は第 1受光 素子の受光量よりも少なくなるから、第 1受光素子において飽和レベルを超えても、 第 2受光素子においては光量分布を特定し得る。従って、例えば第 2受光素子は基 板に埋設されていてもよい。第 2受光素子が基板に埋設される場合、第 1受光素子が 設けられる基板に埋設されていてもよいし、他の基板 (例えば、実施形態の第 2基板 402)【こ埋設されて!/、てもよ ヽ。  [0126] The second light receiving element is positioned at the back side of the first light receiving element, that is, at a position where it can receive light that is incident on one main surface of the substrate and passes through at least one of the first light receiving element and the substrate. Anything provided is acceptable. If the incident light energy is absorbed by at least part of the first light receiving element or at least part of the substrate, the amount of light received by the second light receiving element is less than the amount of light received by the first light receiving element. Even if the saturation level is exceeded, the light quantity distribution can be specified in the second light receiving element. Therefore, for example, the second light receiving element may be embedded in the substrate. When the second light receiving element is embedded in the substrate, it may be embedded in the substrate on which the first light receiving element is provided, or another substrate (for example, the second substrate 402 in the embodiment). / That's okay.
[0127] 第 2受光素子が第 2基板 (実施形態では第 2基板 402)に設けられる場合、第 1受光 素子が設けられる基板 (実施形態では基板 2)と、第 2基板との間隔は、適宜に設定さ れてよい。また、第 1受光素子と第 2受光素子との絶縁性が確保されるならば、第 1受 光素子が設けられる基板と、第 2基板とが互いに当接していてもよい。例えば、第 6の 実施形態にぉ 、て、基板 2と第 2基板 402とは互 、に当接して 、てもよ 、。  [0127] When the second light receiving element is provided on the second substrate (second substrate 402 in the embodiment), the distance between the substrate on which the first light receiving element is provided (substrate 2 in the embodiment) and the second substrate is It may be set appropriately. If the insulation between the first light receiving element and the second light receiving element is ensured, the substrate on which the first light receiving element is provided and the second substrate may be in contact with each other. For example, in the sixth embodiment, the substrate 2 and the second substrate 402 may be in contact with each other.
[0128] 第 1受光素子の形状や大きさと第 2受光素子の形状や大きさとは、互いに異なって いてもよい。例えば、図 15に示す第 10の実施形態では、第 2受光素子としての第 2フ オトダイオード 6の受光面積が第 1受光素子としての第 1フォトダイオード 5の受光面 積よりも大きい場合を例示したが、第 2受光素子の受光面積が第 1受光素子の受光 面積よりも小さくてもよい。なお、第 1受光素子の形状や大きさと第 2受光素子の形状 や大きさとが異なる場合、図 14に示す第 9の実施形態のように、第 2受光素子が第 1 受光素子に対して画素配列領域の外周側にずれて配置されているか否かは、例え ば、第 2受光素子の受光面の中心が第 1受光素子の受光面の中心に対して画素配 列領域の外周側にずれている力否かにより特定できる。 [0128] The shape and size of the first light receiving element and the shape and size of the second light receiving element are different from each other. May be. For example, in the tenth embodiment shown in FIG. 15, the case where the light receiving area of the second photodiode 6 as the second light receiving element is larger than the light receiving area of the first photodiode 5 as the first light receiving element is illustrated. However, the light receiving area of the second light receiving element may be smaller than the light receiving area of the first light receiving element. If the shape and size of the first light receiving element are different from the shape and size of the second light receiving element, the second light receiving element has a pixel relative to the first light receiving element as in the ninth embodiment shown in FIG. For example, whether the center of the light receiving surface of the second light receiving element is shifted to the outer peripheral side of the pixel array region with respect to the center of the light receiving surface of the first light receiving element is determined as to whether or not it is shifted to the outer peripheral side of the array region. It can be specified by whether or not the power is.
[0129] 第 1受光素子の飽和レベルを制御する飽和レベル制御部は、第 1受光素子の電気 信号及び第 2受光素子の電気信号のうち少なくとも一方に基づいて飽和レベルを制 御すればよい。従って、第 1の実施形態において説明したような、第 1受光素子の電 気信号及び第 2受光素子の電気信号の双方に基づいて飽和レベルを制御するもの に限定されない。従来のように、第 1受光素子の電気信号のみに基づいて飽和レべ ルを制御してもよ!/、し、第 2受光素子の電気信号のみに基づ 、て飽和レベルを制御 してもよい。ただし、第 2受光素子の電気信号に基づいて飽和レベルを制御すれば、 第 1受光素子の電気信号のみに基づいて飽和レベルを制御する場合に比較して、 入射光量と飽和レベルとの差を特定しやすくなり、飽和レベルを入射光量に追従さ せやすくなる。 [0129] The saturation level control unit that controls the saturation level of the first light receiving element may control the saturation level based on at least one of the electric signal of the first light receiving element and the electric signal of the second light receiving element. Therefore, the present invention is not limited to the one that controls the saturation level based on both the electric signal of the first light receiving element and the electric signal of the second light receiving element as described in the first embodiment. As in the past, the saturation level may be controlled based only on the electrical signal of the first light receiving element! /, And the saturation level may be controlled based only on the electrical signal of the second light receiving element. Also good. However, if the saturation level is controlled based on the electrical signal of the second light receiving element, the difference between the incident light amount and the saturation level is smaller than when the saturation level is controlled only based on the electrical signal of the first light receiving element. This makes it easier to identify and to make the saturation level follow the amount of incident light.
[0130] また、飽和レベル制御部は、第 1受光素子における電荷の飽和の程度が所定の範 囲内に収まるように第 1受光素子の飽和レベルを制御するものであればよぐ飽和す る画素が完全になくなるように飽和レベルを制御するものに限定されない。例えば飽 和する画素が所定数になるように制御するものであってもよ 、。  [0130] Further, the saturation level control unit is a pixel that saturates as long as it controls the saturation level of the first light receiving element so that the degree of charge saturation in the first light receiving element is within a predetermined range. However, the present invention is not limited to the one that controls the saturation level so that is completely eliminated. For example, it is possible to control so that saturated pixels become a predetermined number.

Claims

請求の範囲 The scope of the claims
[1] 基板と、  [1] a substrate;
前記基板を複数に分割した画素毎に設けられる受光素子であって、前記基板に設 けられ、前記基板の一主面に入射する光を受光し、受光量に応じた電荷を生じる第 A light receiving element provided for each pixel obtained by dividing the substrate into a plurality of pixels. The light receiving element is provided on the substrate, receives light incident on one main surface of the substrate, and generates a charge corresponding to the amount of light received.
1受光素子と、 1 light receiving element,
前記画素毎に設けられる受光素子であって、前記第 1受光素子の背後側の位置に 設けられ、前記一主面に入射して前記第 1受光素子及び前記基板の少なくとも一方 を透過した光を受光し、受光量に応じた電荷を生じる第 2受光素子と、  A light receiving element provided for each pixel, the light receiving element provided at a position behind the first light receiving element, incident on the one main surface and transmitted through at least one of the first light receiving element and the substrate; A second light receiving element that receives light and generates a charge corresponding to the amount of light received;
前記第 1受光素子にて生じた電荷に基づく電気信号の信号レベルを、同一画素の 前記第 2受光素子にて生じた電荷に基づく電気信号の信号レベルが高いほど増加 量が大きくなるように増加させるように構成された増加部と、  The signal level of the electrical signal based on the charge generated in the first light receiving element is increased so that the amount of increase increases as the signal level of the electrical signal based on the charge generated in the second light receiving element of the same pixel increases. An increasing portion configured to cause
を備えた撮像素子。  An imaging device comprising:
[2] 前記第 1受光素子は、前記一主面に設けられ、 [2] The first light receiving element is provided on the one main surface,
前記第 2受光素子は、前記基板の他主面に設けられて!/、る  The second light receiving element is provided on the other main surface of the substrate.
請求項 1に記載の撮像素子。  The imaging device according to claim 1.
[3] 前記基板の他主面に対向して配置される第 2基板を備え、 [3] a second substrate disposed opposite to the other main surface of the substrate;
前記第 2受光素子は、前記第 2基板に設けられている  The second light receiving element is provided on the second substrate.
請求項 1に記載の撮像素子。  The imaging device according to claim 1.
[4] 前記第 1受光素子は、前記基板の前記一主面に設けられ、 [4] The first light receiving element is provided on the one main surface of the substrate,
前記第 2受光素子は、前記第 2基板のうち前記基板の他主面に対向する主面に設 けられている  The second light receiving element is provided on a main surface of the second substrate facing the other main surface of the substrate.
請求項 3に記載の撮像素子。  The imaging device according to claim 3.
[5] 前記第 1受光素子は、前記基板の前記他主面に設けられ、 [5] The first light receiving element is provided on the other main surface of the substrate,
前記第 2受光素子は、前記第 2基板のうち前記基板の前記他主面に対向する主面 に設けられている  The second light receiving element is provided on a main surface of the second substrate facing the other main surface of the substrate.
請求項 3に記載の撮像素子。  The imaging device according to claim 3.
[6] 前記増加部及び当該増加部の動作を制御する増加制御部のうち少なくとも一部は 前記第 2基板に設けられて ヽる 請求項 3に記載の撮像素子。 [6] At least a part of the increase unit and the increase control unit that controls the operation of the increase unit is provided on the second substrate. The imaging device according to claim 3.
[7] 前記増加部は、前記第 1受光素子にて生じた電荷に基づく電気信号に、同一画素 の前記第 2受光素子にて生じた電荷に基づく電気信号を加算する [7] The increasing unit adds an electric signal based on the electric charge generated in the second light receiving element of the same pixel to an electric signal based on the electric charge generated in the first light receiving element.
請求項 1に記載の撮像素子。  The imaging device according to claim 1.
[8] 前記増加部は、前記第 1受光素子にて生じた電荷に基づく電気信号を増幅する増 幅素子を備え、 [8] The increase unit includes an amplification element that amplifies an electric signal based on the electric charge generated in the first light receiving element,
前記増幅素子は、前記第 2受光素子にて生じた電荷に基づく電気信号の信号レべ ルが大きいほど、同一画素の前記第 1受光素子にて生じた電荷に基づく電気信号を 増幅するときの増幅率を高くする  The amplifying element increases the electric signal based on the electric charge generated in the first light receiving element of the same pixel as the signal level of the electric signal based on the electric charge generated in the second light receiving element is larger. Increase amplification factor
請求項 1に記載の撮像素子。  The imaging device according to claim 1.
[9] 前記第 2受光素子が複数配列される面と同一平面に配置された第 3受光素子と、 前記一主面側から前記第 3受光素子へ向かう光を遮断する遮光部と、 を備え、 [9] A third light receiving element disposed on the same plane as a surface on which a plurality of the second light receiving elements are arranged, and a light shielding unit that blocks light from the one main surface side toward the third light receiving element. ,
前記増加部は、前記第 2受光素子にて生じた電荷に基づく電気信号の信号レベル 力も前記第 3受光素子にて生じた電荷に基づく電気信号の信号レベルを減算して前 記第 2受光素子にて生じた電荷に基づく電気信号の信号レベルを補正し、その補正 後の信号レベルに基づいて前記第 1受光素子にて生じた電荷に基づく電気信号の 信号レベルを増加させる  The increasing unit subtracts the signal level of the electric signal based on the electric charge generated in the third light receiving element from the signal level force of the electric signal based on the electric charge generated in the second light receiving element. The signal level of the electrical signal based on the charge generated in step 1 is corrected, and the signal level of the electrical signal based on the charge generated in the first light receiving element is increased based on the corrected signal level.
請求項 1に記載の撮像素子。  The imaging device according to claim 1.
[10] 前記第 1受光素子にて生じた電荷に基づく電気信号及び前記第 2受光素子にて生 じた電荷に基づく電気信号のうち少なくとも一方に基づいて、以降において前記第 1 受光素子における電荷の飽和の程度が所定の範囲内に収まるように、前記第 1受光 素子の飽和レベルを制御するように構成された飽和レベル制御部を備える [10] Based on at least one of an electric signal based on the electric charge generated in the first light receiving element and an electric signal based on the electric charge generated in the second light receiving element, and thereafter, the electric charge in the first light receiving element. A saturation level control unit configured to control the saturation level of the first light receiving element so that the saturation level of the first light receiving element falls within a predetermined range.
請求項 1に記載の撮像素子。  The imaging device according to claim 1.
[11] 画素配列領域の外周側の画素ほど、前記第 2受光素子が同一画素の前記第 1受 光素子に対して画素配列領域の外周側にずれて配置されている [11] The pixels on the outer peripheral side of the pixel array region are arranged such that the second light receiving element is shifted to the outer peripheral side of the pixel array region with respect to the first light receiving element of the same pixel.
請求項 1に記載の撮像素子。  The imaging device according to claim 1.
[12] 前記第 2受光素子は、前記第 1受光素子よりも受光面積が広ぐ前記第 1受光素子 に対して画素配列領域の外周側へはみ出している [12] The first light receiving element has a light receiving area larger than that of the first light receiving element. To the outer periphery of the pixel array area
請求項 1に記載の撮像素子。  The imaging device according to claim 1.
[13] レンズと、 [13] lenses,
前記レンズからの光が結像する撮像素子と、  An image sensor on which light from the lens forms an image;
前記撮像素子の出力する電気信号を処理するように構成された信号処理部と、 を備え、  A signal processing unit configured to process an electrical signal output from the imaging device, and
前記撮像素子は、  The image sensor is
基板と、  A substrate,
前記基板を複数に分割した画素毎に設けられる受光素子であって、前記基板に 設けられ、前記基板の一主面に入射する光を受光し、受光量に応じた電荷を生じる 第 1受光素子と、  A light receiving element provided for each pixel obtained by dividing the substrate into a plurality of pixels. The light receiving element is provided on the substrate and receives light incident on one main surface of the substrate, and generates a charge corresponding to the amount of light received. When,
前記画素毎に設けられる受光素子であって、前記第 1受光素子の背後側の位置 に設けられ、前記一主面に入射して前記第 1受光素子及び前記基板の少なくとも一 方を透過した光を受光し、受光量に応じた電荷を生じる第 2受光素子と、  A light receiving element provided for each pixel, provided at a position behind the first light receiving element, incident on the one main surface and transmitted through at least one of the first light receiving element and the substrate A second light receiving element that generates a charge corresponding to the amount of light received,
を備え、  With
前記信号処理部は、前記第 1受光素子にて生じた電荷に基づく電気信号の信号レ ベルを、同一画素の前記第 2受光素子にて生じた電荷に基づく電気信号の信号レ ベルが高 、ほど増加量が大きくなるように増カロさせるように構成されて!、る  The signal processing unit has a high signal level of an electric signal based on the charge generated in the first light receiving element, and a high signal level of the electric signal based on the charge generated in the second light receiving element of the same pixel. It is configured to increase the amount of calories so that the amount of increase increases!
カメラモジユーノレ。  Camera module.
[14] 前記レンズの光軸力も離れた位置の画素ほど、前記第 2受光素子が同一画素の前 記第 1受光素子に対して前記光軸から離れる方向にずれて配置されて 、る  [14] In the pixel at a position where the optical axis force of the lens is also away, the second light receiving element is arranged so as to be shifted in a direction away from the optical axis with respect to the first light receiving element of the same pixel.
請求項 13に記載のカメラモジュール。  The camera module according to claim 13.
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