WO2006032932A1

WO2006032932A1 - Rf input stage for low noise amplifier or mixer

Info

Publication number: WO2006032932A1
Application number: PCT/GB2005/050149
Authority: WO
Inventors: Nicholas Mark Troop
Original assignee: Frontier Silicon Limited
Priority date: 2004-09-20
Filing date: 2005-09-12
Publication date: 2006-03-30
Also published as: EP1800397A1

Abstract

This invention generally relates to radio frequency circuits, more particularly to circuits such as amplifier circuits, having a high dynamic range. Embodiments of the invention are particularly suitable for use in the front end of a Broadcast Radio Receiver such as a digital audio broadcast (DAB) receiver. An rf amplifier circuit, the circuit comprising: first and second inputs; at least one output; first and second inductors each having first and second connections, said first connections of said first and second inductors being respectively coupled to said first and second inputs; first and second transistors, each having at least a control connection., an input connection and an output connection, said input connections of said first and second transistors being respectively coupled to said second connections of said first and second inductors, said control connections of said first and second transistors each having a bias, and at least one of said output connections of said first and second transistors being coupled to said at least one output; and wherein said control connections of said first transistors is capacitatively coupled to said first inductor of said second inductor and said control connection of said second transistors is capacitively coupled to said first connection of said first inductor.

Description

Radio Frequency Circuits

This invention generally relates to radio frequency circuits, more particularly to circuits such as amplifier circuits, having a high dynamic range. Embodiments of the invention are particularly suitable for use in the front end of a Broadcast Radio Receiver such as a digital audio broadcast (DAB) receiver.

The front end of a broadcast radio receiver has a requirement for a high frequency dynamic range. This is because a broadcast transmitter generally has a wide coverage area, and thus a receiver close to the transmitter will receive high power transmitted signals whereas distant receivers will receive the transmitted signals at a very low power. It is generally desirable to provide as much sensitivity as possible at this lower end of the received signal power so as to increase the range at which a receiver can be used. The requirement for a high dynamic range is particularly important for digital broadcast signals such as digital audio and digital television broadcast signals. It is also generally desirable to reduce the current consumption of a receiver front end, particularly for battery operated receivers.

Background information on digital broadcast services can be found in the Eureka- 147 standard (European Telecommunications Standards Institute (ETSI) Document EN 300 401 Vl.3.3, 2001-5); reference may also be made to BS EN 50248.2001. Digital audio broadcast services, for example, are provided in two frequency bands, 174 - 240 MHz (Band 3 in the UlC) and 1452 - 1492 MHz (L Band) for the rest of the world; it is also useful for a DAB receiver to be capable of receiving conventional FM (Frequency Modulation) broadcasts, in the UIC at 88 - 108MHz.

Background prior art relating to wide-band low noise CMOS amplifiers can be found in "Wide band CMOS Low-Noise Amplifier Exploiting Thermal Noise Cancelling", IEEE Journal of Solid State Circuits, Vol. 39, no.2 Feb 2004 pp. 275 - 281 and the references cited therein; examples of common base circuits are described in US6, 125,272 and US4,636,663.

We will describe an improved radio frequency (rf) amplifier circuit embodiments of which have a relatively high dynamic range, a low power consumption, and relatively low noise.

According to a first aspect of the present invention there is therefore provided an rf amplifier circuit, the circuit comprising first and second inputs; at least one output; first and second each having first and second connections, said first inductor connections of said first and second inductors being respectively coupled to said first and second inputs; first and second transistors, each having at least a control connection, an input connection and an output connection, said input connections of said first and second transistors being respectively coupled to said second connections of said first and second inductors, said control connections of said first and second transistors each having a bias, and at least one of said output connections of said first and second transistors being coupled to said at least one output; and wherein said control connection of said first transistor is capacitatively coupled to said first connection of said second inductor and said control connection of said second transistor is capacitively coupled to said first connection of said first inductor.

Broadly speaking, in embodiments of the circuit by cross-coupling the input terminals, that is coupling an input terminal of one transistor to a base or source connection of the other transistor of the pair, in combination with inductive emitter degeneration, the dynamic range of the circuit is increased, thus facilitating the implementation of a high dynamic range low noise amplifier (LNA). The circuit can be either fed from a differential source, or with one of the inputs a.c. grounded, the circuit can be fed from an unbalanced source, as the cross-coupling produces a self-balancing action. The preferred output connection of the two cross-coupled transistors is to provide a balanced or differential output.

The transistors may comprise any type of active device including, but not limited to, bipolar transistors, when the input connections comprise emitter connections and the control connections are base connections, and field effect transistors such as MOSFETs, MESFETs and JFETs, when the input connections are source connections and the control connections are gate connections.

In embodiments a substantially constant current bias circuit is employed for the first and second input connections of the first and second transistors, and a common dc voltage bias may be applied to the control connections of the transistors. In some preferred embodiments the amplifier also includes a cascode circuit for the output or pair of outputs; this may share the same bias current as the amplifier input connections. This cascode circuit may implement any of a range of additional functions including, but not limited to, a voltage-controlled gain function (for automatic gain control), a mixer function, a filter function, and/or one or more additional amplification stages; a combination of these functions may also be employed. In embodiments cascoding the rf amplifier with other circuit functions (and using the same bias arrangement) is particularly helpful in reducing the overall power consumption. This makes embodiments of the circuits particularly suited to low power applications, including (but not limited to) applications in cellphones, portable radio receivers, portable television receivers, pagers, GPS (Global Positioning Services) receivers, and the like.

Thus in one alternative embodiment the cascode circuit comprises a mixer circuit, and in another the cascode circuit comprises a gain control circuit.

Embodiments of the amplifier may be implemented in either integrated or discrete circuits. The special problems encountered in reception of digital broadcast information make embodiments of the circuit particularly useful for the front end of a digital broadcast radio receiver such as a DAB, DVB (digital video broadcast) or DMB (digital multimedia broadcast) receiver.

In another, related aspect the invention further provides a radio frequency input stage circuit, the circuit comprising: a first common base or gate type circuit with emitter or source degeneration, and having a first input and a first output; a second common base or gate type circuit with emitter or source degeneration, and having a second input and a second output; and wherein a base or gate connection of said first circuit is capacitatively coupled to said second input and a base or gate connection of said second circuit is capacitatively coupled to said first input.

In preferred arrangements the emitter or source degeneration of the first common base or gate type circuit and the emitter or source degeneration of the second common base or gate type circuit both comprise inductive emitter or source degeneration.

In a complementary aspect the invention further provides a method of amplifying a radio frequency (rf) signal using a pair of cross-coupled transistors, the method comprising: inputting said rf signal; providing a first portion of said rf signal via an inductive coupling to an input connection of a first transistor of said pair of cross- coupled transistors and via a capacitative coupling to a control connection of a second transistor of said pair of cross-coupled transistors; providing a second portion of said rf signal via an inductive coupling to an input connection of said second transistor of said pair of cross-coupled transistors and via a capacitative coupling to a control connection of said first transistor of said pair of cross-coupled transistors; and outputting an amplified version of said rf signal from an output connection of at least one of said first and second transistors of said pair.

Preferably the rf signal is a differential rf signal and the cross-coupled transistors employ inductive source/emitter (input circuit) degeneration.

In a still further related aspect the invention provides a circuit for amplifying a radio frequency (rf) signal using a pair of cross-coupled transistors, the circuit comprising; means for inputting said rf signal; means for providing a first portion of said rf signal via an inductive coupling to an input connection of a first transistor of said pair of cross- coupled transistors and via a capacitative coupling to a control connection of a second transistor of said pair of cross- coupled transistors; means for providing a second portion of said rf signal via an inductive coupling to an input connection of said second transistor of said pair of cross-coupled transistors and via a capacitative coupling to a control connection of said first transistor of said pair of cross-coupled transistors; and means for outputting an amplified version of said rf signal from an output connection of at least one of said first and second transistors of said pair. These and other aspects of the invention will now be further described, by way of example only, with reference to the accompanying figures in which:

Figure 1 shows a conventional rf amplifier with inductive emitter degeneration;

Figure 2 shows a common base amplifier with inductive degeneration;

Figure 3 shows a common base amplifier with inductive degeneration configured for balanced input operation;

Figure 4 shows a cross-coupled amplifier according to an embodiment of the present invention;

Figure 5 shows the amplifier of figure 4 with additional bias circuitry;

Figures 6a and 6b show examples of an automatic gain control circuits incorporating the cross-coupled rf amplifier of figure 5;

Figure 7 shows an example of a mixer circuit incorporating the cross-coupled rf amplifier of figure 5.

Referring to figure 1, this shows a conventional common emitter amplifier 10 with inductive emitter degeneration. An rf source 12 is represented by a combination of a perfect source 12a and a source impedance 12b, r_s, this providing an input to a base connection of a bipolar transistor 14. An emitter connection of the transistor is connected to go round 16 via an inductor 18 of value L, and a collector connection of the transistor provides an output 20. For simplicity of illustration biasing is not shown. Broadly speaking, in the circuit of figure 1 an ac input to base of transistor 14 sees an input impedance (to ground) determined by the impedance of inductor 18. The effect of inductor 18 is thus to reduce the ac gain of the circuit, so called "degeneration". However the input matching is improved (lower loss) and the noise figure is reduced; dc biasing may also be facilitated. More particularly, inductor 18 results in a voltage at the emitter of transistor 14 which leads the input signal by approximately 90 degrees, and this modifies the input impedance of the circuit via the base-emitter capacitance of transistor 14. This provides an additional degree of design freedom which can be employed to optimise a practical LNA. The presence of inductor 18 also has the effect of rolling off the output noise of the amplifier; in a practical circuit this noise suppression is limited at high frequencies by the parasitic capacitance of the inductor and at low frequencies by the size of the inductor.

Turning now to figure 2, this illustrates an example of a common base rf amplifier 200 to which inductive emitter degeneration has been applied. In the circuit 200 of figure 2 the base connection of transistor 214 is an effective ground for ac voltages as it is coupled to ground 216 by capacitor 222. Again the emitter of transistor 214 is coupled to an inductor 218 of value L, but in the circuit of figure 2 an rf input from a source 212 (again considered as a perfect source 212a in series with a source impedance 212b) is applied to the other terminal of inductor 218. As before, the collector terminal of transistor 214 provides an output 220. A dc bias for transistor 214 is applied to connection 224 to the base of this transistor. The effect of inductor 218 in the circuit of figure 2 is broadly similar to that of inductor 18 in the common emitter circuit of figure 1.

Figure 3 shows an rf amplifier circuit 300 configured for operation with a balanced input to a pair of input terminals 302. Each of these input terminals is connected to a respective common base amplifier with inductive emitter degeneration of the type shown in figure 2; like elements of those of figure 2 are indicated by like reference numerals.

Figure 4 shows an embodiment of an rf amplifier 400 according to the present invention; for clarity details of biasing are omitted from figure 4. In figure 4 like elements to those of figure 3 are indicated by like reference numerals. A comparison of figures 4 and 3 shows that in the circuit 400 of figure 4 the base connections of transistors 214a, b are cross-coupled to the alternate respective inputs 302b, a via capacitors 222a, b. As described further below this configuration provides an improved dynamic range over the arrangement shown in figure 3 and also, in embodiments, exhibits a self-balancing action. Again the output of the circuit is taken from the collector terminals of transistors 214a, b.

Figure 5 shows a circuit 500 of a practical implementation of the circuit of figure 4, including an outline of the clc biasing arrangements. Again, like elements to those of figure 4 are indicated by like reference numerals. In circuit 500 a pair of constant current generators (as shown, current sinks) 502a, b is provided, one for the emitter circuit of each transistor 214a, b. These may be implemented by any one of a range of conventional techniques well known to the skilled person, typically employing current mirror technology. The bases of transistors 214a, b are connected together by a respective pair of resistors 514a, b, a common connection of these two resistors providing an input for a dc reference voltage bias which, again, may be implemented by any conventional means using techniques which are well known to the person skilled in the art. Again output connections 506a, b are provided by the collector terminals of transistors 214a, b.

An output voltage may be derived from the circuit 500 of figure 5 by implementing any conventional collector load. However an advantage of embodiments of the invention is that additional circuit functions may be cascoded with the circuit of figure 5, examples of which are shown in circuits 600, 700, of figures 6 and 7 respectively.

The general concept of a cascode amplifier is well known in radio frequency circuits and serves to reduce the Miller effect (in which feedback capacitance reduces circuit gain).

In the circuit 600 of figure 6a each collector circuit includes an emitter coupled pair 601a, 602a, 601b, 602b, the bases of the transistors of each pair receiving a control voltage input on connection 604. As the skilled person will understand, such an emitter-coupled pair has a difference in collector currents which is proportional to the applied (differential) input voltage, and this is converted to an output voltage for terminals 606a, b by respective resistors 608a, b. However the total emitter current for each emitter-coupled pair is governed by the collector currents of respective transistors 214a, b and thus the output signal at connections at 606a_s b is determined by the output of the amplifier circuit, modulated or adjusted by the gain control voltage on terminals 604, thus forming an AGC (Automatic Gain Control) circuit. The puipose of the inductors 601a, b is to extend the bandwidth of the amplifier by increasing the collector load impedance with increasing frequency. This introduces a pole that offsets the decreasing impedance with frequency that is due to the collector output capacitance and parasitic capacitances. The basic technique is sometimes referred to as shunt-peaking; it is incorporated in embodiments of the design to improve L-Band performance and could be omitted for operation at frequencies lower than L-band.

Figure 6b shows an alternative, preferred AGC circuit 650 in which the biasing arrangement is slightly altered from that shown in Figure 6a, so that the bias current does not flow through the inductors 218. In Figure 6b like elements to those of Figure 6a are shown by like reference numerals.

The circuit 700 of figure 7 is similar to that of figure 6. However the transistors 601a, 602a, 601b, 602b are cross-coupled in a Gilbert multiplier circuit so that a local oscillator input on terminals 704 may be mixed with the rf input on terminals 302 to provide an IF (Intermediate Frequency) output on terminals 706a, b. In other, sometimes preferred arrangements the biasing of circuit 700 of Figure 7 may be modified so that it is similar to that shown in Figure 6b.

Returning now to figures 4 and 5, we will now describe the operation of this circuit.

The dependence of output current on input voltage is only approximately linear for small signal voltages in active semiconductor devices. This is shown below for bipolar, JFET and MOSFET amplifiers.

Linearity is poor in common emitter and common base stage amplifiers owing to the exponential dependence of collector current on base-emitter voltage,

I_c

in common source and common gate JFET amplifiers due to the square-law dependence of drain current on gate-source voltage,

and in common source and common gate MOSFET amplifiers due to the square-law dependence of drain current on gate-source voltage,

ⁱo =^βK -κH*+w_*)

However in most cases the current dependence on voltage may be made more linear by negative-feedback (degeneration) in the emitter or source terminal (series-current feedback). In this case the output current flows through a common impedance with the input current such that a voltage is developed across this element that opposes the input voltage. The voltage across the base-emitter junction is therefore reduced and so is the stage gain. The input impedance however is increased by the addition of this type of feedback. Gain can therefore be substantially independent of device parameters and is set by R_c , R_L and X_L.

The degenerating component may be a resistor, inductor or capacitor. In preferred embodiments of the present invention inductors are used as they do not contribute Johnson noise and will pass the required bias current. Hence the increased linearity can be obtained without degradation in Noise Figure. However the effect is frequency selective due to the linear relationship between reactance and frequency.

The effect of cross-coupling the devices doubles the gm as there are effectively two transistors in parallel. This higher gain allows for greater degeneration than would be possible with a single device and the greater degeneration imparts greater linearity. The second useful effect of this degeneration is to raise the input impedance looking into the emitter of a common-base amplifier and this allows higher collector currents to be used whilst maintaining input impedances close to 50 Ohms. A high collector current implies a high output compression point and high third order output intercept point.

A set of example component values and bias currents and voltages for Band III operation (174-240MHz) is given in Table 1 below.

Table 1

As previously mentioned, the above described circuits may be implemented in either discrete or integrated circuit technology, and are particularly suitable for use in digital audio and/or multimedia broadcast receivers. In order to minimise the amplifier Noise Figure the interconnect resistances in the LNA should preferably be kept to an absolute minimum. This is particularly important in the implementation of the inductors where all loses, Ohmic and substrate coupling, should preferably be minimised.

Figure 8 shows a block diagram of a receiver 800 which includes an rf integrated circuit 802 incorporating an rf amplifier with AGC as shown in Figure 6,

Referring to figure 8, the signal paths begin with a set of three off-chip band selection filters 804a, b, c for Band 2 (fm), Band 3, and L-Band respectively which provide inputs to an rf front end 806. RF front end 806 comprises a multiplexer to selectively couple the output of one of filters 804 to an rf amplifier/AGC circuit as shown in Figure 6, which in turn provides a balanced output to a pair of quadrature downmixers providing a quadrature output at a first IF frequency to a first IF filter 810. A first local oscillator 808 preferably incorporates a phase locked loop (PLL) and is configured as described in the applicant's co-pending UK Patent Application No filed on the same day as this application, hereby incorporated by reference.

The IF after downconversion is 1.024MHz for the DAB inputs (Band 3, L Band), and it is 150KHz for the FM input (Band 2). After polyphase filtering the signal is upconverted to 2.048MHz for DAB and 2.198MHz for FM, and an IF variable gain amplifier and output driver provides a differential ADC drive for a subsequent base band I C A PLL with on-chip LC VCO and a post divider generates the first LO signal for all bands, and this PLL, the second LO generation and the filter alignment are all reference to the crystal reference frequency (of 16.384, 24.576 or 32.768MHz).

As previously mentioned, preferably there are three LNA inputs, one for each frequency band. Preferably each LNA has 4OdB of AGC control range, and a PIdB of -ISdBm. Without external AGC components the chip can meet the -25dBm high level input requirements for portable receivers; an off-chip PIN diode attenuator maybe used to extend the input range to -15 or -1OdBm. The rf input filters may provide protection from ESD discharges to an external antenna.

Preferably the IF filters combine the functions of channel selectivity, anti-alias filtering for the base band ADC and quadrature combining for image rejection. The first EF filter is a four-pole bandpass filter centred at 1.024MHz₅ with 3dB bandwidth of 1.9MHz to 27OkHz. After the quadrature upconversion to the second EF, additional filtering is used to prevent aliasing. This is achieved with the second EF filter, which has an upper frequency of 2.048MHz and a bandwidth of 3.6MHz. A filter alignment circuit may be used to align the centre frequency and bandwidth of all IF filters to the crystal reference frequency. A calibration cycle may be run each time the PLL is re-programmed, or when the PLL or IF circuits are turned on. Periodically, say every half second, an on- die temperature sensor may be employed to take a reading and update the filter tuning.

A first AGC loop controls the rf AGC amplifier and the (optional) external PEN diode attenuator to avoid overloading of the RF and IF circuits; this detects signal levels at the first mixer input and at the first IF filter output. The IF AGC amplifier provides the final gain at the second IF. This is preferably controlled by the baseband IC to give a constant input level to an ADC 812 on the baseband chip.

In a preferred implementation the frequency synthesizer includes an integer-N PLL comprising a fully integrated VCO, prescaler, phase detector, charge pump, reference divider and reference prescaler, and the loop filter is external. The reference divider divides down an externally provided reference frequency to a comparison frequency of 256ItHz for all bands. The VCO output is divided by two for L-band, by 12, 14 or 16 for Band 3 and by 28 or 32 for Band 2. The quadrature output of this programmable divider feeds the quadrature downmixers. This results in a first IF frequency of 1.024MHz for all DAB bands (EF _DΛB), and 150KHz for Band 2 FM mode. The second LO of 1.024MHz (DAB mode) or 2.048MHz (FM mode) for the upconverter is divided down from the reference frequency. This results in a second IF frequency of 2.048MHz for DAB and 2.198MHz for FM mode. The PLL and post-divider provide a channel frequency resolution of 64KHz for L-band and Band 3, and a 4KHz resolution for fine tuning in Band 2.

The IF output of integrated circuit 802 is provided to analogue-to-digital converter 812 for digitisation and subsequent coded orthogonal frequency division multiplexed (COFDM) signal demodulation by COFDM demodulator block 814. The output of demodulator 814 is provided to a DAB protocol stack decoder 816, which in turn provides an MPEG datastream to MPEG audio decoder 818 which provides an audio output to stereo DAC 820 and audio amplifiers and speakers 822. A man machine interface (MMI) 824 interfaces with DAB protocol stack decoder 816 to provide a user keyboard 826 and display 828. These allow a user to interact with and control the receiver via slave control processor and registers 830.

No doubt many effective alternatives will occur to the skilled person. For example although embodiments of the circuits have been described with reference to bipolar transistors the skilled person will understand that these may be replaced by field effect transistors or other active devices. Likewise although embodiments of the circuit have been described in combination with a standard cascode arrangement the skilled person will appreciate that a folded-cascode configuration may also be employed.

The invention is not limited to the described embodiments but encompasses modifications apparent to those skilled in the art lying within the spirit and scope of the claims appended hereto.

Claims

CLAIMS:

1. An rf amplifier circuit, the circuit comprising: first and second inputs; at least one output; first and second inductors each having first and second connections, said first connections of said first and second inductors being respectively coupled to said first and second inputs; first and second transistors, each having at least a control connection, an input connection and an output connection, said input connections of said first and second transistors being respectively coupled to said second connections of said first and second inductors, said control connections of said first and second transistors each having a bias, and at least one of said output connections of said first and second transistors being coupled to said at least one output; and wherein said control connection of said first transistor is capacitatively coupled to said first connection of said second inductor and said control connection of said second transistor is capacitively coupled to said first connection of said first inductor.

2. An rf amplifier circuit as claimed in claim 1 comprising first and second outputs coupled to respective output connections of said first and second transistors.

3. An rf amplifier as claimed as claimed in claim 1 or 2 wherein said transistors comprise bipolar transistors, wherein said input connections comprise emitter connections, and wherein said control connections comprise base connections.

4. An rf amplifier as claimed in claim as claimed in claim 1 or 2 wherein said transistors comprise field effect transistors, wherein said input connections comprise source connections, and wherein said control connections comprise gate connections.

5. An rf amplifier as claimed in any one of claims 1 to 4 further comprising a substantially constant current bias circuit for said first and second input connections of said first and second transistors.

6. An rf amplifier as claimed in any one of claims 1 to 5 wherein said bias for said control connections of said first and second transistors comprises a dc voltage bias.

7. An rf amplifier as claimed in any preceding claim further comprising a cascode circuit for said at least one output.

8. An rf amplifier as claimed in claim 7 wherein said cascode circuit comprises a gain control circuit having a gain control input for controlling a gain of said amplifier.

9. An rf amplifier as claimed in claim 7 or 8 wherein said cascode circuit comprises a mixer circuit having a mixer input for receiving a signal for mixing with a signal received by said first and second inputs.

10. A digital broadcast radio receiver front end incorporating the rf amplifier of any preceding claim.

11. A radio frequency input stage circuit, the circuit comprising: a first common base or gate type circuit with emitter or source degeneration, and having a first input and a first output; a second common base or gate type circuit with emitter or source degeneration, and having a second input and a second output; and wherein a base or gate connection of said first circuit is capacitatively coupled to said second input and a base or gate connection of said second circuit is capacitatively coupled to said first input.

12. A radio frequency input stage as claimed in claim 11 wherein said emitter or source degeneration of said first and second common base or gate type circuits comprises inductive emitter or source degeneration.

13. A radio frequency input stage circuit as claimed in claim 11 or 12 wherein said first and second input comprise a differential input, and wherein said first and second output are configured to provide a differential output.

14. A radio frequency input stage as claimed in claim 11, 12 or 13 further comprising a first substantially constant current bias for an emitter or source connection of said first current and a second substantially constant current bias for an emitter or source connection of said second circuit.

15. A radio frequency input stage as claimed in any one of claims 11 to 14 further comprising a common bias connection for both a base or gate connection of said first circuit and a base or gate connection of said second circuit.

16. A radio frequency input stage as claimed in any one of claims 1 1 to 15 wherein each of said first and second outputs has an associated cascode device.

17. A radio frequency input stage as claimed in any one of claims 11 to 16 configured as a radio frequency amplifier.

18. A controllable gain circuit comprising the if input stage of any one of claims 1 1 to 15 and a gain control circuit having a gain control input and a controlled gain output, said gain control circuit being cascode connected with said first and second outputs.

19. A radio frequency mixer circuit comprising the rf input stage of any one of claims 11 to 15 and a second circuit having a pair of mixer inputs and a mixer output, said second circuit being cascode connected with said first and second outputs, such that a first input signal at said first and second inputs and a second input signal at said pair of mixer inputs are mixed by said mixer circuit to provide a mixed signal output at said mixer output.

20. A digital audio broadcast (DAB) radio receiver circuit incorporating the radio frequency input stage circuit of any one of claims 11 to 17.

21. An rf integrated circuit incoip orating the DAB radio frequency receiver circuit of claim 20.

22. A method of amplifying a radio frequency (rf) signal using a pair of cross- coupled transistors, the method comprising: inputting said rf signal; providing a first portion of said rf signal via an inductive coupling to an input connection of a first transistor of said pair of cross-coupled transistors and via a capacitative coupling to a control connection of a second transistor of said pair of cross- coupled transistors; providing a second portion of said rf signal via an inductive coupling to an input connection of said second transistor of said pair of cross-coupled transistors and via a capacitative coupling to a control connection of said first transistor of said pair of cross- coupled transistors; and outputting an amplified version of said rf signal from an output connection of at least one of said first and second transistors of said pair.

23. A circuit for amplifying a radio frequency (rf) signal using a pair of cross- coupled transistors, the circuit comprising; means for inputting said rf signal; means for providing a first portion of said rf signal via an inductive coupling to an input connection of a first transistor of said pair of cross-coupled transistors and via a capacitative coupling to a control connection of a second transistor of said pair of cross- coupled transistors; means for providing a second portion of said rf signal via an inductive coupling to an input connection of said second transistor of said pair of cross-coupled transistors and via a capacitative coupling to a control connection of said first transistor of said pair of cross-coupled transistors; and means for outputting an amplified version of said rf signal from an output connection of at least one of said first and second transistors of said pair.