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WO2006094162A3 - Method for etching having a controlled distribution of process results - Google Patents

Method for etching having a controlled distribution of process results Download PDF

Info

Publication number
WO2006094162A3
WO2006094162A3 PCT/US2006/007525 US2006007525W WO2006094162A3 WO 2006094162 A3 WO2006094162 A3 WO 2006094162A3 US 2006007525 W US2006007525 W US 2006007525W WO 2006094162 A3 WO2006094162 A3 WO 2006094162A3
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
etching
substrate support
temperature
processing chamber
Prior art date
Application number
PCT/US2006/007525
Other languages
French (fr)
Other versions
WO2006094162A2 (en
Inventor
Thomas J Kropewnicki
Theodoros Panagopoulos
Nicolas Gani
Wilfred Pau
Meihua Shen
John P Holland
Original Assignee
Applied Materials Inc
Thomas J Kropewnicki
Theodoros Panagopoulos
Nicolas Gani
Wilfred Pau
Meihua Shen
John P Holland
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/246,012 external-priority patent/US8075729B2/en
Application filed by Applied Materials Inc, Thomas J Kropewnicki, Theodoros Panagopoulos, Nicolas Gani, Wilfred Pau, Meihua Shen, John P Holland filed Critical Applied Materials Inc
Priority to DE112006000327T priority Critical patent/DE112006000327T5/en
Priority to CN200680006797XA priority patent/CN101133682B/en
Priority to JP2007558240A priority patent/JP2008532324A/en
Publication of WO2006094162A2 publication Critical patent/WO2006094162A2/en
Publication of WO2006094162A3 publication Critical patent/WO2006094162A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67109—Apparatus for thermal treatment mainly by convection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/20—Positioning, supporting, modifying or maintaining the physical state of objects being observed or treated
    • H01J2237/2001—Maintaining constant desired temperature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

Embodiments of the invention generally provide methods for etching a substrate. In one embodiment, the method includes determining a substrate temperature target profile that corresponds to a uniform deposition rate of etch by-products on a substrate, preferentially regulating a temperature of a first portion of a substrate support relative to a second portion of the substrate support to obtain the substrate temperature target profile on the substrate, and etching the substrate on the preferentially regulated substrate support. In another embodiment, the method includes providing a substrate in a processing chamber having a selectable distribution of species within the processing chamber and a substrate support with lateral temperature control, wherein a temperature profile induced by the substrate support and a selection of species distribution comprise a control parameter set, etching a first layer of material and etching a second layer of material respectively different control parameter sets.
PCT/US2006/007525 2005-03-03 2006-03-02 Method for etching having a controlled distribution of process results WO2006094162A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE112006000327T DE112006000327T5 (en) 2005-03-03 2006-03-02 Device for controlling the temperature of a substrate
CN200680006797XA CN101133682B (en) 2005-03-03 2006-03-02 Method for etching having a controlled distribution of process results
JP2007558240A JP2008532324A (en) 2005-03-03 2006-03-02 Etching method with controlled processing result distribution

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US65869805P 2005-03-03 2005-03-03
US60/658,698 2005-03-03
US11/246,012 US8075729B2 (en) 2004-10-07 2005-10-07 Method and apparatus for controlling temperature of a substrate
US11/246,012 2005-10-07

Publications (2)

Publication Number Publication Date
WO2006094162A2 WO2006094162A2 (en) 2006-09-08
WO2006094162A3 true WO2006094162A3 (en) 2007-10-18

Family

ID=36941840

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/007525 WO2006094162A2 (en) 2005-03-03 2006-03-02 Method for etching having a controlled distribution of process results

Country Status (3)

Country Link
KR (1) KR100899244B1 (en)
DE (1) DE112006000327T5 (en)
WO (1) WO2006094162A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8486726B2 (en) * 2009-12-02 2013-07-16 Veeco Instruments Inc. Method for improving performance of a substrate carrier
WO2020167944A1 (en) * 2019-02-15 2020-08-20 Lam Research Corporation Trim and deposition profile control with multi-zone heated substrate support for multi-patterning processes

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030155079A1 (en) * 1999-11-15 2003-08-21 Andrew D. Bailey Plasma processing system with dynamic gas distribution control
US20030230551A1 (en) * 2002-06-14 2003-12-18 Akira Kagoshima Etching system and etching method
US20040061449A1 (en) * 2002-02-27 2004-04-01 Masatsugu Arai Plasma processing apparatus
US20040185670A1 (en) * 2003-03-17 2004-09-23 Tokyo Electron Limited Processing system and method for treating a substrate
US20040195216A1 (en) * 2001-08-29 2004-10-07 Strang Eric J. Apparatus and method for plasma processing
US20040261721A1 (en) * 2003-06-30 2004-12-30 Steger Robert J. Substrate support having dynamic temperature control

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030155079A1 (en) * 1999-11-15 2003-08-21 Andrew D. Bailey Plasma processing system with dynamic gas distribution control
US20040195216A1 (en) * 2001-08-29 2004-10-07 Strang Eric J. Apparatus and method for plasma processing
US20040061449A1 (en) * 2002-02-27 2004-04-01 Masatsugu Arai Plasma processing apparatus
US20030230551A1 (en) * 2002-06-14 2003-12-18 Akira Kagoshima Etching system and etching method
US20040185670A1 (en) * 2003-03-17 2004-09-23 Tokyo Electron Limited Processing system and method for treating a substrate
US20040261721A1 (en) * 2003-06-30 2004-12-30 Steger Robert J. Substrate support having dynamic temperature control

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
WAITS R.K.: "Monitoring residual and process gases in PVD processes: The importance of sensitivity", June 1997 (1997-06-01), pages 2 - 5, Retrieved from the Internet <URL:http://www.micromagazine.com/archiver/97/06/waits.html> *

Also Published As

Publication number Publication date
KR20070117602A (en) 2007-12-12
DE112006000327T5 (en) 2007-12-27
WO2006094162A2 (en) 2006-09-08
KR100899244B1 (en) 2009-05-27

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