WO2005048338A1

WO2005048338A1 - A method and a semiconductor substrate for transferring a pattern from a phase mask to a substrate

Info

Publication number: WO2005048338A1
Application number: PCT/FI2004/000677
Authority: WO
Inventors: Tomi RYYNÄNEN; Petri Melanen; Pekka Savolainen
Original assignee: Modulight, Inc.
Priority date: 2003-11-13
Filing date: 2004-11-12
Publication date: 2005-05-26
Also published as: FI20031653A0; FI20031653A

Abstract

The present invention relates to a method for transferring a pattern, e.g. a grating pattern from a phase mask to a substrate. The invention is especially well suited for fabricating small period gratings for long wavelength semiconductor lasers. The inventive process for transferring a pattern to a substrate, which is provided with a layer structure comprising at least a photoresist layer and bottom antireflective coating (BARC), comprises the steps of developing said pattern on the photoresist layer by UV light and transferring said developed pattern from the photoresist layer to said substrate by etching. This etching can be e.g. a reactive ion etching or other corresponding etching technique. According to the present invention there is used a first dielectric layer between said photoresist layer and said bottom antireflective coating in order to differentiate the etching rate of the two adjacent materials, i.e. the photoresist layer and bottom antireflective coating.

Description

A METHOD AND A SEMICONDUCTOR SUBSTRATE FOR TRANSFERRING A PATTERN FROM A PHASE MASK TO A SUBSTRATE

FIELD OF THE INVENTION The present invention relates generally to semiconductor lasers. In particular, the present invention relates to a novel and improved method and apparatus for fabricating of diffractive gratings for semiconductor lasers cost effectively and with high throughput.

BACKGROUND OF THE INVENTION High-speed semiconductor DFB (Distributed Feedback) and DBR (Distributed-Bragg-Reflector) lasers, among other things, are crucial for high-speed optical communication links. These lasers can be directly modulated at frequencies reaching 10 to 20 GHz, and have important applications in WDM (wavelength division multiplexing) optical networks. High performance DFB and DBR lasers demand that careful attention be paid to the design and manufacture of the grating which provides the optical feedback. Spatial-hole burning, side-mode suppression, radiation loss, laser linewidth, spontaneous emission in non-lasing modes, lasing wavelength selection and tunability, laser re- laxation oscillation frequency etc. are all features that are very sensitive to the grating design and manufacturing . In the last few years various techniques have been developed that allow fabrication of gratings with spatially varying characteristics and with long-range spatial-phase coherence. Chirped optical gratings with spatially varying coupling parameters can be made using a combination of interferometer lithography, spa- tially-phase-locked electron-beam lithography and X- ray lithography. This provides a unique opportunity for exploring a wide variety of grating designs for semiconductor DFB and DBR lasers. Interference lithography (IL) , also called as holography, is one of the preferred methods for fabricating gratings for semiconductor lasers. IL is a conceptually simple process where two coherent beams interfere to produce a standing wave, which can be re- corded in a photoresist. The spatial-period of the grating can be as fine as half the wavelength of the interfering light, allowing for structures of the order of 100 nm from UV wavelengths, and features as small as 30-40 nm using a deep UV ArF laser. The problems of IL are that it requires narrowband coherent illumination to produce grating, it is not stable, it is difficult to achieve alignment between the interference fringes and existing patterns on the substrate, presence of existing features on the substrate could interfere with the exposure, and IL is sensitive as regards the optic alignment with respect to the surface . UV Photolithography, literally meaning light stone writing, is the process by which patterns on a semiconductor material can be defined using UV light. Before the resist is applied to the substrate, the surface is cleaned to remove any traces of contamination from the surface of the wafer such as dust, organic, ionic and metallic compounds. The cleaned wafer is subjected to priming, to aid the adhesion of the resist to the surface of the substrate material. A resist is applied to the surface using a spin-coating machine. The photo mask is created by a photographic process and developed onto a glass, substrate. Alignment of the mask is critical and must be achieved in x-y as well as rotationally. Depending on the design of the photolithography machine, the mask may be in contact with the surface, very close to the surface or used to project the mask onto the surface of the substrate. This technique is very sensitive to resist and mask structure . Also X-ray lithography may be used for fabricating gratings. In one approach, interference lithography is used once to pattern an x-ray mask, which can be used repeatedly to transfer the patterns to substrates. X-rays typically emerge from the vacuum sys- tern through a thin nitride membrane window and illuminate the mask and sample. In addition to its superior resolution, x-ray lithography benefits from the very different way that x-rays interact with materials. In contrast to optical and ultraviolet light, which is easily reflected by metal and dielectric surfaces, almost all materials are absorbing at x-ray wavelengths. For the x-ray wavelengths typically used in lithography, the indices of refraction for most materials lie slightly below 1. Consequently, x-rays are not re- fleeted, except at grazing incidence. This greatly simplifies the lithographic processing because antireflective layers are not needed, and the process of exposing gratings is not sensitive to the presence of underlying patterns. However, using X-ray lithogra- phy is quite a complicated and expensive method for fabricating the semiconductor lasers. One of the most flexible high-resolution lithography tools is scanning-electron-beam lithography. In an electron-beam lithography system, a focused e- beam is traced over a surface to define almost any prescribed pattern. A combination of electromagnetic beam deflection and interferometrically controlled stage motion allows one to write patterns over a relatively large area. One of the limitations of e-beam lithography is throughput. Because each pixel comprising the pattern must be exposed separately and sequentially, direct e-beam exposures are typically time- consuming. For this reason, e-beam lithography is primarily used for building prototype devices and for generating masks, which can be used repeatedly in a higher throughput system such as optical photolithography or x-ray lithography. A more serious limitation of e-beam lithography is the difficulty in achieving accurate pattern placement . One method, near-field holography (NFH) , uses a mask and contact printing to transfer the gratings into photoresist on a substrate. The mask carries a grating with perfect pitch, which is produced with crossed laser beams and etched into a hard quartz sub- strate. Near-field holography makes use of monochromatic and polarized light of high collimation that is impinging under an oblique angle onto a phase mask carrying the grating pattern. The zero diffraction or- der simply passes through the plate whereas the minus first (-1) diffraction order is diffracted under an angle that has the same value as the impinging beam, but is directed to the opposite side. Higher orders are suppressed. The grating on the mask is etched in a way to give both beams the same intensity. The resulting interference pattern has the same pitch as the original grating on the quartz mask and can be transferred into a photoresist layer of the same thickness as the line width transferred. For the grating trans- fer to be successful it is important to prevent back reflection from the substrate surface as this severely disturbs the interference of the two diffracted beams, leading to intensity fluctuations that mirror the mask/substrate gap variations caused by uneven wafer topography (typically 1-2 μm) . The reflection from glass substrates is very low and poses no problem. However, semiconductor materials like InP, the main material used for DFB lasers, are often highly, reflective under the light incidence of ca. 45° which is typically used. Therefore, an antireflective material has to be spun onto the substrate before the resist is applied. Both polymer layers, antireflective material and photoresist, form a good AR coating, which suppresses reflection, thus enabling successful grating transfer. The main problem of NFH is the pattern transfer from the photoresist to BARC (bottom antireflection coating) . This is due to almost the same etching rate of these used materials. Especially this is a major problem when etching small period gratings. In spite of all developments in the fabrication techniques of gratings there is still an actual need for a cost-efficient, productive and robust method for fabricating the gratings for long wave- length laser diodes, especially gratings of 200 nm period for 1300 nm range laser diodes. Furthermore, there is a need for improved technique in which commercial UV (ultra violet light) mask aligner equipped with e.g. Near Field Holography (NFH) module with 313 n optics and filters can be used. The invention is characterised by what is disclosed in the independent claims.

SUMMARY OF THE INVENTION The present invention relates to a method for transferring a pattern, e.g. a grating pattern from a phase mask to a substrate. The invention is especially well suited for fabricating small period gratings for long wavelength semiconductor lasers. The inventive process for transferring a pattern to a substrate, which is provided with a layer structure comprising at least a photoresist layer and bottom antireflective coating (BARC) , comprises the steps of developing said pattern on the photoresist layer by UV light and transferring said developed pattern from photoresist layer to said substrate by etching. This etching can be e.g. a reactive ion etching or other corresponding etching technique. It is possible that BARC is not needed if resist and dielectric thickness are properly adjusted (optimised) with respect of each other. In this case the process is simplified quite a lot. If the resulting grating is as good (or better) than using BARC, then it is clearly advantageous not to use BARC. According to the present invention there is used a first -dielectric layer between said photoresist layer and said bottom antireflective coating in order to differentiate the etching rate of the two adjacent materials, i.e. the photoresist layer and bottom antireflective coating. The material of said first di- electric layer is selected so that the etching selectivity between said photoresist layer and said first dielectric layer, and between said bottom antireflective layer and said first dielectric layer is maximized. In one embodiment of the present invention the method further comprises the steps of etching said pattern from said developed photoresist into said first dielectric layer by using said photoresist layer as an etch mask; etching said pattern from said first dielectric layer into said bottom antireflective coating layer by using said first dielectric layer as an etch mask; and etching said pattern from said bottom antireflective coating layer into said substrate by using said bottom antireflective coating layer as an etch mask. Finally the remaining parts of said layers are removed or cleaned. In another embodiment of the present invention a second dielectric layer is arranged between said bottom antireflective coating and said substrate in order to differentiate the etching rate of the two adjacent materials, i.e. said bottom antireflective coating and said substrate. Consequently, before the step of etching said pattern from said bottom antireflective coating layer into said substrate there are the steps of etching said pattern from said bottom antireflective coating layer into said second dielec- trie layer by using said bottom antireflective coating layer as an etch mask; and etching said pattern from said second dielectric layer into said substrate by using said second dielectric layer as an etch mask. In one embodiment of the present invention the layer thickness for all - -layers in said layer structure are optimised for optimal output and pattern transfer from said photoresist layer to said substrate. This optimisation means minimising the reflectance from combination of all layers at exposure wave- length. This means that each layer does not need to be optimised separately (although can be done so) to produce minimum reflectivity but instead the combination of them is more important. Also dielectric layer thickness is much less than thickness of photoresist and BARC to improve pattern transfer during the process (this depends also on the etching method and parameters chosen) . And finally photoresist thickness should be around half of the grating pitch (lOOnm) or less to allow small grating figures to be exposured and developed to the resist. In principle all layer thickness can be varied when taking into account these factors above . Furthermore the invention is directed to a semiconductor substrate for fabricating a grating pattern for a semiconductor laser device by using Near Field Holography technique, which semiconductor sub- strate is provided with a layer structure comprising a photoresist layer and a bottom antireflective coating on said substrate. Said photoresist layer is arranged on said antireflective coating. According to the invention said layer structure further comprises a first dielectric layer between said photoresist layer and said bottom antireflective coating in order to differentiate the etching rate of the two adjacent materials. The material of said first dielectric layer is selected so that the etching selectivity between said photore- sist layer and said first dielectric layer, and between said bottom antireflective layer and said first dielectric layer is maximized. In another embodiment of said invention said layer structure further comprises a second dielectric layer between said bottom antireflective coating and said substrate in order to differentiate the etching rate of the two adjacent materials, i.e. between said bottom antireflective coating and said substrate. It might further improve the etching selectivity when a thicker antireflective layer works as a mask for etching the second dielectric through, and the second dielectric layer works ultimately as a mask for semiconductor etching. In this case the etching profile might be better because the final etch mask is now thinner and keeps its form better than a thicker antireflective layer during the process. The benefits of the invention can be summarised as follows. The fabricating technique in accordance with the present invention is simple, cheap, stable, and efficient (has high throughput) compared to the interference lithography and other lithographic techniques. It also provides improved etching quality. The present also facilitates smaller gratings to be formed and better reproducibility compared to method where shadow masking is used to improve etching quality.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a further understanding of the invention and constitute a part of this specification, illustrate embodiments of the invention and together with the description help to explain the principles of the invention. In the drawings: Fig 1 is a block diagram illustrating the process steps according to one embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION Reference will now be made in detail to the embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Figure 1, comprising six different parts, represents a simplified and idealistic presentation of grating fabrication using Near Field Holography (NFH) and tri-layer resist stack according to the present invention. The. key part (and major difference compared to commonly used grating fabrication process done with NFH or interference lithography) of this invention is the NFH together with use of the dielectric layer in between the resist and BARC layers. The reason for using dielectric layer is to facilitate high quality pattern transfer from resist to BARC. Resist and BARC as carbonaceous polymers are essentially the same material from etching chemistry point of view and thus their etching rate is about the same. Instead, with certain etching methods, there is a high etching se- lectivity between the photoresist and dielectric layer and between dielectric layer and BARC layer. Near field holography makes use of monochromatic and polarized light of high collimation that is impinging under an oblique angle onto a phase mask carrying the grating pattern. The zero diffraction order just passes through the plate whereas the first diffraction order is diffracted under an angle that has the same value as the impinging beam, but is di- rected to the opposite side. The grating on the mask is etched in a way to give both beams the same intensity. The resulting interference pattern has the same pitch as the original grating on the quartz mask and can be transferred into a photoresist layer of the same thickness as the line width transferred. The target of the process according to the present invention presented in figure 1 is to fabricate a 200 nm grating pattern G into the semiconductor. In the beginning the semiconductor SC is covered with a tri-layer resist stack ST consisting of spinned bottom antireflective coating layer BARC, evaporated thin dielectric layer D (Si02 or SiN) and spinned (photo) resist layer (P) as the top layer. The thickness of the BARC layer is optimised to minimize the back reflection of the exposure light from semiconductor to resist. In the stack ST the resist layer is patterned using near field holography, step 1) in fig 1, and after that the pattern is transferred from developed re- sist P, step 2) into the dielectric layer D by using the resist layer P as an etch mask, step 3) . In practice this is accomplished e.g. by using 313 nm exposure for the photoresist. Photoresist is less sensitive and power density output from mask aligner is smaller when compared to 365 nm light causing quite significant difference in process optimisation. Bottom antireflection coating (BARC) is needed to minimize surface reflections of the exposure light. Furthermore 313 nm exposure light allows going down to 200 nm gratings with high quality phase masks. In the next phase, the pattern is transferred into the BARC layer by using dielectric layer D as an etch mask, step 4) . After that the pattern can be finally transferred into the semiconductor SC by using, both dielectric D and BARC layers as the etch mask, step 5. As the last step the remaining parts of the tri-layer stack ST can be removed and the grating with period of e.g. 200 nm is formed/existing in semiconductor, step 6) . It is obvious to a person skilled in the art that with the advancement of technology, the basic idea of the invention may be implemented in various ways and in various network environments. The invention and its embodiments are thus not limited to the examples described above, instead they may vary within the scope of the claims.

Claims

CLAIMS 1. A method for transferring a pattern from a phase mask to a substrate, which is covered with a layer structure comprising at least a photoresist layer and bottom antireflective coating (BARC) , the method comprising the steps of: developing said pattern on the photoresist layer by UV light; transferring said developed pattern from the pho- toresist layer to said substrate by etching, characterised in that the method further comprises the step of : using a first dielectric layer between said photoresist layer and said bottom antireflective coating in order to differentiate the etching rate of the two adjacent materials. 2. The method according to claim 1, characterised in that selecting the material of said first dielectric layer so that the etching selectivity between said photoresist layer and said first dielectric layer, and between said bottom antireflective layer and said first dielectric layer is maximized. 3. The method according to claim 2, characterised in that the method further comprises the steps of: etching said pattern from said developed photoresist into said first dielectric layer by using said photoresist layer as an etch mask; etching said pattern from said first dielectric layer into said bottom antireflective coating layer by using said first dielectric layer as an etch mask; and etching said pattern from said bottom antireflective coating layer into said substrate by using said bottom antireflective coating layer as an etch mask. 4. The method according to claim 3, c a acterised in that using a second dielectric layer between said bottom antireflective coating and said substrate in order to differentiate the etching rate of the two adjacent materials. 5. The method according to claim 4, c h a r - acterised in that before the step of etching said pattern from said bottom antireflective coating layer into said substrate; etching said pattern from said bottom antireflective coating layer into said second dielectric layer by using said bottom antireflective coating layer as an etch mask; and etching said pattern from said second dielectric layer into said substrate by using said second dielec- trie layer as an etch mask. 6. The method according to claim 3 or 5, characteri sed in that removing the remaining parts of said layers . 7. The method according to claim 1, char- acterised in that said etching is a reactive ion etching. 8. The method according to claim 1, characteri sed in that optimising the layer thickness for all layers in said layer structure for optimal out- put and pattern transfer from said photoresist layer to said substrate. 9. A semiconductor substrate for fabricating a grating pattern for a semiconductor laser device by using Near Field Holography technique, which semiconduc- tor substrate is provided with a layer structure comprising: a photoresist layer; and a bottom antireflective coating on said substrate, said photoresist layer being on said bottom antireflective coating, characteri sed in that said layer structure further comprises a first dielectric layer between said photoresist layer and said bot- torn antireflective coating in order to differentiate the etching rate of the two adjacent materials. 10. The semiconductor substrate according to claim 9, characterised in that the material of said first dielectric layer is selected so that the etching selectivity between said photoresist layer and said first dielectric layer, and between said bottom antireflective layer and said first dielectric layer is maximized. 11. The semiconductor substrate according to claim 9, characterised in that said layer structure further comprises a second dielectric layer between said bottom antireflective coating and said substrate in order to differentiate the etching rate of the two adjacent materials. 12. The semiconductor substrate according to claim 9, characterised in that the layer thickness for all layers in said layer structure is optimised for optimal output and pattern transfer from said photoresist layer- to said substrate.