MULTIPLE-PANEL PIXELATED LIQUID CRYSTAL LIGHT VALVES
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims the benefit of U.S. Provisional Patent Application 60/403,206, filed August 12, 2002, that is incorporated herein by reference.
TECHNICAL FIELD
The disclosure pertains to liquid crystal light valves.
BACKGROUND
Full color display systems using monochromatic liquid crystal light valves as display elements are generally built using either a three cell system or a frame sequential system. In a three cell system, three separate monochromatic light valves are driven to produce red, green, and blue images that are combined optically to produce full-color images. Such systems exhibit several disadvantages. For example, three separate light valves are used and each requires its own drive electronics. Registration of the three color images is difficult, hi frame sequential LCD systems, a single light valve is used to produce three color images sequentially at a frame rate sufficiently high that observers perceive a full color image. Such systems exhibit several significant disadvantages. A fast liquid crystal response is required to allow an adequate frame rate, and a color-sequenced illumination source must be provided and synchronized with the display. In view of these and other shortcomings, improved display systems and methods are needed.
SUMMARY
Display panels comprise two or more side-by-side image areas (subpanel or pixel arrays) defined on a single substrate. In one embodiment, three side-by-side image areas are provided and are associated with red, green, and blue images that can be superimposed to form a single full color image. Liquid crystal display (LCD) panels comprise at least two pixel arrays associated with respective color components and defined as respective subpanels on a substrate, h some examples, a set of column conductors is provided, wherein each
column conductor is configured to apply image signals to pixel columns of both of the at least two pixel arrays. In other examples, pixel arrays are defined as subpanels associated with red, green, and blue color components. In additional examples, each column conductor of the set of column conductors is configured to apply image signals to pixel columns of the subpanels associated with red, green, and blue color components, hi additional examples, the at least two pixel arrays have different pixel pitches. In other examples, a set of row conductors or a set of column conductors is configured to apply image signals to pixel rows of pixel arrays associated with red, green, and blue color components or pixel columns of pixel arrays associated with red, green, and blue color components, respectively.
Display modules comprise a multiple-subpanel LCD panel, and a circuit board or other LCD support configured to receive the LCD panel. In additional examples, an electrical interconnect is configured to electrically connect the multiple-subpanel LCD panel to the circuit board, hi some examples, the electrical interconnect includes wire bonds. In other representative examples, the multiple- subpanel LCD panel includes multiple subpanels defined on a single substrate. In other examples, the multiple-subpanel LCD panel includes individual subpanels mounted to a carrier. In further representative examples, the circuit board includes an aperture associated with the multiple-subpanel LCD panel. In other examples, the circuit board includes an aperture associated with each of the subpanels of the multiple-subpanel LCD panel.
Display modules comprise LCD panels associated with red, green, and blue color components and situated in a common plane, and each of the LCD panels is electrically connected to a common circuit board. In other examples, the LCD panels are individually attached to the circuit board or to an LCD carrier attached to the circuit board, ha some examples, the carrier is transparent and the circuit board includes an aperture configured to receive the carrier.
A display panel comprises first, second, and third display subpanels on a common substrate and a set of addressing conductors common to the first, second, and third display subpanels. In additional examples, the addressing conductors are row conductors or column conductors. In further examples, a common backplane or separate backplanes are provided
Display controllers are configured to control a multiple-panel LC display and comprise a row selector configured to sequentially select rows of a first subpanel, a second subpanel, and a third subpanel. In other examples, display controllers comprise a row selector configured to sequentially select a row of a first subpanel, a row of a second subpanel, and a row of a third subpanel, and an image source configured to apply image values to the selected rows.
These and other features are described below with reference to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1A is a schematic diagram of a single panel, full color liquid crystal light valve (LCLV).
FIG. IB is a schematic diagram illustrating an arrangement of row and column conductors for the LCLV of FIG. 1 A. FIG. 2 is a schematic diagram of a display assembly including a vertical
LCLN fixed to a circuit board.
FIG. 3 is a block diagram of a display controller for the LCLN of FIG. 1.
FIG. 4 is a schematic diagram of a display assembly including a horizontal LCLN fixed to a circuit board. FIG. 5 is a schematic diagram of a display assembly that includes a vertical
LCLN having three individual displays fixed to a single circuit board.
FIG. 6 is a schematic diagram of a display assembly that includes a horizontal LCLN having three individual displays fixed to a single circuit board.
FIG. 7 is a schematic diagram of a portion of a line scan, sample and hold (LSSH) LCLN in communication with an EEPROM configured to store display correction values.
DETAILED DESCRIPTION
With reference to FIG. 1 A, a full-color, single-panel liquid crystal light valve (LCLV) 101 includes red, green, and blue pixel arrays 102, 104, 106 defined on a substrate 107. This ordering of red, green, and blue pixel arrays is shown for purposes of illustration, and other orders can be used. As shown in FIG. 1 A, the
pixel arrays include 480 rows and 864 columns of pixels. Pixel pitches of the arrays can vary, or a common pixel pitch can be used. The pixel arrays are separated by intermediate regions 112 that typically include metallization for conductors used in writing images to the LCLN 101. The single-panel LCLN 101 can be referred to as a display panel, and the pixel arrays can be referred to as subpanels. In one example, the substrate 107 is about 20 mm by 32 mm and each of the subpanels is about 15.55 mm by 8.64 mm (17.8 mm diagonal). The pixel arrays 102, 104, 106 are typically formed based on a high temperature polysilicon process. The LCLN 101 includes a row scan region 108 that is typically used to provide row select signals to so that pixels of a selected row can be written with appropriate image values. A single backplane conductor 110 is provided, but backplane conductors can be provide for each of the pixel arrays 102, 104, 106. In an example, the LCLN 101 is based on a so-called line scan sample and hold (LSSH) design in which image values for all pixels in a row are established based on sampled input image values that are delivered to respective column comparators that control application of a data ramp signal to the pixels using column FETs. Such systems are described in, for example, U.S. Patent Application Publications 2002/0149557 and 2002/0196264. These and other details of the LCLN 101 are shown in FIG. 7.
With reference to FIG. IB, the subpanels 102, 104, 106 are configured to be addressed using a set 120 of column conductors. Respective sets 122, 124, 126 of row conductors are provide for the subpanels 102, 104, 106. For convenience, only a few such conductors are shown in FIG. IB. As is apparent, the set 120 of column conductors is configured to address all three subpanels, but separate sets of row conductors are provided. In other arrangements, a common set of row conductors and separate sets of column conductors can be provided.
The three subpanel LCLN 101 can be mounted in a frame or other LCD support and provided with a flex cable for electrical connections. Alternatively, the LCLN 101 can be mounted to a printed circuit board or other carrier allowing direct connection to light valve die using an interconnect technology such as wire bonding, conductive adhesive, or otherwise connected . With reference to FIG. 2, a display module 200 includes a multiple subpanel LCLN 202 that includes subpanels 204, 205, 206 that are mounted to a circuit board 208. The circuit board 208 includes an
aperture (not shown) associated with the LCLN 202 to permit light transmission through the LCLN 202. An electrical interconnect 211 is provided for communication of image signals and other signals between the LCLN 101 and display driver circuitry and components on the circuit board 208. An interconnect 210 is provided for delivery of video signals, typically in an LNDS format, and electrical power to the display module 200. The interconnect 210 can be provided using wire bonds or other connections. As shown in FIG. 2, various buffers (BUF), a gate array, non-volatile memory (ΝN), and other display drive components are provided on the circuit board 208. Mounting holes 214 are provided for convenient mounting of the display module 200 with respect to an optical projection system or to an additional support. In an example, the display module is about 40.6 mm by 67.3 mm.
In representative examples, multiple sub-panel LCLNs are defined on a common substrate with a common backplane, and liquid crystal layer process steps (for example, rubbing/alignment layer formation, mechanical assembly, filling) are performed for all subpanels at once. Processing of multiple substrates is unnecessary. While a single-piece LCD module that includes three sub-arrays (one for each primary color) is advantageous, separate LCD panels can be mounted to a substrate to form a multiple panel LCLN in which each of the separate LCD panels is a subpanel that is associated with a selected primary color.
The LCLN 101 can be electrically driven as a display that includes 864 columns and 1440 rows, i.e., as a display panel that is a sum of the rows of each of the subpanels. A display driver can be configured to provide a progressive scan (i.e., to write rows sequentially from top-to-bottom) or to scan in segments. In a representative example, a progressive scan display driver writes row 1 of the topmost (red) subpanel 102 followed by rows 2, 3, . . ., 480 of the subpanel 102. Row 1 of the middle (green) subpanel 104 is then scanned followed by rows 2, 3, . . . 480 of the subpanel 104. Thus, the rows of the subpanel 104 can be represented in the display driver as rows 481-960 of a larger display. Finally rows 1-480 of the bottom (blue) subpanel 106 are scanned. The display driver can associate these rows with rows 961-1440 of the larger display panel. In segmented scanning, row 1
of the red subpanel is scanned followed by row 1 of the green subpanel and then row 1 of the blue subpanel. This sequence is repeated for the remaining rows.
Progressive scan allows simpler on-glass row scanner designs but can require a frame buffer to store image data for color components that are not currently being written. For example, while the green subpanel is written, image data for the red and blue subpanels is stored. Segmented scan eliminates the need for a frame buffer, and instead a 3-row line buffer or a 6-row line buffer can be used. Such line buffers can be provided on the LCLN substrate, while the larger frame buffer used in progressive scan is typically external to the LCLN. The above scan methods are examples only, and scanning can be right-to-left instead of left-to-right, and bottom- to-top as well as top-to-bottom. In other examples, the display can be written column-by-column (i.e., the columns can be treated as rows, and the rows treated as columns). This drive method can require considerable data re-ordering in the display electronics, but has the advantage of longer row times. In this example, the display can be driven as an 864 row by 1440 column display.
In the representative examples discussed below, specific subpanel dimensions and row/column configurations are used, but in other examples, different subpanel areas and numbers of row/columns can be used. Selected examples are based on 864 by 600 and 1024 by 768 pixel subpanels that are 15.55 mm wide, 8.64 mm high, and have a 17.8 mm diagonal.
A horizontal LCD module can be provided that includes three subpanels that are arranged horizontally instead of vertically on a single substrate. Such an LCD module can be written based on an LCD driver configured to drive a single 2592 column by 480 row display, even if the three subpanels are defined in separate areas of a substrate or on separate substrates. For subpanels defined on a single panel, a common TFT substrate and backplane are provided. The LCD driver can also be configured to control the LCD module as a 480 column by 2592 row display, with some increase in drive electronics complexity.
A display system 300 that includes a multiple-panel LC display 302 is illustrated in FIG. 3. A display controller 304 is configured to receive a video signal at a video input 316, typically as an LVDS signal. RGB data, clock (CLK), horizontal synch (HS), and vertical synch (VS) inputs are provided. The controller
304 provides 8-bit timing data (Timing/8) to the display 302 and 16-bit video (Video/ 16) to a video processor 305 that provides image data to the display 302. Non- volatile memory (TSTVRAM) 310 is also provided as well as an DC control input 311. A single display panel can includes three subpanels. In other example, separate displays can be mounted on an external support substrate to form a display panel. With reference to FIG. 4, a display panel 400 includes individual display panels 402, 404, 406 mounted to a support substrate 408. The individual display panels 402, 404, 406 are electrically connected to the support substrate 408 with, for example, wire bonds at respective wire bond regions 410, 412, 414. The support substrate 408 is electrically connected to a circuit board 416 with wire bonds or otherwise connected at connection regions 418, 419. An input bus 424 is provided for electrical power and video input, and electrical components associated with subpanel drive are mounted to the circuit board. The individual displays 402, 404, 406 can be individually assembled and optionally tested before mounting to the substrate 408. The substrate 408 typically provides a rigid, flat intermediate surface, and can be a quartz, glass, or metal plate. As noted above, the substrate 408 can include metalized pads and traces that permit wire-bonded or other connections to the support substrate that is in turn connected to the circuit board 416 in a similar manner. An aperture 420 is provided in the circuit board 416 and/or in the support substrate 408 to permit light transmission. Such a display module construction can have significant advantages over unitary display modules in which all or several subpanels are defined in a single LC panel. For example, depending on defect density, a net yield of three individual subpanel displays can be higher than a yield of good one-piece displays. Assembly can also be simpler, hi addition, the individual subpanels can have arbitrary separations for the convenience of optical system designs.
In another representative example, the support substrate can serve as a lower display dust cover, as shown in FIG. 5. A display panel 500 includes individual display panels 502, 504, 506 mounted to an optically transmissive support substrate 508 that is coupled to a circuit board 516. The individual display panels 502, 504, 506 are electrically connected to the circuit board 516 with, for example, wire
bonds, at respective wire bond regions 510, 512, 514. The support substrate 508 is configured to fit within a recess 520 in the circuit board 516. The individual display panels can be bonded to the support substrate 508 using an adhesive. The support substrate 508 can also serve as a dust cover and can include alignment or other fiducial marks for automated or manual alignment individual displays onto a common mounting plate.
Individual displays can be arranged horizontally in a display module 600 as is shown in FIG. 6. The displays are fixed to a carrier 604 and interconnects 608, 610, 612 are provided to electrically connect each individual display to a circuit board 605. An interconnect 614 is provided for connection of the display module to external electronics. Individual apertures 620, 621, 623 are provided for each of the individual subpanels.
In the example displays, display drivers can be configured to drive the individual displays or the integrated subpanels as if one larger display. Display drivers are then similar to those used for a single display panel of a three panel system, resulting in significant reductions in cost and board area. Larger displays can require additional drive electronics components that support higher data rates, but existing drive electronics using a single SA300 drive ASIC and an 8-channel data path can support the described examples. In some example, a frame buffer is also necessary.
In additional examples, row or frame buffers can be provided, and one or more display drivers can be used. Unitary multiple-subpanel LCDs can include a common backplane or three individual backplanes. Display drivers can be based on 2, 4, 6, or other numbers of sets of LSSH (Line Scan Sample and Hold) drivers. Such displays can be used with progressive, segmented, or variable row-scanning systems. Other variations include systems using different numbers of data clock (DCLK) signals.
It will be apparent that the above examples can be modified in arrangement and detail without departing from the principles of the disclosure. Particular examples are not to be taken as limitations on these principles, and we claim all that is encompassed by the appended claims.