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WO2003069655A3 - Electronic micro component including a capacitive structure - Google Patents

Electronic micro component including a capacitive structure Download PDF

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Publication number
WO2003069655A3
WO2003069655A3 PCT/FR2003/000231 FR0300231W WO03069655A3 WO 2003069655 A3 WO2003069655 A3 WO 2003069655A3 FR 0300231 W FR0300231 W FR 0300231W WO 03069655 A3 WO03069655 A3 WO 03069655A3
Authority
WO
WIPO (PCT)
Prior art keywords
capacitive structure
micro component
component including
electronic micro
walls
Prior art date
Application number
PCT/FR2003/000231
Other languages
French (fr)
Other versions
WO2003069655A2 (en
Inventor
Lionel Girardie
Original Assignee
Memscap
Lionel Girardie
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Memscap, Lionel Girardie filed Critical Memscap
Priority to AU2003219244A priority Critical patent/AU2003219244A1/en
Publication of WO2003069655A2 publication Critical patent/WO2003069655A2/en
Publication of WO2003069655A3 publication Critical patent/WO2003069655A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

Disclosed is an electronic micro component (1) made on the basis of a semi-conducting substrate (2), comprising a capacitive structure which is applied on top of a main plane (7) of the substrate. The capacitive structure is provided with two electrodes (20,33), each of which comprises a flat portion (11, 38) running parallel to the main plane (7) of the substrate and a plurality of walls (16-18,34-37) that run parallel to each other and perpendicular to the flat portion (11, 38), to which said walls are connected. The parallel walls of each electrode are arranged one (16-18) between the other (34-37).
PCT/FR2003/000231 2002-02-11 2003-01-24 Electronic micro component including a capacitive structure WO2003069655A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003219244A AU2003219244A1 (en) 2002-02-11 2003-01-24 Electronic micro component including a capacitive structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0201618A FR2835970B1 (en) 2002-02-11 2002-02-11 ELECTRONIC COMPONENT INCLUDING A CAPACITIVE STRUCTURE
FR02.01618 2002-02-11

Publications (2)

Publication Number Publication Date
WO2003069655A2 WO2003069655A2 (en) 2003-08-21
WO2003069655A3 true WO2003069655A3 (en) 2004-03-11

Family

ID=27620063

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2003/000231 WO2003069655A2 (en) 2002-02-11 2003-01-24 Electronic micro component including a capacitive structure

Country Status (3)

Country Link
AU (1) AU2003219244A1 (en)
FR (1) FR2835970B1 (en)
WO (1) WO2003069655A2 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19710961A1 (en) * 1997-03-07 1998-09-24 United Microelectronics Corp Poly:silicon CMP processing high density DRAM memory cell structure
US6046469A (en) * 1997-09-29 2000-04-04 Sharp Kabushiki Kaisha Semiconductor storage device having a capacitor and a MOS transistor
US6087216A (en) * 1998-11-18 2000-07-11 United Microelectronics Corp. Method of manufacturing DRAM capacitor
US20010003664A1 (en) * 1999-12-09 2001-06-14 Hiromu Yamaguchi Semiconductor device and method for manufacturing same
EP1124262A2 (en) * 2000-02-11 2001-08-16 Sharp Kabushiki Kaisha Multilayer dielectric stack and method

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD297279A5 (en) * 1990-08-14 1992-01-02 ��������@���������������@����������������������@���k�� CAPACITOR ASSEMBLY WITH LARGE CAPACITY AND METHOD FOR THE PRODUCTION THEREOF
DE19632835C1 (en) * 1996-08-14 1998-04-02 Siemens Ag Method of manufacturing a capacitor in a semiconductor device
TW399211B (en) * 1998-08-14 2000-07-21 Winbond Electronics Corp The multiple stage sensor device applied to flash memory
FR2801425B1 (en) * 1999-11-18 2004-05-28 St Microelectronics Sa INTEGRATED CAPACITY WITH HYBRID DIELECTRIC
US6420267B1 (en) * 2000-04-18 2002-07-16 Infineon Technologies Ag Method for forming an integrated barrier/plug for a stacked capacitor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19710961A1 (en) * 1997-03-07 1998-09-24 United Microelectronics Corp Poly:silicon CMP processing high density DRAM memory cell structure
US6046469A (en) * 1997-09-29 2000-04-04 Sharp Kabushiki Kaisha Semiconductor storage device having a capacitor and a MOS transistor
US6087216A (en) * 1998-11-18 2000-07-11 United Microelectronics Corp. Method of manufacturing DRAM capacitor
US20010003664A1 (en) * 1999-12-09 2001-06-14 Hiromu Yamaguchi Semiconductor device and method for manufacturing same
EP1124262A2 (en) * 2000-02-11 2001-08-16 Sharp Kabushiki Kaisha Multilayer dielectric stack and method

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
CLARK-PHELPS R B ET AL: "ENGINEERED TANTALUM ALUMINATE AND HAFNIUM ALUMINATE ALD FILMS FOR ULTRATHIN DIELECTRIC FILMS WITH IMPROVED ELECTRICAL AND THERMAL PROPERTIES", MATERIALS RESEARCH SOCIETY SYMPOSIUM PROCEEDINGS, MATERIALS RESEARCH SOCIETY, PITTSBURG, PA, US, vol. 670, 17 April 2001 (2001-04-17), pages K2201 - K2206, XP008008101, ISSN: 0272-9172 *
NAKAMURA Y ET AL: "OXIDATION-RESISTANT AMORPHOUS TAN BARRIER FOR MIM-TA2O5 CAPACITORS IN GIGA-BIT DRAMS", 2001 SYMPOSIUM ON VLSI TECHNOLOGY. DIGEST OF TECHNICAL PAPERS. KYOTO, JAPAN, JUNE 12 - 14, 2001, SYMPOSIUM ON VLSI TECHNOLOGY, TOKYO: JSAP, JP, 12 June 2001 (2001-06-12), pages 39 - 40, XP001043360, ISBN: 4-89114-012-7 *

Also Published As

Publication number Publication date
WO2003069655A2 (en) 2003-08-21
FR2835970B1 (en) 2005-02-25
FR2835970A1 (en) 2003-08-15
AU2003219244A1 (en) 2003-09-04

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