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WO2002011202A3 - Method and device for producing connection substrates for electronic components - Google Patents

Method and device for producing connection substrates for electronic components Download PDF

Info

Publication number
WO2002011202A3
WO2002011202A3 PCT/DE2001/002892 DE0102892W WO0211202A3 WO 2002011202 A3 WO2002011202 A3 WO 2002011202A3 DE 0102892 W DE0102892 W DE 0102892W WO 0211202 A3 WO0211202 A3 WO 0211202A3
Authority
WO
WIPO (PCT)
Prior art keywords
electronic components
connection substrates
producing connection
substrates
embossing
Prior art date
Application number
PCT/DE2001/002892
Other languages
German (de)
French (fr)
Other versions
WO2002011202A2 (en
Inventor
Richard Thelen
Puymbroeck Jozef Van
Original Assignee
Siemens Dematic Ag
Richard Thelen
Puymbroeck Jozef Van
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Dematic Ag, Richard Thelen, Puymbroeck Jozef Van filed Critical Siemens Dematic Ag
Publication of WO2002011202A2 publication Critical patent/WO2002011202A2/en
Publication of WO2002011202A3 publication Critical patent/WO2002011202A3/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/119—Details of rigid insulating substrates therefor, e.g. three-dimensional details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C43/00—Compression moulding, i.e. applying external pressure to flow the moulding material; Apparatus therefor
    • B29C43/32—Component parts, details or accessories; Auxiliary operations
    • B29C43/44—Compression means for making articles of indefinite length
    • B29C43/46—Rollers
    • B29C2043/461—Rollers the rollers having specific surface features
    • B29C2043/463—Rollers the rollers having specific surface features corrugated, patterned or embossed surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0284—Details of three-dimensional rigid printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09045—Locally raised area or protrusion of insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/0113—Female die used for patterning or transferring, e.g. temporary substrate having recessed pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/0143—Using a roller; Specific shape thereof; Providing locally adhesive portions thereon
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0548—Masks
    • H05K2203/0554—Metal used as mask for etching vias, e.g. by laser ablation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0014—Shaping of the substrate, e.g. by moulding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Combinations Of Printed Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Shaping Of Tube Ends By Bending Or Straightening (AREA)

Abstract

According to a method for producing connection substrates for semiconductor chips, preferably PSGA (polymer stud grid array) substrates, a blank body (1), preferably a film, is heated and humps (3) and/or recesses are produced on at least one of its surfaces using an embossing roller. High temperature resistant thermoplastics, preferably LCPs (liquid crystal polymers), are used as the material for the substrate body. Their surface can preferably be provided with a metallic layer which is in turn provided with openings as an embossing aid.
PCT/DE2001/002892 2000-07-31 2001-07-31 Method and device for producing connection substrates for electronic components WO2002011202A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2000137292 DE10037292A1 (en) 2000-07-31 2000-07-31 Process for the production of connection substrates for semiconductor components
DE10037292.9 2000-07-31

Publications (2)

Publication Number Publication Date
WO2002011202A2 WO2002011202A2 (en) 2002-02-07
WO2002011202A3 true WO2002011202A3 (en) 2003-01-23

Family

ID=7650849

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/DE2001/002891 WO2002011201A2 (en) 2000-07-31 2001-07-31 Method and device for producing connection substrates for electronic components
PCT/DE2001/002892 WO2002011202A2 (en) 2000-07-31 2001-07-31 Method and device for producing connection substrates for electronic components

Family Applications Before (1)

Application Number Title Priority Date Filing Date
PCT/DE2001/002891 WO2002011201A2 (en) 2000-07-31 2001-07-31 Method and device for producing connection substrates for electronic components

Country Status (3)

Country Link
DE (1) DE10037292A1 (en)
TW (1) TW531817B (en)
WO (2) WO2002011201A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10225431A1 (en) * 2002-06-07 2004-01-08 Siemens Dematic Ag Method for connecting electronic components on an insulating substrate and component module produced by the method
DE10225685A1 (en) * 2002-06-10 2003-12-24 Siemens Dematic Ag Forming holes in a flat polymer material circuit board substrate, involves initially forming blind holes, and then removing the material at the bottom using a laser
EP2747132B1 (en) 2012-12-18 2018-11-21 IMEC vzw A method for transferring a graphene sheet to metal contact bumps of a substrate for use in semiconductor device package
CN114615789A (en) * 2020-12-08 2022-06-10 富泰华工业（深圳）有限公司 Main board

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4814295A (en) * 1986-11-26 1989-03-21 Northern Telecom Limited Mounting of semiconductor chips on a plastic substrate
US5310333A (en) * 1989-04-26 1994-05-10 Canon Kabushiki Kaisha Roll stamper for molding substrate used for optical recording medium
JPH0745643A (en) * 1993-07-30 1995-02-14 Kyocera Corp Semiconductor element packaging method
US5831832A (en) * 1997-08-11 1998-11-03 Motorola, Inc. Molded plastic ball grid array package
US6005198A (en) * 1997-10-07 1999-12-21 Dimensional Circuits Corporation Wiring board constructions and methods of making same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2558763B1 (en) * 1984-01-27 1987-11-20 Thomson Csf PROCESS FOR MANUFACTURING A CERAMIC SUBSTRATE, WITH TRANSVERSE ELECTRICAL CONNECTION PLUGS
KR100279196B1 (en) * 1994-09-23 2001-02-01 에르. 반 오버슈트래텐 Polymer Stud Grid Array
DE19732353A1 (en) * 1996-09-27 1999-02-04 Fraunhofer Ges Forschung Contactless chip-card manufacture method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4814295A (en) * 1986-11-26 1989-03-21 Northern Telecom Limited Mounting of semiconductor chips on a plastic substrate
US5310333A (en) * 1989-04-26 1994-05-10 Canon Kabushiki Kaisha Roll stamper for molding substrate used for optical recording medium
JPH0745643A (en) * 1993-07-30 1995-02-14 Kyocera Corp Semiconductor element packaging method
US5831832A (en) * 1997-08-11 1998-11-03 Motorola, Inc. Molded plastic ball grid array package
US6005198A (en) * 1997-10-07 1999-12-21 Dimensional Circuits Corporation Wiring board constructions and methods of making same

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
"METHOD TO CONTROL THE GEOMETRY AND VERTICAL PROFILE OF VIA HOLES IN SUBSTRATE MATERIALS", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, vol. 35, no. 5, 1 October 1992 (1992-10-01), pages 211 - 216, XP000312938, ISSN: 0018-8689 *
"USE OF HIGH PRECISION SILICON MOLDS FOR REPLICATING MICROELECTRONIC PACKAGING STRUCTURES", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, vol. 30, no. 5, October 1987 (1987-10-01), pages 306 - 311, XP002156789, ISSN: 0018-8689 *
BECKER H ET AL: "Hot embossing as a method for the fabrication of polymer high aspect ratio structures", SENSORS AND ACTUATORS A, ELSEVIER SEQUOIA S.A., LAUSANNE, CH, vol. 83, no. 1-3, May 2000 (2000-05-01), pages 130 - 135, XP004198304, ISSN: 0924-4247 *
DREUTH H ET AL: "Thermoplastic structuring of thin polymer films", SENSORS AND ACTUATORS A, ELSEVIER SEQUOIA S.A., LAUSANNE, CH, vol. 78, no. 2-3, 14 December 1999 (1999-12-14), pages 198 - 204, XP004252972, ISSN: 0924-4247 *
PATENT ABSTRACTS OF JAPAN vol. 1995, no. 05 30 June 1995 (1995-06-30) *

Also Published As

Publication number Publication date
TW531817B (en) 2003-05-11
DE10037292A1 (en) 2002-02-21
WO2002011202A2 (en) 2002-02-07
WO2002011201A2 (en) 2002-02-07
WO2002011201A3 (en) 2002-09-19

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