[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

WO2001045454A3 - Vorrichtung und verfahren zum ausgleichen von datenlaufzeiten - Google Patents

Vorrichtung und verfahren zum ausgleichen von datenlaufzeiten Download PDF

Info

Publication number
WO2001045454A3
WO2001045454A3 PCT/DE2000/004461 DE0004461W WO0145454A3 WO 2001045454 A3 WO2001045454 A3 WO 2001045454A3 DE 0004461 W DE0004461 W DE 0004461W WO 0145454 A3 WO0145454 A3 WO 0145454A3
Authority
WO
WIPO (PCT)
Prior art keywords
run times
data
data run
compensating data
storage devices
Prior art date
Application number
PCT/DE2000/004461
Other languages
English (en)
French (fr)
Other versions
WO2001045454A2 (de
Inventor
Christian Wenk
Original Assignee
Siemens Ag
Christian Wenk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag, Christian Wenk filed Critical Siemens Ag
Priority to US10/168,368 priority Critical patent/US6768734B2/en
Publication of WO2001045454A2 publication Critical patent/WO2001045454A2/de
Publication of WO2001045454A3 publication Critical patent/WO2001045454A3/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
    • H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
    • H04J2203/0089—Multiplexing, e.g. coding, scrambling, SONET
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13036—Serial/parallel conversion, parallel bit transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13103—Memory
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13292—Time division multiplexing, TDM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/1331—Delay elements, shift registers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/1336—Synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13367—Hierarchical multiplexing, add-drop multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
  • Image Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

Die Erfindung betrifft eine Vorrichtung und ein Verfahren zum Ausgleichen von Datenlaufzeiten mit einer Vielzahl von Serien/Parallelwandlern (2), einer Vielzahl von Datenwort-Synchronisationseinheiten (3), einer Vielzahl von Speichervorrichtungen (4) und einer Vielzahl von Parallel/Serienwandlern (5) zum zeitgleichen Auslesen der in der Vielzahl von Speichervorrichtungen (4) gespeicherten Daten. Insbesondere durch das Einfügen bzw. Verwerfen von zumindest einem vorbestimmten Kennwort in der Vielzahl von Datenströmen erhält man einen Ausgleich von Datenlaufzeiten.
PCT/DE2000/004461 1999-12-17 2000-12-14 Vorrichtung und verfahren zum ausgleichen von datenlaufzeiten WO2001045454A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/168,368 US6768734B2 (en) 1999-12-17 2000-12-14 Device and method for equalizing data delays

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19961131.9 1999-12-17
DE19961131A DE19961131A1 (de) 1999-12-17 1999-12-17 Vorrichtung und Verfahren zum Ausgleichen von Datenlaufzeiten

Publications (2)

Publication Number Publication Date
WO2001045454A2 WO2001045454A2 (de) 2001-06-21
WO2001045454A3 true WO2001045454A3 (de) 2001-12-06

Family

ID=7933185

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2000/004461 WO2001045454A2 (de) 1999-12-17 2000-12-14 Vorrichtung und verfahren zum ausgleichen von datenlaufzeiten

Country Status (4)

Country Link
US (1) US6768734B2 (de)
CN (2) CN1210573C (de)
DE (1) DE19961131A1 (de)
WO (1) WO2001045454A2 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7058090B1 (en) * 2001-12-18 2006-06-06 Applied Micro Circuits Corporation System and method for paralleling digital wrapper data streams
JP4407104B2 (ja) * 2002-08-30 2010-02-03 富士ゼロックス株式会社 信号伝送システム
US7373561B2 (en) * 2002-10-29 2008-05-13 Broadcom Corporation Integrated packet bit error rate tester for 10G SERDES
DE102006019486A1 (de) 2006-04-26 2007-10-31 Rohde & Schwarz Gmbh & Co. Kg Vorrichtung zur Parallel-Seriell-Wandlung von mehreren durch jeweils einen Detektor erfassten Signalgrößen
US8199782B2 (en) * 2009-02-20 2012-06-12 Altera Canada Co. Method of multiple lane distribution (MLD) deskew
US8175087B2 (en) * 2009-10-12 2012-05-08 Linear Technology Corporation Method and system for communicating multiple data signals over a single unidirectional isolation component
CN102411127A (zh) * 2010-09-20 2012-04-11 四川德源电气有限公司 一种蓄电池的传感器装置
KR101517708B1 (ko) * 2010-11-17 2015-05-04 야자키 소교 가부시키가이샤 전류 센서 결합형 배터리 단자
CN103091631A (zh) * 2011-10-27 2013-05-08 现代摩比斯株式会社 汽车用电池传感器组装体
DE102013208381A1 (de) * 2013-05-07 2014-11-13 Continental Teves Ag & Co. Ohg Stromsensor für eine Fahrzeugbatterie
CN103698715B (zh) * 2014-01-10 2017-02-08 科博达技术有限公司 电池监测装置
DE102015002078B3 (de) 2015-02-18 2016-07-28 Audi Ag Batteriezelle für eine Batterie eines Kraftfahrzeugs, Batterie sowie Kraftfahrzeug
CN107534123B (zh) * 2015-07-01 2021-03-30 古河电气工业株式会社 电池状态探测装置及其制造方法
CN108761144A (zh) * 2018-05-26 2018-11-06 史里司 一种可拆卸滑轨式电池传感器固定装置
WO2020228342A1 (zh) * 2019-05-10 2020-11-19 上海禾他汽车科技有限公司 一种智能电池传感器
US11558016B2 (en) 2020-03-12 2023-01-17 Qorvo Us, Inc. Fast-switching average power tracking power management integrated circuit
US11736076B2 (en) 2020-06-10 2023-08-22 Qorvo Us, Inc. Average power tracking power management circuit
US11579646B2 (en) 2020-06-11 2023-02-14 Qorvo Us, Inc. Power management circuit for fast average power tracking voltage switching
US11894767B2 (en) 2020-07-15 2024-02-06 Qorvo Us, Inc. Power management circuit operable to reduce rush current
US11349468B2 (en) * 2020-07-24 2022-05-31 Qorvo Us, Inc. Target voltage circuit for fast voltage switching
US11539290B2 (en) 2020-07-30 2022-12-27 Qorvo Us, Inc. Power management circuit operable with low battery
US11619957B2 (en) 2020-08-18 2023-04-04 Qorvo Us, Inc. Power management circuit operable to reduce energy loss
US11482970B2 (en) 2020-09-03 2022-10-25 Qorvo Us, Inc. Power management circuit operable to adjust voltage within a defined interval(s)
US11699950B2 (en) 2020-12-17 2023-07-11 Qorvo Us, Inc. Fast-switching power management circuit operable to prolong battery life
CN113036471A (zh) * 2021-03-05 2021-06-25 徐工集团工程机械股份有限公司道路机械分公司 一种气门压板接线装置及柴油机气门控制装置
US11906992B2 (en) 2021-09-16 2024-02-20 Qorvo Us, Inc. Distributed power management circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1412136A (en) * 1971-10-26 1975-10-29 Philips Electronic Associated Telecommunication network
JPH01278139A (ja) * 1988-04-30 1989-11-08 Fujitsu Ltd マルチフレーム同期・変換方式

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU516811B2 (en) * 1977-06-20 1981-06-25 L M Ericsson Pty. Ltd. Bit switching of word formatted data
FR2538976A1 (fr) * 1982-12-29 1984-07-06 Servel Michel Systeme de commutation de paquets synchrones de longueur fixe
JPH0728280B2 (ja) * 1986-10-17 1995-03-29 富士通株式会社 多重マルチフレ−ム同期検出回路
US5040195A (en) * 1988-12-20 1991-08-13 Sanyo Electric Co., Ltd. Synchronization recovery circuit for recovering word synchronization
JPH0756968B2 (ja) * 1989-06-23 1995-06-14 日本電気株式会社 多重スタッフ処理回路
JP2747077B2 (ja) * 1990-02-22 1998-05-06 株式会社東芝 フレーム同期回路
DE4132518C2 (de) * 1991-09-30 1994-07-14 Siemens Ag Schaltungsanordnung für die Übertragung von digitalen Nachrichtensignalen über ein nach einem asynchronen Transfermodus arbeitendes Breitband-Kommunikationssystem
JP2906891B2 (ja) 1992-12-28 1999-06-21 松下電器産業株式会社 Ｍ−ａｒｙスペクトラム拡散方式通信装置
US5442405A (en) * 1993-12-22 1995-08-15 Matsushita Electric Industrial Co., Ltd. Frame synchronizing circuit for frame synchronization of digital signals
KR0133423B1 (ko) * 1994-12-09 1998-04-27 양승택 프레임 동기 장치(frame synchronizng device)
US5583894A (en) * 1995-03-20 1996-12-10 Vlsi Technology, Inc. Slip buffer for synchronizing data transfer between two devices
JPH09200569A (ja) * 1996-01-17 1997-07-31 Sony Corp フレームシンクロナイザー
JP2953500B2 (ja) 1996-04-04 1999-09-27 日本電気株式会社 ディジタル信号伝送システム
US6215798B1 (en) * 1996-11-01 2001-04-10 Telefonaktiebolaget Lm Ericsson (Publ) Multi-frame synchronization for parallel channel transmissions

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1412136A (en) * 1971-10-26 1975-10-29 Philips Electronic Associated Telecommunication network
JPH01278139A (ja) * 1988-04-30 1989-11-08 Fujitsu Ltd マルチフレーム同期・変換方式

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 014, no. 051 (E - 0881) 30 January 1990 (1990-01-30) *

Also Published As

Publication number Publication date
CN1210573C (zh) 2005-07-13
CN1411675A (zh) 2003-04-16
US6768734B2 (en) 2004-07-27
US20030099230A1 (en) 2003-05-29
CN1399725A (zh) 2003-02-26
DE19961131A1 (de) 2002-07-18
WO2001045454A2 (de) 2001-06-21

Similar Documents

Publication Publication Date Title
WO2001045454A3 (de) Vorrichtung und verfahren zum ausgleichen von datenlaufzeiten
CA2337918A1 (en) Turbo interleaving apparatus and method
WO2002098130A3 (en) Information storing apparatus and method therefor
EP0628906A3 (de) Datenspeicher-Gerät.
FR2706053B1 (fr) Procédé pour réduire la redondance des données.
KR880011886A (ko) 제조방법 및 제조장치
EP0653759A3 (de) Ankoppelmodul für austauschbaren Speicher.
EP0656954A4 (de) Herstellungsmethode von markierten genen; transcripten und proteinen.
WO2004066062A3 (en) A system and method for providing content warehouse
WO2002054648A3 (en) Data de-skew method and system
ATE228393T1 (de) Matrixsystem für aufbewahrung und abgabe
EP0646895A3 (de) Dünne Chipkarte und ihr Herstellungsverfahren.
ATE306102T1 (de) Auf inhalt basierende speicherungsverwaltung
FR2702067B1 (fr) Procédé et dispositif de fabrication de cartes à mémoire.
EP0618526A3 (de) Verfahren und Vorrichtung für ein hierarchisches, ansteuerbares Videomilieu.
ZA928145B (en) Process for supplying nitrogen from an on-site plant.
DE59610595D1 (de) OLIGO-p-PHENYLEN-EINHEITEN ENTHALTENDE POLYMERE, VERFAHREN ZU IHRER HERSTELLUNG SOWIE IHRE VERWENDUNG
DE69615668D1 (de) O-carbamoyl-(d)-phenylalanilolverbindungen und verfahren zu ihrer herstellung.
WO1997042575A3 (en) System and method for handling technical information
WO2005023356A3 (en) Method and apparatus for data storage and retrieval
EP0388051A3 (de) Verfahren zur Umwandlung in beiden Richtungen zwischen mehreren N-synchronen seriellen Bitströmen und einem parallelen Zeitmultiplex-Format
EP0668011A4 (de) Verfahren zum pflücken von sämlingen.
FR2705821B1 (fr) Mémoire dynamique.
EP0649108A3 (de) Datenspeichereinrichtung.
WO2002101590A3 (en) System and method for retrieving information from an electronic catalog

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): CN DE US

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
AK Designated states

Kind code of ref document: A3

Designated state(s): CN DE US

WWE Wipo information: entry into national phase

Ref document number: 008172773

Country of ref document: CN

Ref document number: 10168368

Country of ref document: US

DPE2 Request for preliminary examination filed before expiration of 19th month from priority date (pct application filed from 20040101)