WO2000018004A1 - Amplificateur de puissance de gain commute presentant une efficacite elevee - Google Patents
Amplificateur de puissance de gain commute presentant une efficacite elevee Download PDFInfo
- Publication number
- WO2000018004A1 WO2000018004A1 PCT/US1999/021757 US9921757W WO0018004A1 WO 2000018004 A1 WO2000018004 A1 WO 2000018004A1 US 9921757 W US9921757 W US 9921757W WO 0018004 A1 WO0018004 A1 WO 0018004A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- switch
- amplifier
- power amplifier
- hybrid circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0088—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/60—Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
- H03F3/602—Combinations of several amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/72—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
- H03F2203/7239—Indexing scheme relating to gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers and shunting lines by one or more switch(es)
Definitions
- the present invention relates generally to power gain control for a power amplifier circuit and particularly to a power application circuit having greater power conservation in wireless communication device, such as a CDMA wireless phone.
- RF power output from a mobile unit varies in large dynamic ranges.
- CDMA code-division-multiple-access
- TDMA time-division-multiple access
- RF power output from a mobile unit varies in large dynamic ranges.
- CDMA radiotelephone system multiple signals are transmitted simultaneously at the same frequency. The signals are spread with different digital codes, thus allowing detection of the desired signal while the unintended signals appear as noise or interference to the receiver.
- Spread spectrum systems can tolerate some interference, and the interference added by each new mobile station increases the overall interference in each cell site. Each mobile station introduces a unique level of interference, which depends on its received power level at the cell site.
- the CDMA system uses power control to minimize mutual interference.
- a precise power control is critical to avoid excessive transmitter signal power that is responsible for contributing to the overall interference of the system.
- Power of the individual mobile stations varies with the distance between the mobile station and the base station and the number of other subscriber mobile stations in that base station or sector.
- the power amplifier is biased class AB to reduce power consumption during periods of low transmit power, but power continues to be consumed.
- an isolator is used to isolate the power amplifier from the effects of load impedance in subsequent stages.
- One method to avoid continuous battery draw is to employ a means to bypass the amplifier with switches, and then remove DC power from the amplifier.
- Such a power amplifier circuit has a power amplifier and an isolator. An RF-input is connected to a pole of a first switch. When the amplifier is on, the switch connects the RF-input to an input of the power amplifier. The RF-signal is amplified and output to the isolator, and then transmitted through the second switch to the RF- output of the power amplifier circuit.
- the first switch connects the RF-input to the bypass path and the second switch transmits the signal to the RF-output.
- the switching employed introduces loss as the signal is processed.
- the drawback of this design is that the amplifier must overcome the added switching loss during times that higher transmit power is required. This can tend to cancel the benefits of bypassing.
- DA driver amplifier
- a switch operates to direct the received signal from a driver amplifier to either an amplifier path containing a band-pass filter and a power amplifier, or a bypass path.
- the bypass path bypasses the power amplifier when the power amplifier capability is not required.
- the amplifier is turned off.
- the signal is passed through the bypass path it enters the isolated port of a hybrid circuit.
- the signal is transmitted to the output of the power amplifier.
- the power amplifier appears as a large impedance which is highly reflective because it is turned off.
- the reflected signal is then routed to the output port or front end of the circuit. With this configuration, an output switch becomes unnecessary and the power loss after the signal is amplified is reduced.
- a first band-pass filter is placed in the amplification path such that filtering is also bypassed when the power amplifier is bypassed.
- the signal flow is directed through a transmitter chain containing the first band-pass filter and a power amplifier ("PA").
- the first filter in the transmitter chain cleans up noise added by the DA.
- the PA amplifies the signal which then is transmitted through an isolator and a second filter at the output of the circuit which cleans up noise added by the PA.
- a benefit of bypassing the PA is that it no longer adds noise to the signal.
- the second filter at the output of the circuit still filters the added effects of the PA, and when the signal routes through the bypass path, the second filter reduces noise added by the driver amplifier. Therefore, the first filter becomes unnecessary when the signal is passed through the bypass path.
- This power amplification circuit provides reduced loss at the end of the amplifier, whereby greater power using less current at the output may be achieved.
- the configuration also reduces the loss in the bypass path when changing modes from amplification to bypass. The driver amplifier therefore becomes the output amplifier.
- bypassing the power amplifier enables the driver amplifier to be driven harder because it is the dominating source of distortion in the chain.
- the driver amplifier may be driven to a greater degree in the non-linear region than could be accomplished when using the power amplifier.
- the cellular phone may be operated using the driver amplifier for a longer period of time, thus conserving battery power by keeping the power amplifier off for longer periods of time.
- FIG. 1 is a block diagram of a mobile station of the present invention
- FIG. 2 is a plan drawing of the first embodiment of the present invention.
- FIG. 3 provides a block diagrammatic representation of a mobile station spread spectrum transmitter in which may be incorporated an efficient power amplifier of the present invention
- FIG. 4 shows an exemplary implementation of an RF transmitter included within the spread spectrum transmitter of FIG. 2;
- FIG. 5 is a plan drawing of the second embodiment of the present invention
- FIG. 6 is a plan drawing of the third embodiment of the present invention
- FIG. 7 is a plan drawing of the fourth embodiment of the present invention.
- FIG. 8 is a plan drawing of a sixth embodiment of the present invention.
- FIG. 1 illustrates a mobile station of the present invention and its signal processing.
- a mobile station 100 comprises circuitry for interfacing with system memory and the user 102.
- the memory and user interface 102 is connected to a digital processor 104 which controls the signal processing.
- a receiving chain comprises a receiving IF/baseband signal processing circuit 106 connected to the digital processor 104, and a receiving RF-signal processing circuit 108.
- a transmitting chain comprising a transmitting IF/baseband processing circuit 120 is connected to the digital processor 104.
- a transmitting RF processing circuit 122 includes the power amplifier circuit arrangement described in more detail herein.
- a duplexer 124 controls the signal flow from the receiving chain and the transmitting chain and an antenna 126.
- a codec circuit 110 is connected to the digital processor 104.
- circuit elements illustrated in FIG. 1, except the transmitting signal processing 122 disclosed herein, are generally known to those of ordinary skill in the art. Accordingly, the foregoing description and block diagram of FIG. 1, in addition to the disclosure of the power amplifier circuit arrangement of the present invention, sufficiently enable one of ordinary skill in the art to make and use the mobile station of the present invention.
- FIG. 2 is a schematic diagram showing the power amplifier aspect of the invention.
- a power amplifier circuit indicated generally by reference numeral 10, comprises a power amplifier 32, a circulator 52, a series of switches, 20, 24 and 42, and bypass paths 34 and 36 around the power amplifier 32.
- An RF-input 12 having an RF-signal to be amplified is connected to a pole of first switch 20.
- the power amplifier 32 is turned on and the switch 20 connects the RF-input 12, via a path 28, to an input of the power amplifier 32.
- the power amplifier transmits the RF-signal toward the circulator 52.
- the circulator 52 routes the signal to a port of the RF- output 54.
- the switch 20 switches the RF-signal to a bypass network 48 comprising a bypass path 36 and an attenuated path 34.
- switches 24 and 42 switch to a first position such that the signal flows through bypass path 36.
- Switches 24 and 42 can also switch the signal to flow through the attenuated path 34.
- From switch 42 the signal is transmitted to an input of circulator 52.
- the circulator 52 routes the signal to the port connected to the output 50 of the power amplifier 32.
- the output of the power amplifier 50 appears as a high impedance to the signal and thus the signal is reflected back to the circulator 52, which routes the signal to the port of the RF-output 54 of amplifier circuit 10.
- FIG. 3 is a schematic diagram illustrating the use of the power amplifier of the present invention in the signal processing circuitry of a mobile station.
- orthogonal signaling is employed to provide a suitable ratio of signal-to-noise on the mobile- station to base-station link, or the "reverse" channel.
- Data bits 200 consisting of, for example, voice converted to data by a vocoder, are supplied to an encoder 202 where the bits are convolutionally encoded.
- code symbol repetition may be used such that the encoder 202 repeats the input data bits 200 in order to create a repetitive data stream at a bit rate which matches the operative rate of the encoder 202.
- R b nominal bit rate
- r denotes the code rate (e.g. 1/3) of the encoder 202.
- the encoded data is then provided to a block interleaver 204.
- each character is encoded into a Walsh sequence of length 64. That is, each Walsh sequence includes 64 binary bits or "chips", there being a set of 64 Walsh codes of length 64.
- the 64 orthogonal codes correspond to Walsh codes from a 64 by 64 Hadamard matrix wherein a Walsh code is a single row or column of the matrix.
- the Walsh sequence produced by the modulator 206 is provided to an exclusive-OR combiner 208, where it is then "covered” or multiplied at a combiner with a PN code specific to a particular mobile station.
- a "long" PN code is generated at a rate R c by a PN long code generator 210 in accordance with a user PN long code mask.
- the long code generator 210 operates at an exemplary chip rate, R c , of 1.2288 Mhz so as to produce four PN chips per Walsh chip.
- the output of the exclusive -OR combiner 208 is split into identical signals A and B. Signals A and B are input into the exclusive-OR combiners 256 and 254 of FIG. 4 as described below.
- FIG. 4 is a schematic diagram showing an exemplary implementation of the RF transmitter 250 in a mobile station.
- a pair of short PN sequences PN T and PN Q , are respectively provided by a PN X generator 252 and a PN Q generator 254 to exclusive-OR combiners 256 and 258, along with the output A and B from exclusive-OR combiner 208 of FIG. 2.
- the PN X and PN Q sequences relate respectively to in-phase (I) and quadrature phase (Q) communication channels, and are generally of a length (32,768 chips) much shorter than the length of each user long PN code.
- the resulting I- channel code spread sequence 260 and Q-channel code spread sequence 262 are then passed through baseband filters 264 and 266, respectively.
- Digital to Analog (D/A) converters 270 and 272 are provided for converting the digital I-channel and Q-channel information, respectively, into analog form.
- the analog waveforms produced by D/A converters 270 and 272 are provided with a local oscillator (LO) carrier frequency signals Cos (2 ⁇ ft) and Sin (2 ⁇ ft), respectively, to mixers 288 and 290 where they are mixed and provided to summer 292.
- the quadrature phase carrier signals Sin (2 ⁇ ft) and Cos (2 ⁇ ft) are provided from suitable frequency sources (not shown). These mixed IF signals are summed in summer 292 and provided to mixer 294.
- Mixer 294 mixes the summed signal with an RF frequency from frequency synthesizer 296 so as to provide frequency upconversion to the RF frequency band.
- the RF may then be bandpass filtered 298 and provided to an efficient parallel stage RF amplifier 10 of the invention.
- the filter 298 removes undesired spurs caused from upconversion 296.
- Another filter (not shown) may be located following the amplifier circuitry to remove undesired spurs when the circuit is operating in bypass mode. In a bypass mode, the previous driver amplifier becomes the output amplifier and filtering may be necessary to prevent extra spurs from mixing in the non-linearities of the amplifier. This filtering may be accomplished by another filter (not shown), thus the band-pass filter 298 may be located in the amplification path as illustrated in FIGS. 5, 6 and 7 discussed below. This also increases flexibility in choosing gain steps.
- FIG. 5 illustrates a second embodiment of the invention wherein the power loss after the power amplifier is minimized.
- a driver amplifier 280 produces an analog signal, which is switched by a first switch 20 between an amplifier path 28 and a bypass path 30.
- the signal is band-pass filtered 298 and amplified by a power amplifier 32.
- the amplified signal is split by a first hybrid circuit 60 to produce an in-phase signal and a quadrature signal ninety degrees out of phase.
- Either of the in-phase signal or quadrature signal is inverted by a coupler or a second hybrid circuit 64 to produced an inverted signal according to means known by those of ordinary skill in the art.
- the inverted signal and the un-inverted signal i.e.
- the other of the in-phase or quadrature signal are summed by a summing feature of the second hybrid circuit 64 and transmitted toward the RF-output port 54 or antenna (not shown).
- the signal Prior to being transmitted from an antenna, the signal is again filtered by a filter (not shown) to reduce any unwanted spurs or other effects.
- the signal is transmitted to an isolated port of the second hybrid circuit 64.
- the second hybrid circuit 64 splits the signal into an in-phase signal and a quadrature signal ninety degrees out of phase.
- the first hybrid circuit 60 inverts either the in-phase signal or the quadrature signal and sums the two signals.
- the summed signal is transmitted to the output of the power amplifier 32.
- the power amplifier 32 in this scenario is turned off to conserve power.
- the turned-off power amplifier appears as a large impedance or a reflective load to the signal, which therefore reflects back to the first hybrid circuit 60.
- the reflected signal is split by the first hybrid circuit 60 into an in-phase signal and a quadrature signal ninety degrees out of phase, input into the second hybrid circuit 64, where one of either the in- phase or quadrature signal is inverted.
- the inverted signal is summed with the other un-inverted signal, filtered, and transmitted to the output port 54 or antenna.
- a second switch 43 positioned in the bypass path selectively connects the isolated port of the second hybrid circuit 64 with the first switch 20.
- the second switch 43 selectively connects the isolated port of the second hybrid circuit 64 to route reflected signals to a terminating resistor 45.
- the signal reflected off of the power amplifier 32 acting as a reflecting load is filtered by a filter (not shown) prior to being radiated by the antenna (not shown).
- the circuit of the present invention does not need an output switch after the power amplifier, which simplifies the circuit and reduces the power loss after the power amplifier 32.
- FIG. 6 illustrates a third and preferred embodiment of the present invention which provides greater minimization of power loss after the amplifying the signal with power amplifiers.
- This embodiment provides a driver amplifier 280 producing an analog signal.
- the analog signal is switched by a first switch 20 between an amplifier path 28 and a bypass path 30.
- the signal is band-pass filtered 298, split by a first hybrid circuit 60 into an in-phase signal and a quadrature signal ninety degrees out of phase.
- the in-phase signal and the quadrature signal are each independently amplified by a first amplifier 31 and a second amplifier 32, respectively.
- One of the amplified in-phase signal or the amplified quadrature signal is inverted by the second hybrid circuit 64 to produce an inverted signal.
- the inverted signal and the other un- inverted signal are summed in the second hybrid circuit 64, filtered by a filter (not shown) and fed toward the RF-output port 54 or antenna (not shown).
- the bypass path 30 provides a path from the first switch 20 to an isolated port of the second hybrid circuit 64.
- the signal is split into an in- phase signal and a quadrature signal the hybrid circuit 64.
- the in-phase signal is transmitted to the output of the first power amplifier 31 which is turned off and therefore appears as a reflective load to the signal.
- the quadrature signal is transmitted to the output of the second power amplifier 32, which is turned off and therefore appears as a reflective load to the signal.
- Each reflected signal again enters the second hybrid circuit 64, where either the in-phase signal or the quadrature signal one of the split signals is inverted and summed with the other signal.
- the summed signal is output to the output port 54.
- Each circuit in FIGS. 5 and 6 also contains a filter (not shown) after the power amplifier or power amplifiers. Accordingly, a signal reflected from the high impedance output of the power amplifier is still band-pass filtered to reduce unwanted effects.
- a second switch 43 connects the isolated port of the hybrid circuit 64 with the first switch 20.
- the switch 43 connects the isolated port of the second hybrid circuit 64 with ground through a resistor 45, which routes any reflected signal to ground.
- the circuit of this arrangement does not need an output switch and therefore simplifies the circuit and reduces the power consumption.
- Shunt switches 47a, 47b can be used to shunt the output of the power amplifiers 31, 32 when using the bypass path 30. This will ensure that the output of each power amplifier 31, 32 is reflective without introducing significant loss.
- the shunt switches 47a, 47b could be implemented with a pin diode, FET switch or other means.
- FIG. 7 is a fourth embodiment of the present invention wherein the analog signal is switched by a first switch 20 between a bypass path 30 and an amplifier path 28.
- band-pass filtering 298 only occurs in the amplifier path 28. Accordingly, the signal is band-pass filtered 298 and fed to the power amplifier 32, amplified, and transmitted to the circulator 55, which routes the signal towards the RF-output port.
- the circulator 55 is connected to ground through a second switch 43 and a resistor 45. Accordingly, with this configuration, when reflected or returned RF-signals enter the circulator 55 from the direction of the RF- output port, the reflected signal is routed by the circulator 55 to ground.
- the second switch 43 connects the bypass path 30 to the circulator 55, and the signal is routed toward the output of the amplifier. This will appear as a high impedance, reflecting the signal back through isolator (shunt) 55 and to RF-output port 54.
- a shunt switch 47a may be used to shunt the output of power amplifier 32 when using the bypass path 30. This ensures that the output of PA 32 is reflective without introducing significant loss.
- the shunt 47a may be a PIN diode, FET switch or other means.
- FIG. 8 illustrates another aspect of the power amplifier circuit of FIG. 2 without the attenuating path 34.
- An analog signal is fed from a driver amplifier 280 through a band pass filter 298 to a first switch 20.
- the switch 20 alternates between a bypass path 30 and an amplifier path 28, wherein a power amplifier 32 amplifies the signal.
- a second switch 42 transmits the analog signal from either the bypass path 30 or the amplifier path 28 to a circulator 55, which routes the signal to the RF- output port 54.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Transmitters (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU61548/99A AU6154899A (en) | 1998-09-22 | 1999-09-22 | High efficiency switched gain power amplifier |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/158,456 US6060949A (en) | 1998-09-22 | 1998-09-22 | High efficiency switched gain power amplifier |
US09/158,456 | 1998-09-22 | ||
US09/248,048 | 1999-02-10 | ||
US09/248,048 US6208202B1 (en) | 1998-09-22 | 1999-02-10 | High efficiency switched gain power amplifier |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2000018004A1 true WO2000018004A1 (fr) | 2000-03-30 |
Family
ID=26855042
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1999/021757 WO2000018004A1 (fr) | 1998-09-22 | 1999-09-22 | Amplificateur de puissance de gain commute presentant une efficacite elevee |
PCT/US1999/021758 WO2000018005A1 (fr) | 1998-09-22 | 1999-09-22 | Amplificateur de puissance de gain commute presentant une efficacite elevee |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1999/021758 WO2000018005A1 (fr) | 1998-09-22 | 1999-09-22 | Amplificateur de puissance de gain commute presentant une efficacite elevee |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP1116325A1 (fr) |
JP (1) | JP2002525951A (fr) |
CN (1) | CN1326614A (fr) |
AU (2) | AU772636B2 (fr) |
CA (1) | CA2345089A1 (fr) |
WO (2) | WO2000018004A1 (fr) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003038995A1 (fr) * | 2001-10-31 | 2003-05-08 | Qualcomm Incorporated | Amplificateur de puissance symetrique a structure en derivation |
CN104485894A (zh) * | 2014-11-12 | 2015-04-01 | 广州中大微电子有限公司 | 一种用于运算放大器共模电平偏移的处理电路及其方法 |
WO2015119668A1 (fr) * | 2014-02-04 | 2015-08-13 | Texas Instruments Incorporated | Émetteur et procédé d'émission |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7902925B2 (en) * | 2005-08-02 | 2011-03-08 | Qualcomm, Incorporated | Amplifier with active post-distortion linearization |
CN101904104B (zh) * | 2007-12-17 | 2013-04-17 | 松下电器产业株式会社 | 带旁路电路的放大电路和使用它的电子机器 |
JP2011004556A (ja) * | 2009-06-22 | 2011-01-06 | Mitsubishi Electric Corp | 車両用電源装置 |
CN104158505A (zh) * | 2013-05-14 | 2014-11-19 | 中兴通讯股份有限公司 | 一种射频功放电路、控制方法及终端 |
CN104852749B (zh) * | 2014-02-19 | 2018-01-16 | 华为终端(东莞)有限公司 | 射频电路及终端设备 |
CN106330121A (zh) * | 2015-07-02 | 2017-01-11 | 株式会社村田制作所 | 放大电路 |
CN105353295A (zh) * | 2015-12-01 | 2016-02-24 | 无锡比迅科技有限公司 | 一种运放增益测量电路 |
CN110708040A (zh) * | 2019-10-14 | 2020-01-17 | 中国科学院微电子研究所 | 匹配滤波设备 |
CN114244378B (zh) * | 2021-12-13 | 2023-05-16 | 遨海科技有限公司 | 一种可动态输出功率的vdes发射机 |
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US4010426A (en) * | 1975-11-12 | 1977-03-01 | The United States Of America As Represented By The Secretary Of The Air Force | Rf power amplifier parallel redundant system |
US5093667A (en) * | 1989-10-16 | 1992-03-03 | Itt Corporation | T/R module with error correction |
WO1997024800A1 (fr) * | 1995-12-27 | 1997-07-10 | Qualcomm Incorporated | Amplificateur de puissance, ayant un bon rendement, a etages en parallele |
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US3857106A (en) * | 1970-09-04 | 1974-12-24 | Bell Telephone Labor Inc | Amplifier with n-port signal excitation |
GB8517180D0 (en) * | 1985-07-06 | 1985-08-14 | W & G Instr Ltd | High frequency switched attenuator |
DE59009594D1 (de) * | 1990-06-28 | 1995-10-05 | Siemens Ag | Pulsleistungsverstärker. |
JPH04129309A (ja) * | 1990-09-19 | 1992-04-30 | Matsushita Electric Ind Co Ltd | 増幅回路 |
JPH07115331A (ja) * | 1993-10-19 | 1995-05-02 | Mitsubishi Electric Corp | 増幅装置 |
JPH09148852A (ja) * | 1995-11-24 | 1997-06-06 | Matsushita Electric Ind Co Ltd | 送信出力可変装置 |
JPH09232815A (ja) * | 1996-02-23 | 1997-09-05 | Kokusai Electric Co Ltd | 高周波用可変減衰器 |
US5973557A (en) * | 1996-10-18 | 1999-10-26 | Matsushita Electric Industrial Co., Ltd. | High efficiency linear power amplifier of plural frequency bands and high efficiency power amplifier |
JP2000078035A (ja) * | 1998-09-01 | 2000-03-14 | Matsushita Electric Ind Co Ltd | 送信回路及び方法 |
-
1999
- 1999-09-22 WO PCT/US1999/021757 patent/WO2000018004A1/fr active Application Filing
- 1999-09-22 EP EP99948347A patent/EP1116325A1/fr not_active Ceased
- 1999-09-22 CA CA002345089A patent/CA2345089A1/fr not_active Abandoned
- 1999-09-22 WO PCT/US1999/021758 patent/WO2000018005A1/fr active IP Right Grant
- 1999-09-22 JP JP2000571558A patent/JP2002525951A/ja active Pending
- 1999-09-22 AU AU61549/99A patent/AU772636B2/en not_active Ceased
- 1999-09-22 CN CN99813495.3A patent/CN1326614A/zh active Pending
- 1999-09-22 AU AU61548/99A patent/AU6154899A/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US4010426A (en) * | 1975-11-12 | 1977-03-01 | The United States Of America As Represented By The Secretary Of The Air Force | Rf power amplifier parallel redundant system |
US5093667A (en) * | 1989-10-16 | 1992-03-03 | Itt Corporation | T/R module with error correction |
WO1997024800A1 (fr) * | 1995-12-27 | 1997-07-10 | Qualcomm Incorporated | Amplificateur de puissance, ayant un bon rendement, a etages en parallele |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003038995A1 (fr) * | 2001-10-31 | 2003-05-08 | Qualcomm Incorporated | Amplificateur de puissance symetrique a structure en derivation |
US6806768B2 (en) | 2001-10-31 | 2004-10-19 | Qualcomm Incorporated | Balanced power amplifier with a bypass structure |
KR100993568B1 (ko) | 2001-10-31 | 2010-11-11 | 콸콤 인코포레이티드 | 바이패스 구조를 갖는 균형 전력 증폭기 |
WO2015119668A1 (fr) * | 2014-02-04 | 2015-08-13 | Texas Instruments Incorporated | Émetteur et procédé d'émission |
US9281976B2 (en) | 2014-02-04 | 2016-03-08 | Texas Instruments Incorporated | Transmitter and method of transmitting |
US9602325B2 (en) | 2014-02-04 | 2017-03-21 | Texas Instruments Incorporated | Transmitter and method of transmitting |
CN104485894A (zh) * | 2014-11-12 | 2015-04-01 | 广州中大微电子有限公司 | 一种用于运算放大器共模电平偏移的处理电路及其方法 |
Also Published As
Publication number | Publication date |
---|---|
AU6154999A (en) | 2000-04-10 |
CA2345089A1 (fr) | 2000-03-30 |
AU772636B2 (en) | 2004-05-06 |
AU6154899A (en) | 2000-04-10 |
CN1326614A (zh) | 2001-12-12 |
JP2002525951A (ja) | 2002-08-13 |
WO2000018005A1 (fr) | 2000-03-30 |
EP1116325A1 (fr) | 2001-07-18 |
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