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WO1999031734A1 - High-threshold soi thin film transistor - Google Patents

High-threshold soi thin film transistor Download PDF

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Publication number
WO1999031734A1
WO1999031734A1 PCT/DE1998/003468 DE9803468W WO9931734A1 WO 1999031734 A1 WO1999031734 A1 WO 1999031734A1 DE 9803468 W DE9803468 W DE 9803468W WO 9931734 A1 WO9931734 A1 WO 9931734A1
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WO
WIPO (PCT)
Prior art keywords
thin film
film transistor
gate electrode
layer
semiconductor thin
Prior art date
Application number
PCT/DE1998/003468
Other languages
German (de)
French (fr)
Inventor
Jenö Tihanyi
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Priority to EP98966495A priority Critical patent/EP0968534A1/en
Priority to JP53187599A priority patent/JP2001511955A/en
Publication of WO1999031734A1 publication Critical patent/WO1999031734A1/en
Priority to US09/375,065 priority patent/US6166418A/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/404—Multiple field plate structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical

Definitions

  • the present invention relates to a high-voltage SOI thin film transistor having a semiconductor thin film of the one conductivity type, which is embedded in an insulator layer arranged on a semiconductor body, and having a drain zone and a source zone, both of which are formed in the semiconductor thin film and have the second conductivity type opposite to the one conductivity type, and a gate electrode provided in or on the insulator layer.
  • High-voltage components that are suitable for high-frequency network applications in the order of several hundred kilohertz, for example in lamp ballasts, preferably use a dielectric insulation technology with thin insulating layers.
  • an MIS field effect transistor arrangement for high source-drain voltages above 100 volts is already described in DE 27 06 623 C2, in which the distance between a gate electrode and a channel region increases continuously or step-wise in the direction of the drain zone.
  • the insulator layer made of silicon dioxide provided under the gate electrode is designed in such a way that it becomes thicker with increasing distance from the source electrode to the drain electrode.
  • an insulating layer field effect transistor with a drift path between the gate electrode and drain zone is known, in which the drift path starting from the gate electrode towards the drain zone contains an increasing number of dopant atoms, so that their doping concentration differs from the gate electrode raised towards the drain zone.
  • This field effect transistor can thus be used at higher operating voltages without the need for auxiliary electrodes and auxiliary voltage sources.
  • EP 0 497 427 B1 discloses a semiconductor arrangement for high-voltage use, in which the drift path is designed as a thin silicon layer embedded in an insulator layer consisting of silicon dioxide, which has a linearly increasing doping concentration starting from the gate electrode in the direction of the drain zone.
  • the doping concentration of a drift path configured as a semiconductor thin layer can be substantially higher than the doping concentration of approximately 10 12 cm 2 corresponding to a "breakthrough charge " .
  • Suitable values for the doping concentration of the drift path are thus in the range from 5 ⁇ 10 12 to 2 ⁇ 10 13 cm “2 .
  • this object is achieved according to the invention by at least one field plate which is arranged between the gate electrode and drain zone and whose distance from the semiconductor thin layer is greater with increasing distance from the gate electrode, and highly doped zones of the second conductivity type in the semiconductor thin film, which are connected to the at least one field plate.
  • the semiconductor thin layer preferably has one
  • the one conductivity type is preferably the n type, so that the
  • Drift path is homogeneously n-doped, while the source zone and the drain zone contain p-doping.
  • the distance between the individual field plates from the semiconductor thin film increases with increasing distance from the gate electrode, so that the ends of the individual field plates remote from the gate electrode on the route from the gate electrode to the drain zone with increasing distance from the gate electrode are always further away from the semiconductor thin film.
  • a thin silicon layer as a semiconductor thin layer is embedded in an insulator layer on a silicon substrate serving as a semiconductor body.
  • the doping concentration of the drift path in the silicon layer is substantially uniform and has a value of 10 1 atoms / cm "2 to 5 x 10 13 atoms / cm " 2 .
  • a suitable layer thickness of the silicon layer is 0.1 to 1 ⁇ m.
  • the field plates can be inclined continuously or in steps.
  • the voltage of the individual field plates first increases with the voltage applied to the drain electrode.
  • the space charge zone extends from the source electrode into the n-type silicon layer, for example, which forms the semiconductor thin layer. As soon as this space charge zone reaches the first highly doped zone of the second conductivity type, that is to say a p + -doped zone, the voltage remains on the field plate assigned to this highly doped zone.
  • the space charge zone extends further from the area below the first field plate in the silicon layer in the direction of the drain zone.
  • the highly doped zone assigned to the second field plate is then reached, the voltage of the second field plate then also remaining at this value.
  • the arrangement of the several "slanted" field plates ensures that the high-voltage SOI thin-film transistor can operate at high operating voltages without requiring excessively thick oxide layers for the insulator layer. Instead, insulator layers made of silicon dioxide with a layer thickness of a few ⁇ m can be used.
  • the insulating layer field effect transistor known from DE 28 52 621 C3 already mentioned can, for example, achieve a dielectric strength of approximately 1000 volts for the gate insulator layer with a layer thickness of approximately 10 ⁇ m. Such a thickness of the gate insulator layer is difficult to produce. In contrast, with the high-voltage SOI thin film transistor according to the invention, dielectric strengths on the order of 1000 volts can already be generated with a layer thickness of approximately 3 ⁇ m for the insulator layer.
  • the field plates themselves can be composed of n + -doped polycrystalline silicon or metal, such as aluminum, or also of electrically interconnected parts of different types of materials.
  • FIG. 1 shows a section through an embodiment of the high-voltage SOI thin film transistor according to the invention.
  • FIG. 2 shows a plan view of the high-voltage SOI thin-film transistor from FIG. 1, with an insulator layer for Clarification of the arrangement of the gate electrodes is omitted.
  • a silicon dioxide layer 2 is provided on a silicon substrate 1, in which a single-crystalline silicon layer 3 is embedded.
  • the silicon layer 3 contains a p-type source zone 4, a p-type drain zone 5, an n-type region 6 and p + -type zones 7.
  • the p + -type zones 7 are each with a field plate 8 or 9 or 10, which are "inclined", so that these field plates 8, 9, 10 have an increasing distance from the silicon layer 3 with increasing distance from a gate electrode 11 provided above the source zone 4. With increasing distance from the gate electrode 11, the field plates 8, 9, 10 become wider with increasing inclination or longer in the direction of the source-drain path, so that their end opposite to the gate electrode 11 is spaced ever further from the silicon layer 3 are.
  • the source zone 4 is connected to a source electrode S, which is usually grounded, while the drain zone 5 is connected to a drain electrode D, to which a positive voltage + U D is present.
  • the layer thickness of the silicon layer 3 is between 0.1 and 1 ⁇ m.
  • the doping concentration of the silicon layer 3 is approximately 10 12 atoms / cm “2 to 5 x 10 13 atoms / cm " 2 .
  • the field plates 8, 9, 10, which are each connected to the p + -conducting zones 7, have O 99/31734
  • the voltage at the field plates 9, 10 first increases with the drain voltage. As soon as the space charge zone which spreads from the source zone 4 with increasing drain voltage reaches the highly doped p + -conducting zone 7 connected to the field plate 9, the voltage of the field plate 9 remains at the current value. Then spreads the
  • the field plates 8, 9, 10 can consist of polycrystalline, conductive silicon or metal, such as aluminum, or can also be composed of parts of different types of materials that are electrically connected.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)

Abstract

The invention relates to a high-threshold thin film transistor with a semiconductor thin film (3) of one conductivity type which is embedded in an insulator layer (2) located on a semiconductor body (1). The semiconductor film (3) contains a drain region (5) and a source region (4) which are both of a second conductivity type, this being the opposite type to the first. A gate electrode (11) is also provided in the insulator layer (2). Magnetoresistors (8; 9, 10) are arranged diagonally in the insulator layer (2) between the gate electrode (11) and the drain region (5) so that the distance of said magnetoresistors from the semiconductor thin film (3) becomes greater as they extend further away from the gate electrode (11). Highly-doped regions (7) of the second conductivity type are allocated to the magnetoresistors (8; 9, 10) in the semiconductor thin film (3) so that whilst the space charge region propagates from the source region, the voltage remains with each of the magnetoresistors (8; 9, 10).

Description

Beschreibungdescription
Hochvolt-SOI-DünnfilmtransistorHigh-voltage SOI thin film transistor
Die vorliegende Erfindung betrifft einen Hochvolt-SOI -Dünnfilmtransistor mit einer Halbleiter-Dünnschicht des einen Leitfähigkeitstyps, die in eine auf einem Halbleiterkörper angeordnete Isolatorschicht eingebettet ist, und mit einer Drainzone sowie einer Sourcezone, die beide in der Halblei - ter-Dünnschicht ausgebildet sind und den zum einen Leitfähigkeitstyp entgegengesetzten zweiten Leitfähigkeitstyp aufweisen, und einer in oder auf der Isolatorschicht vorgesehenen Gateelektrode .The present invention relates to a high-voltage SOI thin film transistor having a semiconductor thin film of the one conductivity type, which is embedded in an insulator layer arranged on a semiconductor body, and having a drain zone and a source zone, both of which are formed in the semiconductor thin film and have the second conductivity type opposite to the one conductivity type, and a gate electrode provided in or on the insulator layer.
Hochvolt-Bauelemente die für hochfrequente Netzanwendungen in der Größenordnung von mehreren hundert Kilohertz beispielsweise in Lampenvorschaltgeräten geeignet sind, setzen bevorzugt eine dielektrische Isolationstechnik mit dünnen Isolierschichten ein.High-voltage components that are suitable for high-frequency network applications in the order of several hundred kilohertz, for example in lamp ballasts, preferably use a dielectric insulation technology with thin insulating layers.
So ist beispielsweise schon in der DE 27 06 623 C2 eine MIS- Feldeffekttransistoranordnung für hohe Source-Drain-Spannungen über 100 Volt beschrieben, bei der der Abstand zwischen einer Gateelektrode und einem Kanalgebiet kontinuierlich oder stufenförmig in Richtung auf die Drainzone zunimmt. Hierzu ist bei dieser bekannten MIS-Feldeffekttransistoranordnung die unter der Gateelektrode vorgesehene Isolatorschicht aus Siliziumdioxid so gestaltet, daß diese mit zunehmendem Abstand von der Sourceelektrode auf die Drainelektrode hin dik- ker wird. Weiterhin ist aus der DE 28 52 621 C3 ein Isolierschicht- Feldeffekttransistor mit einer Driftstrecke zwischen Gateelektrode und Drainzone bekannt, bei dem die Driftstrecke ausgehend von der Gateelektrode in Richtung zur Drainzone hin eine zunehmende Anzahl von Dotierstoffatomen enthält, so daß sich ihre Dotierungskonzentration von der Gateelektrode zur Drainzone hin erhöht. Damit ist dieser Feldeffekttransistor bei höheren Betriebsspannungen einsetzbar, ohne daß Hilfselektroden und Hilfsspannungsquellen erforderlich sind.For example, an MIS field effect transistor arrangement for high source-drain voltages above 100 volts is already described in DE 27 06 623 C2, in which the distance between a gate electrode and a channel region increases continuously or step-wise in the direction of the drain zone. For this purpose, in this known MIS field effect transistor arrangement, the insulator layer made of silicon dioxide provided under the gate electrode is designed in such a way that it becomes thicker with increasing distance from the source electrode to the drain electrode. Furthermore, from DE 28 52 621 C3 an insulating layer field effect transistor with a drift path between the gate electrode and drain zone is known, in which the drift path starting from the gate electrode towards the drain zone contains an increasing number of dopant atoms, so that their doping concentration differs from the gate electrode raised towards the drain zone. This field effect transistor can thus be used at higher operating voltages without the need for auxiliary electrodes and auxiliary voltage sources.
Schließlich ist noch aus der EP 0 497 427 Bl eine Halbleiteranordnung für Hochspannungsverwendung bekannt, bei der die Driftstrecke als dünne, in eine aus Siliziumdioxid bestehende Isolatorschicht eingebettete Siliziumschicht ausgebildet ist, welche ausgehend von der Gateelektrode in Richtung auf die Drainzone eine linear ansteigende Dotierungskonzentration aufweist .Finally, EP 0 497 427 B1 discloses a semiconductor arrangement for high-voltage use, in which the drift path is designed as a thin silicon layer embedded in an insulator layer consisting of silicon dioxide, which has a linearly increasing doping concentration starting from the gate electrode in the direction of the drain zone.
Die Dotierungskonzentration einer als Halbleiter-Dünnschicht ausgebildeten Driftstrecke kann wesentlich höher als die einer "Durchbruchsladung" entsprechende Dotierungskonzentration von etwa 1012 cm"2 sein. Geeignete Werte für die Dotierungskonzentration der Driftstrecke liegen so im Bereich von 5 x 1012 bis 2 x 1013 cm"2.The doping concentration of a drift path configured as a semiconductor thin layer can be substantially higher than the doping concentration of approximately 10 12 cm 2 corresponding to a "breakthrough charge " . Suitable values for the doping concentration of the drift path are thus in the range from 5 × 10 12 to 2 × 10 13 cm "2 .
Es ist Aufgabe der vorliegenden Erfindung, einen Hochvolt- SOI-Dünnfilmtransistor zu schaffen, der einfach herstellbar ist und sich für hochfrequente Anwendungen bis in den Bereich von einigen hundert Kilohertz eignet. Diese Aufgabe wird bei einem Hochvolt-SOI-Dünnfilmtransistor der eingangs genannten Art erfindungsgemäß gelöst durch mindestens eine Feldplatte, die zwischen Gateelektrode und Drainzone angeordnet ist und deren Abstand von der Halblei - ter-Dünnschicht mit steigender Entfernung von der Gateelektrode größer ist, und hochdotierte Zonen des zweiten Leitfähigkeitstyps in der Halbleiter-Dünnschicht, die mit der wenigstens einen Feldplatte verbunden sind.It is an object of the present invention to provide a high-voltage SOI thin film transistor that is easy to manufacture and is suitable for high-frequency applications in the range of a few hundred kilohertz. In a high-voltage SOI thin-film transistor of the type mentioned at the outset, this object is achieved according to the invention by at least one field plate which is arranged between the gate electrode and drain zone and whose distance from the semiconductor thin layer is greater with increasing distance from the gate electrode, and highly doped zones of the second conductivity type in the semiconductor thin film, which are connected to the at least one field plate.
In bevorzugter Weise hat die Halbleiter-Dünnschicht eineThe semiconductor thin layer preferably has one
Schichtdicke von 0,1 bis 1 μm und ist homogen mit 102 bis 5 • 1013 Atomen/cm dotiert. Der Abstand zwischen der mindestens einen Feldplatte und der Halbleiter-Dünnschicht kann kontinuierlich oder stufenartig anwachsen. Der eine Leitfähig- keitstyp ist in bevorzugter Weise der n-Typ, so daß dieLayer thickness of 0.1 to 1 μm and is homogeneously doped with 10 2 to 5 • 10 13 atoms / cm. The distance between the at least one field plate and the semiconductor thin layer can increase continuously or in steps. The one conductivity type is preferably the n type, so that the
Driftstrecke homogen n-dotiert ist, während die Sourcezone und die Drainzone eine p-Dotierung enthalten.Drift path is homogeneously n-doped, while the source zone and the drain zone contain p-doping.
Bei mehreren Feldplatten wird der Abstand der einzelnen Feld- platten von der Halbleiter-Dünnschicht mit zunehmender Entfernung von der Gateelektrode immer größer, so daß die von der Gateelektrode entfernten Enden der einzelnen Feldplatten auf der Strecke von der Gateelektrode zur Drainzone mit zunehmender Entfernung von der Gateelektrode immer weiter von der Halbleiter-Dünnschicht entfernt sind.In the case of a plurality of field plates, the distance between the individual field plates from the semiconductor thin film increases with increasing distance from the gate electrode, so that the ends of the individual field plates remote from the gate electrode on the route from the gate electrode to the drain zone with increasing distance from the gate electrode are always further away from the semiconductor thin film.
Bei dem erfindungsgemäßen Hochvolt-SOI-Dünnfilmtransistor ist also auf einem als Halbleiterkörper dienenden Siliziumsubstrat eine dünne Siliziumschicht als Halbleiter-Dünnschicht inselartig in eine Isolatorschicht eingebettet. Die Dotierungskonzentration der Driftstrecke in der Siliziumschicht ist im wesentlichen gleichmäßig und weist einen Wert von 101 Atomen/cm"2 bis 5 x 1013 Atomen/cm"2 auf. Eine zweckmäßige Schichtdicke der Siliziumschicht liegt bei 0,1 bis 1 μm.In the high-voltage SOI thin film transistor according to the invention, a thin silicon layer as a semiconductor thin layer is embedded in an insulator layer on a silicon substrate serving as a semiconductor body. The doping concentration of the drift path in the silicon layer is substantially uniform and has a value of 10 1 atoms / cm "2 to 5 x 10 13 atoms / cm " 2 . A suitable layer thickness of the silicon layer is 0.1 to 1 μm.
Zwischen der Gateelektrode und der Drainzone sind im Abstand von der Siliziumschicht oberhalb von dieser Feldplatten angeordnet , die in Richtung von der Gateelektrode zur Drainzone einen stetig steigenden Abstand von der Siliziumschicht haben. Die Steigung der Feldplatten kann dabei kontinuierlich oder stufenartig erfolgen.Between the gate electrode and the drain zone are arranged at a distance from the silicon layer above this field plates, which have a continuously increasing distance from the silicon layer in the direction from the gate electrode to the drain zone. The field plates can be inclined continuously or in steps.
Wird bei dem erfindungsgemäßen Hochvolt-SOI-Dünnfilmtransi- stor die Sourceelektrode an Masse gelegt und eine positive Spannung an die Drainelektrode angelegt, so steigt die Span- nung der einzelnen Feldplatten zuerst mit der an der Drainelektrode liegenden Spannung an. Dabei dehnt sich die Raumladungszone von der Sourceelektrode in die beispielsweise n- leitende Siliziumschicht, die die Halbleiter-Dünnschicht bildet, aus. Sobald nun diese Raumladungszone die erste hochdo- tierte Zone des zweiten Leitfähigkeitstyps, also eine p+- dotierte Zone erreicht, bleibt die Spannung auf der dieser hochdotierten Zone zugeordneten Feldplatte stehen.If the source electrode in the high-voltage SOI thin-film transistor according to the invention is connected to ground and a positive voltage is applied to the drain electrode, the voltage of the individual field plates first increases with the voltage applied to the drain electrode. The space charge zone extends from the source electrode into the n-type silicon layer, for example, which forms the semiconductor thin layer. As soon as this space charge zone reaches the first highly doped zone of the second conductivity type, that is to say a p + -doped zone, the voltage remains on the field plate assigned to this highly doped zone.
Wird nun die Spannung an der Drainelektrode weiter erhöht, dann dehnt sich die Raumladungszone von dem Bereich unterhalb der ersten Feldplatte weiter in der Siliziumschicht in Richtung auf die Drainzone aus. Bei entsprechend hoher Spannung wird sodann die der zweiten Feldplatte zugeordnete hochdotierte Zone erreicht, wobei die Spannung der zweiten Feld- platte sodann ebenfalls bei diesem Wert stehenbleibt. Durch die Anordnung der mehreren "schräg" gestellten Feldplatten wird erreicht, daß der Hochvolt-SOI-Dünnfilmtransi- stor mit hohen Betriebsspannungen arbeiten kann, ohne übermäßig dicke Oxidschichten für die Isolatorschicht zu erfordern. Vielmehr können Isolatorschichten aus Siliziumdioxid mit einer Schichtdicke von einigen um eingesetzt werden.If the voltage at the drain electrode is now increased further, the space charge zone extends further from the area below the first field plate in the silicon layer in the direction of the drain zone. With a correspondingly high voltage, the highly doped zone assigned to the second field plate is then reached, the voltage of the second field plate then also remaining at this value. The arrangement of the several "slanted" field plates ensures that the high-voltage SOI thin-film transistor can operate at high operating voltages without requiring excessively thick oxide layers for the insulator layer. Instead, insulator layers made of silicon dioxide with a layer thickness of a few μm can be used.
Der aus der bereits erwähnten DE 28 52 621 C3 bekannte Isolierschicht-Feldeffekttransistor kann beispielsweise mit ei- ner Schichtdicke von etwa 10 μm für die Gate-Isolatorschicht eine Spannungsfestigkeit von ca. 1000 Volt erreichen. Eine derartige Dicke der Gate-Isolatorschicht ist aber nur schwierig herstellbar. Dagegen können mit dem erfindungsgemäßen Hochvolt-SOI-Dünnfilmtransistor Spannungsfestigkeiten in der Größenordnung von 1000 Volt bereits mit einer Schichtdicke von etwa 3 μm für die Isolatorschicht erzeugt werden.The insulating layer field effect transistor known from DE 28 52 621 C3 already mentioned can, for example, achieve a dielectric strength of approximately 1000 volts for the gate insulator layer with a layer thickness of approximately 10 μm. Such a thickness of the gate insulator layer is difficult to produce. In contrast, with the high-voltage SOI thin film transistor according to the invention, dielectric strengths on the order of 1000 volts can already be generated with a layer thickness of approximately 3 μm for the insulator layer.
Die Feldplatten selbst können aus n+-dotiertem polykristallinem Silizium oder Metall, wie beispielsweise Aluminium, oder auch aus elektrisch miteinander verbundenen Teilen verschiedener Materialarten zusammengesetzt sein.The field plates themselves can be composed of n + -doped polycrystalline silicon or metal, such as aluminum, or also of electrically interconnected parts of different types of materials.
Nachfolgend wird die Erfindung anhand der Zeichnungen näher erläutert. Es zeigen:The invention is explained in more detail below with reference to the drawings. Show it:
Figur 1 einen Schnitt durch ein Ausführungsbeispiel des erfindungsgemäßen Hochvolt-SOI-Dünnfilmtransistors, und1 shows a section through an embodiment of the high-voltage SOI thin film transistor according to the invention, and
Figur 2 eine Draufsicht auf den Hochvolt-SOI-Dünnfilm- transistor von Fig. 1, wobei eine Isolatorschicht zur Verdeutlichung der Anordnung der Gateelektroden weggelassen ist.FIG. 2 shows a plan view of the high-voltage SOI thin-film transistor from FIG. 1, with an insulator layer for Clarification of the arrangement of the gate electrodes is omitted.
Wie in Fig. 1 gezeigt ist, ist auf einem Siliziumsubstrat 1 eine Siliziumdioxidschicht 2 vorgesehen, in die eine einkristalline Siliziumschicht 3 eingebettet ist. Die Siliziumschicht 3 enthält eine p-leitende Sourcezone 4, eine p-lei- tende Drainzone 5, ein n-leitendes Gebiet 6 und p+-leitende Zonen 7. Die p+-leitenden Zonen 7 sind jeweils mit einer Feldplatte 8 bzw. 9 bzw. 10 verbunden, welche "schräg" gestellt sind, so daß diese Feldplatten 8, 9, 10 mit steigender Entfernung von einer oberhalb der Sourcezone 4 vorgesehenen Gateelektrode 11 einen größerwerdenden Abstand von der Siliziumschicht 3 aufweisen. Mit steigender Entfernung von der Gateelektrode 11 werden dabei die Feldplatten 8, 9, 10 bei ansteigender Neigung breiter bzw. in Richtung der Source- Drain-Strecke länger, so daß sie mit ihrem zu der Gateelektrode 11 entgegengesetzten Ende immer weiter von der Siliziumschicht 3 beabstandet sind.As shown in FIG. 1, a silicon dioxide layer 2 is provided on a silicon substrate 1, in which a single-crystalline silicon layer 3 is embedded. The silicon layer 3 contains a p-type source zone 4, a p-type drain zone 5, an n-type region 6 and p + -type zones 7. The p + -type zones 7 are each with a field plate 8 or 9 or 10, which are "inclined", so that these field plates 8, 9, 10 have an increasing distance from the silicon layer 3 with increasing distance from a gate electrode 11 provided above the source zone 4. With increasing distance from the gate electrode 11, the field plates 8, 9, 10 become wider with increasing inclination or longer in the direction of the source-drain path, so that their end opposite to the gate electrode 11 is spaced ever further from the silicon layer 3 are.
Die Sourcezone 4 ist mit einer Sourceelektrode S verbunden, die gewöhnlich geerdet ist, während die Drainzone 5 an eine Drainelektrode D angeschlossen ist, an der eine positive Spannung +UD anliegt.The source zone 4 is connected to a source electrode S, which is usually grounded, while the drain zone 5 is connected to a drain electrode D, to which a positive voltage + U D is present.
Die Schichtdicke der Siliziumschicht 3 liegt zwischen 0,1 und 1 μm. Die Dotierungskonzentration der Siliziumschicht 3 beträgt etwa 1012 Atome/cm"2 bis 5 x 1013 Atome/cm"2. Wie bereits erwähnt wurde, weisen die Feldplatten 8, 9, 10, die jeweils mit den p+-leitenden Zonen 7 verbunden sind, einen in Rieh- O 99/31734The layer thickness of the silicon layer 3 is between 0.1 and 1 μm. The doping concentration of the silicon layer 3 is approximately 10 12 atoms / cm "2 to 5 x 10 13 atoms / cm " 2 . As already mentioned, the field plates 8, 9, 10, which are each connected to the p + -conducting zones 7, have O 99/31734
7 tung auf die Drainzone 5 stetig oder auch stufenweise steigenden Abstand von der Siliziumschicht 3 auf.7 tion on the drain zone 5 continuously or also gradually increasing distance from the silicon layer 3.
Wird eine ansteigende Spannung an die Drainelektrode D ange- legt, so steigt die Spannung an den Feldplatten 9, 10 zuerst mit der Drainspannung an. Sobald die sich von der Sourcezone 4 mit anwachsender Drainspannung ausbreitende Raumladungszone die mit der Feldplatte 9 verbundene hochdotierte p+-leitende Zone 7 erreicht, bleibt die Spannung der Feldplatte 9 auf dem gerade vorliegenden Wert stehen. Breitet sich sodann dieIf an increasing voltage is applied to the drain electrode D, the voltage at the field plates 9, 10 first increases with the drain voltage. As soon as the space charge zone which spreads from the source zone 4 with increasing drain voltage reaches the highly doped p + -conducting zone 7 connected to the field plate 9, the voltage of the field plate 9 remains at the current value. Then spreads the
Raumladungszone bei noch höherer Spannung an der Drainelektrode D weiter aus, so wird auch die nächste, mit der Feldplatte 10 verbundene p+-leitende Zone 7 erreicht, wobei sodann die Spannung an der Feldplatte 10 ebenfalls stehen- bleibt.Space charge zone at an even higher voltage at the drain electrode D, the next p + -conducting zone 7 connected to the field plate 10 is also reached, in which case the voltage at the field plate 10 also remains.
Mit dieser Mehrfach-Feldplattenanordnung ist es so möglich, eine hohe Betriebsspannung an die Drainelektrode D anzulegen und dennoch die Schichtdicke der Isolatorschicht 2 im Bereich von einigen μm, beispielsweise 3 μm zu halten. Es hat sich nämlich gezeigt, daß Spannungen bis etwa 1000 Volt an die Drainelektrode D gelegt werden können, obwohl die Schichtdik- ke der Isolatorschicht 2 nur ca. 3 μm beträgt.With this multiple field plate arrangement it is possible to apply a high operating voltage to the drain electrode D and still keep the layer thickness of the insulator layer 2 in the range of a few μm, for example 3 μm. It has been shown that voltages of up to approximately 1000 volts can be applied to the drain electrode D, although the layer thickness of the insulator layer 2 is only approximately 3 μm.
Die Feldplatten 8, 9, 10 können aus polykristallinem, ^-leitendem Silizium oder aus Metall, wie beispielsweise Aluminium, bestehen oder aber auch aus elektrisch miteinander verbundenen Teilen verschiedener Materialarten zusammengesetzt sein. The field plates 8, 9, 10 can consist of polycrystalline, conductive silicon or metal, such as aluminum, or can also be composed of parts of different types of materials that are electrically connected.

Claims

Patentansprüche claims
1. Hochvol -SOI-Dünnfilmtransistor mit: einer Halbleiter-Dünnschicht (3) des einen Leitfähig- keitstyps, die in eine auf einem Halbleiterkörper (1) angeordnete Isolatorschicht (2) eingebettet ist, und einer Drainzone (5) sowie einer Sourcezone (4) , die beide in der Halbleiter-Dünnschicht (3) ausgebildet sind und den zum einen Leitfähigkeitstyp entgegengesetzten zweiten Leitfä- higkeitstyp aufweisen, und einer in oder auf der Isolatorschicht (2) vorgesehenen Gateelektrode (11) , g e k e n n z e i c h n e t d u r c h mindestens eine Feldplatte (8; 9, 10), die zwischen Gateelektrode (11) und Drainzone (5) angeordnet ist und deren Abstand von der Halbleiter-Dünnschicht (3) mit steigender Entfernung von der Gateelektrode (11) größer ist, und hochdotierte Zonen (7) des zweiten Leitfähigkeitstyps in der Halbleiter-Dünnschicht (3) , die mit der wenigstens einen Feldplatte (8; 9, 10) verbunden sind.1. High-voltage SOI thin film transistor with: a semiconductor thin layer (3) of the one conductivity type, which is embedded in an insulator layer (2) arranged on a semiconductor body (1), and a drain zone (5) and a source zone (4 ), both of which are formed in the semiconductor thin layer (3) and have the second conductivity type opposite to the one conductivity type, and a gate electrode (11) provided in or on the insulator layer (2), characterized by at least one field plate (8; 9 , 10), which is arranged between the gate electrode (11) and drain zone (5) and whose distance from the semiconductor thin layer (3) is greater with increasing distance from the gate electrode (11), and highly doped zones (7) of the second conductivity type in the semiconductor thin film (3), which are connected to the at least one field plate (8; 9, 10).
2. Hochvolt-SOI-Dünnf ilmtransistor nach Anspruch 1, d a d u r c h g e k e n n z e i c h n e t , daß die Halbleiter-Dünnschicht (3) eine Schichtdicke von 0,1 bis 1,0 μm aufweist und homogen mit 1012 bis 5 x 1013 Ato- men/cm2 dotiert ist.2. High-voltage SOI thin film transistor according to claim 1, characterized in that the semiconductor thin layer (3) has a layer thickness of 0.1 to 1.0 microns and homogeneous with 10 12 to 5 x 10 13 atoms / cm 2 is endowed.
3. Hochvol -SOI -Dünnfilmtransistor nach Anspruch 1 oder 2, d a d u r c h g e k e n n z e i c h n e t , daß der Abstand zwischen der mindestens einen Feldplatte (8; 9, 10) und der Halbleiter-Dünnschicht (3) kontinuierlich oder stufenartig anwächst. 3. high-voltage SOI thin film transistor according to claim 1 or 2, characterized in that the distance between the at least one field plate (8; 9, 10) and the semiconductor thin layer (3) increases continuously or stepwise.
4. Hochvolt-SOI-Dünnfilmtransistor nach einem der Ansprüche 1 bis 3 , d a d u r c h g e k e n n z e i c h n e t , daß der eine Leitfähigkeitstyp der n-Typ ist.4. High-voltage SOI thin film transistor according to one of claims 1 to 3, d a d u r c h g e k e n n z e i c h n e t that the one conductivity type is the n type.
5. Hochvolt-SOI-Dünnfilmtransistor nach einem der Ansprüche 1 bis 4 , d a d u r c h g e k e n n z e i c h n e t , daß bei mehreren Feldplatten (8; 9, 10) der Abstand der einzelnen Feldplatten von der Halbleiter-Dünnschicht (3) mit zunehmender Entfernung von der Gateelektrode (11) größer wird.5. High-voltage SOI thin film transistor according to one of claims 1 to 4, characterized in that with a plurality of field plates (8; 9, 10) the distance of the individual field plates from the semiconductor thin layer (3) with increasing distance from the gate electrode (11) gets bigger.
6. Hochvolt-SOI-Dünnfilmtransistor nach einem der Ansprüche 1 bis 5, d a d u r c h g e k e n n z e i c h n e t , daß die Feldplatten (8; 9, 10) aus hochdotiertem polykristallinem Silizium bestehen. 6. High-voltage SOI thin film transistor according to one of claims 1 to 5, d a d u r c h g e k e n n z e i c h n e t that the field plates (8; 9, 10) consist of highly doped polycrystalline silicon.
PCT/DE1998/003468 1997-12-16 1998-11-25 High-threshold soi thin film transistor WO1999031734A1 (en)

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JP53187599A JP2001511955A (en) 1997-12-16 1998-11-25 High voltage-SOI-thin film transistor
US09/375,065 US6166418A (en) 1997-12-16 1999-08-16 High-voltage SOI thin-film transistor

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DE10339455B3 (en) 2003-08-27 2005-05-04 Infineon Technologies Ag Vertical semiconductor device having a field electrode drift zone and method for making such a drift zone
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DE2852621C4 (en) * 1978-12-05 1995-11-30 Siemens Ag Insulating layer field-effect transistor with a drift path between the gate electrode and drain zone
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WO1996029744A1 (en) * 1995-03-17 1996-09-26 Hitachi, Ltd. Planar semiconductor device, its manufacturing method, and power converter
WO1997022149A1 (en) * 1995-12-13 1997-06-19 Philips Electronics N.V. Lateral thin-film soi devices with linearly-grated field oxide and linear doping profile

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