WO1997035434A1

WO1997035434A1 - Encoder, decoder, their methods, and image processor

Info

Publication number: WO1997035434A1
Application number: PCT/JP1997/000768
Authority: WO
Inventors: Tomohiro Kimura; Ikuro Ueno; Taichi Yanagiya; Masayuki Yoshida; Fumitaka Ono; Narihiro Matoba; Kunio Ueda
Original assignee: Mitsubishi Denki Kabushiki Kaisha
Priority date: 1996-03-19
Filing date: 1997-03-12
Publication date: 1997-09-25
Also published as: CA2221288C; EP0827342B1; EP0827342A4; AU1939597A; AU697471B2; EP0827342A1; JP3228943B2; CA2221288A1

Abstract

The encoding efficiency of an encoder is improved by positively combining a plurality of kinds of encoding methods. A first encoder (5) encodes the signal representing whether a predicted error is 0 or not and a second encoder (6) encodes the predicted error when the error is not 0. A third encoder (8) encodes the predicted error regardless of whether the value of the predicted error is 0 or not. A mode identifying circuit (2) identifies the mode and an encoding control section (11) selectively operates the first, second, or third encoder (5, 6, or 8) in accordance with the identified mode.

Description

Description Encoding device and decoding device, their methods and image processing device

Technical field

The present invention relates to an encoding device and an encoding device for encoding or decoding image information created or used by a facsimile device, a scanner device, a computer or a digital camera, and a method thereof. In particular, the present invention relates to an encoding device and a decoding device that include two types of encoding systems and two types of decoding systems, and that efficiently encode and decode image information by switching between the two types of systems. Further, the present invention relates to an encoding method and a decoding method for efficiently encoding and decoding image information. The present invention also relates to an image processing device including the encoding device or the decoding device according to the present invention. The present invention also relates to an image processing device that executes the encoding method or the decoding method according to the present invention.

Background art

Conventional example 1.

FIG. 66 is a block diagram showing a conventional encoding device.

In FIG. 66, reference numeral 901 designates a pixel to be coded (hereinafter, referred to as a coded pixel or simply a pixel), inputs and accumulates the value, and outputs the value of the coded pixel. This is a pixel memory that stores accumulated and coded pixels and outputs the value of a pixel near the coded pixel as the value of a reference pixel.

Reference numeral 907 denotes a predictor that calculates a predicted value of an encoded pixel by referring to a value of a reference pixel. Reference numeral 931 denotes a prediction error calculator for calculating a prediction error by subtracting the prediction value of the predictor 907 from the value of the coded pixel.

Reference numeral 908 denotes an encoder that encodes a prediction error value between the value of the coded pixel and the prediction value of the predictor 907, and outputs a codeword.

Reference numeral 910 denotes a code buffer which inputs a codeword output from the encoder 908 and outputs the codeword as a series of codes in the input order.

Next, the operation of the conventional encoding device will be described.

The predictor 907 calculates a predicted value from one or more reference pixel values. The calculation method may be a predetermined prediction function or a table reference. The encoder 908 calculates a prediction error obtained by calculating a prediction value calculated from the value of the coded pixel (in the case of an 8-bit pixel, 125 to 155; here, 0 exists. ) Is encoded using one type of codeword table determined in advance.

Conventional example 2.

Further, as another conventional example, a method is known in which the prediction error of a multi-valued coded pixel and a decoded pixel is converted into a binary symbol sequence, coded, and decoded. Here, as one of the encoding and decoding methods of the binary symbol, the encoding and decoding method shown in Japanese Patent Registration No. 1251403 will be described.

In this encoding and decoding method, as shown in FIG. 67, one codeword is assigned to a binary symbol sequence having one or a plurality of binary symbols. In other words, the coding used in this specification means that a certain number of consecutive binary symbols "0" (MPS = More Probable Symbol, dominant symbol) appear (hereinafter, this certain number is referred to as a code order). In this case, or when the binary symbol "1" (LPS = Less Probable Symbol, inferior symbol) appears, the code word is determined and the code word is output. In this case, the number of consecutive MPSs is determined by the number of MPs inside (or outside) the encoder. The counter is counted by a counter (not shown), the MPS value is stored in an MPS memory (not shown), and the state number (described later) of the binary symbol sequence is stored in a state number memory (not shown). You. Code orders, it is possible to take an arbitrary natural number, in this specification, also the to be limited to 2 ⁿ (2 ₁ 1 power). If the number of consecutive occurrences of the MPS becomes equal to the code order 2 ", a 1-bit codeword" 0 "is assigned to the MPS. If the LPS appears before the order equals, the number of consecutive occurrences of the MPS from the output of the codeword immediately before it to the appearance of the LPS is represented by an n-bit binary number. A (n + 1) -bit codeword is added to the PS by adding a 1-bit "1" to distinguish it from the MPS-only codeword "0" at the beginning of the binary. The unit of a binary symbol sequence to which a code word is assigned is hereinafter referred to as a message.When a code word is determined and a code word is output, the MPS counter is reset. The code output is a series of sequences, while the code is decoded. In this case, the code input to the decoder is decomposed into codewords, a binary symbol sequence is restored for each decoder, and pixels are reproduced.

In the encoding and decoding methods described above, the code order is determined according to the appearance probability of one of the binary symbols (0 or 1) estimated from data on the binary symbol sequence in the past. By switching to an appropriate value, even better coding efficiency can be realized.

A first example of the state transition method for determining the code order is shown below.

When the encoder or decoder encodes or decodes a binary symbol sequence, the binary symbol sequence is in one of the 16 states shown in Fig. 68, and each binary symbol sequence is The code order is determined according to the state of the column. The initial value of the state number in the encoder or decoder is 0. Also, At the start of the encoding or decoding process, each encoder or decoder

The MPS counter shall be reset. The encoder or decoder performs a state transition when the codeword is determined during the encoding or decoding process. If the number of consecutive occurrences of the MPS in the binary symbol sequence is not equal to the code order, the state number is increased by one. If LPS appears before the number of consecutive occurrences of MPS becomes equal to the code order, the state number is decreased by one. However, if the number of consecutive occurrences of the MPS becomes equal to the code order in state number 15 or the LPS appears in the state number 0, the encoder or decoder does not change the state. The state number is left as it is.

As a second example of a method for determining the code order, the number N (0), N (1) of binary symbols 0 and 1 appearing in a binary symbol sequence is in the same range on the transmitting and receiving sides (for example, one line) This shows the method of counting with, and calculating the code order based on the counting result. The method of determining the code order is disclosed in, for example, Japanese Patent Publication No. 59-27501 (corresponding to US Pat. No. 4,191,974). The calculation method is 2 ^{Π + 1} Ν (1)> Ν (0) ≥ 2 ^η Ν

It is represented by (1). However, in this case, the code order 2 ^{η, which} is the state transition destination of the binary symbol sequence, is set to be equal to or less than the default maximum value and equal to or greater than the default minimum value. The following properties are known for the encoding method in Fig. 67. That is, assume that a binary information source in which the appearance probabilities of the two symbols “0” and “1” are ρ and 1 一 (ρ≥1 / 2), respectively, is encoded by the method shown in FIG. 67. Η, which minimizes the maximum code length in each order when the appearance of the binary symbol to be encoded is arbitrary, satisfies the following equation.

{2 ^η / (2 ^η + 1)} ≤ ρ <{2 ^{η +1} / (2 ^{η + 1} + 1)} Therefore, if η is determined from the above equation, an almost optimal code format can be selected. Here, assuming that the count value of the binary symbol, that is, the count value of the binary symbol "0" is Ν (0), and the count value of the binary symbol "1" is Ν (1), p = N (0) / {N (0) + N (1)}

Therefore, from the above equation,

2 ⁿ N (1) ≤ N (0) <2 ^{n +1} N (1)

Becomes

Conventional example 3.

In addition, the conventional encoding apparatus and decoding apparatus perform, for example, switching between two encoding modes, that is, mode A and mode B, or a decoding mode based on a predetermined condition determination for the value of the reference pixel. There are devices that perform encoding, or decoding. Basically, encoding or decoding is performed in mode A if the value of the reference pixel satisfies a predetermined condition, and in mode B if the value does not satisfy the predetermined condition. As described above, the mode switching is performed in accordance with the method shown as “Run-length coding for each start pattern” in the IEICE General Conference, 2010, 1982. As shown in FIG. 69, assuming that X is a coded pixel to be coded or decoded or a decoded pixel (hereinafter simply referred to as a pixel), the values of reference pixels a, b, and c in the vicinity thereof If satisfies the predetermined condition "a = b = c", the pixel X is continuously encoded or decoded by the mode A until the pixel X that becomes "X ≠ prediction value" appears, and the next "X Switch from pixel X, which is the “prediction value”, to mode B for encoding. Then, pixel X is coded or decoded continuously in mode B. When the values of reference pixels a, b, and c satisfy the predetermined condition “a = b = c” again, the next pixel is Switch to mode A and perform encoding or decoding.

Conventional example 4.

Next, encoding and decoding processing of an image by a conventional imaging apparatus will be described with reference to the drawings. The encoding process is performed by the image compression circuit, and the decoding process is performed by the image decompression circuit. FIG. 70 is a diagram showing the configuration of the image compression circuit and the image decompression circuit. In FIG. 70, the image compression circuit includes a system that performs lossless compression and a system that performs irreversible compression.

Irreversible image compression is a process that reduces the quality (reproducibility) of the reproduced image and increases the image compression ratio instead.

In addition, reversible image compression is a process in which the image compression ratio is compared with the above-mentioned irreversible image compression, and instead, the quality (reproducibility) of the reproduced image is not degraded.

Reference numeral 951 denotes a DCT operation circuit that performs a two-dimensional discrete cosine transform (DCT) operation on an input image to divide the image into two-dimensional spatial frequency components. Reference numeral 952 denotes a quantization circuit for quantizing DCT coefficients, and reference numeral 953 denotes an end-port encoder for Huffman coding the quantized DCT coefficients. Irreversible image compression is performed by the DCT operation circuit 951, the quantization circuit 952, and the central aperture encoder 953. Reference numeral 954 denotes a predictor, which predicts data of a certain pixel by using data one pixel before. Reference numeral 955 denotes an entropy encoder, which performs Huffman coding on a difference between a pixel and a pixel predicted by a predictor 954. Thus, reversible data compression is performed by the predictor 954 and the entropy encoder 955. SW 1 is a switch for selecting whether to perform irreversible compression operation, which performs a lossless compression operation.A lossy compression operation is selected on the a side, and a lossy compression operation is selected on the b side. You. The image decompression circuit is composed of a system that performs a reversible decompression operation and a system that performs an irreversible decompression operation. E down Tropi chromatography decoder ⁹ 56 and the decoder 9 5 7 reversibly E compressed data down tropicity over encoder 9 55, decrypted with the predictor ⁹ 54 and reverse operation. Also, the entropy decoder 958 and the inverse quantization circuit 959, and the inverse DCT operation circuit 960 are the DCT operation circuit 951, Quantizing circuit 9 5 2, decodes the compressed data in E down tropicity over the encoder ⁹ 5 3 and reverse operation. SW 2 is a switch for selecting whether to perform a reversible or irreversible decompression operation.A reversible decompression operation is selected on the a side, and an irreversible decompression operation on the b side. Is selected.

The encoding device shown as Conventional Example 1 encodes a prediction error using one type of codeword table determined in advance. In general, the statistical properties of image information vary greatly within the screen.In other words, when a certain part of the screen is easy to predict, but in some part a large prediction error frequently occurs, a situation may occur. Are known. However, in the encoding device of Conventional Example 1, encoding efficiency is not improved because encoding is performed using one type of codeword table despite the fact that the statistical properties of image information fluctuate within a screen. There was a problem.

On the other hand, the coding method shown as Conventional Example 2 is a method in which the code order is dynamically changed according to the appearance probability of MPS, and coding is performed by switching a plurality of codeword tables. Therefore, when the statistical properties of the image information within the screen fluctuate greatly, the encoding method improves the encoding efficiency as compared with the encoding apparatus described in the first conventional example. However, even in the method according to the conventional example 2, if at least one codeword is assigned to the prediction error for each coded pixel, the prediction may be correct (prediction error = 0). Therefore, each pixel requires a code amount of at least 1 bit. Despite the prediction accuracy being more than 1/2, assigning a codeword of one bit or more to the prediction error is the theoretical lower limit of the code amount of the prediction error (entp). This means that the code amount actually required is larger than that of, that is, the coding efficiency is reduced.

In addition, the image compression circuit (encoding device) and image decompression circuit (decoding device) of Conventional Example 4 have a configuration as shown in FIG. The irreversible image compression and image expansion are realized by the conversion circuit and the entropy encoder. In addition, reversible image compression and image decompression are realized by a predictor and entropy encoder. As described above, in the current imaging device, the two types, the reversible image compression circuit and the irreversible image compression circuit, are used according to the situation. In imaging devices, it is most required that the quality (reproducibility) of reproduced images be kept high without increasing the image compression ratio. In particular, in digital cameras, the above-mentioned demands have been increased today for storing captured signals in a storage medium or displaying them on a monitor. In addition, an increase in the number of pixels of an input image, colorization of the input image, and multi-gradation of the input image have led to an increase in the capacity of input information. There is a problem that the compression ratio of the image of the device is insufficient.

Also, in today's multimedia market, image information is transmitted, displayed, and stored along with other audio and text information, but the proportion of image information is higher than other information, further increasing the image compression rate. The present invention has been made to solve the above-described problems, and has an object to provide an encoding device and a decoding device that efficiently encode and decode image information. And

Further, the present invention provides an encoding method and an encoding method for efficiently encoding and decoding image information by actively switching between different types of encoding methods and different types of decoding methods to perform encoding and decoding. The purpose is to provide a decryption method.

Further, the present invention can make the apparatus compact and simple even when encoding and decoding are efficiently performed by actively switching between different types of encoding methods and different types of decoding methods. Encoding device and decoding device The purpose is to provide.

Another object of the present invention is to provide an image processing device including the encoding device and the decoding device.

Another object of the present invention is to provide an image processing device that executes the encoding method and the decoding method.

An object of the present invention is to provide an image processing apparatus that can obtain a higher compression ratio than conventional reversible image compression even when performing reversible image compression. Disclosure of the invention

An encoding device according to the present invention inputs and accumulates a pixel having any value within a predetermined range as an encoded pixel, outputs a value of the encoded pixel to be encoded, and outputs a value in the vicinity of the encoded pixel. A pixel memory for outputting the encoded pixel value as a reference pixel value;

Mode determination for selecting one of a specific coding mode and other coding modes for a coded pixel based on the value of a reference pixel from a plurality of predefined coding modes Vessels,

A first encoding unit that predicts the value of the coded pixel, determines whether the prediction is correct or not, encodes the value of the coded pixel based on the determination result, and outputs a codeword; A second encoding unit that predicts and encodes the value of an encoding pixel and outputs a codeword without determining whether the prediction is correct or not,

An encoding control unit for selectively operating the first and second encoding units based on one of the specific encoding mode selected by the mode determiner and the other encoding mode When

It is characterized by having.

The first encoding unit predicts an encoded pixel based on a value taken by a reference pixel. An l-th predictor for calculating a value,

A first prediction error calculator that calculates an error between the value of the encoded pixel and the prediction value calculated by the first predictor as a prediction error;

A determining unit that determines whether the prediction error calculated by the first prediction error calculator is a specific value, and outputs a determination result;

A first encoder that inputs the determination result output from the determiner, encodes the encoded pixel to be encoded in the selected specific encoding mode, and outputs a codeword;

For a coded pixel to be coded in the selected specific coding mode, wherein the prediction error calculated by the first prediction error calculator is not the specific value, A second encoder that encodes the prediction error and outputs the corresponding codeword

It is characterized by having.

A second predictor configured to calculate a predicted value of the coded pixel based on a value taken by the reference pixel;

A second prediction error calculator that calculates an error between the value of the encoded pixel and the prediction value calculated by the second predictor as a prediction error;

For a coded pixel to be coded in a mode other than the selected specific coding mode, the prediction is performed regardless of whether the prediction error calculated by the second prediction error calculator is the specific value or not. A third encoder that encodes the error and outputs the corresponding codeword

It is characterized by having.

The first encoder is a first probability estimator that inputs the determination result output from the determiner as a binary symbol sequence and estimates the appearance probability of one of the binary symbols among the binary symbols. And a first codeword allocator that encodes a sequence of binary symbols, The second encoder is a first error / symbol converter that inputs a prediction error and converts the prediction error into a binary symbol sequence, or one of a binary symbol and a binary symbol sequence A second probability estimator for estimating the probability of appearance of the binary symbols of the following, and a second codeword allocator for encoding the binary symbol sequence,

The third encoder inputs a prediction error and converts the prediction error into a binary symbol sequence. And a third probability estimator for estimating the probability of appearance of the binary symbol and a third codeword allocator for encoding the binary symbol sequence.

The encoding control unit determines a codeword by at least one of the first encoder, the second encoder, and the third encoder, and determines a codeword by the remaining encoders. A codeword transmission order controller that changes the output order of codewords when is not determined.

In the encoding device according to the present invention, at least one of the first error / nosymbol converter and the second error / symbol converter includes the first error / symbol converter and the second error / symbol converter. The comparison value is generated in order from the value that is likely to appear as the value of the prediction error input to the error symbol converter, and one of the first error Z symbol converter and the second error Z symbol converter is generated. And sequentially comparing the prediction error with the input prediction error, and generating and outputting a binary symbol sequence based on the number of comparisons until the prediction error matches one of the generated comparison values.

The mode determiner further selects the coding mode of the coded pixel based on the coding mode of the coded pixel preceding the coded pixel.

In the encoding device according to the present invention, at least the first codeword allocation is performed. One of the transmitter, the second codeword allocator, and the third codeword allocator is estimated by the corresponding first, second, and third probability estimators, respectively. It is characterized in that the interpretation of which of the binary symbols is the dominant symbol is changed based on the change in the probability estimation of one of the binary symbols.

The present invention is characterized in that the first predictor of the first encoder and the second predictor of the second encoder are integrated into a common predictor.

An encoding apparatus according to the present invention, wherein at least any two of the first encoder, the second encoder, and the third encoder are integrated to form a common encoder. At least one of the first codeword allocator, the second codeword allocator, and the third codeword allocator determines whether or not the binary symbol is a dominant symbol. Based on the information and the estimated appearance probability of the dominant symbol, expand the binary symbol assumed from the estimated appearance probability of the dominant symbol from the Huffman code set systematically created for the expanded information source of the binary symbol It is characterized by performing binary information source coding that is realized by selecting the code that is optimal for the situation of the information source. A decoding device according to the present invention stores a decoded pixel having any value within a predetermined range, and outputs a value of a decoded pixel near a decoded pixel to be decoded as a value of a reference pixel. Memory and

A mode determiner that selects one of a specific decoding mode and another decoding mode for a decoded pixel based on a value taken by a reference pixel from a plurality of predefined decoding modes. When,

A first decoding unit that inputs a codeword, predicts a value of a decoded pixel, determines whether the prediction is correct, and decodes the codeword into a value of the decoded pixel based on the determination result; A second decoding unit that inputs the codeword, predicts the value of the decoded pixel, and decodes the codeword into the value of the decoded pixel without determining whether the prediction is correct or not, and the mode determiner selects the A decoding control unit for selectively operating the first and second decoding units based on one of a specific decoding mode and another decoding mode;

It is characterized by having.

The first decoding unit calculates a predicted value of the decoded pixel based on a value taken by the reference pixel; and

A first decoder for decoding a corresponding codeword into a determination result indicating whether or not a prediction error is a predetermined value, for a decoded pixel to be decoded in the selected specific decoding mode;

For a decoded pixel that is decoded in the selected specific decoding mode and has a prediction error that is not the predetermined value, a second decoding unit that decodes a corresponding codeword into the prediction error. A decoder;

A first decoded pixel calculation for calculating a decoded pixel value from the predicted value of the decoded pixel calculated by the first predictor, the determination result, and the prediction error obtained by the second decoder; Container

It is characterized by having.

A second predictor configured to calculate a predicted value of the decoded pixel based on a value taken by the reference pixel;

A third decoder for decoding a corresponding codeword into a prediction error for a decoded pixel decoded in a mode other than the selected specific decoding mode, regardless of whether the prediction error is the predetermined value or not. When,

The value of the decoded pixel that is decoded in a mode other than the specific decoding mode selected from the predicted value of the decoded pixel calculated by the second predictor and the prediction error decoded by the third decoder A second decoded pixel calculator that calculates It is characterized by having.

The first decoder inputs the codeword and decodes it into a binary symbol sequence, and estimates the appearance probability of either one of the binary symbols. And a first probability estimator that outputs one of the binary symbol sequences as a determination result.

The second decoder receives a codeword and decodes it into a sequence of binary symbols, and receives a binary symbol and receives one of the binary symbols. A second probability estimator for estimating an occurrence probability, and a first symbol / error converter for inputting a binary symbol sequence and converting the binary symbol sequence into a prediction error,

The third decoder receives a codeword and decodes it into a binary symbol sequence, and a third symbol reconstructor that receives a binary symbol and outputs one of the binary symbols. It is characterized by comprising a third probability estimator for estimating an appearance probability, and a second symbol Z error converter for inputting a binary symbol sequence and converting the binary symbol sequence into a prediction error.

The decoding control unit is configured to perform at least one of the first, second, and third decoding before all the binary symbol sequences decoded by any one of the third decoder are used. When the decoder outputs a binary symbol sequence, the decoder includes a binary symbol usage order controller that changes the use order of the decoded binary symbols.

In the decoding device according to the present invention, at least one of the first symbol / error converter and the second symbol / error converter is based on the input binary symbol value and the number of input binary symbols. It is characterized by converting a value symbol sequence into a prediction error.

The mode determiner further selects a decoding mode of the decoded pixel based on a decoding mode of a decoded pixel preceding the decoded pixel. The decoding device according to the present invention is configured such that at least one of the first symbol reconstructor, the second symbol reconstructor, and the third symbol reconstructor is a corresponding first probability estimator, It is characterized in that the interpretation of which of the binary symbols is the dominant symbol is changed based on the probability estimation change of the binary symbol estimated by the probability estimator and the third probability estimator, respectively.

The first predictor of the first decoding unit and the second predictor of the second decoding unit are integrated into a common predictor.

A decoding device according to the present invention is characterized in that at least any two of the first decoder, the second decoder, and the third decoder are integrated into a common decoder. At least one of the first symbol reconstructor, the second symbol reconstructor, and the third symbol reconstructor has information on which of the binary symbols is the dominant symbol and the estimated appearance probability of the dominant symbol. From the Huffman code set systematically created for the binary symbol extended information source based on the above, the optimal code for the situation of the binary symbol extended information source assumed from the estimated appearance probability of the dominant symbol is determined. It is characterized by performing binary information source decoding realized by selection.

According to the encoding method of the present invention, a pixel having a value within a predetermined range is input and accumulated as an encoded pixel, a value of the encoded pixel to be encoded is output, and a pixel in the vicinity of the encoded pixel is output. An output step of outputting an encoded pixel value as a reference pixel value;

A mode for selecting one of a specific coding mode and another coding mode for a coded pixel based on a value taken by a reference pixel from a plurality of predefined coding modes. De-determining step;

Predict the value of the coded pixel, judge whether the prediction is correct, and based on the judgment result A first main encoding step of encoding the value of the encoded pixel and outputting a codeword; and encoding the value of the encoded pixel without predicting the value of the encoded pixel and determining whether the prediction is correct or not. A second main encoding step of outputting a codeword

An encoding control step of selectively operating the first and second main encoding steps based on the specific encoding mode selected by the mode determination step and the other encoding modes. I do.

The first main encoding step includes: a first prediction step of calculating a predicted value of an encoded pixel based on a value taken by a reference pixel;

A first prediction error calculation step of calculating an error between the value of the coded pixel and the prediction value calculated in the first prediction step as a prediction error;

A judgment step of judging whether or not the prediction error calculated in the first prediction error calculation step is a predetermined value and outputting a judgment result;

A first encoding step of inputting and encoding the determination result output in the determination step for an encoded pixel to be encoded in the selected specific encoding mode, and outputting a codeword;

For a coded pixel to be coded in the selected specific coding mode, wherein the prediction error calculated by the first prediction error calculation step is not the predetermined value, A second encoding step for encoding the error and outputting the corresponding codeword

It is characterized by having.

The second main encoding step includes: a second prediction step of calculating a predicted value of the encoded pixel based on a value taken by the reference pixel;

A second prediction error calculating step of calculating the value of the coded pixel and the error between the predicted value calculated by the ^second prediction step as a prediction error,

The prediction error calculated by the second prediction error calculation step for the coded pixel to be coded in a mode other than the selected specific coding mode is the predetermined error. A third encoding step of encoding the prediction error irrespective of whether it is a value or not and outputting a corresponding codeword.

In the first encoding step, the first probability of estimating the appearance probability of one of the binary symbols among the binary symbols by inputting the determination result output from the determination step as a binary symbol sequence is used. An estimation step, and a first codeword assignment step of encoding a binary symbol sequence,

The second encoding step includes a first error symbol conversion step of inputting a prediction error and converting the prediction error into a binary symbol sequence, and a binary symbol sequence of inputting a binary symbol sequence. A second probability estimating step of estimating an appearance probability of a binary symbol, and a second codeword allocating step of encoding a binary symbol sequence,

The third encoding step is one of a second error Z symbol conversion step of inputting a prediction error and converting the prediction error into a binary symbol sequence, and a binary symbol sequence of inputting a binary symbol sequence. A third probability estimating step of estimating the appearance probability of the binary symbol, and a third codeword allocating step of encoding the binary symbol sequence.

In the encoding method according to the present invention, at least one of the first, second, and third codeword allocation steps is estimated by the corresponding first, second, and third probability estimation steps, respectively. The method is characterized in that it includes a step of changing the interpretation of which of the binary symbols is the dominant symbol based on the estimated probability change of the binary symbol.

In the encoding method according to the present invention, at least one of the first, second, and third codeword allocating steps includes information indicating which of the binary symbols is the dominant symbol and the estimated appearance of the dominant symbol. From the Huffman code set systematically created for the extended information source of the binary symbol based on the probability, the extended information of the binary symbol assumed from the estimated appearance probability of the dominant symbol It is characterized by performing binary information source coding realized by selecting the code that is optimal for the source situation.

The decoding method according to the present invention accumulates decoded pixels having any value within a predetermined range, and outputs the value of a decoded pixel near a decoded pixel to be decoded as a value of a reference pixel. Output process,

A mode determination step of selecting one of a specific decoding mode and another decoding mode for a decoded pixel based on a value taken by a reference pixel from a plurality of predefined decoding modes;

A first main decoding step of inputting a codeword, predicting a value of a decoded pixel, determining whether the prediction is correct, and decoding the codeword into a value of the decoded pixel based on the determination result;

A second main decoding step of inputting the codeword, predicting the value of the decoded pixel, and decoding the codeword into the value of the decoded pixel without determining whether the prediction is correct or not;

A decoding control step of selectively operating the first and second main decoding steps based on the specific decoding mode selected by the mode determination step and other decoding modes. .

The first main decoding step includes: a first prediction step of calculating a predicted value of a decoded pixel based on a value taken by a reference pixel;

A first decoding step of decoding the corresponding codeword into a determination result indicating whether or not the prediction error is a predetermined value, for a decoded pixel to be decoded in the selected specific decoding mode;

For a decoded pixel that is decoded in the selected specific decoding mode and has a prediction error that is not the predetermined value, a second decoding unit that decodes a corresponding codeword into the prediction error. A decryption step;

The predicted value of the decoded pixel calculated in the first prediction step, A first decoded pixel calculating step of calculating the value of the decoded pixel from the result and the prediction error obtained in the second decoding step;

It is characterized by having.

The second main decoding step includes a second prediction step of calculating a predicted value of the decoded pixel based on a value taken by the reference pixel;

For a decoded pixel decoded in a mode other than the selected specific decoding mode, a third decoding for decoding a corresponding codeword into the prediction error regardless of whether the prediction error is the predetermined value or not. Process and

A second calculating unit that calculates a decoded pixel value to be decoded in a mode other than the specific decoding mode selected from the predicted value of the decoded pixel calculated in the second prediction step and the prediction error decoded in the third decoding step. And a decoded pixel calculation step.

The first decoding step includes: a first symbol restoring step of inputting a codeword and decoding it into a binary symbol sequence; and a first symbol estimation step of estimating an appearance probability of one of the binary symbols among the binary symbols. The probability estimation process of (1), and outputs one of the binary symbol sequences as the judgment result,

The second decoding step includes a second symbol restoring step of inputting a codeword and decoding it into a binary symbol sequence, and a second probability estimating step of inputting a binary symbol and estimating a probability of appearance of the binary symbol. And a first symbol error conversion step of inputting a binary symbol string and converting the binary symbol string into a prediction error. The third decoding step includes inputting a codeword and decoding the codeword into a binary symbol string. A third symbol restoration process to input binary symbols and a third probability estimation process to estimate the probability of appearance of the binary symbols, and input a binary symbol sequence to convert the binary symbol sequence into a prediction error. And a second symbol error conversion step for conversion. In the decoding method according to the present invention, at least one of the first, second, and third symbol restoration steps is estimated by the corresponding first, second, and third probability estimation steps, respectively. A step of changing the interpretation of the binary symbol based on the estimated change in the probability of the value symbol.

In the decoding method according to the present invention, at least one of the first, second, and third symbol restoration steps includes information indicating which of the binary symbols is the dominant symbol, the estimated appearance probability of the dominant symbol, and From the Huffman code set systematically created for the binary symbol extended information source based on, the code that is optimal for the situation of the binary symbol extended information source assumed from the estimated appearance probability of the dominant symbol is It is characterized by performing binary information source decoding realized by selection.

The encoding device is provided on a semiconductor chip, and the encoding device is provided on a circuit board.

In the image processing apparatus according to the present invention, an image processing apparatus which inputs an image signal composed of a plurality of pixels, encodes the pixel of the image signal with an encoding device, and outputs the encoded image signal to a next processing device,

The encoding device,

A pixel having any value within a predetermined range is input and accumulated as a coded pixel, the value of the coded pixel to be coded is output, and the value of a coded pixel in the vicinity of the coded pixel is referred to A pixel memory output as a pixel value;

A mode for selecting one of a specific coding mode and another coding mode for a coded pixel based on a value taken by a reference pixel from a plurality of predefined coding modes. Deciding device, A first encoding unit that predicts the value of an encoded pixel, determines whether the prediction is correct, and encodes the value of the encoded pixel based on the determination result and outputs a codeword; and predicts the value of the encoded pixel. And a second encoding unit that encodes the value of the encoded pixel and outputs a codeword without determining whether the prediction is correct or not,

An encoding control unit for selectively operating the first and second encoding units based on one of the specific encoding mode selected by the mode determiner and the other encoding mode;

It is characterized by having.

The image processing apparatus is an electronic computer.

The image processing apparatus is a scanner.

The image processing apparatus is a facsimile machine. The image processing device is a display device.

The image processing device is a storage device.

The decoding device is provided on a semiconductor chip. The decoding device is provided on a circuit board.

In an image processing apparatus according to the present invention, an image processing apparatus receives an encoded image signal, decodes a pixel of the image signal with a decoding apparatus, and outputs the decoded signal to a next processing apparatus.

The decoding device,

A pixel memory that stores decoded pixels having any value within a predetermined range and outputs the value of a decoded pixel near the decoded pixel to be decoded as a reference pixel value;

A mode determiner that selects one of a specific decoding mode and another decoding mode for a decoded pixel based on a value taken by a reference pixel from a plurality of predefined decoding modes. When, A first decoding unit that inputs a codeword, predicts a value of a decoded pixel, determines whether the prediction is correct, and decodes the codeword into a value of the decoded pixel based on the determination result;

A second decoding unit that inputs the codeword, predicts the value of the decoded pixel, and decodes the codeword into the value of the decoded pixel without determining whether the prediction is correct or not; A decoding control unit for selectively operating the first and second decoding units based on one of the selected specific decoding mode and another decoding mode;

It is characterized by having.

The image processing apparatus is an electronic computer.

The image processing apparatus is a scanner.

The image processing device is a facsimile device. The image processing apparatus is a printer.

The image processing device is a display device.

The image processing device is a storage device.

An encoding device according to the present invention inputs and accumulates a pixel having any value within a predetermined range as an encoded pixel, outputs a value of the encoded pixel to be encoded, and outputs a value in the vicinity of the encoded pixel. A pixel memory for outputting a coded pixel value as a reference pixel value;

An encoding unit that predicts the value of the coded pixel, determines whether the prediction is correct, and codes the value of the coded pixel based on the determination result to output a codeword;

An encoding control unit that operates the encoding unit based on whether or not the prediction determined by the encoding unit is correct; and

It is characterized by having.

A coding unit configured to calculate a predicted value of the coded pixel based on a value of the reference pixel; A prediction error calculator that calculates an error between the value of the encoded pixel and the prediction value calculated by the predictor as a prediction error;

A determining unit that determines whether the prediction error calculated by the prediction error calculator is a specific value, and outputs a determination result;

A first encoder that inputs and encodes the determination result output from the determiner and outputs a codeword;

A second encoder that encodes the prediction error for a coding pixel whose prediction error calculated by the prediction error calculator is not the specific value and outputs a corresponding codeword;

It is characterized by having.

A decoding device according to the present invention accumulates decoded pixels having any value within a predetermined range, and outputs a value of a decoded pixel near a decoded pixel to be decoded as a value of a reference pixel. A pixel memory;

A decoding unit that inputs a codeword, predicts the value of a decoded pixel, determines whether the prediction is correct, and decodes the codeword into a decoded pixel value based on the determination result;

A decoding control unit that operates the decoding unit based on whether or not the prediction determined by the decoding unit is correct; and

It is characterized by having.

A decoding unit configured to calculate a predicted value of the decoded pixel based on a value of the reference pixel;

A first decoder for decoding the codeword into a determination result indicating whether or not the prediction error is a predetermined value;

For a decoded pixel whose prediction error is not the predetermined value, a second decoder that decodes a corresponding codeword into the prediction error,

A predicted value of the decoded pixel calculated by the predictor, the determination result, A decoded pixel calculator for calculating a value of a decoded pixel from the prediction error obtained by the second decoder;

It is characterized by having.

An image processing apparatus according to the present invention includes: an imaging unit configured to capture an image including a plurality of pixels;

An image compression circuit for compressing a captured image;

A storage unit for storing the compressed image;

With

The image compression circuit,

A pixel having any value within a predetermined range is input and stored as a coded pixel.

A pixel memory that outputs the value of the coded pixel to be coded and outputs the value of the coded pixel in the vicinity of the coded pixel as the value of the reference pixel; and A mode determiner for selecting one of a specific coding mode and another coding mode for a coded pixel based on a value taken by a reference pixel from a coding mode;

A first encoding unit that predicts the value of an encoded pixel, determines whether the prediction is correct, and encodes the value of the encoded pixel based on the determination result and outputs a codeword; and predicts the value of the encoded pixel. And a second encoding unit that encodes the value of the encoded pixel and outputs a codeword without determining whether the prediction is correct or not,

And a coding device having the following.

An image processing apparatus according to the present invention includes: an imaging unit configured to capture an image including a plurality of pixels; An image compression circuit for compressing a captured image;

A storage unit for storing the compressed image;

An image expansion circuit for expanding the stored image;

With

The image decompression circuit includes:

A mode determiner for selecting one of a specific decoding mode and another decoding mode for a decoded pixel based on a value taken by a reference pixel from a plurality of predefined decoding modes;

A first decoding unit that inputs a codeword, predicts a value of a decoded pixel, determines whether the prediction is correct, and decodes the codeword into a value of the decoded pixel based on the determination result;

A second decoding unit that inputs the codeword, predicts the value of the decoded pixel, and decodes the codeword into the value of the decoded pixel without determining whether the prediction is correct or not, and the mode determiner selects the A decoding control unit for selectively operating the first and second decoding units based on one of a specific decoding mode and another decoding mode;

Is provided.

The image compression circuit includes a plurality of the encoding devices, and inputs the luminance signal Y and the color difference signals U and V to the plurality of encoding devices in parallel to perform encoding.

The image compression circuit is characterized in that it has a plurality of the encoding devices, and inputs the color signals R, G, and B to the plurality of encoding devices in parallel and encodes them. The image compression circuit includes one encoding device, and serially inputs a luminance signal Y and color difference signals U and V to the encoding device in units of blocks to perform encoding.

The image compression circuit includes one encoding device, and serially inputs the color signals R, G, and B to the encoding device in units of blocks, and encodes the signals.

The image decompression circuit includes a plurality of the decoding devices, and inputs the encoded luminance signal Y and chrominance signals U and V to the plurality of decoding devices in parallel to perform encoding.

The image decompression circuit includes a plurality of the decoding devices, and inputs the coded color signals R, G, and B to the plurality of decoding devices in parallel and decodes them.

The image decompression circuit has one decoding device, and is characterized by serially inputting the encoded luminance signal γ and chrominance signals u, V to the decoding device in units of blocks to decode.

The image decompression circuit includes one decoding device, and serially inputs the encoded color signals R, G, and B to the decoding device in block units to decode. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a perspective view showing an image processing apparatus of the present invention.

FIG. 2 is a perspective view showing an application example of the image processing apparatus of the present invention. FIG. 3 is a diagram showing the state and code order of the binary symbol sequence to be encoded according to the present invention.

FIG. 4 is a block diagram showing a configuration example of the encoding device according to the first embodiment of the present invention. FIG. 5 is a block diagram showing a configuration example of the first encoder of the present invention. FIG. 6 is a block diagram showing a configuration example of the second encoder according to the present invention. FIG. 7 is a block diagram showing a configuration example of the third encoder according to the present invention. FIG. 8 is a diagram showing an example of conversion from a prediction error to a binary symbol performed by the second encoder of the present invention.

FIG. 9 is a diagram showing an example of conversion from a prediction error to a binary symbol performed by the third encoder of the present invention.

FIG. 10 is a flowchart showing the flow of the encoding process of the present invention.

FIG. 11 is a diagram showing specific examples of various conditions when the coded pixel of the present invention is coded.

FIG. 12 is a diagram showing the encoding operation of the present invention.

FIG. 13 is a block diagram showing a configuration example of the decoding device according to the first embodiment of the present invention.

FIG. 14 is a block diagram showing a configuration example of the first decoder of the present invention. FIG. 15 is a block diagram showing a configuration example of the second decoder of the present invention. FIG. 17 is a block diagram illustrating a configuration example of a third decoder according to the present invention. FIG. 17 is a block diagram illustrating a configuration example of an encoding device according to Embodiment 2 of the present invention.

FIG. 18 is a flowchart showing the flow of the encoding process of the present invention.

FIG. 19 is a diagram showing the encoding operation of the present invention.

FIG. 20 shows the coding control after the codeword is determined by the third encoder of the present invention. It is a flowchart which shows the flow of the control processing which a control part performs.

FIG. 21 is a flowchart showing the flow of control processing performed by the coding control unit after the codeword is determined by the first encoder of the present invention.

FIG. 22 is a flowchart showing the flow of control processing performed by the encoding control unit after the codeword is determined by the occurrence of LPS in the binary symbol sequence in the first encoder of the present invention. .

FIG. 23 is a diagram showing the encoding operation of the present invention.

FIG. 24 is a flowchart showing the flow of the pixel prefetch operation of the present invention.

FIG. 25 is a block diagram showing a configuration example of a decoding device according to the second embodiment of the present invention.

FIG. 26 is a block diagram illustrating a configuration example of an encoding device according to Embodiment 3 of the present invention.

FIG. 27 is a block diagram showing a configuration example of the encoder 5a according to the third embodiment of the present invention.

FIG. 28 is a block diagram showing a configuration example of the encoder 6a according to the third embodiment of the present invention.

FIG. 29 is a block diagram showing a configuration example of the encoder 8a according to the third embodiment of the present invention.

FIG. 30 is a diagram showing a flowchart and a truth table showing a flow of an operation by the probability estimator according to the third embodiment of the present invention.

FIG. 31 is a diagram showing an encoding operation when the interpretation of MPS and LPS of the present invention is inverted.

FIG. 32 is a block diagram showing a configuration example of a decoding device according to the third embodiment of the present invention.

FIG. 33 shows a configuration example of a decoder 45a according to Embodiment 3 of the present invention. FIG.

FIG. 34 is a block diagram illustrating a configuration example of the decoder 46 a according to the third embodiment of the present invention.

FIG. 35 is a block diagram showing a configuration example of a decoder 48a according to the third embodiment of the present invention.

FIG. 36 is a block diagram illustrating a configuration example of an encoding device according to Embodiment 4 of the present invention.

FIG. 37 is a block diagram showing a configuration example of a decoding device according to Embodiment 4 of the present invention.

FIG. 38 is a diagram illustrating a case where a plurality of MPS counters exist in a part of the encoder according to the present invention.

FIG. 39 is a block diagram illustrating a configuration example of an encoding device according to Embodiment 5 of the present invention.

FIG. 40 is a block diagram showing a configuration example of a decoding device corresponding to the coding device shown in FIG. 39 of the present invention.

FIG. 41 is a block diagram showing another configuration example of the encoding device according to the fifth embodiment of the present invention.

FIG. 42 is a block diagram showing a configuration example of the encoder 5b shown in FIG.

FIG. 43 is a block diagram showing a configuration example of a decoding device corresponding to the encoding device shown in FIG. 41 according to the present invention.

FIG. 44 is a block diagram illustrating a configuration example of a decoder 45b used in the decoding device illustrated in FIG.

FIG. 45 is a block diagram showing another configuration example of the encoding device according to the fifth embodiment of the present invention.

Fig. 46 shows the configuration of the encoder 6b used in the encoder shown in Fig. 45. It is a block diagram showing an example.

FIG. 47 is a block diagram illustrating a configuration example of a decoding device corresponding to the encoding device illustrated in FIG. 45.

FIG. 48 is a block diagram illustrating a configuration example of the decoder 46 b used in the decoding device illustrated in FIG. 47.

FIG. 49 is a block diagram showing another configuration example of the encoding device according to the fifth embodiment of the present invention.

FIG. 50 is a block diagram showing a configuration example of an encoder 5c used in the encoding device shown in FIG.

FIG. 51 is a block diagram showing a configuration example of an encoding device according to Embodiment 6 of the present invention.

FIG. 52 is a block diagram showing a configuration example of a decoding device according to the sixth embodiment of the present invention.

FIG. 53 is a diagram showing a configuration example of an image processing device according to the seventh embodiment of the present invention.

FIG. 54 is a diagram showing a sequence for recording a still image by the image processing device according to the seventh embodiment of the present invention.

FIG. 55 is a diagram showing the configuration of the image compression circuit 318 of the present invention. FIG. 56 is a diagram showing a configuration of the image decompression circuit 320 of the present invention. FIG. 57 is a diagram showing another configuration of the image compression circuit 318 of the present invention. FIG. 58 is a diagram showing another configuration of the image decompression circuit 320 of the present invention. FIG. 11 is a diagram showing another configuration of the image processing apparatus of the present invention. FIG. 60 is a diagram showing another configuration of the image processing apparatus of the present invention. FIG. 61 is a diagram showing the image processing apparatus of the present invention and a computer 700. is there.

6 2, 6 3 is a diagram showing another configuration of the image compression circuit 3 1 8 of the present invention is a diagram showing another configuration of the image compression circuit 3 1 8 of the present invention ₀

FIG. 64 is a diagram showing another configuration of the image compression circuit 3 18 of the present invention. FIG. 65 is a diagram showing another configuration of the image compression circuit 3 18 of the present invention. FIG. 11 is a block diagram showing a configuration example of a conventional encoding device.

FIG. 67 is a diagram illustrating a conventional encoding and decoding method.

FIG. 68 is a diagram illustrating a conventional state transition method for determining a code order. FIG. 69 is a diagram illustrating encoded pixels or decoded pixels and reference pixels. FIG. 70 is a diagram showing the configuration of a conventional image compression circuit and image expansion circuit.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1

FIG. 1 is a perspective view showing a configuration example of an image processing device provided with an encoding device according to the present invention.

The image processing device provided with the decoding device according to the present invention also has the same configuration as the image processing device shown in FIG.

In FIG. 1, the image processing apparatus 60 includes a display unit 61, a keyboard 62, a mouse 63, a mouse pad 64, a system unit 65, and a compact disk unit 100. I have.

The image processing apparatus according to the present invention is, for example, as shown in FIG. The encoded image information is input from the disk device 100 and decoded, and the decoded image information is transferred to the system unit 65 and displayed on the display unit 61. The image processing apparatus of the present invention encodes image information displayed on the display unit 61 and outputs the encoded information to the compact disk device 100. It also encodes image information and transmits the image information via a line (not shown). However, the configuration of the image processing apparatus according to the present invention is not limited to the personal computer or workstation configuration shown in FIG. 1, and may be of any configuration using other components. good. For example, instead of the compact disk device 100, a video player may be used as an input device, or image data from a network may be input instead of image information. The input data may be in analog format or digital format.

Further, the image processing apparatus of the present invention may exist as an independent apparatus as shown in FIG. 1, but as shown in FIG. 2, a printer 66 ゃ scanner 68 or a facsimile apparatus Peripheral devices such as a display device (for example, a display unit 61) and a storage device (for example, a compact disk device 100) may be used. That is, the image processing device of the present invention refers to an electronic device including any of the encoding device or the decoding device described below, or an electronic device that executes any of the encoding method or the decoding method described below. Shall mean.

Further, the encoding device or the decoding device of the present invention may exist in an independent housing, or may be used as a part of a system board such as a television camera, a measuring machine or a computer, a circuit board, or as a semiconductor chip. It does not matter if it exists. Although not shown in FIG. 2, the devices shown in FIG. 2 are connected by a local area network, and It may be of a type that transmits encoded information. Also, the information may be in a format that transmits and receives coded information using a wide area network such as ISDN (Integrated Service Digital Digital Network).

The encoder in the encoding device according to the present embodiment or the decoder in the decoding device uses the encoding or decoding method described with reference to FIG. 67. That is, in this embodiment, based on the information as to which of the binary symbols is the dominant symbol and the estimated appearance probability of the dominant symbol, the expanded information source of the binary symbol (binary symbol sequence) is shown in FIG. Binary realized by selecting the most suitable code for the situation of the extended information source of the binary symbol assumed from the estimated appearance probability of the dominant symbol from the systematically created Huffman code set Information source coding or decoding shall be performed. Further, as shown in FIG. 3, it is assumed that each code order is set for the state of 32. Based on the state transition rule shown in Fig. 3, the state and the code order are set independently for each of a plurality of encoders or decoders described below, and the binary symbol is set. It shall be encoded or decoded.

An example of the configuration and operation of the encoding apparatus according to the first embodiment of the present invention will be described in terms of encoding mode switching and conversion of a prediction error between an encoded pixel value and a prediction value into a binary symbol sequence. This will be described in relation to the above.

FIG. 4 shows a configuration example of the encoding apparatus 400 according to Embodiment 1 of the present invention.

First, the components of the encoding apparatus 400 of the present embodiment will be described. In FIG. 4, reference numeral 1 denotes an input of a value of an encoded pixel to be encoded and stored, and an output of the value of the encoded pixel. With one or more stored and encoded This is a pixel memory that outputs the value of a pixel in the vicinity of an encoded pixel as a value of a reference pixel.

Reference numeral 2 denotes a mode determiner that determines a mode A or a mode B based on the values of the one or more reference pixels and outputs a mode identification signal CM. The mode determination method for Mode A and Mode B will be described later.

Reference numeral 3 denotes a first predictor that calculates a predicted value of an encoded pixel using a value of a reference pixel in mode A.

Reference numeral 30 denotes a first prediction error calculator that calculates a prediction error by subtracting the prediction value of the predictor 3 from the value of the coded pixel.

4 converts the prediction error value between the coded pixel value and the prediction value of the predictor 3 into a binary symbol indicating whether the prediction error value is 0 or other than 0, and outputs the converted binary symbol This is a zero determiner. In this embodiment and the embodiment described later, a zero determiner that determines whether the value of the prediction error is 0 or other than 0 is shown as an example. However, it is determined whether the value of the prediction error is 0 or other than 0. Instead, for example, it may be a determiner that determines whether the value of the prediction error is 1 or other than 1, or whether it is other than 13 or 3 or the like.

Reference numeral 5 denotes a first encoder for encoding the binary symbols output from the zero determiner 4 in mode A.

6 is the prediction error in Mode A when the prediction error is other than 0 (for example, when the judgment unit judges other than 1 or 1 or 1 or 3 or 3 other than 1 or other than 1 or 3 and so on). Is a second encoder that encodes the value of.

Reference numeral 7 denotes a second predictor that calculates the predicted value of the coded pixel using the value of the reference pixel in mode B.

Reference numeral 31 denotes a second prediction error calculator that calculates a prediction error by subtracting the prediction value of the predictor 7 from the value of the coded pixel. Reference numeral 8 denotes a third encoder that encodes a prediction error value between the value of the encoded pixel and the prediction value of the predictor 7 in mode B.

Reference numeral 9 denotes a code switch for appropriately selecting code words output from the first encoder 5, the second encoder 6, and the third encoder 8, and outputting an appropriate code word.

Reference numeral 10 denotes a code buffer which outputs code words selected and output by the code switch 9 as a series of codes in the input order.

1 1 is a pixel memory 1, a first encoder 5, a second encoder 6, a third encoder 8, a code switch 9, a code, based on the mode identification signal CM and the control signals C1 to C6. An encoding control unit that controls the buffer 10.

101 is a first encoder 5 that encodes a binary symbol indicating whether or not the prediction error between the value of the coded pixel and the estimated prediction value is 0 in mode A; , A second encoder 6 that encodes a prediction error when it is not 0.

102 is the second encoding in mode B, including the third encoder 8 that encodes the prediction error regardless of whether the error between the coded pixel value and the estimated prediction value is 0 or not. Department.

FIGS. 5, 6, and 7 are diagrams showing examples of the internal configuration of each of the first encoder 5, the second encoder 6, and the third encoder 8. FIG.

Referring to FIGS. 5, 6, and 7, the first encoder 5, the second encoder 6, and the third encoder 8 receive a binary symbol sequence and receive the superiority over the binary symbol. Probability estimators 25, 26, and 28 for estimating the appearance probability of the symbol (MPS) are provided, respectively. Further, the first encoder 5, the second encoder 6, and the third encoder 8 receive the binary symbol sequence and the estimated appearance probability estimated by the probability estimator, and And a first codeword allocator 15, a second codeword allocator 16, and a third codeword allocator 18, which output codewords by encoding. First probability estimation The unit 25, the second probability estimator 26, and the third probability estimator 28 determine the code order shown in FIG. 3 and use the code order as a codeword assigner 15, 15, 16 or 18 Output to That is, the probability estimator improves the coding efficiency by switching the code order to an appropriate value according to the appearance probability of the MPS estimated from the data on the past binary symbol sequence.

There are two methods by which the probability estimator determines the code order, both of which are described in the conventional example.

Of the above two methods, the first example shows each of the states of 32 when the number of consecutive occurrences of the MPS becomes equal to the code order from any of the states of 32 shown in FIG. This is a state transition method that raises the state number by one and lowers the state number by one when the LPS appears before the number of consecutive occurrences of the MPS becomes equal to the code order.

Of the above two methods, the second example is to count the number N (0), N (1) of binary symbols 0 and 1 appearing in a binary symbol sequence, and calculate the code order from the counting result by a calculation formula. Is determined.

The probability estimator may estimate the probability using a method other than the first example or the second example described above.

Referring to FIG. 6 and FIG. 7, the second encoder 6 and the third encoder 8 are a first error symbol converter 36 that converts a prediction error into a binary symbol, and a second error symbol converter. It has 3 8. The error symbol converter 36 performs the conversion shown in FIG. The error / symbol converter 38 performs the conversion shown in FIG. Conversion performed by the error Roh symbol converter 3 6, 3 ^8, by keeping stored in advance a table as shown in FIGS. 8 and 9, the conversion to binary symbol from the prediction error by searching the table It is possible to do so. Alternatively, the correspondence shown in FIGS. 8 and ⁹ may be realized using an algorithm described below. The algorithm and Is a value likely to be a value of the prediction error input to the error Z symbol converter 36 or the error Z symbol converter 38, that is, the absolute value of the prediction error shown in FIGS. 8 and 9 Generating a value to be compared with the prediction error in ascending order of the value of the value; and the prediction input to the error Z-symbol converter 36 or the error Z-symbol converter 38, A step of successively comparing until the values of the errors match. Then, if they do not match, one binary symbol of "0" is output. Then, the comparison value generated next is compared with the value of the prediction error, and if they do not match, one binary symbol of "0" is generated. Then, the generated comparison value is compared with the value of the prediction error, and when they match, a binary symbol of "1" is generated and the conversion is completed.

An operation for realizing the correspondence between the prediction error and the binary symbol by the above algorithm will be specifically described using the case of FIG.

It is assumed that the value of the prediction error input to the error symbol converter 36 is “−2”.

The error symbol converter 36 generates “−1” as the first comparison value. Since the value of the prediction error input to the error symbol converter 36 does not match the value of the comparison value, "0" is output as a binary symbol. Next, the error Z symbol converter 36 generates “+1” as a second comparison value. Since the prediction error value "1 2" and the comparison value "+1" do not match, the binary symbol "0" is output again. The error symbol converter 36 then generates a comparison value of “1 2”. This time, since the value of the prediction error matches the comparison value, a binary symbol "1" is generated and the conversion is completed. Therefore, when the prediction error “1 2” is input, a binary symbol sequence “001” is output.

Next, the coding operation of coding apparatus 400 of the present embodiment will be described. You.

FIG. 10 is a diagram showing a flow of a mode determination operation of the mode determination device 2 and an encoding operation performed based on the determination mode determination result.

Referring to FIG. 10, the mode switching operation is performed when the mode determination unit 2 determines a condition “ _a = b = (:” (

(A = b = cj indicates that the pixel values are equal) (S16), and the output value “0” of the zero determiner 4 (prediction error = 0; prediction coincidence) Or, it is performed in the step (S15) of determining "1" (prediction error ≠ 0; prediction mismatch), and mode 8 or mode B is designated (S17, S98). a = b = c ”is satisfied (S 1

If it is determined that the output value of the zero determinator 4 is "0" (S15), the encoding by the mode A continues (S18). That is, once the reference pixels a and bc near a certain pixel X satisfy the condition “a = b = c”, encoding is continuously performed in mode A until a pixel having “X ≠ prediction value” appears. If the output value of the zero determiner 4 is determined to be "1" (S15), the coded pixel whose output value of the zero determiner is set to 1 is coded in mode A, and then input. Mode B is set as the encoding mode of the pixel to be changed, and the encoding mode is switched to mode B (S17). When the condition “ _a = _b = _c ” is satisfied in mode B (S16), mode A is set (S98), and the output value of the zero determiner 4 is set to “0” (predicted value). Error = 0; predicted match) or "

1 "(prediction error ≠ 0; prediction mismatch) is determined (S15). In mode B, if the condition“ a = b = c ”is not satisfied, encoding of mode B is performed. (S19) Continue.

The operation of the flowchart shown in FIG. 10 will be described again with reference to specific examples in FIGS. 5 and 6 described later.

(1) Mode A encoding The encoding operation in mode A will be described.

First, the zero determiner 4 subtracts a prediction value output from the predictor 3 (for example, the value of the pixel immediately before the reference pixel) from the value of the coded pixel to obtain a prediction error of 0 ( If the prediction matches, the binary symbol "0" is output, and if it is other than 0 (prediction mismatch), the binary symbol "1" is output. First encoder

5 performs encoding with the output value “0” of the zero determiner 4 as MPS and “1” as LPS. The coding process when the output of the zero determiner 4 is "0" (the prediction error is 0) and when the output is "1" (the prediction error is other than 0) are as follows.

(1-1) When the output of zero detector 4 is "0"

The first encoder 5 has an MPS counter (not shown) in the probability estimator 25. The MPS counter has a binary symbol "0" indicating a prediction error of 0, that is, successive occurrences of MPS. Count the number. Only when the number of consecutive occurrences of the MPS (the value of the MPS counter) input to the first encoder 5 reaches the code order, the code word (1 bit “0”) is determined (see FIG. 67). ). The codeword is not determined until the number of consecutive occurrences of MPS reaches the code order.

(1 -2) When the output of zero judgment device 4 is "1"

First, the first encoder 5 combines the binary symbol "1" indicating that the prediction error is other than 0, that is, the LPS with the number of MPSs before the LPS to which no codeword has been assigned yet. Encode. By continuous number of occurrences of the LPS previous MP S (the value of the MP S counter), when the code order 2 ^n, code words having a code word length of n + 1 bits is determined (see FIG. 6 7). When the encoding of the first encoder 5 is completed, the second encoder 6 subsequently calculates a prediction error (8-bit Z pixel) obtained by subtracting the predicted value output from the predictor 3 from the value of the encoded pixel. In this case, 1 255 1;; ~ 2 5 5; 0 does not exist here) is converted to the binary symbol string "0... 0 1" shown in FIG. Encoding. The converted binary symbol sequence is decomposed into one or more messages according to the code order value determined by the probability estimator 26, and the corresponding codeword is determined.

The feature of this embodiment is that, even when the prediction error is encoded in the second encoder 6, the same encoding scheme as that shown in FIG. 67 is used as in the first encoder 5. is there. That is, when the first encoder 5 encodes a binary symbol sequence and when the second encoder 6 encodes a binary symbol sequence, both the encoding methods shown in FIG. 67 are adopted. This is a major feature.

(2) Mode B encoding

Next, the operation in the encoding mode B will be described.

The predictor 7 calculates a predicted value from the values of one or more reference pixels. The calculation method may be a predetermined prediction function or a table reference. The third encoder 8 calculates a prediction error obtained by subtracting the predicted value calculated from the value of the coded pixel (in the case of 8 bits / pixel: —255 to 5255; Is converted to the binary symbol sequence shown in FIG. 9 and then encoded in the same manner as the second encoder 6. That is, based on the encoding scheme shown in FIG. 67, a codeword is generated from a binary symbol sequence. Since all of the binary symbol sequences shown in FIG. 9 end with LPS, third encoder 8 can determine a codeword for all of the binary symbol sequences shown in FIG.

In the conversion examples shown in Fig. 8 and Fig. 9, the values of the prediction error that are more likely to occur are sequentially generated and compared with the prediction error.If one of these values matches the prediction error, 1 is determined. In the case of 0, the prediction error is converted to a binary symbol. The error / symbol converters 36 and 38 convert the prediction errors into binary symbols and output them to the probability estimators 26 and 28, as described above. The probabilities estimators 26 and 28 perform code generation based on the input binary symbols. The code order is determined to be changed, and the determined code order is output to the codeword assigners 16 and 18, respectively. In this case, the two order examples described above can be applied to the code order determination method. The coding performed by the codeword allocators 16 and 18 is exactly the same as the coding performed by the codeword allocator 15. That is, encoding is performed by the encoding method shown in FIG.

Referring to FIG. 4 again, the encoding control unit 11 stores the value of the coded pixel in the pixel memory 1, and stores the value of the coded pixel from the pixel memory 1 and one of the neighboring pixels. The above reference pixel values are output, and the first encoder 5, the second encoder 6, and the third encoder 8 are appropriately operated by the mode identification signal CM output from the mode determiner 2. In the operation process, the first encoder 5, the second encoder 6, and the third encoder 8 notify the encoding control unit 11 of the output preparation state of the codeword, and the encoding control unit 11 Determines the first encoder 5 or the second encoder 6 or the third encoder 8 to output the codeword, and determines the codeword using the code switch 9 and the code buffer 10. A code is output in which the codeword is a series of sequences. The code buffer 10 receives the required codeword lengths directly from the first encoder 5, the second encoder 6, and the third encoder 8, or the encoding control unit 11 The required codeword lengths are indirectly notified via, so that the code is composed of the codewords. Next, the flowchart shown in FIG. This will be specifically described.

FIG. 11 is a diagram illustrating the states of the input coded pixels and the reference pixels, the output of the zero determiner, and the value of the prediction error.

Pixel X as shown in Figure 11. These states of the reference pixels in the vicinity when to X ₆ is input is as described in the reference pixels of Figure 1 1. Also, the output of the zero determiner indicates whether or not the prediction was incorrect for each coded pixel. The prediction error indicates the value of the prediction error when the prediction is incorrect. Pixel ような as shown in Figure 11. the assumption that ~ chi _beta are inputted in order, the operation of the flowchart of FIG. 1 0 at that time. FIG. 12 shows the operation result. For simplicity of explanation, in FIG. 12, the first encoder 5, the second encoder 6, the third encoder 8 and the probability estimators 25, 26, and 28 inside the third encoder 8 all have a fourth-order code order. (2 ^η = 4) is assumed.

First, in the initial state where the power is turned on to the apparatus, mode S is set in S11 as the initial mode of the encoding mode of the apparatus. In S12, pixel X. Is entered. In S14, it is determined that the mode is A, and in S15, the pixel X is detected. The output of the zero determiner is checked. As shown in Figure 11, pixel X. Since the output of the zero determiner of is 0, the operation proceeds to S18. In S18, pixel X. Is encoded in the mode A by the first encoder 5.

Next, in S12, the pixel is input. Also for pixels

After passing through S 14, S 15 and S 18, mode A is encoded.

Next, in S 1 2, pixel X ₂ are input. The mode # is also encoded for the pixel # ₂ via S14, S15, and S18.

Next, in S12, the pixel Xs is input. In S14, the encoding mode of the pixel # ₃ is determined to be Mode # 4, and the operation proceeds to S15. S

At 15, the operation proceeds to S 17 because the output of the zero determiner is 1. In S 1 7, pixel X ₃ is encoded in the mode Alpha. This mode A encoding is performed by the first encoder 5 and the second encoder 6 since the output of the zero determiner is 1. Pixel X output from first encoder 5. , Xi, the code word of X ₂ are determined for LPS has emerged. In Figure 12

, 画素 Pixel X output from first encoder 5 at position 1. , X, X ₂ The code word is completed. As described above, when the encoding of the mode A is determined by the appearance of the LPS, the encoding by the second encoder 6 is performed on the pixel that sets the output of the zero determiner to "1". As shown in FIG. 11, the prediction error of the pixel Xs is “+1”. Therefore, within the second encoder 6, the error-to-symbol converter 36 outputs a binary symbol “0 1” according to the table shown in FIG. The second encoder 6 encodes the binary symbol according to the encoding method shown in FIG. Since the binary symbols shown in FIG. 8 are all terminated by PS, when the encoding method shown in FIG. 67 is used, the encoding of each prediction error shown in FIG. Sometimes the codewords corresponding to them are always determined. As shown in FIG. 1 2, in the case of the pixel chi _3, the code word of the second encoder 6 is determined at the position of [rho 2. Next, after the mode # is set in S17, the pixel # ₄ is input in S12. In S14, it is determined that the encoding mode of the pixel # ₄ is mode #. Then, in S16, the state of the reference pixel of the pixel # ₄ is checked. The value of the reference pixels of the pixel chi _4, as shown in FIG. 1 1, because it does not satisfy the condition _"a = b = c", the operation proceeds to S 1 9. In S 1 9, pixel X ₄ coding mode Β is made. Since the prediction error of pixel # ₄ is "+1", a binary symbol "00 1" is output as shown in FIG. Since all of the binary symbol sequences shown in Fig. 9 are terminated by LPS, as long as the encoding method shown in Fig. 67 is used, the third encoder 8 The codeword output from is always determined. As shown in FIG. 1 2, code word of the pixel X ₄ is determined at the position of the [rho 3.

After the code word of the pixel # ₄ is determined in S19, the pixel # ₅ is input in S12. In S 1 4, it revealed that the coding mode of the pixel chi ₅ is a mode beta, in S 1 6, shape of the reference pixels of the pixel Xs The condition is checked. To满足reference pixels a pixel X _5, b, c is the condition r _a = b = c ", sets the mode A (S 9 8), the operation is Ru moves to S 1 5. Since the output of the zero determiner for the pixel Xs is 0, the operation proceeds to S18. Here, pixel Xs is encoded in mode A. At this point, the code word of the pixel X ₅ output from the first encoder 5 is not fixed.

Next, in S12, the pixel Χβ is input. In S14, it is determined that the encoding mode of the pixel Χβ is mode 、, and in S15, the output of the zero determiner is determined to be 1. Thus, the pixel chi _beta in S 1 7, is an encoding mode Alpha. In the case of the pixel Χ _β , L Ρ S has appeared, and the code word of the pixel Χ ₅ output from the first encoder 5 is determined at the position of Ρ 4 as shown in FIG. . Since the first sign-device 5 was determined codeword pixel chi ₅ by LPS, the second encoder 6 encodes the error of the pixel chi _beta. The prediction error of Χβ shown in Fig. 11 is “— 2”. Therefore, as shown in FIG. 8, the binary symbol “00 1” for the prediction error “−2” is encoded. Ρ by LPS has appeared Te location odor 5, the code word of the pixel chi _beta output from the second encoder 6 is determined at the position of P 5.

The determined codewords shown in FIG. 12 are obtained by the probability estimators 25, 26, and 28 in the first encoder 5, the second encoder 6, and the third encoder 8 as shown in FIG. The case where the fourth order (2 ^η = 4) is determined is shown. Here, for the sake of simplicity, a case is described in which the first encoder 5, the second encoder 6, and the third encoder 8 all encode in the fourth code order. As described above, the first encoder 5, the second encoder 6, and the third encoder 8 independently determine the code order and operate independently.

As described above, in the present embodiment, when a pixel value is input, a corresponding code is output. The output code is the code buffer 1 After the data is temporarily stored in a memory or the like (not shown) in FIG. 0 or directly from the code buffer 10, the data is transmitted in an analog or digital manner by a wireless or wired communication line. Also, it is fixedly stored in a storage medium (card, tape, disk, RAM, ROM, etc., which records magnetically or optically).

In the first embodiment, LPS is always output when the encoding mode is switched from mode A to mode B. That is, in the first embodiment, when the encoding mode is switched from mode A to mode B, the first encoder 5 and the second encoder 6 always determine the code word. Also, when the encoding mode switches from mode B to mode A, LPS is always output, so in this first embodiment, when switching from mode B to mode A, the third mode is always used. The codeword is determined by the encoder 8.

As described above, according to coding apparatus 400, coding efficiency when MPS appears continuously is greatly improved. Also, by switching the encoding mode to mode B when LPS appears in mode A, and when the value of the reference pixel satisfies the predetermined condition `` a = b = c '' in mode B In addition, by switching the encoding mode from mode B to mode A, the first and second encoding units are actively switching the encoding.

In this way, switching between the first encoding unit and the second encoding unit is performed appropriately without inconsistency, and efficient encoding and decoding can be realized. The switching is performed by the encoding control unit 11 controlling each unit in the encoding device 400 using the mode identification signal CM and the control signals C1 to C6.

FIG. 13 is a block diagram illustrating a configuration example of the decoding device 500 according to Embodiment 1 of the present invention. First, the components of decoding apparatus 500 of the present embodiment will be described. 4 1 is one or more accumulated and decoded pixels prior to decoding, outputs the value of the pixel near the decoded pixel as the value of the reference pixel, and accumulates the value of the decoded pixel It is a pixel memory.

Reference numeral 42 denotes a mode A or a mode B for the decoded pixel based on the value of the one or more reference pixels, similarly to the mode determiner 2 in the encoding device 400 described above. , A mode discriminator that outputs a mode identification signal CM.

4 5 is the code word in mode A, the prediction error of which is other than 0 or 0 (for example, if the discriminator judges other than 1 or 1 or 1 or 3 or 3 other than 1 or 1 other than 3 and the same below) This is the first decoder that decodes into binary symbols that indicate

Reference numeral 46 denotes a second decoder that decodes a codeword into a prediction error when the prediction error is other than 0 in mode A.

Reference numeral 48 denotes a third decoder that decodes a codeword into a prediction error between a value of a decoded pixel and a prediction value of the predictor 7 for the decoded pixel in mode B.

Reference numeral 40 denotes a code buffer for decomposing an input code into codewords and outputting the codeword.

Reference numeral 43 denotes a pixel memory 41, a first decoder 45, a second decoder 46, and a third decoder 48 based on the mode identification signal CM and the control signals C11 to C16. The pixel switch 12 (described later) is a decoding control unit that controls the code buffer 40.

Reference numeral 12 denotes a pixel switch that selects and outputs an appropriate decoded pixel value among the decoded pixels output from the decoded pixel calculators 3 2 and 3 3 and the predictor ^3.

3 2 and 3 3 are the decoded pixels from the predicted value of the decoded pixel and the decoded prediction error. Are first and second decoded pixel calculators for calculating the value of.

The predictor 3 and the predictor 7 are the same as those of the encoding device 400 described above.

20 1 is a first decoder 45 that decodes the codeword into a binary symbol indicating whether or not the prediction error between the value of the decoded pixel and the estimated prediction value is 0; And a second decoder 46 for decoding a word into a prediction error.

Reference numeral 202 denotes a second decoder including a third decoder 48 for decoding a codeword into a prediction error regardless of whether the error between the decoded pixel value and the estimated prediction value is 0 or not. Department.

FIGS. 14, 15, and 16 are block diagrams showing examples of the internal configuration of the first decoder 45, the second decoder 46, and the third decoder 48.

The first decoder 45, the second decoder 46, the third decoder 48, the first symbol reconstructor 55, the second symbol reconstructor 56, the third symbol reconstructor 58, a first probability estimator 75, a second probability estimator 76, and a third probability estimator 78. Also, the second decoder 46 and the third decoder 48 are a first symbol // error converter 86 for converting a binary symbol sequence into a prediction error, and a second symbol Z error converter 8 Has eight.

Next, the decoding operation of decoding apparatus 500 of the present embodiment will be described. The first decoder 45, the second decoder 46, and the third decoder 48 obtain a codeword output by the code buffer 40 by dividing the code into codewords. When the first decoder 45 or the second decoder 46 or the third decoder 48 is decoding with the code order 2 ", the first decoder 45 and the second decoder 46 Alternatively, the third decoder 48 determines the codeword length from the value of the first bit of the unacquired codeword as follows.

If the first bit of the codeword is 0, the codeword length is 1, and the length is A message with only ²ⁿ binary symbol "0" is restored. If the first bit of the code is 1, the codeword length is n + 1 bits, and the first decoder 45, the second decoder 46, or the third decoder 48 sets the first bit of the codeword. The binary value indicated by the remaining n sign bits excluding is the number of consecutive occurrences (k) of the binary symbol "0", and the message of length k + 1 "0

• · 0 1 "is restored.

In the case of mode A decoding, the first decoder 45 converts a codeword as an input and outputs a binary symbol sequence (here, equivalent to a message). Each output of the first decoder 45 corresponds to one pixel to be decoded in mode A. If the output value is "0", the prediction error for the decoded pixel is 0; Is non-zero. When the prediction error is 0, the prediction value becomes the value of the decoded pixel as it is. When the prediction error is other than 0, the second decoder 46 decodes the prediction error.

When decoding the prediction error, the second decoder 46 and the third decoder 48 each convert the codeword into one or more messages by using the codeword as an input, and binarize the one or more messages. Synthesize into a symbol string. The second decoder 46 performs decoding on pixels having a prediction error other than 0 in mode A, and converts the binary symbol sequence shown in FIG. 8 (showing a case where there is no 0 in the prediction error) into the prediction error. Is converted back to and output. The third decoder 48 inversely converts the binary symbol sequence shown in FIG. 9 (showing a case where the prediction error is 0) into a prediction error for the pixel decoded in the mode B, and outputs the result. I do. In the case of mode A decoding, the value of the decoded pixel is a value obtained by adding the output (predicted error) of the second decoder 46 to the output (predicted value) of the predictor 3. For mode B decoder, the third value obtained by adding the output (prediction errors) of the decoder 4 8 to the output of the predictor ⁷ (predicted value).

The mode switching in the decoding processing is performed based on the state of the reference pixel output from the pixel memory 41 and the output value of the first decoder 45, 2 can be realized by using the same judgment method as that of the mode judgment device 2 shown in FIG.

While the decoding process is being performed, the decoding control unit 43 outputs the value of one or more reference pixels from the pixel memory 41, and outputs the mode identification signal CM which is the output of the mode determination unit 42. The first decoder 45, the second decoder 46, the

The third decoder 48 is selectively operated. In the process, the first decoder 45, the second decoder 46, and the third decoder 48 notify the decoding control unit 43 of the input of the codeword, and the code buffer 40 directly By being notified of each codeword length or indirectly being notified of each codeword length via the decoding control unit 43, the code is divided into codewords and output. The decoding control unit 43 determines a suitable decoder to perform decoding among the first decoder 45, the second decoder 46, and the third decoder 48, and determines whether the pixel switch 1 The value of the decoded pixel is stored in the pixel memory 41 by 2.

Embodiment 2

FIG. 17 is a block diagram illustrating a configuration example of an encoding device 400 according to Embodiment 2 of the present invention. However, it differs from FIG. 4 shown in the first embodiment in that the output from zero discriminator 4 is not input to mode discriminator 2. The operation of the encoding device 400 of the present embodiment will be described.

In this embodiment, as shown in FIG. 18, if reference pixels a, b, and c near a certain pixel X satisfy the condition “ _a = b = c”, encoding is performed in mode A (S 4

SS 6), if the reference pixels a, b, and c do not satisfy the conditions, encoding is performed in mode B (S 7). This mode switching operation is performed only by the mode determiner 2 determining whether or not the reference pixels a, b, and c output from the pixel memory 1 satisfy the condition “a = b = c”. As in the first embodiment, the output value from the zero determiner 4 is not referred to. The operation of the mode A encoding and the operation of the mode B encoding are the same as in the first embodiment, and the description thereof will be omitted. You.

In the first embodiment, when the coding mode is switched from mode A to mode B, the codeword is always determined by the first encoder 5, but in the second embodiment, Since the encoding mode determination condition is different from that of the first embodiment, the first encoder 5 does not always determine the codeword.

FIG. 19 shows a pixel X according to the second embodiment of the present invention. Here are examples of binary symbols to be encoded in ~ _β . The example shown in FIG. 19 shows the state of encoding when the encoded pixel shown in FIG. 11 is input to the encoding device 400 of this embodiment. For the sake of simplicity, code words are assumed to be output from the first encoder 5, the second encoder 6, and the third encoder 8, which perform encoding with a code order of 4. I do. In the example of FIG. 1 9, binary symbols output consecutively at the end coding in mode one de Α pixel X ₂ has not been completed in 1 - because, also, the value of the MPS counter is also code because it does not reach the degree = 4, the first encoder 5, marks Gogo at the end coding of the pixel X ₂ is not determined. Thus, before the codeword by the first encoder 5 is determined, the third encoder 8 in the pixel chi _3, the code word will be determined for the chi _4. In this case, the decoding device 500 cannot decode correctly unless the codeword generated by the first encoder 5 is obtained before the codeword generated by the third encoder 8. In the encoding device 400, an operation of changing the transmission order of codewords described below, that is, codeword transmission order control is required. Alternatively, it is necessary for the encoding device 400 to perform a pixel prefetch operation in the encoding mode described below.

First, the operation of the codeword transmission order control according to the second embodiment will be described with reference to FIGS. 20 and 21.

FIG. 20 is a flowchart showing a control processing flow performed by the encoding control unit 11 after the code word is determined (S 20) by the third encoder 8. FIG. 21 is a flowchart illustrating a control processing flow performed by the encoding control unit 11 after the codeword is determined (S30) in the first encoder 5. As shown in FIG. 19, the codeword transmission order control is required in the present embodiment before the codeword is determined by the first encoder 5 (in other words, the first encoder 5 When the value of the internal MPS counter is 1 or more (S in Fig. 20)

22)), where the third encoder 8 generates a codeword. In this case, the codeword generated by the third encoder 8 is temporarily stored in the code buffer 10 (S24 in FIG. 20). The codeword is determined by the first encoder 5 in the following two cases.

(1) When the number of consecutive MPSs becomes equal to the code order.

(2) When LPS occurs.

As shown in FIG. 21, in both cases (1) and (2), the codeword determined by the first encoder 5 and the codeword from the third encoder 8 temporarily stored in the code buffer 10 are The order of transmission is changed, and after the codeword determined by the first encoder 5 is transmitted, the codeword temporarily stored in the code buffer 10 is transmitted according to an instruction from the encoding control unit 11 (S34). ). In addition, as shown in S35 and S36 in FIG. 21, in the case of (2), the codeword determined by the first encoder 5 and the codeword stored in the code buffer 10 are transmitted. After (S34), the codeword generated by the second encoder 6 is further transmitted (S36). In the example shown in FIG. 19, the codeword is determined at the positions of P1 and P2 by the third encoder 8, but the codeword output from the first encoder 5 is determined at the position of P3. I do. Therefore, the codeword of the third encoder 8 determined at the positions of P1 and P2 is temporarily stored in the code buffer 10 and the code output from the first encoder 5 at the position of P3. When the word is determined, the codeword determined in P3 is output first, and the codeword determined in the positions of P1 and P2 temporarily stored in the code buffer 10 is output later. And P Finally, the codeword of the second encoder 6 determined at the position 4 is output.

In the case of (2), as shown in S44 of FIG. 22, the codeword determined by the first encoder 5, the codeword determined by the second encoder 6, and the codeword temporarily stored in the code buffer 10. It is also possible to transmit the code words of the third encoder 8 in the order. According to the flowchart of FIG. 22, the output order of the codewords shown in FIG. 19 is the codeword of the first encoder 5 determined at the position of P3, and the second code determined at the position of P4. The code word of the encoder 6, the code word of the third encoder 8 determined at the position of P1, and the code word of the third encoder 8 determined at the position of P2 are output in this order.

In the case of codeword transmission order control, the maximum capacity MAX of the code buffer 10 must be determined on the transmitting and receiving sides.

FIG. 23 is a diagram showing an operation when the maximum capacity MAX of the code buffer 10 is specified.

In mode A, X. Encodes the pixels to X _2, when switched to the beta remain mode undetermined and 1 code word [rho in mode beta, [rho 2, to confirm one after another at the position of the - - - code When temporarily stored in the buffer 10, the temporarily stored code words from the third encoder 8 are sequentially stored in the code buffer 10. At this time, the maximum capacity MAX of the code buffer 10 occupied by the temporarily stored codewords is determined, and when the amount of temporarily stored codewords reaches the maximum capacity MAX,

The temporarily stored code word is output to increase the free space of the code buffer 10. As shown in Fig. 23, when the accumulated amount of temporarily stored codewords reaches the maximum capacity MAX, the dummy binary symbol "0" is replaced by the number of codewords required to determine the codeword by mode A. Is added to the binary symbol whose code word is undetermined. Since the case shown in Fig. 23 shows the case where the code order is the fourth order, only one dummy binary symbol "0" is added. Thus, the codeword output from first encoder 5 is determined. Until the codeword of the first encoder 5 is determined, the required number of dummy binary symbols “0” are added to the binary symbols whose codeword is undetermined.

As described above, by forcibly determining the codeword output from the first encoder 5, the codeword determined by the third encoder 8 temporarily stored in the code buffer 10 is determined. It is output and the empty area can be reclaimed in the code buffer 10. By performing such processing, it is possible to prevent the code buffer 10 from overflowing due to the code word determined by the temporarily stored third encoder 8.

As described above, even when the dummy binary symbol “0” is added to the binary symbol whose code word is undetermined, the maximum capacity MAX of the code buffer of the decoding device 500 is set to the maximum value of the coding device 400. By making the same value as the code buffer and adding the dummy binary symbol "0", the decoding operation can be performed correctly.

FIG. 23 shows a case where a dummy binary symbol “0” is added to a binary symbol whose codeword is undetermined to determine the codeword output from the first encoder 5. Alternatively, the codeword output from the first encoder 5 may be determined by adding only one dummy binary symbol “1”. However, when a dummy binary symbol “1” is added, a codeword for a prediction error in the second encoder 6 is not generated.

Next, the prefetching operation of the pixel by the encoding mode A will be described with reference to FIG.

The look-ahead operation of a pixel by the encoding mode A used in the present specification means that the value of a pixel to be encoded later is set to 1 until the code word output from the first encoder 5 is determined. This refers to an operation of reading out pixels in advance. FIG. 24 is a flowchart showing a control processing flow of the encoding control unit 11 started by setting the mode B (S50).

In the pre-reading operation of the pixel in the encoding mode A, as shown in FIG. 24, when the mode B is set in S50, the value of the MPS counter inside the first encoder 5 becomes 0 in S52. It is checked whether it is. If the value of the MPS counter is 0, the codeword output from the first encoder 5 has already been determined, and there is no need for a prefetch operation. If the value of the MPS counter inside the first encoder 5 is other than 0, it indicates that the codeword output from the first encoder 5 is not determined, and is shown in S53 to S56. Perform a prefetch operation. That is, until the code word output from the first encoder 5 is determined (S55), the value of the pixel to be encoded later is read ahead one pixel at a time (S53), and S53 to S5 are read. Perform the look-ahead operation shown in 6 many times. Then, after determining the codeword output from the first encoder 5, the pixel is pre-read, and the mode is returned to the pixel which has not been coded because of the prefetching operation, and the mode B is coded (S57). . The read ahead operation of the pixel in the example of FIG. 1 9 again, the mode Α after pixel X ₂ without move to encoding in the mode one de beta, pixel Xs, and prefetching the value of Kaibeta, first The codeword in the encoder 5 is determined (S55). After that, the mode # encoding is performed on the pixels # ₃ and # ₄ that have not been encoded (S57). However, when performing a pre-read operation, pixels are pre-read for the value of the pixel to be coded later, and then pixels that have not been coded are coded for pre-read operation of the pixel. Line memory is required. The maximum value of the line memory must be determined in advance on the transmitting and receiving sides. The reason is the same as the case shown in Fig. 23. That is, even if the pixel is pre-read in a state where the code word by the first encoder 5 is not determined, the code word of the first encoder 5 may not be determined continuously. Therefore, the line memory that stores pixels If the maximum value is determined in advance and exceeds the maximum value, a dummy binary symbol "0" is added to the binary symbol whose code word is undetermined, and the code word output from the first encoder 5 is output. Confirm. As described above, a codeword output from the first encoder 5 may be determined by adding a dummy binary symbol “1”.

Next, an example of the configuration of the decoding device 500 of the present embodiment will be described with reference to FIG. 25. FIG. 25 is different from FIG. 13 shown in the first embodiment in that the first decoder The difference is that the output from 45 is not input to the mode determiner 42. First decoder 45 shown in FIG. 25 performs the same decoding operation as first decoder 45 shown in FIG. 13 according to the first embodiment. That is, in mode A, a binary symbol whose prediction error indicates a value other than 0 is decoded. Then, the result is transmitted to the decoding control section 43 using the control signal C13. The decoding control unit 43 operates the second decoder 46 based on information indicating whether the prediction error from the first decoder 45 is zero or other than zero. In the following description, an operation that is different from the first embodiment of the present invention will be particularly described.

In the decoding apparatus 500 of the present embodiment, the input codeword is converted into a binary symbol sequence (message), and the pixel value is reproduced using these. In the second embodiment, unlike the first embodiment, before the first decoder 45 uses up a plurality of binary symbols decoded in one mode from one codeword in mode A, the decoding mode is changed to mode A. May switch to mode B. Again taking the case of Figure 19 as an example, X. Can decode up to the binary symbol "0 0 0 1" related to the decoding of X i, Χ ₂ , ， ₅ , Χ ₆ , and the decoding mode is switched to mode 後に after decoding of X ₂ Therefore, the unused binary symbol "0 1" is used after the decoding in mode II is completed. Accordingly, in the decoding in mode 復号, the decoding control unit 43 outputs the unused binary symbols, if any, remaining in the first decoder 45, and outputs the unused binary symbols. If not, obtain a new codeword, convert it to a binary symbol sequence, and instruct the decoder to decode the binary symbol.

As described above, decoding apparatus 500 differs from Embodiment 1 only in that it is necessary to control the order in which the decoded binary symbols are used, and other operations are the same as in Embodiment 1, Here, the description is omitted.

As described above, according to the present embodiment, the encoding mode can be determined for each pixel only based on the state of the reference pixel. As a result, when the encoder is switched from the first encoder 5 to the third encoder 8, the code word may not be determined, but by performing the above-described control, the decoding device 5 0 0 allows pixel decoding from codeword consistently

. When the decoder switches from the third decoder 48 to the first decoder 45, the binary symbol shown in FIG. 9 is encoded as shown in FIG. 67 as described in the first embodiment. As long as encoding is performed by the encoding method, the codeword is always determined, so that it is not necessary to control the order in which the codewords are transmitted and to control the prefetching.

Embodiment 3.

FIG. 26 shows a configuration example of an encoding apparatus 400 according to Embodiment 3 of the present invention. However, FIG. 26 differs from FIG. 17 shown in Embodiment 2 in the configuration of the encoder.

FIGS. 27, 28, and 29 are block diagrams respectively showing configuration examples of first encoder 5a, second encoder 6a, and third encoder 8a in this embodiment. FIG.

The first encoder 5a, the second encoder 6a, and the third encoder 8a include exclusive OR circuits 95, 96, 98, respectively. The exclusive OR circuits 95, 96, and 98 receive the binary symbol X and the MPS (Y) output from the probability estimators 25a, 26a, and 28a. The operation shown in the truth table is performed, and the exclusive OR signal Z is output to the probability estimator. here , MP S (Y) means the value of the binary symbol that the probability estimator interprets as MPS at the time of encoding, ie, “0”, “1”.

The operation of encoding apparatus 400 according to the present embodiment will be described.

The encoding mode determination in the present embodiment is performed by the same method as in the second embodiment. In other words, as shown in Fig. 18, if reference pixels a, b, and c near a certain pixel X satisfy the condition " _a = b = c", the pixel is coded in mode A, and the condition must not be satisfied. If so, encode the pixel in mode B.

Embodiment 3 is different from Embodiment 2 in that the interpretation of MPS / LPS is switched during the state transition during encoding by the encoding method shown in FIG. 67. In the first and second embodiments, the first encoder 5 interprets MPS as “0” (binary symbol indicating prediction match), and the second encoder 6 and the third encoder 8 S was interpreted as "0" as defined in Figs. However, in the third embodiment, as shown in the flow of FIG. In the case where an LPS (prediction mismatch) occurs (S72), the interpretations of the MPS and the LPS are replaced thereafter (

S 7 3). For example, when encoding is performed in the first encoder 5, the state S. If the binary symbol "1" (predicted mismatch) occurs while interpreting as MPS = "0", the interpretation of MPS and LPS after outputting this codeword Transpose, interpret MPS as "1" and interpret LPS as "0" to generate codeword. Conversely, when encoding is performed in the first encoder 5, the state S is set. If the binary symbol "0" is generated while interpreting MPS = "1", the MPS is interpreted as "0" after outputting the codeword, and the LPS is interpreted as "0". Interpret as "1".

Thus, state S. Inverting the interpretation of MPS and LPS when the prediction is incorrect in the above means that the assumption that MPS should have a higher probability of occurrence is broken, and that the state of LPS has a higher probability of occurrence. If it has occurred Because I think. Once the interpretation of MPS and LPS is reversed, state S again. Then, the MPS and LPS are interpreted and encoded until LPS occurs. The exclusive OR circuits 95, 96, 98 receive the binary symbol X and the MPS (Y) output from the probability estimators 25a, 26a, 28a, and generate an exclusive OR signal Ζ Is output. That is, if the binary symbol X and MPS match, an exclusive OR signal Z representing the binary symbol "0" is output. If the binary symbol X and MPS do not match, the binary symbol " An exclusive OR signal Z representing 1 "is output. Regarding the rules for state transition, the same rules as above are used regardless of whether MPS = "0" or MPS = "1". That is, the state transition can be performed by regarding the exclusive OR signal Z, which is the output of the exclusive OR circuit, as representing the binary symbol that determines the state transition in the first and second embodiments. You.

In the case described above, the case where the interpretation of MPS and LPS is changed using the state transition method according to the first example of the method of determining the code order has been described. However, the counting method of 01 according to the second example of the above-described method of determining the code order can be easily realized by comparing N (0) and N (1). That is, if N (0)> N (1), the force interpreting MPS as "0" and interpreting LPS as "1" ^ N (0) <N (1) Interpret MPS as "1" and LPS as "0".

Due to the change in the interpretation of MPS and LPS, the method of controlling the codeword transmission order differs from the method described in the second embodiment. In the second embodiment, the codeword transmission order can be controlled if the presence or absence of the codeword determination is known only when the encoding is performed by switching from the first encoder 5 to the third encoder 8. In the third embodiment, in this case, the codeword is not necessarily located at the codeword completion position shown in FIG. Is not completed.

FIG. 31 is a diagram illustrating a state of encoding when the interpretation of MPS and LPS is changed.

In FIG. 31, encoders 5a and 6a interpret MPS as "0", LPS as "1", and encoder 8a interpret MPS as "1".

, LPS is interpreted as "0".

The binary symbol X is converted to an exclusive OR signal Z by the exclusive OR circuit. Therefore, the encoders 5a, 6a, and 8a must input and encode a plurality of exclusive OR signals Z as a binary symbol sequence. In the case of the binary symbol X, as shown in FIGS. 8 and 9, a binary symbol sequence always terminated with LPS is formed, but the exclusive OR signal Z is obtained by inverting the binary symbol X. Therefore, in some cases, the binary symbols shown in FIGS. 8 and 9 are inverted, and the codeword cannot be determined by each encoder when the coding mode is switched. Therefore, regardless of which encoder the encoder switches to another encoder, the encoding control unit 11 determines the code word in the encoder before switching to the other encoder. You need to know if it is.

For example, when the codeword of the encoder 8a is determined at the position of P1 in FIG. 31, the coding control unit 11 determines that the other encoder (the MPS counter value is not determined) for which the codeword is not determined. Check if there is one or more encoders), and if not, instruct the code buffer 10 to output the determined codeword as it is. If there is an encoder whose codeword has not been determined, the codeword determined by encoder 8a is temporarily stored in code buffer 10 and output after another codeword is determined by another encoder. . As shown in Fig. 31, at the position of P1, the codeword to be output from the encoder 5a has not been determined yet, so that the codeword to be output from the encoder 5a has been determined at P2. From, confirmed at position P 1 Output codeword. Regarding FIG. 31, when the encoder switches from the encoder 8a to the encoder 5a, the codeword output from the encoder 8a cannot be determined. The codeword to be output from the encoder 5a is determined at the position of P2, and this codeword is output before the codeword determined at the position of P1, as described above. Then, the codeword determined at the position of P3 by the encoder 6a is temporarily stored in the code buffer 10. Thereafter, when the codeword to be output from the encoder 8a is determined at the position of P4, the codeword determined at the position of P3 is output after the codeword determined at the position of P4. In other words, by performing the above processing, the codewords are transmitted in the order of generation of the first symbol of each message (the symbol whose MPS counter has started counting the number of MPS).

Next, a configuration example of the decoding device 500 of the present embodiment will be described using FIG.

FIGS. 33, 34, and 35 are block diagrams showing examples of the internal configuration of the decoders 45a, 46a, and 48a, respectively.

The decoding device 500 converts the input codeword into a binary symbol sequence (message), and reproduces the value of the corresponding pixel using the binary symbols. In the third embodiment, before a plurality of binary symbols decoded from one codeword are used up by one decoder, binary symbols decoded by another decoder may be used. The decoding control unit 43 outputs the unused binary symbol if it remains in the decoder switched from another decoder, and acquires a new codeword if there is no unused binary symbol. And instructs the decoder to decode the binary symbol.

The decoding apparatus according to the present embodiment, 500, differs from the second embodiment only in the control of the order in which the decoded binary symbols are used, and the other operations are the same as in the second embodiment. . Embodiment 4.

FIG. 36 is a block diagram illustrating a configuration example of an encoding device 400 according to Embodiment 4 of the present invention.

In FIG. 36, the encoders 5a, 6a, and 8a are encoders having the same configuration as those shown in FIGS. 27, 28, and 29, respectively.

The operation of the encoding device 400 of the present embodiment will be described.

The coding mode determination in the present embodiment is performed by the same method as in the first embodiment. In other words, as shown in Fig. 10, if the reference pixels a, b, and c near a certain pixel X satisfy the condition "a == b = c" once, a pixel that becomes "X ≠ prediction value" appears. Continuously encode by mode A. Embodiment 4 is different from Embodiment 1 in that the interpretation of MPS and LPS is switched during the state transition in the encoding by the encoding method shown in FIG. 67. In the first and second embodiments, the first encoder 5 interprets the MPS as “0” (binary symbol indicating prediction match), and the second encoder 6 and the third encoder 8 interpret the MPS as It is interpreted as "0" defined in Figs. However, in the fourth embodiment, the state S is set at the time of the state transition. If an LPS occurs in this case, the interpretation of the MPS and the LPS will be replaced thereafter. The rules for state transition are performed in the same manner as in the first, second, and third embodiments. As described above, a change in the interpretation of the MPS LPS can be easily realized by comparing N (0) and N (1) even when the state transition is performed by the 0-1 counting method.

Thus, the method of controlling the codeword transmission order is the same as that of the third embodiment. That is, in the second embodiment, only when the encoder is switched from the first encoder 5 to the third encoder 8, if the presence or absence of a codeword is known, the codeword transmission order can be controlled. In the fourth embodiment, the codeword is not always completed at the codeword completion positions of P1 to P4 shown in FIG. If it is switched to another encoder, the encoding control unit needs to know whether or not the codeword used in the encoder used before switching has been determined. A configuration example of the decoding device 500 will be described with reference to FIG.

In FIG. 37, the decoders 45a, 46a and 48a have the same configuration as the decoders shown in FIGS. 33, 34 and 35, respectively.

The decoding device 500 converts the input codeword into a binary symbol sequence (message), and reproduces the pixel value using the binary symbols. In Embodiment 4, before a plurality of binary symbols decoded from one codeword are used up by one decoder, binary symbols decoded by another decoder may be used. The decoding controller outputs an unused binary symbol if it remains in the decoder switched from another decoder, and if there is no unused binary symbol, acquires a new codeword. Instructs the decoder to decode the value symbol.

In decoding apparatus 500 according to the present embodiment, only the control of the order in which the decoded binary symbols are used is different from that of the third embodiment, and the other operations are the same as those of the third embodiment.

Embodiment 5.

In the above embodiment, it is assumed that there is one MPS counter, one state number memory for storing state numbers, and one MPS memory for storing the value of MPS inside the encoder. As described above, as shown in Fig. 38, the encoder may have a plurality of MPS counters, state number memories, and MPS memories. In Fig. 38, a plurality of MPS counters C1, C2, C3, ..., state number memory Rl, R2, R3, ''', ^ 1? 3 memory inside the encoder 01, Q 2, Q 3, · · 'exists. · MPS counters CI, C2, C3, · · · ·, state number memory Rl, R2, R3, · · · MPS memory Ql, Q2, Q3, · · · It is provided corresponding to the state. As described above, even a decoder in which a plurality of MPS counters, state number memories, and MPS memories exist in correspondence with the states of the reference pixels can be applied to the above-described embodiment.

FIG. 39 is a block diagram illustrating another configuration example of the encoding device 400 of the present embodiment.

When the predictor 3 and the predictor 7 described above calculate the predicted value of the coded pixel using the same prediction method, the predictor 3 and the predictor 7 and the first prediction error calculator 30 and the It is not necessary to provide two prediction error calculators 31 separately, and the output from the prediction error calculator 30 including the output of the predictor 3 is output to the third encoder 8 as shown in FIG. It does not matter.

FIG. 40 is a block diagram showing a configuration example of a decoding device 500 corresponding to the encoding device 400 shown in FIG.

Also in FIG. 40, as in the case of FIG. 39, only one predictor and one decoded pixel calculator exist in the decoding device 500.

FIG. 41 is a block diagram showing another configuration example of encoding apparatus 400 of the present embodiment.

FIG. 42 is a block diagram showing an example of the internal configuration of the encoder 5b shown in FIG.

A feature of the encoding device 400 shown in FIG. 41 is that the first encoder 5 and the second encoder 6 are unified into one encoder 5b. The configuration of the encoder 5b is as shown in FIG. The encoder 5b is provided with a switch 85, and the zero determiner 4 and the probability estimator 2 are provided by the control signal C2.

Connect 5. In addition, the error signal symbol converter 36 is controlled by the control signal C 3. Connect the probability estimator 25. As described in the above-described embodiment, the first encoder 5 and the second encoder 6 encode binary symbols using the same encoding method only with different inputs. By using the encoder 5b as shown in FIG. 42, the configuration of the encoder 400 can be simplified.

FIG. 43 is a block diagram showing a decoding device 500 corresponding to the encoding device 400 shown in FIG.

FIG. 44 is a block diagram showing the internal configuration of the decoder 45 b used in the decoding device 500 shown in FIG.

A combination of the first decoder 45 and the second decoder 46 described in the above embodiment is a decoder 45b shown in FIG.

FIG. 45 is a block diagram showing another configuration example of encoding apparatus 400 of the present embodiment.

FIG. 46 is a block diagram illustrating a configuration example of the encoder 6b of the encoding device 400 illustrated in FIG.

FIG. 47 is a diagram illustrating a decoding device 500 corresponding to the encoding device 400 illustrated in FIG.

FIG. 48 is a diagram illustrating a configuration example of the decoder 46 b of the decoding device 500 illustrated in FIG. 47.

A feature of the encoding device 400 shown in FIG. 45 is that the second encoder 6 and the third encoder 8 are combined into an encoder 6b. The difference between the second encoder 6, the third encoder 8, and the encoder 6 b described in the above-described embodiment is the correspondence between the prediction error and the binary symbol shown in FIGS. 8 and 9. However, the encoder 6b operates otherwise identically. Therefore, as shown in FIG. 46, the error Z symbol converter 3 in the encoder 6 b

By switching 6 and 3 8 using switch 85, the ^second encoder An encoder 6b obtained by integrating the sixth encoder 6 and the third encoder 8 can be configured. Also in the case of the decoder 46 b shown in FIG. 48, the second decoder 4 shown in FIG. 13 or FIG. 25 is switched by switching the symbol error converters 86 and 88 by the switch 85. A decoder 46 b obtained by integrating the sixth and third decoders 48 can be configured.

FIG. 49 is a block diagram illustrating another configuration example of an encoding device 400 according to the present embodiment.

FIG. 50 is a block diagram showing an encoder 5c obtained by integrating the first encoder 5, the second encoder 6, and the third encoder 8 described in the above embodiment. The switch 85 switches the output of the zero determiner and the output of the error symbol converters 36 and 38, thereby providing the encoder 5c with the above-described first encoder 5, second encoder 6, It is possible to combine the functions of the third encoder 8.

Although not shown in the present specification, the first decoder 45, the second decoder 46, and the third decoder 48 also have the same structure as the encoder 5c. It can be configured as one decoder.

Embodiment 6

FIG. 51 is a block diagram illustrating another configuration example of an encoding device 400 according to the present embodiment.

The encoding device 400 shown in FIG. 51 is obtained by removing the mode determiner 2 and the second encoding unit 102 from the encoding device 400 shown in FIG. The determination result output from the zero determiner 4 to the mode determiner 2 is input to the encoding control unit 11 in FIG. The encoding control unit 11 operates the first encoder 5 and the second encoder 6 using the control signals C2 and C3 based on the determination result of the zero determiner 4. Further, the encoding control unit 11 operates the code switch 9 using the control signal C 5, and the first encoder 5 and the second encoder Select and output an appropriate codeword from the codewords output from 6. FIG. 52 is a block diagram showing another configuration example of the decoding device 500 according to the present embodiment.

The decoding device 500 shown in FIG. 52 is obtained by removing the mode decision unit 42 and the second decoding unit 202 from the decoding device 500 shown in FIG. The first decoder 45 decodes the codeword into a decision result represented by a binary symbol indicating whether or not the prediction error is 0, and the decision result is input to the decoding control unit 43. The decoding control unit 43 controls the pixel switch 12 with the control signal C12 based on the input determination result.

The encoding apparatus 400 shown in FIG. 51 is characterized in that it determines whether the prediction is correct or not, and encodes the encoded pixel based on the determination result. The decoding apparatus 500 shown in FIG. 52 is characterized in that it determines whether or not the value of a decoded pixel is predicted, and decodes a codeword into a decoded pixel based on the determination result. In this way, when the prediction probability is high, the prediction or success is determined, and the encoding or decoding is performed in units of a message consisting of one or more binary symbols indicating the prediction success or failure. As compared with the case where the prediction error is always encoded or decoded, more efficient encoding or decoding can be performed.

In the above embodiment, the predictors 3 and 7 calculate the predicted value of the coded pixel from the value taken by the reference pixel. However, if necessary, the mode identification signal CM is transmitted from the mode determiner to the predictor 3. And 7 to calculate the predicted value based on the mode identification signal CM and the value taken by the reference pixel.

Further, in the above embodiment, it is assumed that the reference pixels are three pixels a, b, and c, but the number of reference pixels may be one or more. Further, in the above embodiment, it is assumed that the mode A is selected when the reference pixels a, b, and c satisfy the condition of _a = b = c J. This condition may be changed according to the change in the number of reference pixels. For example, if there are reference pixels a, b, c, and d, mode A may be selected if the condition “a = b = d” is satisfied.

In the above embodiments, the use of computer hardware or software has not been specifically described. However, all or some of the functions of the above-described components are implemented by a computer hardware. It does not matter. Alternatively, the function of each component may be realized by software. Alternatively, it may be realized by firmware. Alternatively, it may be realized by a combination of them. Alternatively, all or a part of the functions may be realized by being integrated in one semiconductor chip.

Further, in the above embodiment, the case where the first, second, and third encoders and the first, second, and third decoders all use the encoding method shown in FIG. 67 will be described. However, the encoding and decoding may be performed without using the encoding method shown in FIG. 67.

Further, in the above-described embodiment, the case where the image information is encoded or decoded has been described. However, when the audio information, the optical information, and other information are encoded or decoded, the above-described embodiment is also applicable. It can be realized in form. In particular, when the input information tends to take a specific value, efficient coding can be performed. For example, if the audio information or optical information has information extracted from the same background as the image signal or information extracted from a certain background, the audio information or optical information is also used. It can be regarded as image information in this specification, and can perform efficient encoding.

Embodiment 7

FIG. 53 shows an image pickup apparatus (digital power supply) according to an embodiment of the image processing apparatus of the present invention. FIG. 3 is a diagram illustrating a configuration example of a digital camera 600 that records a still image on a memory card.

In FIG. 53, reference numeral 325 denotes an imaging unit that captures an image composed of a plurality of pixels, reference numeral 311 denotes a solid-state imaging device used as a sensor that converts an optical image into an electric signal, and reference numeral 312 denotes a solid-state imaging device 311. Lens for forming an optical image on the solid-state image sensor 3 1 3 is a diaphragm for adjusting the amount of light incident on the solid-state image sensor 3 1 1 1, 3 1 4 is a shutter for adjusting the exposure time of the solid-state image sensor 3 1 1 Is an AD (Ana1ogtoDigita1) conversion circuit that converts the output of the solid-state imaging device 311 into a digital signal, and 316 is a signal of one frame of the solid-state imaging device 311 that is converted into a digital signal. Is a frame memory consisting of a semiconductor memory that temporarily stores the data, and 317 extracts the data of at least two or more adjacent lines from the output signal of the solid-state image sensor 331 stored in the frame memory 316, and outputs the signal of each pixel. The luminance signal Y and the color difference signals U and V from the A recording signal processing circuit 318 for encoding and outputting the luminance signal Y and color difference signals U and V generated by the recording signal processing circuit 317 and compressing the data, and 319 an image compression circuit Memory card composed of semiconductor memory to record data, 320 is an image decompression circuit that decompresses encoded image data read from the memory card 319, and 321 is an extended luminance A reproduction signal processing circuit (or display circuit) for displaying the signal Y and the color difference signals U and V on the monitor 324. Reference numeral 3222 denotes a system controller for controlling the operation of the solid-state imaging device 311. Reference numeral 3223 denotes a trigger switch for starting photographing.

FIG. 54 is a diagram showing a sequence for recording a still image by the digital camera 600 in FIG.

When trigger switch 3 23 is turned on at time T 0, a series of still image recording sequences described below is started. First, between time TO and T1 Then, the transfer of the electric charge stored in the solid-state imaging device 311 is performed. Next, a photometric operation is performed by a photometric device (not shown), and an appropriate exposure time and an appropriate exposure stop are set. Next, from time T2 to T3, the shutter 3-14 is opened, and the solid-state imaging device 311 is exposed. Next, when the shutter 3114 is closed at time T3, the exposure signal charges are read out from the solid-state imaging device 311. The signal read from the solid-state imaging device 311 is converted into a digital signal by the AD conversion circuit 315, and the signal for one frame is temporarily stored in the frame memory 316. Next, when the reading of the exposure signal is completed at time T4, the signal once stored in the frame memory 316 is read from time T4 to time T5, and the recording signal processing circuit 317 A luminance signal Y and color difference signals U and V are obtained by calculation from data of several pixels adjacent to the solid-state imaging device 311. The luminance signal Y and the color difference signals U and V are coded data compressed by the image compression circuit 318 and recorded on the memory card 319.

FIG. 55 is a diagram showing a configuration of the image compression circuit 318.

The image compression circuit 318 includes three encoding devices 400. As the encoding device 400, the encoding device described in the first to sixth embodiments can be used. For example, the encoding device 400 shown in FIG. 4 can be used. The encoding device 400 inputs the luminance signal Y and the color difference signals U and V from the recording signal processing circuit 317 in parallel. Each encoding device 400 performs encoding using the encoding method described above. The encoded result is output to the memory card 319, stored, and input to the encoding device 400. The luminance signal Y is a luminance signal Y for one frame, that is, Υ1, 即ち 2, ···, Υη, as shown in FIG. The luminance signal の is input and encoded. Similarly, the color difference signals U and V are coded by each coding device 40 °. FIG. 56 is a diagram showing the configuration of the image decompression circuit 320.

The image decompression circuit 320 is provided with three decoding devices 500. As the decoding device 500, the decoding device described in the first to sixth embodiments can be used. For example, the decoding device 500 shown in FIG. 13 can be used. The image decompression circuit 320 receives in parallel the codes of the luminance signal Y and the color difference signals U and V from the memory card 319, decodes them in the respective decoding devices 500, and reproduces the reproduced signal. Output to

FIG. 57 is a diagram illustrating another example of the image compression circuit 318.

The image compression circuit 318 shown in FIG. 57 includes one encoding device 400. The encoding device 400 serially inputs the luminance signal Y and the color difference signals U and V from the recording signal processing circuit 317 for each frame. That is, a luminance signal 分の for one frame consisting of Y 1, Υ 2,..., Η η is input, and then a color difference signal for one frame consisting of U l, U 2,. The color difference signal V for one frame consisting of U, VI, V2,. In the case shown in FIG. 57, only one encoding device 400 is required, and the configuration of the image compression circuit 318 is simplified.

FIG. 58 is a diagram showing another configuration of the image decompression circuit 320.

The image decompression circuit 320 is provided with one decoding device 500. The image decompression circuit 320 inputs a code coded in frame units from the memory card 319 serially, decodes the luminance signal Y and the color difference signals U and V in frame units, 2 Output to 1.

In the case shown in Figs. 57 and 58, encoding or decoding is performed in frame units, but not limited to frame units, but encoding or decoding is performed in block units of a certain size. But it doesn't matter. Alternatively, encoding or decoding may be performed in units of a plurality of lines.

FIG. 59 is a diagram showing another configuration of the digital camera 600. FIG. 59 differs from FIG. 53 in that an image is displayed on the monitor 324 via the frame memory 316.

FIG. 60 is a diagram showing another configuration of the digital camera 600. FIG. 60 differs from FIG. 53 in that the memory card 319 does not exist in the case of FIG. 60, and the image compression circuit 318 and the image expansion circuit 320 are arranged before and after the frame memory 316. Is a point.

Even in the cases shown in FIGS. 59 and 60, the image compression circuit 318 and the image decompression circuit 320 having the configurations shown in FIGS. 55 to 58 can be used. FIG. 61 is a diagram showing another configuration of the digital camera 600 and the configuration of the computer 700.

The feature of the configuration shown in FIG. 61 is that the image compression circuit 318 of the digital camera 600 performs compression processing and the computer 700 performs decompression processing. In the digital camera 600, only the compression processing is performed, and the compressed data is stored in the memory card 319. The memory card 319 is attached to the computer 700 offline. The code stored in the memory card 3 19 is read out by the CPU (Centra 1 Processing Unit) 70 1 and the image decompression program 70 3 stored in the RAM (R andom Access Memory) 70 2 And perform decompression processing. Thereafter, desired image processing is performed by the image processing program 704, and display printing and the like can be performed. When the digital camera 600 has a communication function, the code stored in the memory card 319 can be sent to a remote place using wired communication or wireless communication. FIGS. 62 and 63 show the case where the signals input to the image compression circuit 318 are the color signals R, G and B.

64 and 65 show the case where the signals input to the image compression circuit 318 are the color signals R, G1, G2, and B. Although not shown, in the case of the image decompression circuit 320, the color signal can be decoded with the same configuration as that shown in FIGS. 62 to 65.

In the above example, the case where codes are stored using the memory card 319 is shown, but other secondary storage devices such as a flexible disk, a fixed disk, and a flash memory are used in addition to the memory card 319. You may do so. Alternatively, the code may be transferred to the outside by a communication device or a cable without storing the code in the storage device. Industrial applicability

As described above, the present invention provides an efficient encoding device and decoding device and their methods. In particular, an encoding system corresponding to a plurality of encoding modes is provided, and image information is efficiently encoded or decoded by an encoding system corresponding to the encoding mode.

Further, according to the present invention, at the time of switching the encoding mode, image information can be appropriately encoded and decoded correctly even when the code is not determined.

Further, the present invention can appropriately encode and decode correctly even when the interpretation of MPS and LPS is changed.

According to the present invention, an encoding device, a decoding device, or an image processing device can be compactly configured.

Further, according to the present invention, since a higher compression ratio can be obtained than the conventional image compression ratio, a high-quality image can be stored in a storage medium with a small capacity.

Therefore, a larger amount of image information can be stored in a storage medium provided in an image processing apparatus such as a digital camera than in a conventional storage medium. The availability of

Claims

The scope of the claims

1. Input and accumulate a pixel having a value within a predetermined range as a coded pixel, output the value of the coded pixel to be coded, and calculate the value of the coded pixel in the vicinity of the coded pixel. A pixel memory (1) for outputting a value as a reference pixel value;

A mode determiner that selects one of a specific coding mode and another coding mode for a coded pixel based on the value of a reference pixel from a plurality of coding modes defined in advance. (2) and

A first encoding unit (1011) that predicts the value of an encoded pixel, determines whether the prediction is correct, and encodes the value of the encoded pixel based on the determination result and outputs a codeword.

) When,

A second encoding unit (102) for predicting the value of an encoded pixel and encoding the value of the encoded pixel to output a codeword without determining whether the prediction is correct or not; (2) an encoding control unit (11) that selectively operates the first and second encoding units based on either the specific encoding mode selected or another encoding mode;

An encoding device (400), comprising:

2. The first encoding unit (101) includes a first predictor (3) that calculates a predicted value of an encoded pixel based on a value taken by a reference pixel;

A first prediction error calculator (30) that calculates an error between the value of the coded pixel and the prediction value calculated by the first predictor (3) as a prediction error;

A decision unit (4) for judging whether or not the prediction error calculated by the first prediction error calculator (30) is a specific value, and outputting a judgment result;

For the coded pixel to be coded in the selected specific coding mode, the judgment result output from the judgment unit (4) is input and coded, and the code word is output. A first encoder (5)

For the coded pixels to be coded in the selected specific coding mode, wherein the prediction error calculated by the first prediction error calculator (30) is not the specific value, A second encoder (6) that encodes the prediction error and outputs the corresponding codeword

The encoding device (400) according to claim 1, characterized by comprising:

3. The second encoding unit (102) includes a second predictor (7) that calculates a predicted value of an encoded pixel based on a value taken by a reference pixel;

A second prediction error calculator (31) that calculates an error between the value of the coded pixel and the prediction value calculated by the second predictor (7) as a prediction error;

For a coded pixel to be coded in a mode other than the selected specific coding mode, the prediction error calculated by the second prediction error calculator (31) does not correspond to the specific value. Regardless, a third encoder (8) that encodes the prediction error and outputs the corresponding codeword

The encoding device (400) according to claim 2, comprising:

4. The first encoder (5) inputs the decision result output from the discriminator (4) as a binary symbol sequence, and the probability of occurrence of one of the binary symbols among the binary symbols. And a first codeword allocator (15) that encodes a sequence of binary symbols. The second encoder (6) has a predictor The first error symbol converter (36) that inputs the error and converts the prediction error into a binary symbol sequence, and the binary symbol of either one of the binary symbols that is input with the binary symbol sequence A second probability estimator (26) for estimating a symbol appearance probability, and a second codeword allocator (16) for encoding a binary symbol sequence,

The third encoder (8) includes a second error / symbol converter (38) that inputs a prediction error and converts the prediction error into a binary symbol sequence, and a binary symbol Third probability estimator (28) for estimating the probability of occurrence of one of the binary symbols among binary symbols and a third codeword assignment for encoding the binary symbol sequence The encoding device (400) according to claim 3, characterized in that the encoding device (18) is provided.

5. The encoding control unit (1 1) includes at least the first encoder (5

), The second encoder (6) and the third encoder (8) determine the codeword by one of them, and the remaining encoders do not determine the codeword 5. The encoding apparatus according to claim 4, further comprising a codeword sending order controller for changing a codeword output order.

6. At least one of the first error / symbol converter (36) and the second error Z-symbol converter (38) is the first error / nosymbol converter (36) The first error Z symbol converter (3 6) generates a comparison value in order from a value having a high possibility of appearing as a prediction error value input to the second error symbol converter (38). Is sequentially compared with the prediction error input to one of the second error symbol converters (38), and based on the number of comparisons until the prediction error matches one of the generated comparison values. The encoding device according to claim 4, wherein the encoding device creates and outputs a binary symbol sequence.

7. The method according to claim 1, wherein the mode determiner (2) further selects a coding mode of the coded pixel based on a coding mode of a coded pixel preceding the coded pixel. The coding device (400).

8. At least one of the first codeword allocator (15), the second codeword allocator (16), and the third codeword allocator (18) is a Of the binary symbols estimated by the probability estimator (25a), the second probability estimator (26a), and the third probability estimator (28a) Binary symposium based on estimated probability change of symbol The encoding device (400) according to claim 4, wherein the interpretation of which of the symbols is the dominant symbol is changed.

9. The first predictor (3) of the first encoder (101) and the second predictor (7) of the second encoder (102) are integrated and shared. The encoding device (400) according to claim 1, wherein the coding device is a predictor.

10. At least two of the first encoder (5), the second encoder (6), and the third encoder (8) are integrated into a common encoder. The encoding device (400) according to claim 1, characterized in that:

1 1. At least one of the first codeword allocator (15), the second codeword allocator (16), and the third codeword allocator (18)

Estimated occurrence of the dominant symbol from the Huffman code set systematically created for the extended information source of the binary symbol based on information on which of the binary symbols is the dominant symbol and the estimated probability of occurrence of the dominant symbol 5. The encoding apparatus according to claim 4, wherein the binary information source coding is realized by selecting an optimum code for the situation of the extended information source of the binary symbol assumed from the probability. ).

1 2. A pixel memory that accumulates decoded pixels having any value within a predetermined range and outputs the values of decoded pixels near the decoded pixel to be decoded as the values of reference pixels (4 1 ) When,

Based on the value of the reference pixel from a plurality of predefined decoding modes

A mode determiner (42) for selecting one of a specific decoding mode and another decoding mode for a decoded pixel;

A first decoding unit that receives a code word, predicts a value of a decoded pixel, determines whether the prediction is correct, and decodes the code word into a decoded pixel value based on the determination result (201) When,

Enter the codeword and predict the value of the decoded pixel to determine whether the prediction is correct A second decoding unit (2 0 2) that decodes the codeword into decoded pixel values without determining

A decoding control unit (43) for selectively operating the first and second decoding units based on either the specific decoding mode selected by the mode determiner (42) or the other decoding mode;

A decoding device (500), comprising:

1 3. The first decoding unit (201) includes a first predictor (3) that calculates a predicted value of a decoded pixel based on a value taken by a reference pixel;

A first decoder (45) for decoding a corresponding codeword into a determination result indicating whether or not a prediction error is a predetermined value, for a decoded pixel to be decoded in the selected specific decoding mode;

For a decoded pixel that is decoded in the selected specific decoding mode and has a prediction error that is not the predetermined value, a second decoding unit that decodes a corresponding codeword into the prediction error. A decoder (4 6) and

The value of the decoded pixel is calculated from the predicted value of the decoded pixel calculated by the first predictor (3), the determination result, and the prediction error obtained by the second decoder (46). The first decoded pixel calculator (3 2)

The decoding device (500) according to claim 12, further comprising:

1 4. The second decoding unit (202) calculates a predicted value of the decoded pixel based on the value of the reference pixel, and a second predictor (7).

A third decoder for decoding a corresponding codeword into a prediction error for a decoded pixel decoded in a mode other than the selected specific decoding mode, regardless of whether the prediction error is the predetermined value or not. (4 8) and

The decoding is performed in a mode other than the specific decoding mode selected from the prediction value of the decoded pixel calculated by the second predictor (7) and the prediction error decoded by the third decoder (48). The second decoded pixel for which the value of the decoded pixel is calculated Calculator (3 3) and

The decoding device according to claim 13, further comprising:

1 5. The first decoder (45) receives either a codeword and decodes it into a binary symbol sequence (55), or one of the binary symbols. And a first probability estimator (75) for estimating the probability of occurrence of the binary symbol of the binary symbol sequence.

The second decoder (46) receives either a codeword and decodes it into a sequence of binary symbols (56), or a binary symbol and receives a binary symbol. A second probability estimator (76) that estimates the appearance probability of one binary symbol, and a first symbol error converter (8) that inputs a binary symbol sequence and converts the binary symbol sequence into a prediction error 6), the third decoder (48) includes a third symbol reconstructor (58) for inputting a codeword and decoding it into a binary symbol sequence, and a binary symbol for inputting a binary symbol. Among them, a third probability estimator (78) that estimates the appearance probability of one of the binary symbols, and a second probability estimator that inputs the binary symbol sequence and converts the binary symbol sequence into a prediction error The decoding device (500) according to claim 14, further comprising a symbol / error converter (88).

1 6. The decoding control unit (43) performs decoding by at least one of the first decoder (45), the second decoder (46), and the third decoder (48). If one of the other decoders outputs a binary symbol sequence before the entire binary symbol sequence is used, a binary symbol use order controller that changes the order in which the decoded binary symbols are used. The decoding device (500) according to claim 15, further comprising:

1 7. At least one of the first symbol Z error converter (8 6) and the second symbolo error converter (8 8) The decoding device (500) according to claim 15, wherein a binary symbol sequence input based on the value and the number of the binary symbols is converted into a prediction error.

18. The mode determiner (42) further selects a decoding mode of a decoded pixel based on a decoding mode of a decoded pixel preceding the decoded pixel. 12. The decoding device according to (2).

1 9. At least one of the first symbol decompressor (55), the second symbol decompressor (56), and the third symbol decompressor (58) has a corresponding first probability. The estimator (75), the second probability estimator (76), and the third probability estimator (78) estimate which of the binary symbols is the dominant symbol based on the estimated probability change of the binary symbol. The decoding device (500) according to claim 15, wherein the decoding device is changed.

20. The first predictor (3) of the first decoding unit (20 1) and the second predictor (7) of the second decoding unit (202) are integrated into a common predictor. The decoding device (500) according to claim 12, wherein the decoding device (500) performs the decoding.

2 1. At least one of the first decoder (45), the second decoder (46), and the third decoder (48) is integrated with a common decoder. The decoding device (500) according to claim 12, wherein the decoding is performed. 22. At least one of the first symbol decompressor (55), the second symbol decompressor (56), and the third symbol decompressor (58) is a symbol whose binary symbol is the predominant symbol. From the Huffman code set systematically created for the binary symbol extended information source based on the information on the estimated symbol appearance and the estimated appearance probability of the dominant symbol. The decoding device (500) according to claim 15, wherein decoding is performed on a binary information source realized by selecting an optimum code for a situation of an extended information source.

23. A pixel having any value within a predetermined range is input and stored as a coded pixel. An output step of outputting a value of an encoded pixel to be encoded and outputting a value of an encoded pixel near the encoded pixel as a value of a reference pixel;

A mode for selecting one of a specific coding mode and another coding mode for a coded pixel from a plurality of predefined coding modes based on a value taken by a reference pixel. One-step determination step;

A first main encoding step of predicting the value of the coded pixel, determining whether the prediction is correct or not, and coding the value of the coded pixel based on the determination result to output a codeword; A second main encoding step of predicting and encoding the value of the encoded pixel and outputting a codeword without determining whether the prediction is correct or not;

A coding control step of selectively operating the first and second main coding steps based on the specific coding mode selected by the mode determination step and other coding modes. Encoding method to be used.

24. The first main encoding step includes: a first prediction step of calculating a predicted value of an encoded pixel based on a value taken by a reference pixel;

For a coded pixel to be coded in the selected specific coding mode, wherein the prediction error calculated in the first prediction error calculation step is not the predetermined value, the prediction error is A second encoding step of encoding and outputting the corresponding codeword 23. The encoding method according to claim 23, comprising:

25. The second main encoding step includes: a second prediction step of calculating a predicted value of the encoded pixel based on a value taken by the reference pixel;

A second prediction error calculation step of calculating an error between the value of the coded pixel and the prediction value calculated in the second prediction step as a prediction error;

Regarding the coded pixel to be coded in a mode other than the selected specific coding mode, whether the prediction error calculated in the second prediction error calculation step is the predetermined value or not is the prediction error. 26. The encoding method according to claim 24, further comprising: a third encoding step of encoding a codeword and outputting a corresponding codeword.

26. In the first encoding step, the decision result output from the decision step is input as a binary symbol sequence to estimate the appearance probability of one of the binary symbols among the binary symbols. And a first codeword allocating step of encoding a binary symbol sequence.

The second encoding step is one of a first error / symbol conversion step of inputting a prediction error and converting the prediction error into a binary symbol sequence and a binary symbol sequence of inputting a binary symbol sequence A second probability estimating step of estimating the probability of occurrence of the binary symbol of the following, and a second codeword allocating step of encoding the binary symbol sequence,

The third encoding step is one of a second error / symbol conversion step of inputting a prediction error and converting the prediction error into a binary symbol sequence, and one of a binary symbol and inputting a binary symbol sequence. 26. The encoding method according to claim 25, further comprising: a third probability estimating step of estimating an appearance probability of the binary symbol of (i), and a third codeword allocating step of encoding a binary symbol sequence. . 27. At least one of the first, second and third codeword allocation steps

One is that the corresponding first, second, and third probability estimation processes estimate 27. The encoding method according to claim 26, further comprising a step of changing the interpretation of which of the binary symbols is the dominant symbol based on the estimated change in the probability of the binary symbol.

28. At least one of the first, second, and third codeword allocation steps is based on information on which of the binary symbols is the dominant symbol and the estimated appearance probability of the dominant symbol. By selecting the optimal code for the state of the binary symbol extended information source, which is assumed from the estimated appearance probability of the dominant symbol, from the systematic Huffman code set for the binary symbol extended information source 27. The encoding method according to claim 26, wherein the realized binary information source encoding is performed.

2 9. An output step of accumulating decoded pixels having any value within a predetermined range and outputting the value of a decoded pixel in the vicinity of the decoded pixel to be decoded as a value of a reference pixel;

A mode determination step of selecting one of a specific decoding mode and another decoding mode for a decoded pixel based on a value taken by a reference pixel from a plurality of predefined decoding modes When,

A decoding control step of selectively operating the first and second main decoding steps based on the specific decoding mode selected by the mode determination step and other decoding modes. Decoding method.

30. In the first main decoding step, the decoding pixel is decoded based on the value of the reference pixel. A first forecasting step to calculate the forecast value,

A first decoding step of decoding a corresponding codeword into a determination result indicating whether or not a prediction error is a predetermined value for a decoding pixel to be decoded in the selected specific decoding mode;

A second decoding step of decoding a corresponding codeword into a prediction error for a decoding pixel to be decoded in the selected specific decoding mode, wherein the prediction error is not the predetermined value. When,

A first decoded pixel calculation step of calculating a decoded pixel value from the predicted value of the decoded pixel calculated in the first prediction step, the determination result, and the prediction error obtained in the second decoding step When

30. The decoding method according to claim 29, comprising:

31. The second main decoding step includes: a second prediction step of calculating a predicted value of the decoded pixel based on a value taken by the reference pixel;

For a decoded pixel decoded in a mode other than the selected specific decoding mode, a third code for decoding a corresponding codeword into the prediction error regardless of whether the prediction error is the predetermined value or not. Decryption process,

A second calculating unit that calculates a decoded pixel value to be decoded in a mode other than the specific decoding mode selected from the predicted value of the decoded pixel calculated in the second prediction step and the prediction error decoded in the third decoding step. 31. The decoding method according to claim 30, further comprising the step of:

3 2. In the first decoding step, the first symbol restoration step of inputting a codeword and decoding it into a binary symbol sequence, and estimating the appearance probability of one of the binary symbols among the binary symbols A first probability estimating step of outputting one of the binary symbol sequences as a determination result, and the second decoding step inputs a codeword and decodes the codeword into a binary symbol sequence No.

(2) Symbol restoration process and input of binary symbols to check the appearance of binary symbols A second probability estimating step of estimating a probability, and a first sinporno error converting step of inputting a binary symbol sequence and converting the binary symbol sequence into a prediction error. A third symbol restoring step of inputting a word and decoding it into a binary symbol sequence, a third probability estimating step of inputting a binary symbol and estimating the probability of appearance of the binary symbol, and inputting a binary symbol sequence. 31. The decoding method according to claim 31, further comprising a second symbol error conversion step of converting the binary symbol sequence into a prediction error.

3 3. At least one of the first, second, and third symbol restoration processes is the probability estimation change of the binary symbol estimated by the corresponding first, second, and third probability estimation processes, respectively. 33. The decoding method according to claim 32, further comprising the step of changing the interpretation of the binary symbol based on the following.

34. At least one of the first, second, and third symbol restoration processes is based on the information on which of the binary symbols is the dominant symbol and the estimated appearance probability of the dominant symbol. This is realized by selecting the most suitable code for the state of the extended information source of binary symbols, which is assumed from the estimated appearance probability of the dominant symbol, from the Huffman code set systematically created for the extended information source2 The decoding method according to claim 32, wherein value information source decoding is performed.

3. The encoding device (400) according to claim 1, wherein the encoding device (400) is provided on a semiconductor chip.

3. The encoding device (400) according to claim 1, wherein the encoding device (400) is provided on a circuit board.

3 7. An image processing device (60, 66, 68) that inputs an image signal consisting of a plurality of pixels, encodes the pixels of the image signal with an encoding device (400), and outputs it to the next processing device , 69, 61, 100, 600) The encoding device (4 0 0)

A pixel having any value within a predetermined range is input and accumulated as a coded pixel, the value of the coded pixel to be coded is output, and the value of a coded pixel in the vicinity of the coded pixel is referred to A pixel memory (1) for outputting as a pixel value;

A mode for selecting one of a specific coding mode and another coding mode for a coded pixel based on a value taken by a reference pixel from a plurality of predefined coding modes. A decision unit (2),

) When,

A second encoding unit (102) for predicting the value of an encoded pixel and encoding the value of the encoded pixel and outputting a codeword without determining whether the prediction is correct or not; (2) an encoding control unit (11) that selectively operates the first and second encoding units based on one of the specific encoding mode selected and the other encoding mode.

An image processing apparatus comprising:

38. The image processing apparatus is an electronic computer.

37. The image processing apparatus according to 7.

39. The image processing apparatus is a scanner.

7. The image processing apparatus according to 7.

40. The image processing device according to claim 37, wherein the image processing device is a facsimile device.

1. The image processing device according to claim 37, wherein the image processing device is a display device.

4 2. The image processing device is a storage device. 7. The image processing apparatus according to 7.

43. The decoding device (500) according to claim 12, wherein the decoding device (500) is provided on a semiconductor chip.

44. The decoding device (500) according to claim 12, wherein the decoding device (500) is provided on a circuit board.

4 5. An image processing device (60, 66, 68, 69, 6) that receives an encoded image signal, decodes the pixels of the image signal with a decoding device (500), and outputs it to the next processing device. 1, 100, 600)

The decoding device (50 0)

A pixel memory (4 1) for accumulating decoded pixels having any value within a predetermined range and outputting the value of a decoded pixel near the decoded pixel to be decoded as a reference pixel value;

A mode determiner (4) for selecting one of a specific decoding mode and another decoding mode for a decoded pixel based on a value taken by a reference pixel from a plurality of predefined decoding modes. 2) and

A second decoding unit (2) that inputs the codeword, predicts the value of the decoded pixel, and decodes the codeword into the value of the decoded pixel without determining whether the prediction is correct or not.

0 2) and

A decoding control unit (43) for selectively operating the first and second decoding units based on either the specific decoding mode selected by the mode decision unit (42) or the other decoding mode;

An image processing apparatus comprising:

46. The image processing device is an electronic computer. 45. The image processing apparatus according to 5.

4 7. The image processing apparatus according to claim 45, wherein the image processing apparatus is a scanner.

48. The decoding device according to claim 45, wherein said image processing device is a facsimile device.

The image processing apparatus according to claim 45, wherein the image processing device is a printer.

50. The image processing device according to claim 45, wherein the image processing device is a display device.

5 1. The image processing device is a storage device.

5. The image processing apparatus according to 5.

5 2. Input and accumulate pixels having any value within a predetermined range as coded pixels, output the value of the coded pixel to be coded, and code coded pixels near the coded pixel. A pixel memory (1) that outputs the value of

An encoding unit (101a) that predicts the value of an encoded pixel, determines whether the prediction is correct, and encodes the value of the encoded pixel based on the determination result to output a codeword; and the encoding unit ( Based on whether the prediction determined by 101 a) is correct or not, the coding control unit (11) operates the coding unit.

An encoding device comprising: (400).

5 3. The encoding unit (101a) includes a predictor (3) that calculates a predicted value of an encoded pixel based on a value taken by a reference pixel;

A prediction error calculator (30) that calculates an error between the value of the coded pixel and the prediction value calculated by the predictor (3) as a prediction error;

Determines whether the prediction error calculated by the prediction error calculator (30) is a specific value or not. And a decision unit (4) that outputs a decision result;

A first encoder (5) that inputs and encodes the determination result output from the determiner (4) and outputs a codeword;

A second encoder (6) that encodes the prediction error for the coded pixel whose prediction error calculated by the prediction error calculator (30) is not the specific value described above and outputs a corresponding codeword, and

The encoding device (400) according to claim 52, comprising: 5 4. A pixel memory that stores decoded pixels having any value within a predetermined range and outputs the values of decoded pixels in the vicinity of the decoded pixel to be decoded as the values of reference pixels (4 1 ) When,

A decoding unit (201a) that inputs a codeword, predicts the value of a decoded pixel, determines whether the prediction is correct, and decodes the codeword into a decoded pixel value based on the determination result;

A decoding control unit (43) that operates the decoding unit based on whether the prediction determined by the decoding unit (201a) is correct or not.

A decoding device (500) comprising:

5 5. The decoding unit (201a) includes a predictor (3) that calculates a predicted value of a decoded pixel based on a value taken by a reference pixel;

A first decoder (45) for decoding the codeword into a determination result indicating whether or not the prediction error is a predetermined value;

For a decoded pixel whose prediction error is not the predetermined value, a second decoder (46) for decoding a corresponding codeword into the prediction error,

Decoding for calculating the value of a decoded pixel from the predicted value of the decoded pixel calculated by the predictor (3), the result of the determination, and the prediction error obtained by the second decoder (46) Pixel calculator (3 2) and

The decoding device (500) according to claim 54, further comprising:

5 6. An imaging unit (325) for capturing an image composed of a plurality of pixels, an image compression circuit (310) for compressing the captured image,

A storage unit (3 19 or 3 16) for storing the compressed image

In the image processing device (600) equipped with

The image compression circuit (3 1 8)

A pixel memory (1) that outputs a value of a coded pixel to be coded and outputs a value of a coded pixel in the vicinity of the coded pixel as a value of a reference pixel;

A first encoding unit (10 1) for predicting the value of an encoded pixel, determining whether the prediction is correct, encoding the value of the encoded pixel based on the determination result, and outputting a codeword;

A second encoding unit (102) for predicting the value of an encoded pixel and encoding the value of the encoded pixel to output a codeword without determining whether the prediction is correct or not; (2) an encoding control unit (11) that selectively operates the first and second encoding units based on one of the specific encoding mode selected and the other encoding mode.

An image processing device (600), comprising an encoding device (400) having the following.

5 7. The first encoding unit (101) includes a first predictor (3) that calculates a predicted value of an encoded pixel based on a value taken by a reference pixel,

A first prediction error calculator (30) that calculates an error between the value of the coded pixel and the prediction value calculated by the first predictor (3) as a prediction error; A decision unit (4) for judging whether or not the prediction error calculated by the first prediction error calculator (30) is a specific value, and outputting a judgment result;

The first encoder (5), which inputs the judgment result output from the determiner (4) and encodes the encoded pixels to be encoded in the selected specific encoding mode, and outputs a codeword, ,

The encoded pixels to be encoded in the selected specific encoding mode, wherein the prediction error calculated by the first prediction error calculator (30) is not the specific value. , A second encoder (6) that encodes the prediction error and outputs the corresponding codeword

The image processing device (600) according to claim 56, further comprising: 58. The second encoding unit (102) includes a second predictor (7) that calculates a predicted value of an encoded pixel based on a value taken by a reference pixel,

Regarding the coded pixels to be coded in other than the selected specific coding mode, regardless of whether the prediction error calculated by the second prediction error calculator (31) is the specific value or not. And a third encoder (8) that encodes the prediction error and outputs the corresponding codeword

The image processing apparatus (600) according to claim 57, further comprising: 5 9. The first encoder (5) receives the result of the decision output from the decision unit (4) as a binary symbol sequence, and either one of the binary symbols appears. A first probability estimator (25) for estimating a probability, and a first codeword allocator (15) for encoding a binary symbol sequence, wherein the second encoder (6) first error symbol converter for converting the prediction error by entering a prediction error into binary symbol sequence and ⁽³ 6), of the binary symbol by entering the binary symposium Le columns, either binary Emergence of symbol A second probability estimator (26) for estimating probabilities, and a second codeword allocator (16) for encoding a binary symbol sequence,

The third encoder (8) receives a prediction error and converts the prediction error into a binary symbol sequence. The second error Z-symbol converter (38) receives the binary symbol sequence. Among the binary symbols, a third probability estimator (28) that estimates the appearance probability of one of the binary symbols, and a third codeword allocator (18) that encodes the binary symbol sequence Claims comprising:

The image processing apparatus according to claim 58 (600).

60. The encoding control unit (1 1) is configured by at least one of the first encoder (5), the second encoder (6), and the third encoder (8). 60.A codeword transmission order controller for changing a codeword output order when a codeword is determined and codewords of the remaining encoders are not determined.60. Image processing equipment (600).

6 1. At least one of the first error Z symbol converter (36) and the second error symbol converter (38) is provided by the first error / symbol converter (38). 36) and the second error / symbol converter (38). The comparison values are generated in order from the value that is likely to appear as the value of the prediction error input to the first error / symbol converter (38). 36) and the second error are sequentially compared with the prediction error input to one of the symbol converters (38), and based on the number of comparisons until the prediction error matches one of the generated comparison values. The image processing device (600) according to claim 59, wherein a binary symbol sequence is generated and output.

6 2. The mode determiner (2) further comprising: selecting a coding mode of the coded pixel based on a coding mode of a coded pixel preceding the coded pixel. Image processing apparatus as described (600).

6 3. At least the first codeword allocator (15) and the second codeword One of the assigner (16) and the third codeword assigner (18) is a corresponding first probability estimator (25a) and a second probability estimator (26a) Of the binary symbols estimated by the third probability estimator (28a), the interpretation of which binary symbol is the dominant symbol is changed based on the change in the probability estimation of one of the binary symbols Claims characterized by

59. The image processing apparatus according to (60).

64. The first predictor (3) of the first encoder (101) and the second predictor (7) of the second encoder (102) are integrated and shared. The image processing device (600) according to claim 56, wherein the predictor is used.

6 5. The first encoder (5), the second encoder (6), and the third encoder (5)

The image processing device (600) according to claim 56, wherein at least any two encoders in (8) are integrated to form a common encoder. 6 6. At least one of the first codeword allocator (15), the second codeword allocator (16), and the third codeword allocator (18) is a binary Based on the information of which symbol is the dominant symbol and the estimated occurrence probability of the dominant symbol, from the Huffman code set systematically created for the binary symbol extended information source, from the estimated occurrence probability of the dominant symbol 10. The image processing apparatus according to claim 59, wherein binary information source coding realized by selecting a code that is optimal for the situation of the assumed binary symbol extended information source is performed. 0).

6 7. An imaging unit (3 2 5) that captures an image composed of multiple pixels,

An image compression circuit (3 18) for compressing a captured image;

A storage unit (3 19 or 3 16) for storing the compressed image,

An image decompression circuit (3 2 0) for decompressing the stored image

In the image processing apparatus (600) provided with

The above image decompression circuit (320) A pixel memory (4 1) for accumulating decoded pixels having any value within a predetermined range and outputting the value of a decoded pixel near the decoded pixel to be decoded as a reference pixel value;

A mode determiner for selecting one of a specific decoding mode and another decoding mode for a decoded pixel based on a value taken by a reference pixel from a plurality of decoding modes defined in advance (4 2) When,

A first decoding unit (200) that inputs a codeword, predicts the value of a decoded pixel, determines whether the prediction is correct, and decodes the codeword into a decoded pixel value based on the determination result. ) When,

A second decoding unit (202) for inputting the codeword, predicting the value of the decoded pixel, and decoding the codeword to the value of the decoded pixel without determining whether the prediction is correct or not;

A decoding control unit (43) for selectively operating the first and second decoding units based on one of the specific decoding mode selected by the mode decision unit (42) and the other decoding mode;

Decoding apparatus having a (5 0 0) image processing apparatus, characterized in that it comprises the (6 0 0) ₀

68. The first decoding unit (201) includes a first predictor (3) that calculates a predicted value of a decoded pixel based on a value taken by a reference pixel;

A first decoder (45) for decoding a corresponding codeword for a decoded pixel to be decoded in the selected specific decoding mode into a determination result indicating whether a prediction error is a predetermined value or not;

For a decoded pixel that is decoded in the selected specific decoding mode and has a prediction error that is not the predetermined value, a second decoding unit that decodes a corresponding codeword into the prediction error. A decoder (4 6);

The predicted value of the decoded pixel calculated by the first predictor (3) A first decoded pixel calculator (32) for calculating a value of a decoded pixel from the determination result and the prediction error obtained by the second decoder (46);

The image processing apparatus (600) according to claim 67, further comprising:

6 9. The second decoding unit (202) includes a second predictor (7) that calculates a predicted value of the decoded pixel based on the value of the reference pixel,

For a decoded pixel decoded in a mode other than the selected specific decoding mode, a third method of decoding a corresponding codeword into a prediction error regardless of whether the prediction error is the predetermined value or not. A decoder (4 8),

The decoding is performed in a mode other than the specific decoding mode selected from the prediction value of the decoded pixel calculated by the second predictor (7) and the prediction error decoded by the third decoder (48). A second decoded pixel calculator (33) that calculates the value of the decoded pixel;

70. The image processing device according to claim 68, further comprising:

70. The first decoder (45) is a first symbol decompressor (55) that inputs a codeword and decodes it into a binary symbol sequence. A first probability estimator (75) for estimating the appearance probability of the value symbol, outputting either of the binary symbol sequences as a determination result,

The second decoder (46) is either a second symbol reconstructor (56) that inputs a codeword and decodes it into a binary symbol sequence, or a binary symbol that receives a binary symbol. A second probability estimator (76) that estimates the appearance probability of one binary symbol, and a first symbol error converter (8) that inputs a binary symbol sequence and converts the binary symbol sequence into a prediction error 6), the third decoder (48) receives a codeword and decodes it into a sequence of binary symbols (58), and inputs a binary symbol and outputs a binary symbol A third symbol that estimates the probability of occurrence of one of the binary symbols 7. A stochastic estimator (78), and a second symbol error converter (88) that inputs a binary symbol sequence and converts the binary symbol sequence into a prediction error. 9. The image processing apparatus according to 9 (600).

7 1. The decoding control unit (43) performs decoding by at least one of the first decoder (45), the second decoder (46), and the third decoder (48) If one of the other decoders outputs a binary symbol sequence before the entire binary symbol sequence is used, a binary symbol use order controller that changes the order in which the decoded binary symbols are used. 71. The image processing apparatus according to claim 70, further comprising:

72. At least one of the first symbol / error converter (86) and the second symbol error converter (88) is a binary symbol input based on the value and number of input binary symbols. The image processing apparatus according to claim 70, wherein the column is converted into a prediction error.

73. The mode determiner according to claim 67, wherein the mode determiner further selects a decoding mode of the decoded pixel based on a decoding mode of a decoded pixel preceding the decoded pixel. Image processing equipment (600).

74. At least one of the first symbol recoverer (55), the second symbol recoverer (56), and the third symbol recoverer (58) is a corresponding first probability estimator. (75), the second probability estimator (76), and the third probability estimator (78) estimate which of the binary symbols is the dominant symbol based on the estimated probability change of the binary symbol. The image processing device (600) according to claim 70, characterized in that it is changed.

7 5. The first predictor (3) of the first decoding section (20 1) and the second predictor (7) of the second decoding section (20 2) are integrated to form a common prediction The image processing device (600) according to claim 67, wherein the image processing device is a device.

76. Above first decoder (4 5), second decoder (4 6), third decoder The image processing device (600) according to claim 67, wherein at least any two of the decoders (48) are integrated into a common decoder.

7 7. At least one of the first symbol decompressor (55), the second symbol decompressor (56), and the third symbol decompressor (58) must have at least one of the binary symbols. Based on the information on whether the symbol is the dominant symbol and the estimated occurrence probability of the dominant symbol, it is assumed from the estimated occurrence probability of the dominant symbol from the Huffman code set systematically created for the binary symbol extended information source. 71. The image processing device according to claim 70, wherein binary information source decoding realized by selecting an optimum code for the situation of the value symbol expansion information source is performed.

78. The image compression circuit (3 18) has a plurality of the encoding devices (400), and inputs the luminance signal Y and the chrominance signals U and V to the plurality of encoding devices (400) in parallel. The image processing device (600) according to claim 56, wherein the encoding is performed by encoding.

79. The image compression circuit (3 18) has a plurality of the encoding devices (400) and inputs color signals R, G, and B to the plurality of encoding devices (400) in parallel. The image processing apparatus (600) according to claim 56, wherein encoding is performed.

80. The image compression circuit (3 18) has one encoding device (400) and transmits the luminance signal Y and the color difference signals U and V to the encoding device (400) in blocks. The image processing apparatus (600) according to claim 56, wherein the image is inputted serially and encoded.

8 1. The image compression circuit (3 18) has one encoding device (400), and color signals R, G, and B are serially input to the encoding device (400) in block units. The image according to claim 56, wherein the image is encoded. Image processing equipment (600).

8 2. The image decompression circuit (3 20) has a plurality of decoding devices (500), and outputs the encoded luminance signal Y and chrominance signals U and V to the plurality of decoding devices (500) in parallel. The image processing device (600) according to claim 67, wherein the image is inputted and encoded.

83. The image decompression circuit (3 20) includes a plurality of the decoding devices (500), and inputs the coded color signals R, G, and B in parallel to the plurality of decoding devices (500) and decodes the signals. The image processing apparatus (600) according to claim 67, wherein the image processing apparatus performs the processing.

84. The image decompression circuit (3 20) includes one decoding device (500), and transmits the encoded luminance signal Y and color difference signals U and V to the decoding device (500) in block units. The image processing apparatus (600) according to claim 67, wherein the image processing apparatus (600) is inputted serially and decrypted.

8 5. The image decompression circuit (3 20) has one decoding device (500) and sends the encoded color signals R, G, and B to the decoding device (500) in blocks. The image processing device (600) according to claim 67, wherein the image is decoded by serial input.

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^W09 orchid ⁴ PCT / JP97 / 00768 Claims of harm for detection

[August 8, 1997 (08.08.97) Accepted by the International Bureau: Claims i-85 originally filed were replaced with amended claims 1-99. (Page 37)]

1. A pixel memory (1) that inputs and accumulates pixels having any value within a predetermined range as coded pixels, and outputs the values of coded pixels near the coded pixels as values of reference pixels. ,

A first encoding unit (101) for predicting a value of an encoded pixel, determining whether the prediction is correct or not, encoding the value of the encoded pixel based on the determination result, and outputting a codeword;

A second encoding unit (102) for predicting the value of an encoded pixel, encoding the value of the encoded pixel, and outputting a codeword;

An encoding control unit (11) for selectively operating the first and second encoding units based on the selection result of the mode determiner (2);

An encoding device (400), comprising:

The first prediction error calculator for calculating an error between the prediction value calculated by the encoding pixel value and the first predictor (3) as a prediction error and ⁽³ 0),

A coded pixel to be coded in the selected specific coding mode,

擄 Corrected paper '(daily chrysanthemum) A second encoder that encodes a prediction error of a coded pixel whose prediction error calculated by the first prediction error calculator (30) is not the above specific value and outputs a corresponding codeword (6) and

The encoding device (400) according to claim 1, further comprising:

The encoding device (400) according to claim 2, further comprising:

4. A pixel memory (1) that inputs and accumulates pixels having any value within a predetermined range as encoded pixels, and outputs the values of encoded pixels near the encoded pixels as values of reference pixels. ,

Mode determination for selecting one of a specific coding mode and other coding modes for a coded pixel based on the value of a reference pixel from a plurality of predefined coding modes Vessel (2),

) When,

¾Article B Article 19 With

A first predictor (3) for calculating a predicted value of the coded pixel based on a value taken by the reference pixel;

The coded pixels to be coded in the selected specific coding mode, wherein the prediction error calculated by the first prediction error calculator (30) is not the specific value. , A second encoder (6) that encodes the prediction error and outputs the corresponding codeword

With

A second predictor (7) for calculating a predicted value of the coded pixel based on a value taken by the reference pixel;

Regarding the coded pixels to be coded in modes other than the selected specific coding mode, regardless of whether the prediction error calculated by the second prediction error calculator (31) is the specific value or not. And a third encoder (8) that encodes the prediction error and outputs the corresponding codeword

An encoding device (400), comprising:

5. The first encoder (5) receives the decision result output from the decision unit (4) as a binary symbol sequence, and outputs one of the binary symbols.

用 Corrected use (^ JI ^ A first probability estimator (25) for estimating the probability of occurrence of the binary symbol of the above, and a first codeword allocator (15) for encoding a binary symbol sequence. The converter (6) receives the prediction error and converts the prediction error into a binary symbol sequence (1). The first error / symbol converter (36) receives the binary symbol sequence and outputs the binary symbol sequence. A second probability estimator (26) for estimating the probability of occurrence of one of the binary symbols, and a second codeword allocator (16) for encoding the binary symbol sequence.

The third encoder (8) inputs a prediction error and converts the prediction error into a binary symbol sequence (3 8), and a binary symbol sequence. Among the binary symbols, a third probability estimator (28) that estimates the appearance probability of one of the binary symbols, and a third codeword allocator (18) that encodes the binary symbol sequence The encoding device (400) according to claim 4, characterized by comprising:

6. The encoding control unit (1 1) is based on at least one of the first encoder (5), the second encoder (6), and the third encoder (8). The codeword transmission order controller for changing the output order of codewords when the codeword is determined and the codewords of the remaining encoders are not determined, according to claim 5, characterized by comprising: Encoding devices (400).

7. At least one of the first error symbol converter (36) and the second error Z symbol converter (38) is connected to the first error symbol converter (36). The second error / symbol converter (38) generates a comparison value in order from a value having a high possibility of appearing as a value of the prediction error and is input to the first error / symbol converter (38). Error 2 The symbol error is sequentially compared with the prediction error input to one of the symbol converters (38), and a binary symbol is calculated based on the number of comparisons until the prediction error matches one of the generated comparison values. The encoding according to claim 5, wherein a sequence is created and output.

Paper captured (Article i9 of the Convention) Equipment (400).

8. The mode determiner (2) further comprising: selecting a coding mode of a coded pixel based on a coding mode of a coded pixel preceding the coded pixel. The coding device (400).

9. At least one of the first codeword allocator (15), the second codeword allocator (16), and the third codeword allocator (18) is a Of the binary symbols estimated by the first probability estimator (25a), the second probability estimator (26a), and the third probability estimator (28a), respectively. 6. The encoding apparatus according to claim 5, wherein interpretation of which of the binary symbols is the dominant symbol is changed based on the estimated change of the value symbol.

10 0. The first predictor (3) of the first encoder (101) and the second predictor (7) of the second encoder (102) are integrated. The encoding device (400) according to claim 4, wherein the encoding device is a common predictor.

1 1. Of the first encoder (5), second encoder (6), and third encoder (8), at least any two encoders are integrated and a common encoder is used. The encoding device (400) according to claim 4, wherein the encoding is performed.

1 2. At least one of the first codeword allocator (15), the second codeword allocator (16), and the third codeword allocator (18) is a binary code Based on the information on which symbol is the dominant symbol and the estimated occurrence probability of the dominant symbol, from the Huffman code set systematically created for the binary symbol extended information source, 6. The encoding apparatus according to claim 5, wherein binary information source encoding is performed by selecting a code that is optimal for a situation of an assumed extended information source of a binary symbol. ).

1 3. Accumulate decoded pixels with any value in the specified range and decode

Amended newspaper (Article ¹⁹ ), A pixel memory (4 1) for outputting the value of the decoded pixel in the vicinity of the decoded pixel to be used as the value of the reference pixel;

A mode determiner (42) that selects one of a specific decoding mode and another decoding mode for a decoded pixel based on a value taken by a reference pixel from a plurality of predefined decoding modes. ) When,

A first decoding unit (201) that inputs a codeword, predicts the value of a decoded pixel, determines whether the prediction is correct, and decodes the codeword into a decoded pixel value based on the determination result. ,

A second decoding unit (202) that inputs a codeword, predicts a value of a decoded pixel, and decodes the codeword;

A decoding control unit (43) for selectively operating the first and second decoding units based on the selection result of the mode determiner (42);

A decoding device (500), comprising:

1 4. The first decoding unit (201) includes a first predictor (3) that calculates a predicted value of a decoded pixel based on a value taken by a reference pixel;

A first decoder (45) for decoding a corresponding codeword into a determination result indicating whether or not a prediction error is a predetermined value, for a decoded pixel to be decoded in the selected specific decoding mode; ,

For a decoded pixel that is decoded in the selected specific decoding mode and has a prediction error that is not the predetermined value, a second decoder that decodes a corresponding codeword into the prediction error (46) and

A second calculating unit that calculates a value of the decoded pixel from the predicted value of the decoded pixel calculated by the first predictor (3), the determination result, and the prediction error obtained by the second decoder (46); 1 decoded pixel calculator (3 2) and

The decoding device (500) according to claim 13, further comprising:

1 5. The second decoding unit (202) performs decoding based on the value taken by the reference pixel.

Corrected form (Article 19 of the Convention) A second predictor (7) for calculating the predicted value of the pixel,

The decoding is performed in a mode other than the specific decoding mode selected from the predicted value of the decoded pixel calculated by the second predictor (7) and the prediction error decoded by the third decoder (48). A second decoded pixel calculator (33) for calculating the value of the decoded pixel;

The decoding device (500) according to claim 14, further comprising:

16. A pixel memory that stores decoded pixels having any value within a predetermined range and outputs the values of decoded pixels near the decoded pixel to be decoded as the values of reference pixels (4 1 ) When,

A first decoding unit that inputs a code word, predicts a value of a decoded pixel, determines whether the prediction is correct, and decodes the code word into a value of the decoded pixel based on the determination result (201) When,

A second decoding unit (202) that inputs a codeword, predicts the value of a decoded pixel, and decodes the codeword;

With

A first predictor (3) for calculating a predicted value of the decoded pixel based on a value taken by the reference pixel;

For the decoded pixel decoded in the selected specific decoding mode, the corresponding

Amended paper (Article 19 of the Convention) A first decoder (45) that decodes the codeword into a determination result indicating whether or not the prediction error is a predetermined value;

With

A second predictor (7) for calculating a predicted value of the decoded pixel based on a value taken by the reference pixel;

For decoded pixels decoded in other than the selected specific decoding mode

A third decoder (48) that decodes the corresponding codeword into a prediction error regardless of whether the prediction error is the predetermined value or not;

A decoding device (500), comprising:

1 7. The first decoder (45) receives either a codeword and decodes it into a binary symbol sequence (55), or one of the binary symbols. A first probability estimator (75) for estimating the probability of appearance of the binary symbol of the binary symbol sequence, and outputs one of the binary symbol sequences as a determination result.

The second decoder (46) receives a codeword and decodes it into a binary symbol sequence (56), and a binary symbol and inputs a binary symbol.

Excellent paper (Article of the Convention) A second probability estimator (76) for estimating the probability of occurrence of one of the binary symbols, and a first probability estimator that inputs the binary symbol sequence and converts the binary symbol sequence to a prediction error. A symbol Z error converter (86), the third decoder (48) receives a codeword and decodes it into a binary symbol sequence (58), and a binary symbol And a third probability estimator (78) for estimating the probability of occurrence of one of the binary symbols out of the binary symbols. The decoding device (500) according to claim 16, further comprising: a second symbol Z error converter (88) for converting into a second symbol.

1 8. At least one of the first decoder (45), the second decoder (46), and the third decoder (48) decodes the decoding control section (43). If one of the other decoders outputs a binary symbol sequence before all the decoded binary symbol sequences are used, the use order of the decoded binary symbols is changed. The decoding device (500) according to claim 17, further comprising a decoder.

1 9. At least one of the first symbol error converter (8 6) and the ^second sinporno error converter (8 8) is input based on the input binary symbol value and number. The decoding device according to claim 17, wherein the binary symbol sequence is converted into a prediction error.

20. The decoding according to claim 16, wherein the mode determiner (42) further selects a decoding mode of the decoded pixel based on a decoding mode of a pixel which has been decoded and preceding the decoded pixel. Equipment (500).

2 1. At least one of the first symbol recoverer (55), the second symbol recoverer (56), and the third symbol recoverer (58) The probability estimation change of the binary symbol estimated by the probability estimator (75), the second probability estimator (76), and the ^third probability estimator (78) respectively

用紙 Corrected paper (Article 19 of the Convention) The decoding device (500) according to claim 17, wherein interpretation of which of the binary symbols is the dominant symbol is changed based on the binary symbol.

22. The first predictor (3) of the first decoder (20 1) and the second predictor (7) of the second decoder (20 2) are integrated and a common predictor The decoding device (500) according to claim 16, characterized in that:

23. At least one of the first decoder (45), the second decoder (46), and the third decoder (48) is integrated to perform common decoding The decoding device (500) according to claim 16, wherein the decoding device is a device. 24. At least one of the first symbol decompressor (55), the second symbol decompressor (56), and the third symbol decompressor (58) is a symbol whose binary symbol is the predominant symbol. From the Huffman code set systematically created for the binary symbol extended information source based on the information on the The decoding device (500) according to claim 17, wherein binary information source decoding realized by selecting a code most suitable for the situation of the extended information source is performed.

25. an output step of input-accumulating a pixel having any value within a predetermined range as a coded pixel, and outputting a value of a coded pixel near the coded pixel as a value of a reference pixel;

A mode determining step of selecting one of a specific coding mode and another coding mode for a coded pixel from a plurality of predefined coding modes based on a value taken by a reference pixel When,

A first main encoding step of predicting the value of the coded pixel, determining whether the prediction is correct or not, and coding the value of the coded pixel based on the determination result to output a codeword; A second main encoding step of predicting, encoding the value of the encoded pixel and outputting a codeword;

Amended paper (Article 19 of the Convention) An encoding method, comprising: an encoding control step of selectively operating the first and second main encoding steps based on a selection result of the mode determination step.

26. The first main encoding step includes: a first prediction step of calculating a predicted value of an encoded pixel based on a value taken by a reference pixel;

For a coded pixel to be coded in the selected specific coding mode, wherein the prediction error calculated in the first prediction error calculation step is not the predetermined value, the prediction error is A second encoding step of encoding and outputting the corresponding codeword

26. The encoding method according to claim 25, comprising:

27. The second main encoding step includes: a second prediction step of calculating a predicted value of the encoded pixel based on a value taken by the reference pixel;

Regardless of whether or not the prediction error calculated in the second prediction error calculation step is the predetermined value, whether or not the prediction error is to be calculated for the coded pixel to be coded in a mode other than the selected specific coding mode. 27. The encoding method according to claim 26, further comprising: a third encoding step of encoding a prediction error and outputting a corresponding codeword.

Kusunoki Tadashi Paper (Article 19 of the Convention) 28. An output step of input-accumulating pixels having any value within a predetermined range as encoded pixels, and outputting the values of encoded pixels near the encoded pixels as values of reference pixels,

An encoding control step of selectively operating the first and second main encoding steps based on a selection result of the mode determination step,

A first prediction step of calculating a predicted value of an encoded pixel based on a value taken by a reference pixel;

A first encoding step of inputting the determination result output in the determination step and encoding the encoded pixel to be encoded in the selected specific encoding mode, and outputting a codeword;

With

Papers captured (Article 19 of the Convention) The second main encoding step includes: a second prediction step of calculating a predicted value of the encoded pixel based on a value taken by the reference pixel;

Regardless of whether or not the prediction error calculated in the second prediction error calculation step is the predetermined value, whether or not the prediction error is to be calculated for the coded pixel to be coded in a mode other than the selected specific coding mode. A third encoding step of encoding a prediction error and outputting a corresponding codeword.

29. In the first encoding step, the decision result output from the decision step is input as a binary symbol sequence, and the appearance probability of either one of the binary symbols among the binary symbols is estimated. A first probability estimating step, and a first codeword assigning step of encoding a binary symbol sequence,

The second encoding step is one of a first error / symbol conversion step of inputting a prediction error and converting the prediction error into a binary symbol sequence, and one of a binary symbol sequence and a binary symbol sequence A second probability estimating step of estimating the probability of occurrence of the binary symbol of the following, and a second codeword allocating step of encoding the binary symbol sequence,

The third encoding step is one of a second error / symbol conversion step of inputting a prediction error and converting the prediction error into a binary symbol sequence, and one of a binary symbol and inputting a binary symbol sequence. 29. The encoding method according to claim 28, further comprising: a third probability estimating step of estimating an appearance probability of the binary symbol of (i), and a third codeword allocating step of encoding a binary symbol sequence. .

30. At least one of the first, second, and third codeword allocation steps is the probability estimation of the binary symbol estimated by the corresponding first, second, and third probability estimation steps, respectively. 29. The method according to claim 29, further comprising the step of changing the interpretation of which of the binary symbols is the dominant symbol based on the change.

Collected paper (Convention No. Encoding method.

31. At least one of the first, second, and ^third codeword allocation steps is based on information on which of the binary symbols is the dominant symbol and the estimated appearance probability of the dominant symbol. By selecting the optimal code for the state of the binary symbol extended information source that is assumed from the estimated appearance probability of the dominant symbol from the Huffman code set systematically created for the binary symbol extended information source 30. The encoding method according to claim 29, wherein the implemented binary information source encoding is performed.

32. An output step of accumulating decoded pixels having any value within a predetermined range, and outputting a value of a decoded pixel near a decoded pixel to be decoded as a value of a reference pixel;

A mode determination step of selecting one of a specific decoding mode and another decoding mode for a decoded pixel;

A second main decoding step of inputting the codeword, predicting the value of the decoded pixel, and decoding the codeword into the value of the decoded pixel;

A decoding method comprising: a decoding control step of selectively operating the first and second main decoding steps based on a selection result of the mode determination step.

33. The first main decoding step includes: a first prediction step of calculating a predicted value of a decoded pixel based on a value taken by a reference pixel;

For decoding pixels to be decoded in the selected specific decoding mode, a first decoding is performed to decode the corresponding codeword into a determination result indicating whether or not the prediction error is a predetermined value.

Papers captured (Article 19 J of the Convention No. process,

33. The decoding method according to claim 32, comprising:

3 4. The second main decoding step includes: a second prediction step of calculating a predicted value of the decoded pixel based on a value taken by the reference pixel;

Regarding a decoded pixel decoded in a mode other than the selected specific decoding mode, a third method of decoding a corresponding codeword into the prediction error regardless of whether the prediction error is the predetermined value or not. A decryption step;

A value of a decoded pixel to be decoded in a mode other than the specific decoding mode selected from the predicted value of the decoded pixel calculated in the second prediction step and the prediction error decoded in the third decoding step is calculated. 34. The decoding method according to claim 33, further comprising: a second decoded pixel calculation step.

35. An output step of accumulating decoded pixels having any value within a predetermined range, and outputting a value of a decoded pixel near a decoded pixel to be decoded as a value of a reference pixel;

Amended paper (Convention No. A second main decoding step of inputting the codeword, predicting the value of the decoded pixel, and decoding the codeword into the value of the decoded pixel;

A decoding control step of selectively operating the first and second main decoding steps based on a selection result of the mode determination step,

With

A value of a decoded pixel to be decoded in a mode other than the specific decoding mode selected from the predicted value of the decoded pixel calculated in the second prediction step and the prediction error decoded in the third decoding step is calculated. A second decoding pixel calculation step.

36. In the first decoding step, a codeword is input and decoded into a binary symbol sequence.

Paper captured (Article 19 of the Convention) A first symbol restoring step, and a first probability estimating step of estimating an appearance probability of one of the binary symbols, and determining one of the binary symbol sequences In addition to outputting the result, the second decoding step includes inputting a codeword and decoding it into a binary symbol sequence, and inputting a binary symbol and estimating the probability of appearance of the binary symbol. And a first symbol error conversion step of inputting a binary symbol sequence and converting the binary symbol sequence into a prediction error.The third decoding step includes inputting a codeword. A third symbol restoration step for decoding into a binary symbol sequence, a third probability estimation step for inputting a binary symbol and estimating the probability of appearance of the binary symbol, and a binary Second symbol to convert symbol sequence to prediction error The decoding method according to claim 35, wherein Rukoto a difference converting step.

37. At least one of the first, second, and third symbol restoration processes is the probability estimation change of the binary symbol estimated by the corresponding first, second, and third probability estimation processes, respectively. 37. The decoding method according to claim 36, further comprising the step of changing the interpretation of the binary symbol based on the following.

38. At least one of the first, second, and third symbol restoration processes is based on the information on which of the binary symbols is the dominant symbol and the estimated appearance probability of the dominant symbol. Achieved by selecting the optimal code for the state of the binary symbol extended information source that is assumed from the estimated appearance probability of the dominant symbol from the systematic Huffman code set created for the symbol extended information source The decoding method according to claim 36, wherein the binary information source decoding is performed.

39. The encoding device (400) according to claim 1, wherein the encoding device (400) is provided on a semiconductor chip.

Captured paper (Article of the Convention)

40. The encoding device (400) according to claim 1, wherein the encoding device (400) is provided on a circuit board.

4 1. An image processing device (60, 66, 68, 68) that inputs an image signal consisting of a plurality of pixels, encodes the pixels of the image signal with an encoding device (400), and outputs it to the next processing device. 69, 61, 100, 600), the encoding device (400)

A pixel memory (1) that inputs and accumulates pixels having any value within a predetermined range as coded pixels, and outputs the values of coded pixels near the coded pixels as values of reference pixels;

An encoding control unit (11) for selectively operating the first and second encoding units based on a selection result of the mode determiner (2);

An image processing apparatus comprising:

42. The image processing apparatus according to claim 41, wherein the image processing apparatus is an electronic computer.

43. The image processing apparatus according to claim 41, wherein the image processing apparatus is a scanner.

44. The image processing device according to claim 41, wherein the image processing device is a facsimile device.

Paper captured (Article 19 of the Convention)

45. The image processing device according to claim 41, wherein the image processing device is a display device.

46. The image processing apparatus according to claim 41, wherein the image processing apparatus is a storage device.

4 7. The decoding device (500) according to claim 13, wherein the decoding device (500) is provided on a semiconductor chip.

4 8. The decoding device (500) according to claim 13, wherein the decoding device (500) is provided on a circuit board.

4 9. An image processing device (60, 66, 68, 69, 6) that receives an encoded image signal, decodes the pixels of the image signal with a decoding device (500), and outputs it to the next processing device 1, 1 00, 6 0 0)

The decoding device (500)

A first decoding unit (20 1) for inputting the codeword, predicting the value of the decoded pixel, determining whether the prediction is correct or not, and decoding the codeword into the value of the decoded pixel based on the determination result; ,

A second decoding unit (202) that inputs a codeword, predicts a value of a decoded pixel, and decodes the codeword into a value of a decoded pixel;

A decoding control unit (43) for selectively operating the first and second decoding units based on the selection result of the mode determiner (42)

An image processing apparatus comprising:

Papers captured (Article 19 of the Convention) 50. The image processing device is an electronic computer.

49. The image processing apparatus according to 9.

51. The image processing apparatus according to claim 49, wherein the image processing apparatus is a scanner.

52. The image processing apparatus according to claim 49, wherein the image processing apparatus is a facsimile apparatus.

53. The image processing apparatus according to claim 49, wherein the image processing apparatus is a printer.

54. The image processing device according to claim 49, wherein the image processing device is a display device.

The image processing device according to claim 49, wherein the image processing device is a storage device.

5 6. Pixel memory that inputs and accumulates pixels having any value within a predetermined range as encoded pixels, and outputs the values of encoded pixels near the encoded pixels as values of reference pixels (1) When,

An encoding unit (101a) that predicts the value of an encoded pixel, determines whether the prediction is correct, and encodes the value of the encoded pixel based on the determination result to output a codeword; and the encoding unit ( The encoding control unit (11) controls the operation of the encoding unit based on whether the prediction determined by 101 a) is correct or not.

An encoding device (400), comprising:

5 7. The coding unit (101a) includes a predictor (3) that calculates a predicted value of a coded pixel based on a value taken by a reference pixel;

A prediction error calculator (30) that calculates an error between a coded pixel value and a prediction value calculated by the predictor (3) as a prediction error;

It is determined whether the prediction error calculated by the prediction error calculator (30) is a predetermined value.

Amended paper (Convention 19 And a decision unit (4) that outputs a decision result;

A second encoder (6) that encodes the prediction error for the coded pixel whose prediction error calculated by the prediction error calculator (30) is not the predetermined value and outputs a corresponding codeword;

The encoding device (400) according to claim 56, further comprising: 5 8. A pixel memory that stores decoded pixels having any value within a predetermined range and outputs the values of decoded pixels near the decoded pixel to be decoded as the values of reference pixels (4 1 ) When,

A decoding unit (201a) for inputting the codeword, predicting the value of the decoded pixel, determining whether the prediction is correct, and decoding the codeword into the value of the decoded pixel based on the determination result;

A decoding control unit (43) for controlling the operation of the decoding unit based on whether or not the prediction determined by the decoding unit (201a) is correct;

A decoding device (500) comprising:

5 9. The decoding unit (201a) calculates a predicted value of the decoded pixel based on the value of the reference pixel,

A first decoder (45) for decoding a determination result indicating whether or not the prediction error is a predetermined value;

The decoding device (500) according to claim 58, further comprising:

Paper captured (Article of the Convention)

60. An output step of input-accumulating a pixel having any value within a predetermined range as a coded pixel, and outputting a value of a coded pixel in the vicinity of the coded pixel as a value of a reference pixel;

An encoding step of predicting the value of the encoded pixel, determining whether the prediction is correct, encoding the value of the encoded pixel based on the determination result, and outputting a codeword;

An encoding control step of controlling the operation of the encoding step based on whether or not the prediction determined by the encoding step is correct;

An encoding method comprising:

6 1. The encoding step includes: a prediction step of calculating a predicted value of the encoded pixel based on a value taken by the reference pixel;

A prediction error calculating step of calculating an error between the value of the encoded pixel and the prediction value calculated in the prediction step as a prediction error;

A determination step of determining whether the prediction error calculated in the prediction error calculation step is a predetermined value and outputting a determination result;

A first encoding step of inputting and encoding the determination result output from the determination step and outputting a codeword;

A second encoding step of encoding the prediction error for an encoded pixel whose prediction error calculated in the prediction error calculation step is not the predetermined value, and outputting a corresponding codeword;

The encoding method according to claim 60, comprising:

6 2. An output step of accumulating decoded pixels having any value within a predetermined range and outputting the value of a decoded pixel in the vicinity of the decoded pixel to be decoded as a value of a reference pixel;

A decoding step of inputting a codeword, predicting the value of a decoded pixel, determining whether the prediction is correct, and decoding the codeword into a value of the decoded pixel based on the determination result;

Amended paper (Article 19 of the Convention) A decoding control step of controlling the operation of the decoding step based on whether the prediction determined by the decoding step is correct or not.

A decoding method comprising:

6 3. The decoding step includes: a prediction step of calculating a predicted value of the decoded pixel based on a value taken by the reference pixel;

A first decoding step of decoding a determination result indicating whether the prediction error is a predetermined value,

A second decoding step of decoding a corresponding codeword into a prediction error for a decoded pixel whose prediction error is not the predetermined value;

A predicted value of the decoded pixel calculated in the prediction step,

A decoded pixel calculation step of calculating a value of a decoded pixel from the prediction error obtained in the second decoding step.

63. The decoding method according to claim 62, further comprising:

6 4. An imaging unit (3 2 5) for capturing an image composed of a plurality of pixels,

An image compression circuit (3 18) for compressing a captured image;

A storage unit (3 19 or 3 16) for storing the compressed image

In the image processing apparatus (600) provided with

The image compression circuit (3 18)

Mode determination for selecting one of a specific coding mode and other coding modes for a coded pixel based on the value of a reference pixel from a plurality of predefined coding modes Container (2),

Amended paper (Article of the Convention) ) When,

An image processing device (600) comprising an encoding device (400) having the following.

65. The first encoding unit (101) comprises: a first predictor (3) for calculating a predicted value of an encoded pixel based on a value taken by a reference pixel;

A judgment unit (4) for judging whether or not the prediction error calculated by the first prediction error calculator (30) is a specific value, and outputting a judgment result;

The encoded pixels to be encoded in the selected specific encoding mode, wherein the prediction error calculated by the first prediction error calculator (30) is not the specific value. And a second encoder (6) that encodes the prediction error and outputs the corresponding codeword

The image processing device (600) according to claim 64, further comprising:

66. The second encoding unit (102) includes a second predictor (7) that calculates a predicted value of an encoded pixel based on a value taken by a reference pixel,

For the coded pixels to be coded in other than the selected specific coding mode,

Paper captured (Article 19 of the Convention) Then, regardless of whether the prediction error calculated by the second prediction error calculator (31) is the specific value or not, the third code that encodes the prediction error and outputs the corresponding codeword Bowl (8) and

The image processing device (600) according to claim 65, further comprising:

6 7. An imaging unit (325) for capturing an image composed of a plurality of pixels, an image compression circuit (310) for compressing the captured image,

A storage unit (3 19 or 3 16) for storing the compressed image

In the image processing device (600) equipped with

The image compression circuit (3 1 8)

A pixel memory (1) for outputting the value of a coded pixel in the vicinity of the coded pixel as a value of a reference pixel;

An encoding device (400) having

A first predictor (3) configured to calculate a predicted value of the coded pixel based on a value taken by the reference pixel;

The error between the coded pixel value and the predicted value calculated by the first predictor (3) is

Paper captured (Article W of the Convention) A first prediction error calculator (30) that calculates the prediction error;

A coded pixel to be coded in the selected specific coding mode,

A second encoder that encodes the prediction error of an encoded pixel whose prediction error calculated by the first prediction error calculator (30) is not the specific value and outputs a corresponding codeword (6) and

With

An image processing device (600), comprising:

68. The first encoder (5) inputs the decision result output from the discriminator (4) as a binary symbol sequence, and the probability of appearance of one of the binary symbols out of the binary symbols. And a first codeword allocator (15) that encodes a sequence of binary symbols. The second encoder (6) has a prediction error And a first error / symbol converter (36) that converts the prediction error into a binary symbol sequence, and a binary symbol

Papers captured (Convention 19 Second probability estimator (26) for estimating the appearance probability of one of the binary symbols among binary symbols, and a second codeword assignment for encoding the binary symbol sequence Vessel (16)

The third encoder (8) inputs a prediction error and converts the prediction error into a binary symbol sequence (3 8), and a binary symbol sequence. Among the binary symbols, a third probability estimator (28) for estimating the probability of occurrence of one of the binary symbols, and a third codeword allocator (18) for encoding the binary symbol sequence The image processing apparatus (600) according to claim 67, further comprising:

6 9. The encoding control unit (11) performs at least the first encoding (5

), The codeword by one of the second encoder (6) and the third encoder (8) is determined, and the codewords by the remaining encoders are not determined 70. The image processing apparatus according to claim 68, further comprising a codeword sending order controller for changing a codeword output order.

70. At least one of the first error symbol converter (36) and the second error symbol converter (38) is the first error / symbol converter (36) The first error / symbol converter (3 6) generates a comparison value in order from a value having a high possibility of appearing as a prediction error value input to the second error / symbol converter (38). Is sequentially compared with the prediction error input to one of the second error Z symbol converters (38), and based on the number of comparisons until the prediction error matches one of the generated comparison values. The image processing device (600) according to claim 68, wherein a binary symbol sequence is created and output.

7 1. The mode determiner (2) further selects an encoding mode of an encoded pixel based on an encoding mode of an encoded pixel preceding the encoded pixel. The image processing device (600) according to claim 67, wherein

Supplementary IE Form (Article 19 of the Convention)

7 2. At least one of the first codeword allocator (15), the second codeword allocator (16), and the third codeword allocator (18) Either of the binary symbols estimated by the first probability estimator (25a), the second probability estimator (26a), and the third probability estimator (28a) Claims wherein the interpretation of which of the binary symbols is the dominant symbol is changed based on a change in the estimated probability of the binary symbol.

68. The image processing apparatus according to (600).

7 3. The first predictor (3) of the first encoder (101) and the second predictor (7) of the second encoder (102) are integrated. The image processing device (600) according to claim 67, wherein the image processing device is a common predictor.

7 4. Among the first encoder (5), the second encoder (6), and the third encoder (8), at least any two encoders are integrated into a common encoder. The image processing apparatus (600) according to claim 67, wherein the image processing is performed. 7 5. At least one of the first codeword allocator (15), the second codeword allocator (16), and the third codeword allocator (18) is a binary code Based on the information of which symbol is the dominant symbol and the estimated appearance probability of the dominant symbol, from the Huffman code set systematically created for the binary symbol extended information source, Claims characterized by performing binary information source coding realized by selecting an optimum code for an assumed binary symbol extended information source situation.

68. The image processing apparatus according to (600).

7 6. An imaging unit (3 2 5) that captures an image composed of multiple pixels,

An image compression circuit (3 18) for compressing a captured image;

A storage unit (319 or 316) for storing the compressed image;

An image decompression circuit (3 2 0) for decompressing the stored image

In the image processing apparatus (600) provided with

The corrected paper (article The image decompression circuit (3 20)

A decoding control unit (4 3) for selectively operating the first and second decoding units based on either the specific decoding mode selected by the mode decision unit (4 2) or the other decoding mode. ) When

An image processing device (500) comprising a decoding device (500) having

600)

7 7. The first decoding unit (201) includes a first predictor (3) that calculates a predicted value of the decoded pixel based on a value of the reference pixel,

The predicted value of the decoded pixel calculated by the first predictor (3)

Amended paper (Article 5 of the Convention) A first decoded pixel calculator (32) for calculating the value of the decoded pixel from the determination result and the prediction error obtained by the second decoder (46)

77. The image processing device (600) according to claim 76, comprising: 7. The second decoding unit (202) includes a second predictor (7) that calculates a predicted value of the decoded pixel based on the value of the reference pixel,

Decoding in a mode other than the specific decoding mode selected from the predicted value of the decoded pixel calculated by the second predictor (7) and the prediction error decoded by the third decoder (48) A second decoded pixel calculator (33) that calculates the value of the decoded pixel

The image processing apparatus (600) according to claim 77, further comprising: 7 9. An imaging unit (3 2 5) for capturing an image composed of a plurality of pixels, an image compression circuit (3 18) for compressing the captured image,

A storage unit (319 or 316) for storing the compressed image, an image decompression circuit (320) for decompressing the stored image,

Image processing equipment (600) equipped with

The image decompression circuit (3 20)

Enter the codeword and predict the value of the decoded pixel to determine whether the prediction is correct or not.

Kusunoki Tadashi Paper (Treaty No. 19 And a first decoding unit (20 1) for decoding the codeword into a decoded pixel value based on the determination result;

A second decoding unit (202) that inputs a codeword, predicts a value of a decoded pixel, and decodes the codeword into a decoded pixel value;

A decoding control unit (43) for selectively operating the first and second decoding units based on either the specific decoding mode selected by the mode determiner (42) or the other decoding mode. When

A decoding device (500) having

For a decoded pixel that is decoded in the selected specific decoding mode and has a prediction error that is not the predetermined value, a second decoding unit that decodes a corresponding codeword into the prediction error. A decoder (46),

A value of a decoding plane element is calculated from the predicted value of the decoded pixel calculated by the first predictor (3), the determination result, and the prediction error obtained by the second decoder (46). The first decoded pixel calculator (3 2)

With

A second predictor (7) configured to calculate a predicted value of the decoded pixel based on a value taken by the reference pixel;

The predicted value of the decoded pixel calculated by the second predictor (7)

The captured team i ^ A second decoded pixel calculator (33) for calculating a value of a decoded pixel to be decoded in a mode other than the specific decoding mode selected from the prediction error decoded by the decoder (48)

An image processing device comprising: (600).

80. The first decoder (45) receives a codeword and decodes it into a binary symbol sequence (55), or one of binary symbols A first probability estimator (75) for estimating the probability of occurrence of the binary symbol of the binary symbol sequence.

The second decoder (46) receives either a codeword and decodes it into a binary symbol sequence (56) or a binary symbol and inputs a binary symbol. A second probability estimator (76) for estimating the appearance probability of one of the binary symbols, and a first symbol / error conversion for inputting the binary symbol sequence and converting the binary symbol sequence to a prediction error A third symbol decoder (58) for inputting a codeword and decoding it into a binary symbol sequence, and a binary symbol And a third probability estimator (78) that estimates the appearance probability of one of the binary symbols, and inputs the binary symbol sequence into a prediction error The image processing apparatus (600) according to claim 79, further comprising a second symbol / error converter (88) for performing conversion.

81. The decoding control unit (43) is configured to determine that at least one of the first decoder (45), the second decoder (46), and the third decoder (48) decodes. If one of the other decoders outputs a binary symbol sequence before all the decoded binary symbol sequences are used, the use order of the decoded binary symbols is changed. The image processing apparatus (600) according to claim 80, further comprising a device.

Amended paper (Article of the Convention)

82. At least one of the first symbol / error converter (86) and the second symbol / error converter (88) is based on the value and number of binary symbols input. 81. The image processing system according to claim 80, wherein the value symbol sequence is converted into a prediction error.

83. The mode determination device according to claim 79, wherein the mode determiner (42) further selects the decoding mode of the decoded pixel based on the decoding mode of the decoded pixel preceding the decoded pixel. Image processing equipment (600).

84. At least one of the first symbol reconstructor (55), the second symbol reconstructor (56) and the third symbol reconstructor (58) is a corresponding first probability estimator. (75), the second probability estimator (76), and the third probability estimator (78) change the interpretation of which one of the binary symbols is the dominant symbol based on the change in the probability estimation of the binary symbol estimated by the binary probability estimator (78). The image processing apparatus (600) according to claim 80, characterized in that:

8 5. The first predictor (3) of the first decoding unit (20 1) and the second predictor (7) of the second decoding unit (20 2) are integrated to form a common prediction The image processing device (600) according to claim 79, characterized in that the image processing device is a container.

8 6. At least one of the first decoder (45), the second decoder (46), and the third decoder (48) is integrated and a common decoder is integrated. The image processing apparatus (600) according to claim 79, wherein:

8 7. least the first symbol restoring device (5 5), the second symbol restoring device (56), one of the third symbol restoring device (5 8), which of the ^binary symbol Based on the information on whether the symbol is the dominant symbol and the estimated occurrence probability of the dominant symbol, it is assumed from the estimated occurrence probability of the dominant symbol from the Huffman code set systematically created for the extended information source of the binary symbol. To select the most suitable code for the situation of the extended information source of the value symbol

Paper captured (Article of the Convention) 81. The image processing device according to claim 80, wherein the binary information source decoding realized by the above is performed.

8 8. The image compression circuit (3 18) has a plurality of encoding devices (400), and transmits the luminance signal Y and the color difference signals U and V to the encoding devices (400) in parallel. The image processing device (600) according to claim 64, wherein the image is input and encoded.

89. The image compression circuit (3 18) has a plurality of encoding units (400) and inputs color signals R, G, and B to the plurality of encoding units (400) in parallel. 65. The image processing device according to claim 64, wherein the image is encoded.

90. The image compression circuit (3 18) has one encoding device (400) and blocks the luminance signal Y and the chrominance signals U and V to the encoding device (400). The image processing device (600) according to claim 64, wherein the unit is serially input and encoded.

9 1. The image compression circuit (3 18) has one encoding device (400) and serially inputs color signals R, G, and B to the encoding device (400) in block units. 65. The image processing apparatus according to claim 64, wherein encoding is performed.

92. The image decompression circuit (3 20) has a plurality of decoding devices (500) and inputs the encoded luminance signal Y and chrominance signals U and V to the plurality of decoding devices (500) in parallel. 77. The image processing apparatus according to claim 76, wherein decoding is performed.

93. The image decompression circuit (3 20) has a plurality of the decoding devices (500), and inputs the encoded color signals R, G, and B in parallel to the plurality of decoding devices (500) and decodes them. 77. The image processing device (600) according to claim 76, characterized in that:

Amended paper (Article of the Convention)

94. The image decompression circuit (3 20) has one decoding device (500) and serially encodes the encoded luminance signal Υ and color difference signals U and V to the decoding device (500) in block units. The image processing device (600) according to claim 76, wherein the image processing device inputs the data to a device and decodes the data.

95. The image decompression circuit (3 20) has one decoding device (500) and serially encodes the coded color signals R, G, and に into the decoding device (500) in block units. The image processing device (600) according to claim 76, wherein the image processing device inputs the data to a terminal for decoding.

9 6. An imaging unit (3 2 5) that captures an image composed of a plurality of pixels, an image compression circuit (3 18) that compresses the captured image,

A storage unit (3 19 or 3 16) for storing the compressed image

In the image processing device (600) equipped with

The image compression circuit (3 1 8)

An encoding unit (101a) that predicts the value of an encoded pixel, determines whether the prediction is correct, and encodes the value of the encoded pixel based on the determination result to output a codeword; The encoding control unit (1 1) controls the operation of the encoding unit based on whether the prediction determined by 101 a) is correct or not.

9 7. The encoding unit (101a) includes a predictor (3) that calculates a predicted value of a coded pixel based on a value taken by a reference pixel;

The error between the coded pixel value and the predicted value calculated by the predictor (3) is

The captured yorin (i ^ A prediction error calculator (30) for calculating the difference,

A judgment unit (4) for judging whether the prediction error calculated by the prediction error calculator (30) is a predetermined value and outputting a judgment result;

The image processing device (600) according to claim 96, further comprising: 9 8. An imaging unit (3 2 5) that captures an image composed of multiple pixels,

An image compression circuit (3 18) for compressing a captured image;

A storage unit (3 19 or 3 16) for storing the compressed image,

An image decompression circuit (3 20) for decompressing a stored image;

In the image processing apparatus (600) provided with

The image decompression circuit (320)

An image processing device (600) comprising a decoding device (500) having

9 9. The decoding unit (201a) performs decoding on the basis of the value taken by the reference pixel.

Amended paper (Article ⁹ of the Convention) A predictor (3) that calculates the predicted value of

A second decoder (46) for decoding, for a decoded pixel whose prediction error is not the predetermined value, a corresponding codeword into the prediction error,

Decoding that calculates the value of a decoded pixel from the predicted value of the decoded pixel calculated by the predictor (3), the result of the determination, and the prediction error obtained by the second decoder (46) Pixel calculator (3 2) and

The image processing apparatus (600) according to claim 98, further comprising:

Paper captured (Article 19 of the Convention)