[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

WO1996008948A3 - Method and apparatus for fast microcontroller context switching - Google Patents

Method and apparatus for fast microcontroller context switching Download PDF

Info

Publication number
WO1996008948A3
WO1996008948A3 PCT/IB1995/000714 IB9500714W WO9608948A3 WO 1996008948 A3 WO1996008948 A3 WO 1996008948A3 IB 9500714 W IB9500714 W IB 9500714W WO 9608948 A3 WO9608948 A3 WO 9608948A3
Authority
WO
WIPO (PCT)
Prior art keywords
interrupt
task
psw
microcontroller
loading
Prior art date
Application number
PCT/IB1995/000714
Other languages
French (fr)
Other versions
WO1996008948A2 (en
Inventor
Neil Birns
Ori Mizrahi-Shalom
Gregory Goodhue
Thorwald Rabeler
Original Assignee
Philips Electronics Nv
Philips Norden Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics Nv, Philips Norden Ab filed Critical Philips Electronics Nv
Publication of WO1996008948A2 publication Critical patent/WO1996008948A2/en
Publication of WO1996008948A3 publication Critical patent/WO1996008948A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094Condition code generation, e.g. Carry, Zero flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/461Saving or restoring of program or task context
    • G06F9/462Saving or restoring of program or task context with multiple register sets

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

A microcontroller apparatus and method providing a program status word (PSW) including system status bits that can be stored and loaded along with a program counter (PC) during a context switch operation, such as when processing an interrupt or launching an application. The status bits indicate mode (system or user), designate which registers banks are used as general purpose registers and indicate the interrupt priority of the program being executed. By loading a PSW relevant to the task to be executed into the program status word register and loading a PC providing an entry point of the task into a fetch unit, the microcontroller immediately begins task execution. An interrupt vector of the microcontroller system includes the PSW and PC of the particular interrupt allowing immediate processing of the interrupt reducing system overhead tasks. A return from the task, such as via a return-from-interrupt, restores the PSW of the prior task as well as the PC from a system stack, thereby rapidly switching the context back to the prior task. By loading an application specific PSW and PC (and appropriate general purpose registers and special function registers is necessary), and then initiating a return-from-interrupt the microcontroller allows rapid initial task launching.
PCT/IB1995/000714 1994-09-19 1995-08-30 Method and apparatus for fast microcontroller context switching WO1996008948A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US30877094A 1994-09-19 1994-09-19
US08/308,770 1994-09-19

Publications (2)

Publication Number Publication Date
WO1996008948A2 WO1996008948A2 (en) 1996-03-28
WO1996008948A3 true WO1996008948A3 (en) 1996-06-06

Family

ID=23195325

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB1995/000714 WO1996008948A2 (en) 1994-09-19 1995-08-30 Method and apparatus for fast microcontroller context switching

Country Status (1)

Country Link
WO (1) WO1996008948A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5987495A (en) * 1997-11-07 1999-11-16 International Business Machines Corporation Method and apparatus for fully restoring a program context following an interrupt
SE516171C2 (en) * 1999-07-21 2001-11-26 Ericsson Telefon Ab L M Processor architecture is adapted for program languages with sequential instruction flow
TW200511111A (en) 2003-07-30 2005-03-16 Koninkl Philips Electronics Nv Microcontroller with an interrupt structure having programmable priority levels with each priority level associated with a different register set
CN110928574A (en) * 2019-11-20 2020-03-27 深圳市汇顶科技股份有限公司 Microcontroller, interrupt processing chip, device and interrupt processing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4459657A (en) * 1980-09-24 1984-07-10 Tokyo Shibaura Denki Kabushiki Kaisha Data processing system having re-entrant function for subroutines
EP0550287A2 (en) * 1992-01-02 1993-07-07 Amdahl Corporation Computer system having high performance processing for program status word (PSW) key-setting instructions

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4459657A (en) * 1980-09-24 1984-07-10 Tokyo Shibaura Denki Kabushiki Kaisha Data processing system having re-entrant function for subroutines
EP0550287A2 (en) * 1992-01-02 1993-07-07 Amdahl Corporation Computer system having high performance processing for program status word (PSW) key-setting instructions

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
COMPUTER DICTIONARY AND HANDBOOK, Third Edition, by CHARLES J. SIPPL et al., pages 260-261, 264, 425, 511, 512, 518. *
ELECTRONICS AND COMPUTER ACRONYMS, PHIL BROWN, Revised Edition 1988, page 199. *
MICROCOMPUTER ORGANIZATION AND PROGRAMMING - THE 68000 MICROPROCESSOR, Per Stenstroem 1992, pages 127-128, 163-165. *
PATENT ABSTRACTS OF JAPAN, Vol. 4, No. 142, P-30; & JP,A,55 092 950 (RICOH K.K.), 14 July 1980. *

Also Published As

Publication number Publication date
WO1996008948A2 (en) 1996-03-28

Similar Documents

Publication Publication Date Title
KR100385426B1 (en) Method and apparatus for aliasing memory data in an advanced microprocessor
EP0377991A3 (en) Data processing systems
US4323963A (en) Hardware interpretive mode microprocessor
WO1999026132A3 (en) Processor configured to generate lookahead results from collapsed moves, compares and simple arithmetic instructions
CA2103988A1 (en) Method and Apparatus for Processing Interruption
JP3193650B2 (en) Method and system for saving and restoring emulation context without affecting the operating system
KR870000643A (en) Interactive branch prediction and optimization method and apparatus
JP2002512399A (en) RISC processor with context switch register set accessible by external coprocessor
KR20000062300A (en) A gated store buffer for an advanced microprocessor
KR20010014095A (en) A memory controller for detecting a failure of speculation of a component being addressed
WO1993009492A3 (en) Out of order job processing method and apparatus
GB2281986A (en) Logging program counter on reset.
EP1872203A1 (en) Selecting subroutine return mechanisms
EP0378415A3 (en) Multiple instruction dispatch mechanism
KR950009454A (en) Selective storage method and system of multi-execution device processing system state
WO1996008948A3 (en) Method and apparatus for fast microcontroller context switching
EP0331191A3 (en) Information processing system capable of carrying out advanced execution
JPS5729153A (en) Control system for instruction processing order
EP0969358A3 (en) Information processing device and method for performing parallel processing
WO2000065440A3 (en) Exception handling method and apparatus for use in program code conversion
TW345637B (en) Data processor with branch target address cache and method of operation a data processor has a BTAC storing a number of recently encountered fetch address-target address pairs.
US7818549B2 (en) Event driven digital signal processor with time constraints
JPS56157538A (en) Data processing system of advanced mode control
JPS57164343A (en) Check point save system
JPH0877037A (en) Jamming device

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): JP KR

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LU MC NL PT SE

WWE Wipo information: entry into national phase

Ref document number: 1995927939

Country of ref document: EP

AK Designated states

Kind code of ref document: A3

Designated state(s): JP KR

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LU MC NL PT SE

WWW Wipo information: withdrawn in national office

Ref document number: 1995927939

Country of ref document: EP

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase