WO1995003630A1

WO1995003630A1 - Photovoltaic cell and manufacturing process

Info

Publication number: WO1995003630A1
Application number: PCT/US1994/008230
Authority: WO
Inventors: John F. Jordan; Scot P. Albright; Rhodes R. Chamberlin; Marianne J. Swan; Steven X. Johnson; Bruce O. Ackerman
Original assignee: Photon Energy, Inc. Doing Business As Golden Photon, Inc.
Priority date: 1993-07-21
Filing date: 1994-07-21
Publication date: 1995-02-02
Also published as: AU7369394A; IL110390A0

Abstract

The present invention involves low cost, reliable manufacturing techniques and resulting photovoltaic devices, and particularly those having a heterojunction between cadmium sulfide and cadmium telluride layers. In one aspect, a photovoltaic device may be produced comprising a base substrate (202), a bottom electrode film layer of high conductivity tin oxide (206), a secondary n-type film layer of low conductivity tin oxide (210), a primary n-type film layer of cadmium telluride (214), an ohmic contact layer of graphite (218A, 218B), and a top electrode film layer (230) of a conductive metal. Interconnection of a plurality of photovoltaic cells in series may be aided by the use of pre-pre-resist lines (204) and pre-resist lines (208) which are substantially removed during manufacture. Pretreating of feed materials is provided for making a cadmium telluride layer. Intercalated graphite may be used to improve ohmic contact to a cadmium telluride layer. Cadmium telluride morphology may be improved by a preoxidation and gettering sequence. The effect of pinholes through cadmium telluride may be reduced by forming Schottky barriers through the pinholes with a cadmium sulfide layer. A photoactive area (506) may be electrically isolated using border edging (502) and/or one or more isolation cuts (508). A bus bar (614) of conductive metal with a bead of graphite paste (616) is provided.

Description

PHOTOVOLTAIC CELL AND MANUFACTURING PROCESS

FIELD OF THE INVENTION The present invention relates to low cost photovoltaic devices and, more particularly, relates to improvements in photovoltaic modules and methods of manufacturing the same.

BACKGROUND OF THE INVENTION It has long been known that solar energy can be converted to electricity in photovoltaic cells. Although several different types of photovoltaic cells, using a variety of materials, have been proposed, most cells have a similar construction. A cell has a photoactive area typically consisting of one or more semiconductor layers sandwiched between two electrodes. These semiconductor and electrode layers are often in the form of film layers deposited on a rigid base substrate, such as glass. Electricity is generated in a semiconductor layer and is collected at the electrodes. A base substrate and all film layers thereon is generally referred to as a substrate, although substrate is sometimes also used to refer only to the base substrate, such as a glass plate. A substrate may contain more than one photovoltaic cell, and often contains many cells, formed on a common base substrate. A substrate that has been completed with one or more photovoltaic cells and which has means for conducting electricity away from the substrate is often referred to as a module.

Most of the research work performed in the past has been performed in a laboratory environment and has been focused on improving the efficiency of converting solar energy to electricity. Little attention has been given to developing inexpensive and efficient manufacturing techniques that would be required for large-scale production of photovoltaic devices. Such a commercial manufacturing process must be simple and reliable and must include adequate means for handling waste materials. Also, in the research quest for improved cell efficiency, insufficient attention has been given to producing photovoltaic devices that are inexpensive and that are also reliable over extended periods. Although attaining higher cell efficiencies is desirable and should be pursued, higher cell efficiencies should not come at the expense of reasonable manufacturing costs. A need exists for inexpensive photovoltaic devices that are reliable and durable. A need also exists for efficient manufacturing techniques suited for industrial applications for production of high efficiency photovoltaic modules in commercial quantities.

SUMMARY OF THE INVENTION In one aspect, the present invention provides a process for manufacturing photovoltaic devices, and particularly for manufacturing those based on forming a heterojunction between an n-type semiconductor, such as one comprising a cadmium sulfide, and a p-type semiconductor, such as one comprising cadmium telluride. The process provides a practical method for manufacturing photovoltaic cells that is useful for commercial production of reliable, high efficiency photovoltaic modules at a reasonable cost. In one embodiment, the photovoltaic device is a photovoltaic module having one or more photovoltaic cells supported on a base substrate, such as on a sheet of glass. Multiple photovoltaic cells on the base substrate can be formed and interconnected in series . Each photovoltaic cell preferably has a bottom electrode layer, which is preferably of a transparent conducting oxide, a secondary n-type semiconductor layer, which is also preferably of a transparent conducting oxide, a primary n-type semiconductor layer, a p-type semiconductor layer, an ohmic contact layer, and a top electrode layer.

In one aspect, the present invention provides a process for removing a portion of a secondary n-type layer to access a bottom electrode layer for purposes of cell division and interconnection. Access to the bottom electrode layer is provided by the use of a pre-resist material which can be easily removed to remove the otherwise difficult to remove secondary n-type semiconductor layer.

In another aspect, a process is provided for pretreating feed material for forming a p-type semiconductor layer, such as a p-type cadmium telluride layer. Feed material is treated to reduce the oxygen concentration in the feed material . Although the mechanism is not completely understood, such pretreatment improves the efficiency of the subsequently formed photovoltaic cells. In one preferred embodiment, following pretreatment of the feed material to form the p-type semiconductor layer, the p-type semiconductor layer is then subjected to a preoxidation and gettering step to deactivate donor impurities in the p-type semiconductor layer and to provide an oxygen gradient in the p-type semiconductor layer which is beneficial for improving grain morphology upon recrystallization of the n-type semiconductor layer.

In another aspect, a relatively non-invasive surface treatment is provided for treating the surface of a p-type semiconductor layer in preparation for making ohmic contact with a top electrode layer. In one embodiment, the surface treatment removes at least a portion of oxygen located adjacent to the treated surface without substantially alternating the atomic ratio of semiconductor components adjacent the surface. For a cadmium telluride layer, the surface is not rendered significantly rich in tellurium compared with the remainder of the p-type layer. In another embodiment, the surface is treated with a fluid having a high viscosity, preferably greater than about 30 millipoise, to prevent substantial invasion of the fluid below the treated surface along grain boundaries. In one embodiment, the surface is treated with a polyhydric alcohol, such as propylene glycol. In another aspect, the present invention provides a photovoltaic cell in which an ohmic contact interlayer is located between a p-type semiconductor layer and a top electrode layer to facilitate making ohmic contact between the p-type semiconductor layer and the top electrode layer. In one embodiment, the ohmic contact interlayer comprises graphite having a substance intercalated within the graphite crystalline structure. Copper-containing substances are particularly preferred. In one embodiment, a method is provided wherein a portion of a substance intercalated within a material such as graphite is diffused out of the ohmic contact interlayer in a controlled manner to alter electrical properties of the p-type semiconductor layer during manufacture of the photovoltaic cell that substantially reduces the tendency for the substance to diffuse in an uncontrolled manner during subsequent operation of the cell. In another embodiment, the ohmic contact interlayer is deposited by roller coating a viscous suspension to bridge pinholes in the p-type semiconductor layer. In another embodiment, the ohmic contact interlayer forms a Schottky barrier with a primary n-type semiconductor layer, such as cadmium sulfide, through discontinuity regions, of a p-type semiconductor layer, such as cadmium, telluride. In one embodiment, the ohmic contact interlayer is formed from heterogeneously sized grains of material such that smaller grains preferentially enter into defect regions in a p-type semiconductor layer.

In another aspect, the present invention provides a bus bar design for use with a photovoltaic module having a conductive metal strip that is bonded to a top electrode layer. In one embodiment, a bead of conductive paste material is placed along the edge of the bus bar as an electrically conductive path between a top electrode layer and the bus bar.

In another aspect, a bus bar design is provided that avoids the loss of the electrical generation capacity of a photovoltaic cell when multiple photovoltaic cells are connected in series. In one embodiment, the bus bar, in the form of a conductive metal strip, is separated from a top electrode layer by an electrically insulating material. The bus bar is connected around the insulating layer and across the underlying photovoltaic cell to the bottom electrode layer of the cell. In one embodiment, the bus bar overlies a first photovoltaic cell in series.

In another aspect, the present invention provides a photovoltaic module in which one or more photovoltaic cells are supported on a base substrate having a border region that electrically isolates the photovoltaic cell or cells from the peripheral edge of the substrate to prevent electrical shorts of the photovoltaic cell or cells to the peripheral edge of the substrate. In one embodiment, the border region comprises an area where substantially no electrically conducting materials are present on the substrate. In another embodiment, the border region comprises at least a part of a first electrode layer, which can be used as a sealing surface to seal against during possible encapsulation of the photovoltaic module. In another embodiment, the entire border region has substantially no electrically conducting material. In another embodiment, a process is provided for forming the border region on a substrate which involves selective removal of film layers from the substrate. In one embodiment, a border resist material is used to provide for easy access to the substrate in forming a border region. In another aspect, the present invention provides a process for forming film layers by spray deposition involving the use of a spray apparatus that traverses the substrate at a variable speed relative to the substrate with a slower speed near edges of the substrate and a faster speed near the center of the substrate. The variable speed traverse of the substrate permits the formation of a quality film near the edges of the substrate without wasting a substantial amount of spray material to overspray past the edges of the substrate.

BRIEF DESCRIPTION OF THE DRAWINGS Figs. 1-8 show partial cross-sections of a substrate during various stages of manufacture of a photovoltaic device. Fig. 9 is a partial perspective view of a substrate showing border edging and panel isolation.

Fig. 10 is a top view of a substrate having bus bars attached.

Fig. 10A is a top view in detail of a portion of a border shown in Fig. 10.

Fig. 11 is a plot of a velocity profile for a variable speed traverse of a spray head. Fig. 12 is a side view of a bus bar showing a thermal expansion crimp.

Fig. 13 is a partial cross-section of a substrate showing one method for attaching a bus bar.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS In one aspect, the process of the present invention provides a process for manufacturing photovoltaic modules, various embodiments of which will now be described. Figs. 1-8 show partial cross-sections of a photovoltaic substrate 200 under manufacture according to the present invention. Referring to Fig. 1, the process begins with a base substrate 202, which may be a sheet of ordinary float glass, such as a one-eighth inch thick square sheet measuring approximately two feet on each side, 202 on which film layers for an active photovoltaic device are formed.

To prepare a base substrate 202 of glass, the edges are first chamfered, such as with a belt sander or suitable grinder, to remove sharp edges around the base substrate 202 where stress fractures are prone to occur during processing. The base substrate 202 is then washed with a mild soap to prepare the surface for formation of film layers thereon. The base substrate 202 is then rinsed using partially deionized water and dried. A barrier layer (not shown) is deposited on top of the base substrate 202 to prevent contaminants, such as sodium and/or calcium, from diffusing out of the glass and into subsequently deposited film layers. Preferably, the barrier layer is a thin film of silica, which can be applied to the surface of the base substrate 202 by a number of methods applicable to sol-gel technology.

Narrow strips, or lines, of pre-pre-resist material 204 are then be placed at various locations on the substrate in areas that will be used for dividing the panel into a plurality of cells and for interconnecting individual cells in series. The pre-pre-resist lines 204 preferably extend from one edge of the base substrate 202 to the opposite edge of the base substrate 202 and are substantially parallel with the other two edges of the base substrate 202. In one embodiment, the pre-pre-resist lines 204 are approximately 0.012 inches (.030 cm) wide. In one embodiment, a total of 59 pre-pre-resist lines 204 are made on the base substrate 202, thereby providing for subsequent division of the panel into 58 individual cells.

Material useful for the pre-pre-resist lines 204 should be inert and non-diffusing and should have low permeability and preferably negligible or no permeability, especially to other materials used later in the process. Pre-pre-resist materials are also preferably, following heating and curing of the same if required, of low density and friable. One material that has been found useful in this application is a mixture of titanium dioxide powder loosely held with a binder. The binder can be a cellulosic binder or another organic or inorganic binder, including a glass frit based binder. One binder that works well is ethyl cellulose. The titanium dioxide powder and binder may be mixed with a carrier fluid, such as hexanol, for deposition. The carrier fluid will evaporate leaving the proper pre-pre- resist material. The material sets up, or "cures", into a relatively impermeable, low density, friable material upon heating during subsequent processing steps. The pre-pre- resist lines 204 can be deposited onto the substrate using a small diameter tube or needle, such as an intravenous delivery tube or a hypodermic needle, or using other delivery systems that are known for applying resists or resist-like materials.

Following deposition of the pre-pre-resist lines 204, a substantially continuous bottom electrode film layer 206 can be formed on the substrate. This layer is preferably a transparent high conductivity tin oxide layer having a thickness of from about 5.4 micron to about 1.0 micron, and more preferably having a thickness of approximately 0.8 microns. Alternative materials for the bottom electrode layer include indium tin oxide, zinc oxide and cadmium stannate. The bottom electrode layer can be deposited by any suitable means, such as by spray pyrolysis of a solution of stannous chloride in methanol or water. If desired, the high conductivity film layer can be doped, such as with fluorine by adding ammonium bifluoride to the spray mix. A small amount of an acid, such as hydrochloric acid, can also be added to the spray mix to enhance solubility and stability. Spray pyrolysis may be performed at a temperature of approximately 500°C. Preferably, the bottom electrode layer has a specific conductivity of greater than about 1000 mho/cm, and more preferably greater than about 2200 mho/cm.

Alternatively, it is possible to purchase commercial float glass for base substrate 202, which already has deposited thereon a high conductivity tin oxide layer as the bottom electrode layer 206 useful for the present invention. In such case, pre-pre-resist lines 204 are not used. The absence of such pre-pre-resist lines 204 will affect the procedure for cell division and interconnection, as discussed below.

On top of the bottom electrode layer 206, narrow pre- resist strips, or lines, 208 are formed in a manner similar to pre-pre-resist lines 204. Similar materials can be used as those used for pre-pre-resist lines 204. Preferably, there are approximately 59 pre-resist lines 208 formed on and spaced across the substrate, to allow for division of the panel into 58 individual cells that can be interconnected in series. Preferably, the pre-resist lines 208 are approximately 0.018 inches (0.046 cm) wide. Pre- resist material, preferably has the characteristics as described previously for pre-pre-resist material. One material that has been used is titanium dioxide powder loosely held with a cellulosic or other binder, as previously discussed.

Next is formed a substantially continuous secondary n- type film layer 210 having a lower conductivity than the bottom electrode film layer 206. Preferably, the secondary n-type film layer is a transparent low conductivity tin oxide, which may or may not be doped, as previously discussed, of a film thickness from about 0.1 to about 1.0 micron, and preferably of about 0.8 micron. Alternative materials for the secondary n-type film layer 210 include indium tin oxide, zinc oxide and cadmium stannate. A low conductivity tin oxide film layer can be formed by any appropriate means, such as by spray pyrolysis of stannous chloride in an aqueous solution which may also include a dopant and a small amount of acid, such as hydrochloric acid. Spray pyrolysis may be performed at a temperature of about 430°C. The secondary n-type film layer 210 should have a specific conductivity of from about 1.25 x IO^"3 mho/cm to about 100 mho/cm. The secondary n-type material may be doped, such as with one or more of cadmium, zinc, lead, mercury, selenium, sulfur, sodium, cesium, boron and chromium. Following deposition, the secondary n-type film layer 210 may be washed with partially deionized rinse water and dried by any appropriate means. On top of the secondary n-type film layer 210 is formed a substantially continuous primary n-type semiconductor film layer 212, which preferably comprises n- type cadmium sulfide layer from about 2000 to about 12000 angstroms thick. Such cadmium sulfide can be deposited, for example, by spray pyrolysis of a cadmium salt, such as cadmium chloride, and a sulfur containing compound, such as thiourea. Cadmium sulfide deposition is preferably at a temperature of from about 100°C to about 255°C and is preferably performed in multiple deposition steps. Following deposition, the cadmium sulfide film is annealed at a temperature that is preferably from about 400°C to about 500°C. Interim anneal steps following each of the multiple deposition steps can also be included to improve cadmium sulfide film properties.

Preferably, following deposition and annealing, the cadmium sulfide layer is rinsed with partially deionized water having less than about one pp dissolved solids and is dried, such as by thermal drying.

On top of the primary n-type semiconductor film layer is formed a substantially continuous p-type semiconductor film layer 214, preferably a p-type cadmium telluride layer, which may be doped with any suitable dopant. Alternative p-type semiconductor layers include other Group 11-VI semiconductors, Group I-III-IV semiconductors and Group III-V semiconductors. These alternative p-type materials include, for example, copper indium diselenide, copper sulfide, copper indium disulfide, aluminum antinomide, gallium arsenide and indium phosphide. The p- type layer could also be a polycrystalline silicon.

Cadmium telluride can be formed by any suitable means, including spray deposition of cadmium telluride at ambient temperature followed by heating to about 200°C to vaporize the carrier liquid. Preferably, cadmium telluride is spray deposited using a spray mixture containing cadmium telluride particles smaller than about 0.3 microns mixed in propylene glycol, or another suitable carrier fluid. Cadmium chloride is also often added to the spray mixture for use as a flux material during subsequent recrystallization. Preferably, the cadmium telluride contains little or no oxygen, such as in the form of oxides adhering to grain surfaces. The cadmium telluride as deposited is preferably about 19 microns thick and preferably has a bulk density of about 33% of theoretical for cadmium telluride. When cadmium telluride is sprayed to form the p-type semiconductor film layer, cadmium chloride may be mixed into the spray mixture and is also useful for temporarily binding the cadmium telluride film following deposition, and especially during subsequent processing prior to recrystallization of the cadmium telluride. In one embodiment, oxides in cadmium telluride used in manufacturing the spray mixture are reduced to a low level, preferably below about 0.5 weight percent, more preferably below about 0.15 weight percent and most preferably below about 0.1 weight percent of total oxygen relative to total cadmium telluride. One particularly effective way to prepare raw feed material comprising cadmium and tellurium and having some oxygen, such as commercially available cadmium telluride particles, is to subject particles in cadmium telluride raw feed material to a chemically reducing atmosphere, such as using hydrogen gas or another reducing gas, to produce a refined feed material that may be used to form a cadmium telluride film layer. Prior to oxide reduction, cadmium telluride particles are reduced in size, such as by grinding, to a size at least as small as and preferably smaller than the original grain size of cadmium-containing and tellurium-containing grains from which the cadmium telluride was originally manufactured. Such grain size reduction ensures that essentially all oxidized grain boundaries of the cadmium telluride particles will be subjected to the reducing gas, and thereby ensures effective reduction of oxides concentration. In one preferred embodiment,• the particles are treated with a reducing gas, preferably hydrogen gas, at a temperature of greater than about 500°C, more preferably from about 500°C to about 700°C and most preferably from about 575°C to about 625°C. In one particularly preferred embodiment, treatment is with hydrogen gas at a temperature of approximately 600°C for a sufficient time to achieve the desired oxides concentration. Oxides reduction can be carried out in any suitable apparatus, including a fluidized bed reactor. In one embodiment, commercially available cadmium telluride particles are reduced in size to smaller than about 2 mils. For example, the particles could be ground in a ball mill without any added grinding balls so as to avoid contamination of the cadmium telluride pellets to a size smaller than about 1/8 inch, followed by crushing, as with a roller crusher, to a size smaller than about 2 mils. The oxide concentration of the cadmium telluride particles may then be reduced to less than about 0.1 weight percent oxides by treating the particles of cadmium telluride with hydrogen gas at approximately 600°C for approximately 180 minutes. It has been surprisingly found that such reduction of an oxide concentration prior to spray deposition of cadmium telluride significantly improves cell efficiency, although the precise reason for such improvement is not known.

Following oxide reduction, the size of the particles are preferably reduced to an average size smaller than from about 0.2 microns to about 0.3 microns. For example, the particles could be ground using a wet ball mill in a mixture with an appropriate fluid, such as propylene glycol, and preferably in the presence of alumina cylinders. Preferably, no particles are larger than about 7.5 microns. These particles can then be used in a spray mixture for spray deposition of cadmium telluride.

In one embodiment, cadmium telluride feed material, which may contain non-stoichiometric cadmium and/or tellurium is heated, preferably to a temperature of from about 550°C to about 650°C, and more preferably about 600°C, in an inert or reducing environment to volatilize and drive off excess tellurium or cadmium, thereby allowing for preparation of a suitable cadmium telluride feed material starting with commercial grade cadmium telluride. Such a process is particularly useful for leveling the concentration of oxides and/or cadmium and tellurium within a batch of feed material and for providing consistency and leveling between batches. In one embodiment, cadmium telluride in feed material, which may be deposited to form a cadmium telluride film layer, contains cadmium and tellurium, as cadmium telluride, within approximately 0.01 atomic percentage of each other. In one embodiment, materials from which a cadmium telluride film layer is formed should be such that there is no more than about 0.01 atomic percentage of either tellurium or cadmium in excess of that existing as cadmium telluride. In one embodiment, excess cadmium or tellurium can be reduced to an acceptable level by heat treatment to a temperature of from about 500°C to about 700°C to volatilize excess cadmium and/or tellurium. Such volatilization can be in a combined heating in a chemically reducing atmosphere to also simultaneously effect oxide reduction, discussed previously.

The principles discussed above also apply for other suitable materials that may be used for the p-type film layer, including Group II-VI compounds other than cadmium telluride, Group I-III-VI compounds such as copper indium diselenide, or Group III-V compounds such as gallium arsenide.

After deposition, the p-type semiconductor film layer, which is preferably a cadmium telluride layer as discussed previously, is subjected to an oxidizing environment at an elevated temperature to getter impurities and to establish an oxidation gradient from the top to the bottom of the p- type semiconductor film layer, to improve cohesion of the n-type semiconductor film layer and to reduce adhesion to other materials of the film. As used herein, gettering impurities refers to tying-up, or deactivating, donor impurities in the cadmium telluride film layer by converting donor impurities to oxides . The unique combination of first reducing oxides concentration in cadmium telluride prior to deposition, as discussed previously, followed by oxidizing the deposited layer has been unexpectedly found to be particularly beneficial. As used herein, oxidizing refers to increasing the amount of oxygen contained in a film layer, particularly in a cadmium telluride layer. Such oxidizing may also to be referred to as oxidating.

In one embodiment, the p-type layer 214, preferably cadmium telluride, is first subjected to an oxidizing atmosphere, such as oxygen gas, at a first temperature for efficient gettering and is then subjected to an oxidizing atmosphere at a second, higher temperature, for efficient development of a suitable oxidation gradient through the cadmium telluride layer. Preferably, the p-type layer 214 is subjected to an oxidizing atmosphere at the desired temperatures for from about four minutes to about six minutes, and more preferably for approximately five minutes total time.

In one preferred embodiment, a cadmium telluride layer is exposed to an oxidizing atmosphere, such as an atmosphere comprising oxygen gas, at a temperature of from about 300°C to about 425°C for from about 10 minutes to about 60 minutes. The cadmium telluride layer is then subjected to an oxidizing atmosphere, such as an atmosphere comprising oxygen gas, at a temperature of from about 450°C to about 550°C for from about 1 minute to about 10 minutes, and preferably for about 5 minutes . This procedure is particularly effective in fixing impurities as oxides in the gettering step at the lower temperature, and for providing a good oxygen gradient through the cadmium telluride layer caused during the higher temperature treatment . Referring now to Fig. 2, the p-type semiconductor film layer 214 is compressed, such as by the use of compression rollers 216, which have been found to be particularly useful for compressing a cadmium telluride film layer. The interconnection region comprising the area including the pre-resist and pre-pre-resist lines is preferably not compressed. For cadmium telluride, an original film thickness of 19 microns might be reduced during compression to approximately 12 microns. Preferably, compression rolling is performed by exerting a pressure of from about 5,000 psi to about 15,000 psi on the cadmium telluride layer surface.

Following compression of the p-type semiconductor film layer 214, the p-type semiconductor film layer, and particularly when cadmium telluride is used, may be subjected to a recrystallization, or regrowth, step at an elevated temperature in a substantially inert environment, as previously discussed. Preferably, multiple substrates are subjected to the recrystallization step together. Substrates are paired and positioned so that exposed cadmium telluride layers of the paired substrates are positioned face to face. Recrystallization is preferably at a temperature of from about 400°C to about 700°C, and more preferably at a temperature of from about 480°C to about 560°C, for a time of from about 10 minutes to about 60 minutes, and preferably from about 40 minutes to about 60 minutes. When heating the substrates to the recrystallization temperature, the temperature should not be increased faster than about 25°C per minute, and should preferably be increased at a rate of about 3°C per minute. Recrystallization should preferably be conducted in a gaseous atmosphere having less than about 5 volume percent, and more preferably less than about 0.05 volume percent, oxidant.

Following regrowth, the p-type semiconductor film layer surface is washed with partially deionized water, preferably having less than about 1 ppm dissolved solids,and is then dried. Pinholes extending through the p-type semiconductor film layer can then be filled, such as by placing an insulating material into the pinholes using a small diameter needle, such as a hypodermic needle. Following pinhole plugging, the p-type semiconductor film layer is again rinsed with an appropriate rinse water and dried.

The p-type semiconductor film layer, and particularly when cadmium telluride is used, may then be subjected to a surface treatment to remove oxides, in the form of adsorbed oxygen or oxides (e.g., of cadmium, tellurium, or some impurity) that may exist on the surfaces of cadmium telluride grains.

In one embodiment, the surface of the p-type semiconductor film layer is treated with a fluid that removes the oxides without significantly removing any of the p-type film material from the layer, especially when cadmium telluride is used. The treatment of the present invention is substantially different from etch procedures which have been proposed by others that use strong acidic etchants or oxidizers followed by rinsing with strong basic solutions to create a tellurium rich surface for improving conductivity near the surface of the cadmium telluride layer for improved ohmic contact with a subsequent electrode layer. In a manufacturing environment, however, it is difficult to obtain repeatable quality etches using that process and it is, therefore, to be avoided. Rather, it has been unexpectedly found that good ohmic contact can be made to cadmium telluride, as discussed herein, without etching the cadmium telluride layer to produce a tellurium rich surface region.

Preferably, the fluid used to treat a cadmium telluride surface according to the present invention provides for a relatively non-intrusive, planer treatment of the surface of the cadmium telluride film layer to remove oxides adhering to the contacted surface of the cadmium telluride grains in the film layer. Oxides are removed from the near-surface region of the film layer without removing substantial amounts of oxides from the interior of the film layer. Typical native oxides formed in cadmium telluride surface may be as much as 10 to 30 angstroms thick, or about 10 molecules deep, and sitting on top of a reasonably virgin cadmium telluride layer. Mild solutions of sodium sulfite, potassium cyanide, and ammonium bifluoride in water, alcohols, and glycols are suitable for use as treating fluids. Many reducing agents, fluorides and cyanides could be used. Preferred treating fluids, however, should have a high viscosity and perform the desired treatment in a relatively short time, thereby avoiding penetration significantly below the surface of the cadmium telluride layer. Higher viscosity alcohols, such as isobutyl alcohol, glycols and glycerin are, therefore preferred. One fluid that has been found to be particularly useful is propylene glycol.

Preferably, the treating fluid is a liquid, such as propylene glycol, which, as preferred, is more viscous than water, thereby providing the planer treatment as desired. Such high viscosity liquids tend not to travel down the grain boundaries in the cadmium telluride layer during treatment . It has been found that it is advantageous to leave some oxides coating the cadmium telluride grain boundaries below the treated surface region for passivation, and to remove only those oxides in the vicinity of the film surface to facilitate a good ohmic contact to an overlying electrode layer. Preferably, the treating liquid has a viscosity greater than about 30 millipoise, more preferably from about 30 millipoise to about 50,000 millipoise, still more preferably from about 100 millipoise to about 10,000 millipoise, and most preferably from about 200 millipoise to about 1,000 millipoise.

In one embodiment, following the surface treatment, the cadmium telluride, or other p-type material when cadmium telluride is not used, is rinsed with water, preferably deionized water, and is dried, preferably by blowing water off of the cadmium telluride surface using a compressed gas, such as compressed air exiting an air knife. In one embodiment, residual water remaining adhered to the cadmium telluride surface, such as by capillary forces, or simply adsorbed onto the surface, is removed by treating the surface with a water-displacing fluid, such as isobutyl alcohol or another substance capable of forming an azeotrope with water. The isobutyl alcohol can then be blown off using compressed gas as before, such as by the use of an air knife. Preferably, the initial fluid treatment, such as with propylene glycol, is for at least about 90 seconds to effect the proper oxide reduction without allowing substantial penetration below the surface of the cadmium telluride film layer.

Referring now to Fig. 3, following the surface treatment of the p-type film layer 214, an ohmic contact film layer 218 of an electrode material may be formed on top of the p-type semiconductor film layer 214 to provide for electrical contact to that layer. In one embodiment, graphite is used as the material for the ohmic contact film layer 218, which is formed on top of a p-type film layer 214, which preferably comprises p-type cadmium telluride as discussed previously. In one embodiment, the graphite layer is approximately 10 microns thick, and overlies a cadmium telluride layer that is approximately six microns thick following regrowth. A graphite layer can be formed, for example, by spray deposition by mixing a graphite paste in a carrier liquid such as isobutyl alcohol. Multiple spray depositions may be used to effect uniform coverage. Thickness of the deposition may also be varied between sprays. Preferably, however, the graphite is deposited in a viscous suspension having at least about 20 percent solids, more preferably greater than about 30 percent solids, and most preferably greater than about 40 percent solids. Preferably, such dense graphite suspensions are applied by roller coating, which has been found to be particularly desirable in that such deposited graphite coatings have a tendency to not penetrate into even some of the larger pinholes that may still exist in the underlying p-type film layer, and thereby tend to bridge over such pinholes so as not to contact an underlying film layer and to form a barrier to shorts and shunts through such pinholes. The bridgability of the graphite on any given film may be affected by the method of application, temperature of application, viscosity which is a function of percent solids, type of solvent or carrier liquid, the size distribution of solids and the surface area of solids. This bridging method for reducing detrimental effects of pinholes is particularly useful for pinholes smaller in diameter than about two times the thickness of the final graphite layer. The electronic characteristics of a graphite film, though affected by several things, are generally monitorable by specific resistivity of the deposited graphite film layer. Graphite material having specific resistivities preferably of from about 0.001 ohm-cm to about 1000 ohm-cm, more preferably from about 0.01 ohm-cm to about 100 ohm-cm, still more preferably from about 0.01 ohm-cm to about 10 ohm-cm, and most preferably from about 0.1 ohm-cm to about 1 ohm-cm, are used for improved formation of Schottky barriers with the underlying n-type film layers. In one embodiment, however, electrode material of the ohmic contact film layer, and particularly deposited graphite, contains particles small enough to enter into pinholes in defect regions, and particularly into those pinholes smaller than about 0.5 millimeters in diameter, to preferably contact an underlying n-type layer, such as an underlying n-type cadmium sulfide layer or an n-type low conductivity tin oxide layer, as previously discussed. For example, a two micron diameter pinhole could be filled with graphite particles having an appropriate resistivity, as previously discussed, and being of a small size, such as of about 0.1 to about 0.2 microns. The junction formed between properly selected graphite particles and such n- type layers has been found to be particularly advantageous in treating pinholes because a Schottky-type barrier is formed at the junction, thereby reducing or preventing undesirable shunts and shorts. Graphite resistivities for forming Schottky barriers are preferably from about 0.001 ohm-cm to about 1000 ohm-cm, more preferably from about 0.01 ohm-cm to about 100 ohm-cm, and most preferably from about 0.1 ohm-cm to about 1 ohm-cm.

In one embodiment, an additional benefit of selecting the resistivity of the graphite as described is that it provides electrical isolation of shunts through pinholes even in the absence of forming a Schottky barrier. This is especially useful when a bottom electrode film layer, such as a high conductivity tin oxide layer, is exposed through a pinhole. This isolation effect is a geometrical effect that minimizes lateral current flow when both resistivity and thickness of the graphite layer relative to all underlying layer thicknesses is properly selected, as previously discussed.

In one embodiment, the ohmic contact layer comprises an electrode material, preferably graphite, intercalated within one or more intercalated molecules. At least one atom of the intercalated molecule can be subsequently diffused out of the graphite and into the underlying p-type film layer, such as a cadmium telluride layer, by heat treatment to a temperature sufficient to impart the thermal activation energy required to activate the diffusion of intercalated molecules and thereby allow their migration out of the graphite crystalline structure. Preferably, at least one atom of an intercalated species diffuses and chemically reacts with the p-type film layer. Preferably, the intercalated molecule is a copper-containing compound, and more preferably is a copper salt, such as copper chloride. Other intercalated molecules that could be used include, for example, antimony chloride, and bismuth chloride or other Group V-containing materials.

During later heat treatment, preferably to a temperature of from about 200°C to about 300°C, the diffusion and reaction of a small amount of an intercalated molecule, copper chloride for example, appears to form a thin, controllable layer of conductive material on the surface of cadmium telluride grains. In the case of copper chloride, a layer of conductive Cu_xTe appears to be formed. This increased conductivity on the grain surfaces apparently helps to improve ohmicity of the contact, particularly between cadmium telluride and graphite layers. Also, the controlled placement of Cu_xTe at discrete points markedly reduces further diffusion down the grain boundaries and therefore enhances stability. Also, the existence of a significant energy of activation required to release additional copper remaining intercalated in the graphite precludes inadvertent supply of new copper from a graphite ohmic contact layer during subsequent processing or during normal operation of a completed module. Such remaining intercalate atoms remain stable and substantially non-diffusible during subsequent normal operation of a completed photovoltaic module. The described use of an intercalated graphite followed by diffusion of a doping material into a cadmium telluride layer is particularly useful in combination with the non- penetrating surface treatment as previously described. It appears that since conductivity increase of the cadmium telluride is accomplished via diffusion from the intercalated graphite, the fluid treatment need not etch the surface to create a tellurium rich surface, but need only remove surface oxides. One particular advantage of using intercalated graphite is that diffusion of the dopant, such as copper, into the cadmium telluride layer can be carefully controlled and self limiting due to the high activation energy for releasing intercalated molecules from the graphite crystalline framework. During operation of the cell, any undiffused intercalated molecules remain tightly bound within the graphite crystalline framework, thereby avoiding detrimental diffusion of these molecules during cell operation. Preferably, the proper choice for the intercalated molecule in the graphite meets four requirements: 1) the additive must effectively make the semiconductor material more conductive (more p-type in the case of p-type cadmium telluride) ; 2) the additive must have a low propensity towards diffusion into the cadmium telluride and/or down the cadmium telluride grain boundaries, 3) the additive must disperse well throughout the graphite paste, and 4) the "binding energy" to the graphite (the tendency for it to remain in the graphite) should be high in order to reduce long-term diffusion problems.

In one embodiment, 100 parts by weight of a graphite paste having, for example, 20 percent by weight solids can be mixed with one part by weight of intercalated graphite powder having perhaps 10 percent by weight of an intercalated species such as copper chloride. Prior to diffusion, the graphite ohmic contact layer would therefore have approximately 0.5 weight percent of the intercalated species.

In one embodiment, ohmic contact to the p-type film layer, and particularly to cadmium telluride, may be improved by use of an intercalated graphite even without diffusion and reacting to form a more conductive region of the cadmium telluride layer as described. The change of the Fermi level of the graphite itself by properly choosing an intercalated species may provide for improved ohmic contact to a p-type film layer.

In one embodiment, graphite used to form the ohmic contact film layer is applied using heterogeneously sized graphite particles. Preferably, graphite particles containing intercalated molecules, such as copper chloride, are of a size generally larger than graphite particles having no intercalated molecules. The smaller graphite particles, which tend to fill defects such as pinholes in the underlying p-type semiconductor film layer, such as cadmium telluride, are preferred for forming Schottky-type barriers with exposed underlying n-type layers, as previously discussed, if their specific resistivity is properly chosen.

If the size of graphite particles are selected properly for resistance, a partial barrier results that is significantly greater in resistance across the graphite layer in the vicinity of filled pinholes due to the increased thickness of the graphite layer through the pinhole area due to filing of the pinholes with graphite, graphite resistance and thickness should be selected to provide for limited flow of electrical current in a lateral direction along the graphite film and to provide no significant additional series resistance in the cell to current flow across the thickness of the film.

Referring now to Fig. 4, in one embodiment, the ohmic contact film layer, which is preferably graphite as described, may be deposited as two layers, referenced as 218A and 218B, to ensure substantially continuous coverage. These two layers 218A and 218B are preferably of the same material, and preferably both comprise graphite. Such a graphite ohmic contact film layer would typically be about 10 microns thick or less.

Referring now to Fig. 5, cell division can be accomplished by dividing the panel into individual cells in an interconnection region 220. A first division cut is made into interconnection area 220, preferably by sandblasting. Normally, it is difficult to sandblast through the bottom electrode film layers 206 and the secondary n-type film layer 210, particularly when those are tin oxide layers as previously discussed. Sandblasting through the primary n-type film layer, such as a cadmium sulfide layer, may also be difficult. In one embodiment, however, a pre-pre-resist line, as previously described, can be placed between the base substrate 202 and the bottom electrode film layer 206 to facilitate a sandblast cut down to base substrate 202. Due to the shock of the sandblast procedure, pre-pre-resist material will tend to structurally deteriorate and to break apart thereby making the overlying film layers susceptible to breakage and removal by sandblasting. Likewise, in one embodiment, as previously described, a pre-resist line can be placed between the bottom electrode film layer 206 and the secondary n-type film layer 210. Again, structural deterioration of the pre-resist layer makes the overlying layers susceptible to easy removal by sandblasting, or by other mechanical means. It should be recognized that, unlike the clean cuts shown in Fig. 5, sandblast cuts will not be at perfect right angles. Also, not all of the pre- pre-resist and/or pre-resist material is removed. Sufficient material must be removed to obtain access to the underlying film layer, but typically some material will remain.

The pre-resist lines thereby provide access to the top of the bottom electrode film layer 206. Use of a pre- resist has been found to be particularly advantageous due to the difficulty and expense of otherwise obtaining an accurate cut to the top of the bottom electrode layer 206 through the secondary n-type film layer 210. Although sandblasting cuts are preferred, because of their ease and relatively low expense, such a sandblast cut would be impractical in the absence of a pre-resist material. Alternatively to using a pre-resist material 208, however, a laser ablation could be made to the surface of the bottom electrode film layer 206, but at an added expense.

As seen in Fig. 5, a first division sandblast cut using both a pre-pre-resist line and a pre-resist line can be made to cut through the ohmic contact layer 218A and 218B (e.g., graphite) , the p-type semiconductor film layer 214 (e.g., cadmium telluride) and to the top of or into the primary n-type semiconductor film layer 212 (e.g., cadmium sulfide) in the area 226. The area 222, formerly under the pre-pre-resist line, is open to the top of the base substrate 202 and the area 224, formerly under the pre- resist line, is open to the top of the first bottom electrode layer (e.g., high conductivity tin oxide) .

Interconnection area 220 may be about 39 mils (0.099 cm) wide, with area 226 being about 9 mils (0.022 cm) , area 222 being about 12 mils (0.030 cm) and area 224 being about 18 mils (0.046 cm) wide. As discussed previously, however, in one embodiment, commercial float glass can be obtained already having deposited thereon a high conductivity tin oxide for use as a bottom electrode film layer 206. In that case, a pre-pre-resist strip will not be utilized. As mentioned, sandblasting through a tin oxide layer to provide a division area 222 down to the substrate 202 is impractical . Therefore, when pre-pre-resist lines 204 are not used, then following the first division sandblast cut, another, second cut, is required to produce the division area 222 down to substrate 202. That cut may be made, for example, by a laser.

Referring to Fig. 6, following division of the panel into a plurality of individual cells, as just described, a line of permanent resist material 228 is formed in the interconnection region 220 as shown. Preferably, the permanent resist line 228 overlaps the first top electrode film layers 218A and 218B and extends into the interconnection region 220 to overlap with the exposed first bottom electrode layer 206 in region 224.

The permanent resist line 228 can be any material that will provide electrical insulation to prevent shunting paths that would interfere with proper operation of interconnected cells. In one embodiment, the permanent resist material comprises titanium dioxide powder a binder, such as in ethyl cellulose, in a carrier liquid, such as hexanol.

In one embodiment, the substrate is then heated, preferably in a substantially inert environment such as in a nitrogen atmosphere, to a temperature of from about 200°C to about 300°C, and preferably to about, 210°C for a sufficient time, such as for about 55 minutes, to allow for diffusion of intercalated molecules out of the intercalated graphite in the ohmic contact film layer 218A and 218B, as previously discussed. In one embodiment, the rate of temperature rise is controlled for adequate curing of the permanent resist material.

Referring now to Fig. 7, a substantially continuous top electrode layer 230 is formed over the entire panel, including over the interconnection region 220. The top electrode film layer 230 is preferably a conductive metal, and more preferably comprises multiple sublayers of conductive metal such as a sublayer of a conductive alloy, such as a nichrome alloy comprising nickel and chromium, and a layer of tin. Such materials can be placed on the panel by evaporation deposition with nichrome being deposited first in a sublayer approximately 75 angstroms thick followed by a tin sublayer to a thickness of approximately 1 micron. Any nickel or chromium based metal or alloy may be used for such a first sublayer of a top electrode film layer.

Referring now to Fig. 8, a completed interconnection region is shown. A final division cut is made in region 232 to complete the cell division and interconnection process. This final cell division and interconnection cut is preferably made using a sandblaster, which provides inexpensive and efficient isolation of the top electrode film layer and preferably down as far as the top of the primary n-type film layer 212 (e.g., cadmium sulfide) as shown, but in any event at least into the p-type film layer 214 (e.g., cadmium telluride) . The cut can also be made by a laser. In a preferred embodiment, the panel has 58 series interconnected cells. In one embodiment, a substrate is electrically isolated from its external periphery by placing an electrical isolation area around a photoactive area on the substrate. Fig. 9 shows a partial view of one embodiment of a substrate 500 which may contain all of the film layers as previously described, on a base substrate 504. Preferably, the substrate 500 has been divided into a plurality of cells that are interconnected in series, as previously described. A border region 502 is placed around the perimeter of the entire substrate 500. In one embodiment, the entire border region 502 is an area where all film layers have been removed from the substrate 500 down to the base substrate 504, which is preferably glass. Such a border region 502 provides a surface for sealing during encapsulation, and also, preferably, electrically isolates the photoactive area of a substrate from its peripheral edge. Although border region 502 is shown extending to the edge of substrate 500, it is not necessary that a border region extend all the way to the edge of a substrate. Region 506 is an area of the substrate 500 from which film layers have not been removed and region 506 comprises at least part of what will be an operative, photoactive region of an operating photovoltaic module.

Border region 502 can be manufactured by any suitable means, such as by sandblasting or by using a high performance grinding wheel or brush. In one embodiment, film layers are removed to form border region 502, except that one or more of the secondary n-type film layer and the bottom electrode film layers, as depicted as layer 510, have not been removed. This embodiment facilitates the use of relatively easy and inexpensive sandblasting or grinding to remove film layers to affect placement of border region 502 while still providing an adequate surface for sealing during encapsulation. Typically the border region 502 is approximately 0.5 inch wide, and more preferably is about .520 inch wide, but will vary based on the encapsulation method used. In one embodiment, a border resist strip can be used to facilitate removal of film layers to form border region 502. A border strip of resist material can be placed around the perimeter of a substrate with the approximate border resist strip width being approximately that width desired for border region 502. Resist materials can comprise any suitable resist material for use as pre-pre- resist lines, pre-resist lines, or permanent resist lines. Preferably, the border resist strip is placed on a substrate prior to forming a bottom electrode film layer, thereby providing access through subsequent film layers to the top of base substrate 504. In such a case, a border resist strip could be formed at the same time that pre-pre- resist lines are formed. Alternatively, a first bottom electrode, such as high conductivity tin oxide, already deposited on a base substrate could be removed from the desired border region and a border resist strip could then be applied prior to subsequent film layers, thereby providing access to the base substrate 504. A border resist strip, if used, and overlying film layers are preferably removed to form border region 502 by use of a simple and inexpensive sandblast process. In one embodiment, a border resist strip could be in the form of a line, which upon removal would result in isolation lines in the border region 502.

As noted, border region 502 serves two functions. First, it provides an area where a seal may be formed for encapsulation purposes. Second, it provides for electrical isolation of the substrate. When border isolation region 502 has been removed down only to the top of a tin oxide layer, as discussed, then it is necessary to provide some additional means for electrical isolation. Such electrical isolation can be effected by making an isolation cut 508 through the remaining tin oxide layer or layers down to the glass substrate 504. Although only one isolation cut 508 is required, a second isolation cut 512 may also be made for added protection. Additional isolation cuts in excess of two could also be provided. The electrical isolation provided should be sufficient so that there is no more than 50 microamps of current leakage across all isolation cuts that are between the photoactive area and the peripheral edge of the substrate or module (e.g., 508 and 512 as shown) when a voltage of 1500 volts is applied across such isolation cuts.

Border isolation cuts 508 and 512 can be made by a laser. Surprisingly, however, it has been found that a good border isolation cut can be made by sandblasting if a hard blast media, such as silicon carbide, is used. Preferably, each isolation cut has a width of at least about 30 mils, and more preferably each isolation cut has a width of at least about 50 mils. In one embodiment, a substrate is encapsulated in the presence of a desiccant to absorb water invading the encapsulated interior space, thereby assisting in maintenance of the electrical isolation across isolation cuts 508 and/or 512. Preferably, the substrate 500 will be encapsulated in some manner such that each of border isolation cuts 508 and 512 are sealed within the interior space of an encapsulated module in a dry surround.

Referring now to Fig. 10, a substrate 600 is shown having a plurality of individual cells 602, and on which a border region 604 has been formed, that preferably would also contain one or more isolation cuts (not shown) , as previously described. It will be recognized that the drawing of Fig. 10, as with all previous drawings, is not strictly to scale and is for illustration purposes only. Also, Fig. 10 shows only six individual cells 602 on substrate 600. A substrate according to the present invention could contain any number of cells, and preferably would contain 58 cells.

Each of the individual cells 602 is separated from the next cell and connected in series to the next cell in interconnection regions 606. The outermost cells 608 and 610, representing first and last cells in series connection, are each fitted with a bus bar, 612 and 614 respectively, which preferably are highly conductive metal strips, and more preferably are strips of copper. Often, a completed, testable, substrate fitted with contacting means such as bus bars 612 and 614 is referred to as a photovoltaic module.

In one embodiment, bus bars 612 and 614 are adhered to the surface of cells 608 and 610 using any suitable adhesive, such as resins, which may be conductive or non- conductive, and is preferably a pressure sensitive adhesive with low outgassing. Bus bars 612 and 614 may contain crimps laterally across the bus bars to accommodate thermal expansion differences between bus bars 612 and 614 and substrate 600. Fig. 12 shows a partial side view of a bus bar 1200 showing such a thermal expansion crimp 1202. As shown in the Fig. 10A, electrical contact between bus bar 614 and cell 610 is ensured by placing a bead 616 of material along the edge of bus bar 614 and that adheres to and contacts with both bus bar 614 and the top layer of cell 610, which is typically the top electrode film layer of cell 610. Such a bead 616 can be placed on one or on both sides of bus bar 610 as shown, and preferably on both sides extending the full length of bus bar 610. Also, bead 616 could surround the entire perimeter of bus bar 614. Although not shown, similar beads could also be placed along bus bar 612, which may be similarly adhered to cell 608.

Bead 616 must provide adequate conductivity between cell 610 and bus bar 614. Preferably, bead 616 is made of a conductive graphite. The bead can be formed by placing a graphite paste along the appropriate edge of bus bar 614, which paste will dry to give the proper bead for contacting. Bead 616 is particularly useful when bus bar 614 is fixed to cell 610 by a non-conductive adhesive, since bead 616 will be the only means for electrical conductance between bus bar 614 an cell 610.

Electrical leads can then be attached, such as by soldering, to bus bars 612 and 614, and such leads may be transmitted through a back cover placed on a finished module during encapsulation to provide for connection of the module, such as to an outside electrical grid.

In one embodiment, bus bar 614 is attached to the top electrode layer of cell 610. In one embodiment, the top electrode layer of cell 610 acts as a positive electrode for that cell. In such an embodiment, the top electrode layer of cell 608 (which has the most negative potential of the series connected cells) will be used as a terminal negative electrode for the series connected cells. In such a case, cell 608 would be an inactive, or "dead," cell and would not contribute to power production of the interconnected cells. In such a case, cell 608 should be made as small as possible to minimize area losses to power production. In one embodiment, a bus bar can be placed on top of a cell in a manner to avoid the problem with having an inactive cell, as previously discussed. Fig. 13 shows a partial cross-section of a substrate 1300 having a terminal cell 1304 on substrate 1300 which is partially shown. Cell 1304 has the same component film layers as previously described with Fig. 8, and in particular has a top electrode film layer 1308 and a bottom electrode film layer 1306. Cell 1304 may be, for example, a first cell in series on substrate 1300. A terminal permanent resist line 1310 having a top electrode film layer 1308 deposited thereon is also shown and may have been manufactured as previously described. A layer of insulating material 1312, such as an insulating tape, coating, fabric or other insulating material, is placed on top of the top electrode film layer 1308 of cell 1304 and extends down the edge of cell 1304. Bus bar 1314 is adhered to the insulating layer 1312 by any suitable means, such as using a resinous adhesive as previously described. A bead strip of conductive material, such as graphite, as previously described, is placed along the edge of bus bar 1314 and extends down into the interconnection region to provide an electrical contact through the top electrode film layer 1308 that extends over terminal permanent resist line 1310 to bottom electrode layer 1306, thereby providing an electrically conductive path for collecting electrical power generated by cell 1304.

The completed module can be encapsulated by any method which provides adequate protection of the module from deterioration during operation in an outside environment. Preferably, however, the module is encapsulated in the presence of a desiccant, such as a molecular sieve or zeolite. The desiccant can be made of any material capable of absorbing or adsorbing moisture that may invade the interior space of the encapsulated module during operation. Preferably, the desiccant comprises a zeolite having pore sizes from about 3 angstroms to about 10 angstroms in size. The desiccant should be selected based on the vapor pressure of water at the normal operating cell temperature of the module plus 20oc with a water loading of 2.5 to 7.5 weight percent. In one embodiment, film layers, including high conductivity and low conductivity tin oxide layers, and cadmium sulfide layers, can be deposited by spray deposition, such as by spray pyrolysis, using a spray head that traverses laterally across a substrate as the substrate moves longitudinally in a direction perpendicular to the direction of the spray head traverse. It has been found, however, that production of photovoltaic panels can be improved, and particularly can be improved in the deposition of film layers by spray deposition, by providing a spray head that traverses laterally across the substrate at a variable speed, rather than at a fixed speed as is usually done.

In one embodiment, the traversing head moves laterally across the substrate, with the velocity of lateral movement relative to the substrate being dependant upon the lateral position of the spray head over the substrate. Preferably, the spray head moves at a slower lateral velocity nearer the edges of the underlying substrate then the lateral velocity of the head near the center of the underlying substrate. Such a variable speed traverse allows depositing a film layer with reduced overspray and with enhanced throughput for a given spray system. Fig. 11 shows a plot of a traversing head lateral velocity versus lateral position over the substrate according to one embodiment of the invention. The actual velocity at any given point, and the maximum and minimum velocities, will depend upon the rate of travel of the substrate passing under the spray head, the type of material being sprayed, the volume of material exiting the spray nozzle, and various other parameters such as temperature, reaction rate of spray pyrolysis, etc.

The variable speed of the traverse can be accomplished, for example, by propelling the spray head using a variable speed motor, with input to and positioned output of the motor dependant upon an electrical signal received from a processing unit programmed with a velocity profile. While the invention has thus been described in terms of specific embodiments which are set forth in detail, it should be understood that this discussion and the drawings which form a part of this disclosure should not be understood as limiting this invention. It should be recognized that every aspect and every embodiment of the present invention can be combined in any combination with any other aspect or embodiment . Various alternative embodiments and operating techniques will also become apparent to those skilled in the art in view of this disclosure. The invention should thus be understood to include various embodiments not described herein, and the invention is limited only by reasonable construction of the claims attached hereto in view of this disclosure.

Claims

What is Claimed:

1. A method for making a photovoltaic device having a semiconductor layer of a quality that is good for photovoltaic power generation, the method comprising the steps of: providing a first electrode layer; providing a second electrode layer; providing a feed material comprising oxygen and component elements for making a semiconductor layer; forming a photovoltaic semiconductor layer comprising said component elements, said semiconductor layer having a first surface and a second surface located opposite to said first surface; and electrically connecting said first surface of said semiconductor layer with said first electrode layer and said second surface of said semiconductor layer with said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; and treating, prior to forming at least a portion of said semiconductor layer, at least a portion of said feed material to reduce the oxygen concentration of said feed material from a first concentration of oxygen relative to said component elements to a second concentration of oxygen relative to said component elements that is smaller than said first concentration to facilitate forming a semiconductor layer of good quality.

2. The method for making a photovoltaic device as recited in Claim 1, wherein said feed material comprises particles of a first average particle size; and prior to said step of treating said feed material to reduce the oxygen concentration of said feed material, reducing the average particle size of said feed material to a second average particle size that is smaller than said first average particle size.

3. The method for making a photovoltaic device as recited in Claim 2, wherein said second average particle size is smaller than about 2 mils.

4. The method for making a photovoltaic device as recited in Claim 1, wherein subsequent to said step of treating said feed material to reduce the oxygen concentration of said feed material, said feed material comprises particles having a first average particle size and the size of said particles are reduced to a second average particle size that is smaller than said first average particle size and with a maximum particle size of about 7.5 microns.

5. The method for making a photovoltaic device as recited in Claim 1, wherein said second average particle size is smaller than about 0.3 microns.

6. The method for making a photovoltaic device as recited in Claim 1, wherein subsequent to said step of forming at least a portion of said semiconductor layer, subjecting at least a portion of said semiconductor to an oxidizing atmosphere at an elevated temperature.

7. The method for making a photovoltaic device as recited in Claim 6, wherein said step of subjecting at least a portion of said semiconductor layer to an oxidizing atmosphere at an elevated temperature comprises first subjecting at least a portion of said semiconductor layer to an oxidizing atmosphere at a first temperature followed by second subjecting of at least a portion of said semiconductor layer to an oxidizing atmosphere at a second temperature, wherein said second temperature is lower than said first temperature.

8. The method for making a photovoltaic device as recited in Claim 7, wherein said first temperature is from about 300°C to about 425°C and said second temperature is from about 450°C to about 550°C.

9. The method for making a photovoltaic device as recited in Claim 1, wherein said component elements comprise a Group II element and a Group VI element.

10. The method for making a photovoltaic device as recited in Claim 9, wherein said Group II element comprises cadmium.

11. The method for making a photovoltaic device as recited in Claim 9, wherein said Group VI element comprises tellurium.

12. The method for making a photovoltaic device as recited in Claim 1, wherein said semiconductor layer comprises cadmium telluride.

13. The method for making a photovoltaic device as recited in Claim 1, wherein said step of forming said semiconductor layer comprises spraying a spray mixture comprising said feed material onto a substrate.

14. The method for making a photovoltaic device as recited in Claim 1, wherein said second concentration of oxygen is smaller than about 0.5 weight percent oxygen relative to the total of said component elements.

15. The method for making a photovoltaic device as recited in Claim 1, wherein said second concentration of oxygen is smaller than about 0.15 weight percent oxygen relative to the total of said component elements .

16. The method for making a photovoltaic device as recited in Claim 1, wherein said step of treating said feed material to reduce the oxygen concentration of said feed material comprises subjecting said feed material to a reducing atmosphere.

17. The method for making a photovoltaic device as recited in Claim 1, wherein said step of treating said feed material to reduce the oxygen concentration of said feed material comprises subjecting said feed material to a hydrogen atmosphere.

18. The method for making a photovoltaic device as recited in Claim 1, wherein said step of treating said feed material to reduce the oxygen concentration of said feed material comprises subjecting said feed material to a reducing atmosphere in a fluidized bed reactor.

19. The method for making a photovoltaic device as recited in Claim 1, wherein said step of treating of said feed material to reduce the oxygen concentration of said feed material comprises subjecting said feed material to a temperature of greater than about 450°C.

20. The method for making a photovoltaic device as recited in Claim 1, wherein said step of treating of said feed material to reduce the oxygen concentration of said feed material comprises subjecting said feed material to a temperature of greater than about 550°C.

21. The method for making a photovoltaic device as recited in Claim 1, wherein said step of treating said feed material to reduce the oxygen concentration of said feed material comprises subjecting said feed material to a temperature of from about 575°C to about 625°C.

22. A method for making a photovoltaic device having a semiconductor that facilitates production of a device of repeatable quality, the method comprising the steps of: providing a first electrode layer; providing a second electrode layer; providing a feed material comprising a first element and a second element that can be used together to make a semiconductor material, said feed material having a first atomic percentage excess of one of said first element and said second element relative to a stoichiometric quantity required to make said semiconductor; forming a photovoltaic semiconductor layer comprising said semiconductor material having said first element and said second element, said semiconductor layer having a first surface and a second surface located opposite to said first surface; electrically connecting said first surface of said semiconductor layer with said first electrode layer and said second surface of said semiconductor layer with said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; and treating, prior to forming at least a portion of said semiconductor layer, at least a portion of said feed material to reduce said first atomic percentage excess to a second atomic percentage excess of one of said first element and said second element relative to said stoichiometric quantity required to make said semiconductor material that is smaller than said first excess.

23. The method for making a photovoltaic device as recited in Claim 22, wherein said second atomic percentage excess is less than about 0.01 atomic percent.

24. The method for making a photovoltaic device as recited in Claim 22, wherein said step of treating of said feed material to reduce said first atomic percentage excess to a second atomic percentage excess comprises subjecting said feed material to a reducing atmosphere.

25. The method for making a photovoltaic device as recited in Claim 22, wherein prior to said step of forming at least a portion of said semiconductor layer, said feed material comprises oxygen at an oxygen concentration, and said feed material is treated to reduce said oxygen concentration of said feed material from a first concentration of oxygen by weight relative to the total of said first element and said second element to a second concentration of oxygen by weight relative to the total of said first element and said second element that is smaller than said first concentration.

26. The method for making a photovoltaic device as recited in Claim 22, wherein said first element comprises a Group II element and said second component comprises a Group VI element.

27. The method for making a photovoltaic device as recited in Claim 22, wherein said first element is cadmium and said second element is tellurium.

28. A method of making a photovoltaic device having a contact with good ohmicity to a semiconductor layer, the method comprising the steps of : providing a first electrode layer; providing a second electrode layer; providing a photovoltaic semiconductor layer comprising a first element and a second element, said first element being in an atomic ratio to said second element, said semiconductor layer having a first surface, a second surface located opposite to said first surface and oxygen located adjacent to said second surface; electrically connecting said first surface of said semiconductor layer with said first electrode layer and said second surface of said semiconductor layer with said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; and treating, prior to said electrical connecting of said second surface of said semiconductor layer to said second electrode layer, said semiconductor layer to remove at least a portion of said oxygen located adjacent to said second surface of said semiconductor layer without substantially altering said atomic ratio of said first element to said second element in said semiconductor layer in a location adjacent to said second surface of said semiconductor.

29. The method of making a photovoltaic device as recited in Claim 28, wherein said second surface comprises a surface of a p-type semiconductor layer and, subsequent to said step of treating said semiconductor layer to remove at least a portion of oxygen located from adjacent to said second surface, said p-type semiconductor layer has an electrical conductivity that does not substantially vary through said p-type semiconductor layer.

30. The method of making a photovoltaic device as recited in Claim 28, wherein during said step of treating said semiconductor layer to remove at least a portion of oxygen located adjacent to said second surface, substantially no oxygen is removed from deeper than about 30 angstroms into said semiconductor layer below said second surface.

31. The method of making a photovoltaic device as recited in Claim 28, wherein said semiconductor layer comprises a Group II element and a Group VI element.

32. The method of making a photovoltaic device as recited in Claim 28, wherein said semiconductor layer comprises cadmium telluride.

33. The method of making a photovoltaic device as recited in Claim 32, wherein said semiconductor layer is not substantially richer in tellurium relative to cadmium adjacent to said second surface subsequent to said step of treating said semiconductor layer to remove at least a portion of oxygen located adjacent to said second surface than prior to said step of treating.

34. The method of making a photovoltaic device as recited in Claim 28, wherein said step of treating said semiconductor layer to remove at least a portion of oxygen located adjacent to said second surface of said semiconductor layer comprises contacting said second surface with a treating fluid selected from the group consisting of ammonium bifluoride, sodium sulfide, potassium cyanide and propylene glycol .

35. A method of making a photovoltaic device having a contact with good ohmicity to a semiconductor layer, the method comprising the steps of : providing a first electrode layer; providing a second electrode layer; providing a photovoltaic semiconductor layer having a first surface, a second surface located opposite to said first surface and oxygen located adjacent to said second surface; electrically connecting said first surface of said semiconductor layer with said first electrode layer and said second surface of said semiconductor layer with said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; and contacting, prior to said step of electrical connecting said second surface of said semiconductor layer to said second electrode layer, said second surface with a fluid capable of removing at least a portion of said oxygen located adjacent to said second surface of said semiconductor layer, wherein said fluid has a viscosity of greater than about 30 millipoise.

36. The method of making a photovoltaic device as recited in Claim 35, wherein said fluid comprises an alcohol.

37. The method of making a photovoltaic device as recited in Claim 35, wherein said fluid comprises a glycol.

38. The method of making a photovoltaic device as recited in Claim 35, wherein said fluid comprises isobutyl alcohol .

39. The method of making a photovoltaic device as recited in Claim 35, wherein said fluid has a viscosity of greater than about 100 millipoise.

40. The method of making a photovoltaic device as recited in Claim 35, wherein said fluid has a viscosity of greater than about 200 millipoise.

41. The method of making a photovoltaic device as recited in Claim 35, wherein said fluid has a viscosity of less than about 1,000 millipoise.

42. The method of making a photovoltaic device as recited in Claim 35, wherein said semiconductor layer comprises a Group II element and a Group VI element.

43. The method of making a photovoltaic device as recited in Claim 35, wherein said semiconductor layer comprises cadmium telluride.

44. A method of making a photovoltaic device having a contact with good ohmicity to a semiconductor layer, the method comprising the steps of: providing a first electrode layer; providing a second electrode layer; providing a photovoltaic semiconductor layer having a first surface, a second surface located opposite to said first surface and oxygen located adjacent to said second surface; electrically connecting said first surface of said semiconductor layer with said first electrode layer and said second surface of said semiconductor layer with said second electrode layer such that said semiconductor could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; contacting, prior to said step of electrical connecting said second surface of said semiconductor layer to said second electrode layer, said second surface with a fluid capable of removing at least a portion of said oxygen from said semiconductor layer, wherein said fluid comprises a polyhydric alcohol.

45. The method of making a photovoltaic device as recited in Claim 44, wherein said fluid comprises a glycol.

46. The method of making a photovoltaic device as recited in Claim 44, wherein said fluid comprises propylene glycol.

47. The method of making a photovoltaic device as recited in Claim 44, wherein said fluid comprises glycerin.

48. The method of making a photovoltaic device as recited in Claim 44, wherein said semiconductor layer comprises a Group II element and a Group VI element.

49. The method of making a photovoltaic device as recited in Claim 44, wherein said second surface of said semiconductor layer comprises a surface of a cadmium telluride layer.

50. A photovoltaic device having an interlayer that facilitates the establishment of a good electrical contact between an electrode layer and a semiconductor layer that reduces the tendency for uncontrolled diffusion of material from the interlayer that could detrimentally affect performance of the semiconductor layer during operation of the photovoltaic device, the photovoltaic device comprising: a first electrode layer; a second electrode layer; a photovoltaic semiconductor layer having a first surface that is electrically connected with said first electrode layer and a second surface that is electrically connected with said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; and an interlayer between said semiconductor layer and said second electrode layer to facilitate establishing an electrical contact with good ohmicity between said semiconductor layer and said second electrode layer; wherein said interlayer comprises a first component having a crystalline structure and a second component that is intercalated within said crystalline structure so as to be bound within said crystalline structure and thereby substantially inhibit said second component from diffusing out of said interlayer during operation of the photovoltaic device.

51. The photovoltaic device as recited in Claim 50, wherein said first component comprises graphite.

52. The photovoltaic device as recited in Claim 50, wherein said second component comprises copper.

53. The photovoltaic device as recited in Claim 50, wherein said second component comprises copper chloride.

54. The photovoltaic device as recited in Claim 50, wherein said second component comprises a Group V element .

55. The photovoltaic device as recited in Claim 54, wherein said second component is selected from the group consisting of bismuth and antimony.

56. The photovoltaic device as recited in Claim 50, wherein said semiconductor layer comprises a Group II element and a Group VI element .

57. The photovoltaic device as recited in Claim 50, wherein said semiconductor layer comprises p-type cadmium telluride.

58. A method for making a photovoltaic device having an interlayer that facilitates establishment of a good electrical contact between an electrode layer and a semiconductor layer that reduces the tendency for uncontrolled diffusion of material from the interlayer that could detrimentally affect performance of the semiconductor layer during operation of the photovoltaic device, the method comprising the steps of: providing a first electrode layer; providing a second electrode layer; providing a photovoltaic semiconductor layer having a first surface and a second surface located opposite to said first surface; locating an interlayer between said semiconductor layer and said second electrode layer, said interlayer comprising a first component having a crystalline structure and a second component intercalated within said crystalline structure and being bound within said crystalline structure by a binding energy, said second component being capable of being used to alter the electrical properties of said semiconductor layer; electrically connecting said first electrode layer with said first surface of said semiconductor layer and said second electrode layer with said second surface of said semiconductor layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; and diffusing at least a portion of said second component from said interlayer into said semiconductor layer to alter the electrical properties of at least a portion of said semiconductor layer; wherein, said step of diffusing comprises supplying sufficient energy to said interlayer to overcome said binding energy of at least a portion of said second component to permit at least a portion of said second component to diffuse out of said interlayer and into said semiconductor layer to alter the electrical properties of at least a portion of said semiconductor layer and thereby improve electrical contact between said semiconductor layer and said second electrode layer.

59. The method for making a photovoltaic device as recited in Claim 58, wherein said first component is graphite.

60. The method for making a photovoltaic device as recited in Claim 58, wherein said second component comprises copper.

61. The method for making a photovoltaic device as recited in Claim 58, wherein said second component comprises a Group V element.

62. The method for making a photovoltaic device as recited in Claim 58, wherein said step of diffusing at least a portion of said second component from said second electrode layer comprises heating said second electrode layer.

63. The method for making a photovoltaic device as recited in Claim 58, wherein said step of diffusing at least a portion of said second component from said second electrode layer comprises subjecting said second electrode layer to a temperature of greater than about 200°C.

64. The method for making a photovoltaic device as recited in Claim 58, wherein at least a portion of said second electrode layer is made from feed particles comprising first particles having said first component and being substantially free of said second component, and second particles having both of said first component and said second component; and wherein said first particles have an average particle size that is smaller than the average particle size of said second particles.

65. The method for making a photovoltaic device as recited in Claim 64, wherein said first particles are substantially all smaller than about 0.2 microns so that said smaller particles are capable of entering into defect regions that may occur in said semiconductor layer.

66. A photovoltaic device that addresses problems that could potentially be caused by electrical shorts that could occur through discontinuities in a p-type semiconductor layer, the photovoltaic device comprising: a first electrode layer; a second electrode layer; and a photovoltaic semiconductor layer electrically connected with said first electrode layer and said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer, said semiconductor layer having an n-type layer and a p- type layer that may have a discontinuity, said p-type layer being located between said n-type layer and said second electrode layer; and an interlayer located between said p-type layer and said second electrode layer wherein, said interlayer is capable of forming a Schottky barrier with said n-type layer at said discontinuity of said p-type layer such that said discontinuity would have a reduced susceptibility to providing a path for an electrical short during operation of the photovoltaic device.

67. The photovoltaic device as recited in Claim 66, wherein said interlayer comprises graphite.

68. The photovoltaic device as recited in Claim 66, wherein said n-type layer comprises cadmium sulfide.

69. The photovoltaic device as recited in Claim 66, wherein said p-type layer comprises cadmium telluride.

70. The photovoltaic device as recited in Claim 66, wherein said discontinuity of said p-type layer is a pinhole through said p-type layer that is open to said n- type layer.

71. The photovoltaic device as recited in Claim 66, wherein at least a portion of said interlayer has a specific resistivity of from about 0.001 to about 1,000 ohm-cm.

72. The photovoltaic device as recited in Claim 66, wherein at least a portion of said interlayer has a specific resistivity of from about 0.01 to about 100 ohm- cm.

73. The photovoltaic device as recited in Claim 66, wherein at least a portion of said interlayer has a specific resistivity of from about 0.01 to about 10 ohm-cm.

74. The photovoltaic device as recited in Claim 66, wherein at least a portion of said interlayer has a specific resistivity of from about 0.1 to about 1 ohm-cm.

75. A method for making a photovoltaic device that reduces the amount of an electrode material needed to form a satisfactory electrical contact with a semiconductor layer; the method comprising the steps of: providing a first electrode layer; providing a second electrode layer; providing a photovoltaic semiconductor layer having a first surface and a second surface located opposite to said first surface; and electrically connecting said first surface of said semiconductor with said first electrode layer and said second surface with said second electrode layer so that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; wherein, said step of providing said second electrode layer comprises forming a layer of electrode material located adjacent to said second surface of said semiconductor layer by roller coating over said second surface a layer of a suspension comprising an electrode material suspended in a carrier liquid.

76. The method for making a photovoltaic device as recited in Claim 75, wherein said electrode material comprises graphite.

77. The method for making a photovoltaic device as recited in Claim 75, wherein said electrode material comprises graphite having a component intercalated within a crystal structure of said graphite.

78. The method for making a photovoltaic device as recited in Claim 77, wherein said component intercalated within said graphite comprises copper.

79. The method for making a photovoltaic device as recited in Claim 75, wherein said second electrode layer comprises a layer of a conductive metal adjacent said electrode material .

80. The method for making a photovoltaic device as recited in Claim 75, wherein said second surface of said semiconductor layer is a surface of a cadmium telluride layer.

81. The method for making a photovoltaic device as recited in Claim 75, wherein said suspension comprises greater than about 20 weight percent solids.

82. The method for making a photovoltaic device as recited in Claim 75, wherein said suspension comprises greater than about 30 weight percent solids.

83. The method for making a photovoltaic device as recited in Claim 75, wherein said suspension comprises greater than about 40 weight percent solids.

84. A photovoltaic device having a structure for collecting and directing the flow of electrical current during operation of the photovoltaic device, the photovoltaic device comprising: a first electrode layer; a second electrode layer; a photovoltaic semiconductor layer having a first surface that is electrically connected with said first electrode layer and a second surface that is electrically connected with said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; an electrically conductive strip that is electrically connected with said second electrode layer and is capable of collecting and directing electrical current that could flow between said first electrode layer and said second electrode layer, wherein said second electrode layer is located between said electrically conductive strip and said semiconductor layer with said second electrode layer having a side facing said electrically conductive strip; and an adhesive that bonds a side of said electrically conductive strip to said side of said second electrode layer facing said electrically conductive solid strip.

85. The photovoltaic device as recited in Claim 84, wherein said electrical connection between said electrically conducting strip and said second electrode layer comprises a bead of electrically conductive material.

86. The photovoltaic device as recited in Claim 85, wherein said bead physically contacts both said second electrode layer and said electrically conductive strip.

87. The photovoltaic device as recited in Claim 85, wherein said electrically conductive strip is positioned adjacent said second electrode layer with substantially none of said bead being between said electrically conductive strip and said second electrode layer.

88. The photovoltaic device as recited in Claim 85, wherein said bead extends along an edge of said electrically conductive strip.

89. The photovoltaic device as recited in Claim 85, wherein said bead comprises a dried paste.

90. The photovoltaic device as recited in Claim 85, wherein said bead comprises graphite.

91. The photovoltaic device as recited in Claim 85, wherein said bead comprises nickel.

92. The photovoltaic device as recited in Claim 85, wherein said bead comprises silver.

93. The photovoltaic device as recited in Claim 84, wherein said second electrode layer comprises a metallic film.

94. The photovoltaic device as recited in Claim 84, wherein said electrically conductive strip comprises a conductive metal .

95. The photovoltaic device as recited in Claim 84, wherein said electrically conductive strip comprises copper.

96. The photovoltaic device as recited in Claim 84, wherein said electrically conductive strip is substantially free of said adhesive.

97. The photovoltaic device as recited in Claim 84, wherein said electrically conductive strip comprises means for accommodating differences in thermal expansion between said second electrode layer and said electrically conductive strip.

98. The photovoltaic device as recited in Claim 84, wherein said means for accommodating differences in thermal expansion between said second electrode layer and said electrically conductive strip comprises a crimp in said electrically conductive strip.

99. The photovoltaic device as recited in Claim 84, wherein said adhesive comprises a pressure sensitive adhesive.

100. A photovoltaic device having an electrical contacting structure to a photovoltaic cell that permits a significant portion of the photovoltaic cell to be used for electrical power generation, the photovoltaic device comprising: a photovoltaic cell comprising a stacked sequence of layers comprising, in relative sequence, an electrically conductive first electrode layer, a photovoltaic semiconductor layer, an electrically conductive second electrode layer and an electrically conductive contacting layer, said semiconductor layer being electrically connected with said first electrode layer and said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; an electrical connection between said contacting layer and said first electrode layer permitting said first electrode layer to be electrically connected through said contacting layer with an electrical circuit for use of electrical current that could be produced by said photovoltaic cell; and an electrically insulating layer located between said second electrode layer and said contacting layer to electrically isolate said second electrode layer from said contacting layer thereby permitting electrical connection of said first electrode layer with an electrical circuit for use of electrical current that could be produced by said photovoltaic cell while permitting use of a significant portion of said photovoltaic cell for electrical power generation.

101. The photovoltaic device as recited in Claim 100, wherein said contacting layer comprises an electrically conductive metal strip.

102. The photovoltaic device as recited in Claim 100, wherein said contacting layer comprises a strip of copper.

103. The photovoltaic device as recited in Claim 100, wherein said electrically insulating layer comprises electrically insulating tape.

104. The photovoltaic device as recited in Claim 100, wherein said electrically insulating layer comprises an electrically insulating coating on said second electrode layer.

105. The photovoltaic device as recited in Claim 100, wherein said photovoltaic cell has an edge adjacent said contacting layer and said insulating layer extends over at least part of a surface of said second electrode layer and over said edge of said photovoltaic cell.

106. The photovoltaic device as recited in Claim 100, wherein said electrical connection between said contacting layer and said first electrode layer comprises a bead of electrically conductive material that is electrically isolated by said electrically insulating layer from said photovoltaic cell except for said first electrode layer of said photovoltaic cell of said photovoltaic cell.

107. The photovoltaic device as recited in Claim 106, wherein said electrically conductive bead comprises graphite.

108. The photovoltaic device as recited in Claim 100, wherein said semiconductor layer comprises a layer of p- type cadmium telluride and a layer of n-type cadmium sulfide.

109. The photovoltaic device as recited in Claim 100, wherein said photovoltaic cell is a first cell in series of a plurality of series interconnected photovoltaic cells.

110. The photovoltaic device as recited in Claim 100, wherein said photovoltaic device comprises an optically transmissive substrate on which said photovoltaic cell is supported, and said photovoltaic device is designed so that, during operation of said photovoltaic device, sunlight is to be received through said optically transmissive substrate.

111. The photovoltaic device as recited in Claim 110, wherein said contacting layer is on a side of said photovoltaic cell that is not designed for receiving sunlight during operation of said photovoltaic cell.

112. A photovoltaic device providing electrical isolation of a photoactive area, the photovoltaic device comprising: a substrate having a top side, a bottom side located opposite to said top side and a peripheral edge located at an areal boundary of said top side; a photoactive area comprising film layers supported on said top side of said substrate, said film layers comprising, in relative closeness of proximity to said top side of said substrate, a first electrode layer, a photovoltaic semiconductor layer and a second electrode layer, said semiconductor layer being electrically connected to both of said first electrode layer and said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; a border region located on said top side of said substrate areally enclosing said photoactive area, said border region being substantially free of electrically conductive materials, thereby providing electrical isolation of said photoactive area from said peripheral edge of said substrate; and a desiccant located adjacent said border region to assist in maintaining electrical isolation of said photoactive area from said peripheral edge of said substrate.

113. The photovoltaic device as recited in Claim 112, wherein said border region is wider than about 30 mils at all points of said border region around said photoactive area.

114. The photovoltaic device as recited in Claim 112, wherein said border region is wider than about 50 mils at all points of said border region around said photoactive area.

115. The photovoltaic device as recited in Claim 112, wherein said border region is wider than about 0.5 inch at all points of said border region around said photoactive area to facilitate an encapsulation seal that may be made to said substrate.

116. The photovoltaic device as recited in Claim 112, wherein said electrical isolation provided by said border region is capable of preventing current flow in excess of 50 microamps across said border region when a potential of 1,500 volts is applied across said border region.

117. The photovoltaic device as recited in Claim 112, wherein said desiccant is in fluid communication with said border region.

118. The photovoltaic device as recited in Claim 112, wherein said photoactive area and said desiccant are encapsulated in a dry surround.

119. The photovoltaic device as recited in Claim 112, wherein said photoactive area comprises a plurality of photovoltaic cells electrically interconnected in series.

120. The photovoltaic device as recited in Claim 112, wherein said semiconductor layer comprises a p-type cadmium telluride layer and an n-type cadmium sulfide layer.

121. A photovoltaic device providing for electrical isolation of a photoactive area and facilitating the making of a border seal for possible encapsulation of the photoactive area, the photovoltaic device comprising: a substrate having a top side, a bottom side located opposite to said top side and a peripheral edge located at an areal boundary of said top side; a photovoltaic area comprising film layers supported on said top side of said substrate, said film layers comprising, in relative closeness of proximity to said top side of said substrate, a first electrode layer, a photovoltaic semiconductor layer and a second electrode layer, said semiconductor layer being electrically connected to both said first electrode layer and said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; an electrical isolation region located on said top side of said substrate for electrically isolating said photoactive area from said peripheral edge of said substrate, said electrical isolation region areally enclosing said photoactive area and being substantially free of electrically conductive materials on said top side of said substrate; and a border sealing region located on said top side of said substrate providing a surface to seal against for possible encapsulation of said photoactive area, wherein said border sealing region areally encloses said electrical isolation region and compromises at least a portion of said bottom electrode layer.

122. The photovoltaic device as recited in Claim 121, wherein said border sealing region is at least about 0.5 inch wide at all points around said electrical isolation region.

123. The photovoltaic device as recited in Claim 121, wherein said electrical isolation region is at least about

30 mils wide at all points around said photoactive area.

124. The photovoltaic device as recited in Claim 121, wherein said first electrode layer comprises tin oxide.

125. A method for making a photovoltaic device providing electrical isolation of a photoactive area and facilitating the making of a border seal for possible encapsulation of the photoactive area, the method comprising the steps of : providing a substrate having a top side and a bottom side located opposite to said top side, a peripheral edge located at an areal boundary of said top side and an electrically insulating layer located adjacent to said top side; providing film layers supported on said top side of said substrate to form a photoactive area that is capable of generating electrical power from sunlight, said film layers comprising a first electrode layer, a photovoltaic semiconductor layer and a second electrode layer, said semiconductor layer being electrically connected with both said first electrode layer and said second electrode layer such that said semiconductor layer could be used to produce an electrical current that flows between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; preparing a border region located on the top side of said substrate areally enclosing said photoactive area, wherein said border region is substantially free of electrically conductive materials to thereby provide electrical isolation of said photoactive area with the peripheral edge of said substrate and to thereby provide a surface to seal against for possible encapsulation of said photoactive area; and wherein, said step of preparing said border region comprises removing portions of at least some of said film layers that are supported on said substrate.

126. The method for making a photovoltaic device as recited in Claim 125, wherein removing portions of at least some of said film layers comprises removal of a resist material located between said film layers to be removed and said substrate.

127. The method for making a photovoltaic device as recited in Claim 126, wherein said resist material is removed by structurally deteriorating said resist material to deprive film layers to be removed of structural support .

128. The method for making a photovoltaic device as recited in Claim 126, wherein said resist materials are applied to said substrate prior to supporting said film layers on said substrate.

129. The method for making a photovoltaic device as recited in Claim 126, wherein said first electrode layer is formed over said top side of said substrate followed by removal of a portion of said first electrode layer from the top side of said substrate, followed by application of resist material on the top side of said substrate where said portions of said bottom electrode layer have been removed, followed by forming said other film layers over said top side of said substrate, followed by removing portions of at least some of said film layers overlying said resist material.

130. The method for making a photovoltaic device as recited in Claim 125, wherein desiccant material is located adjacent said border region to assist in providing said electrical isolation.

131. The method for making a photovoltaic device as recited in Claim 130, wherein said desiccant material is in fluid communication with said border region.

132. The method for making a photovoltaic device as recited in Claim 125, wherein said step of removing portions of at least some of said film layers comprises sand blasting

133.The method for making a photovoltaic device as recited in Claim 125, wherein said step of removing portions of at least some of said film layers comprises use of a laser.

134. The method for making a photovoltaic device as recited in Claim 125, wherein said photoactive area comprises a plurality of photovoltaic cells interconnected in series.

135. The method for making a photovoltaic device as recited in Claim 125, wherein said semiconductor layer comprises an n-type cadmium sulfide layer and a p-type cadmium telluride layer.

136. A method for making a photovoltaic device involving spray deposition of a film in a manner that reduces overspray to conserve raw materials while permitting a quality film to be formed near the edge of a substrate, the method comprising the steps of: providing a substrate having a top side, a bottom side located opposite to said top side and opposing edges at a peripheral boundary of said top side; and providing film layers supported on said top side of said substrate comprising a first electrode layer, a second electrode layer and a photovoltaic semiconductor layer electrically connected with said first electrode layer and said second electrode layer such that said semiconductor could be used to produce an electrical current that could flow between said first electrode layer and said second electrode layer in response to sunlight striking said semiconductor layer; wherein, said step of providing said film layers comprises depositing a sprayed film layer by spraying a spray mixture directed toward said top side of said substrate from a spray apparatus with relative movement between said spray apparatus and said substrate at a relative velocity such that said spray apparatus progressively deposits said sprayed film layer over said top side of said substrate in a traverse of said spray apparatus relative to said substrate in a direction from one of said edges of said substrate toward the opposing edge; and wherein, during said spraying, said relative velocity is a first relative velocity when said spray apparatus is depositing said sprayed film at a position near the center of a traverse between said opposing edges and a second relative velocity that is slower than said first relative velocity when said spray apparatus is depositing said sprayed film near one of said edges of said substrate, so that overspray past an edge of said substrate is reduced.

137. The method for making a photovoltaic device as recited in Claim 136, wherein during said step of spraying, said substrate is moving in a direction that is transverse to the direction of traverse of said spray apparatus relative to said substrate.

138. The method for making a photovoltaic device as recited in Claim 136, wherein said top side of said substrate has a longitudinal dimension and a lateral dimension transverse to said longitudinal dimension; and said spraying comprises a traverse of said substrate with said spray apparatus in a direction from one lateral edge of said substrate towards an opposing lateral edge of said substrate.

139. The method for making a photovoltaic device as recited in Claim 138, wherein during said step of spraying, said substrate is moving longitudinally while said spray apparatus is traversing laterally across said substrate.

140. The method for making a photovoltaic device as recited in Claim 136, wherein during said step of spraying, said traverse of said substrate by said spray apparatus is from adjacent one of said edges of said substrate across said substrate to adjacent the opposing edge of said substrate; and said relative velocity of said spray apparatus is slower near each of said opposing edges than near the center of said traverse.

141. The method for making a photovoltaic device as recited in Claim 136, wherein said relative velocity is at a maximum at a center of said traverse.

142. The method for making a photovoltaic device as recited in Claim 136, wherein said spray apparatus is driven during said step of spraying by a variable speed motor.

143. The method for making a photovoltaic device as recited in Claim 136, wherein said step of spraying to deposit said sprayed film layer comprises spray pyrolysis.

144. The method for making a photovoltaic device as recited in Claim 136, wherein said substrate is heated prior to said step of spraying.

145. The method for making a photovoltaic device as recited in Claim 136, wherein said sprayed film layer is a first electrode layer comprising tin oxide.

146. The method for making a photovoltaic device as recited in Claim 136, wherein said sprayed film layer is an n-type semiconductor layer comprising cadmium sulfide.

147. The method for making a photovoltaic device as recited in Claim 136, wherein said sprayed film layer is a p-type semiconductor layer comprising cadmium telluride.

148. A method for forming a photovoltaic device having a plurality of interconnected photovoltaic cells on a common substrate that provides good access to an electrode layer for cell interconnection, the method comprising the steps of: providing a substrate having a top side and a bottom side located opposite to said top side; and forming a plurality of electrically interconnected photovoltaic cells supported on the top side of said substrate with each of said photovoltaic cells comprising, in relative closeness of proximity to said top side of said substrate, a first electrode layer, a photovoltaic semiconductor layer and a second electrode layer, said semiconductor being electrically connected with both of said first electrode layer and said second electrode layer such that said semiconductor layer could be used to produce electrical current that could flow between said first electrode layer and said second electrode layer; wherein, said semiconductor layer comprises a first semiconductor layer having a majority carrier and a second semiconductor layer having the same type of majority carrier as said first semiconductor layer, said first semiconductor layer being located adjacent to said first electrode layer and between said first electrode layer and said second semiconductor layer; and wherein, said step of forming a plurality of electrically interconnected photovoltaic cells comprises selectively removing a portion of said first semiconductor layer to selectively expose a portion of said first electrode layer that can be used for making an electrical connection between a first electrode layer of one photovoltaic cell and an electrode layer of an adjacent photovoltaic cell; and wherein, said step of selectively removing a portion of said first semiconductor layer comprises locating a resist material between said first electrode layer and said first semiconductor layer at a position corresponding with said portion of said first semiconductor layer to be selectively removed and removing at least a portion of said resist material to remove a portion of said first semiconductor layer and to expose a portion of said first electrode layer.

149. The method for forming a photovoltaic device as recited in Claim 148, wherein said first electrode layer and said first semiconductor layer comprise the same structural material but have different electrical properties.

150. The method for forming a photovoltaic device as recited in Claim 148, wherein said first electrode layer has a higher electrical conductivity than said first semiconductor layer.

151. The method for forming a photovoltaic device as recited in Claim 148, wherein at least one of said first electrode layer and said second electrode layer comprises a dopant impurity that alters the electrical conductivity of said first electrode layer relative to said first semiconductor layer.

152. The method for forming a photovoltaic device as recited in Claim 148, wherein said first electrode layer and said first semiconductor layer both comprise a transparent metal oxide.

153. The method for forming a photovoltaic device as recited in Claim 148, wherein said first electrode layer and said first semiconductor layer both comprise tin oxide.

154. The method for forming a photovoltaic device as recited in Claim 148, wherein said first semiconductor layer and said second semiconductor layer are both n-type semiconductor layers.

155. The method for forming a photovoltaic device as recited in Claim 148, wherein said second semiconductor layer comprises n-type cadmium sulfide.

156. The method for forming a photovoltaic device as recited in Claim 148, wherein said semiconductor layer comprises a third semiconductor layer having a majority carrier of a different type than said first semiconductor layer and said second semiconductor layer.

157. The method for forming a photovoltaic device as recited in Claim 148, wherein said third semiconductor layer comprises a p-type cadmium telluride.

158. The method for forming a photovoltaic device as recited in Claim 148, wherein said step of forming a plurality of electrically interconnected photovoltaic cells comprises selectively removing a portion of said first electrode layer to expose an electrically insulating layer on the top side of said substrate to provide for division of said first electrode layer for series interconnection of said plurality of photovoltaic cells.

159. The method for forming a photovoltaic device as recited in Claim 158, wherein said step of selectively removing a portion of said first electrode layer comprises locating a resist material between said top side of said substrate and said first electrode layer at a position corresponding with said portion of said first electrode layer to be selectively removed and removing at least a portion of said resist material to remove a portion of said first electrode layer to expose a portion of said electrically insulating layer of said substrate.

160. The method for forming a photovoltaic device as recited in Claim 148, wherein prior to said step of selectively removing a portion of said first semiconductor layer, said first electrode layer and said first semiconductor layer comprise substantially continuous films with a strip of said resist material located between said first electrode layer and said first semiconductor layer and extending substantially from one edge of said substantially continuous films to a second edge of said substantially continuous films; and wherein said step of selectively removing a portion of said first semiconductor layer comprises removing substantially all of said strip of resist material to expose a strip of said first electrode layer between said edges.

161. The method for forming a photovoltaic device as recited in Claim 148, wherein said step of removing at least a portion of said resist material to remove said portion of said first semiconductor layer comprises structurally deteriorating said resist material to deprive said semiconductor layer of structural support from said resist material.

162. The method for forming a photovoltaic device as recited in Claim 161, wherein said step of structurally deteriorating said resist material comprises sand blasting.