WO1991011022A1

WO1991011022A1 - Purification of semiconductor material

Info

Publication number: WO1991011022A1
Application number: PCT/AU1991/000009
Authority: WO
Inventors: Dimitri Alexiev; Alister +Di Tavendale
Original assignee: Australian Nuclear Science & Technology Organisation; Tavendale, Olwyn +Hf
Priority date: 1990-01-10
Filing date: 1991-01-09
Publication date: 1991-07-25

Abstract

High purity crystalline semiconductor material, for example produced by liquid phase epitaxy is purified in a vessel having a controlled atmosphere by annealing for a period of time sufficient to realise a lowering of the net carrier concentration of the sample. Typically, the method uses a high purity silica reaction vessel in which LPE gallium arsenide can be annealed at around 500 °C to 700 °C for about 100 hours while maintaining a flow of non-contaminating gas.

Description

PURIFICICATION OF SEMICONDUCTOR MATERIAL Technical Field The present invention relates to a method of purifying and an apparatus for the purification of ^• crystalline semiconductor materials.

Purity is adjudged electrically rather than chemically in the context of the present invention with the electrical activity of a material quantified in terms of its net carrier concentration. Accordingly, a contaminant is to be understood as an impurity which decreases the purity of a material and contamination is to be understood as a process by which the net carrier concentration of a material is increased.

Crystalline semiconductor material may be produced by a number of well established techniques including

Czochralski pulling, a technique in which a crystal is grown at high pressure and rotated slowly to encourage uniform growth as it is pulled from a melt, and to a lesser extent the horizontal Bridgman crystal growth technique. However, as the level of technical sophistication in the electronic industry has advanced, so too has the requirement for crystalline semiconductor materials of ever increasing purity. This demand has seen the development of high purity techniques such as metallo-organic chemical vapour deposition (MOCVD) , molecular beam epitaxy (MBE) and liquid phase epitaxy (LPE) .

The net carrier concentration of the high purity material produced by such techniques has been seen to have reached a limiting value which has been attributed to the presence of contaminants within the material. Although superior results have been achieved in isolated instances, they have not been consistently reproducible. Oxygen is generally accepted as the principal contaminant and the known techniques strive to minimize the incorporation of oxygen within the produced materials by controlling the atmosphere within which the materials are prepared and utilising apparatus which avoid any more than a minimal source of oxygen. The present invention is based on the concept that it is not feasible to eliminate all impurities during the preparation of material and rather than further attempting to reduce the incorporation of impurities during the preparation of material, the present invention seeks to enhance the purity of previously prepared material by mitigating the effect of existing impurities.

Summary of the Invention Accordingly, in a first aspect, the present invention provides a method of purifying crystalline semiconductor material comprising the steps of;

(a) providing a sample of high purity crystalline semiconductor material,

(b) placing the sample into a substantially contaminant free reaction vessel,

(c) maintaining an atmosphere within the reaction vessel which avoids contamination of the sample,

(d) providing an elevated annealing temperature within the reaction vessel, and (e) annealing the sample by maintaining the annealing temperature for a period of time sufficient to realise a lowering of the net carrier concentration of the sample.

The present method is particularly suited to the purification of n-type compound semiconductor materials containing shallow donor producing oxygen impurities which increase the net carrier concentration of the materials. Such semiconductors are commonly III-V semiconductors made from a compound of elements from group III of the periodic table (such as aluminium, gallium, and indium) and group V of the periodic, table (such as nitrogen, phosphorous, arsenic and antimony) . Examples of compound III-V semiconductors include binary compounds such as gallium arsenide (GaAs), ternaries such as aluminium gallium arsenide (AlGaAs) and quaternaries such as indium gallium arsenide phosphide (InGaAsP).

The sample of high purity crystalline semiconductor material has preferably been prepared by LPE and is more preferably LPE GaAs. Prior to placement in the reaction vessel, the sample is preferably cleaned to remove superficial impurities. The cleaning process typically comprises the steps of degreasing the sample in a suitable solvent, rinsing the sample with ultra pure water, etching the sample with an acidified solution, and re-rinsing the sample with ultra pure water.

The reaction vessel is preferable made from high purity silica and the atmosphere within the reaction vessel is preferably palladium-diffused, ultra pure hydrogen. To ensure that the reaction vessel is substantially contaminant free prior to placement of the sample, the reaction vessel is preferably flushed with palladium-diffused, ultra pure hydrogen or some like non-contaminating gas. The reaction vessel is typically flushed for in the order of 12 hours at a flow rate of approximately 1.5 1/min. However, other flow rates and durations of flushing can prove equally effective.

The temperature within the reaction vessel is preferably elevated by an electric furnace to an annealing temperature dependent upon the sample to be purified. The annealing temperature is less than the melting point and less than the temperature at which thermal dissociation of the sample occurs. In the case of GaAs, the annealing temperature is preferably in the range from 500°C to 700°C and is more preferably 600°C.

The duration of annealing is the period of time sufficient to cause a lowering of the net carrier concentration of the sample and is also dependent upon the sample to be purified. The net carrier concentration of a sample is typically decreased as the duration of annealing is increased until a limiting value is reached. The duration of annealing is preferably the time required to reach the limiting value and is typically in the order of 100 hrs. It is to be noted however that the duration of annealing can be lessened if a maximum enhancement of purity is not required. During the annealing step, the reaction vessel is preferably maintained substantially iso-thermally at the annealing temperature and the sample is preferably annealed in the presence of a contaminant collecting material. The contaminant collecting material is preferably a recognised getter such as aluminium or gallium and is most preferably very high purity gallium, such as 99.99999% gallium.

In a second aspect, the present invention provides an apparatus for the purification of a sample of crystalline semiconductor material, comprising a substantially contaminant free reaction vessel, a source of substantially contaminant free gas for maintaining a substantially contaminant free atmosphere within the reaction vessel, and heating means for elevating the temperature within the reaction vessel.

The reaction vessel preferably includes a crucible in which the sample is located for purifying. The crucible and the reaction vessel are preferably made from high purity silica. The reaction vessel preferably further includes a contaminant collecting material which preferably forms a bed in the crucible upon which the sample is placed. In the case where the sample is an LPE crystal, the epitaxy is placed uppermost with the substrate sitting on the bed. The substantially contaminant free gas is preferably palladium-diffused, ultra pure hydrogen and the contaminant collecting material is preferably a recognised getter such as gallium or aluminium. Very high purity gallium, such as 99.99999% gallium, is most preferred in which case the bed of material will comprise a film of gallium metal.

The heating means is preferably provided by an electric furnace and the appartus is preferably arranged such that the reaction vessel can be maintained substantially iso-thermally at an elevated temperature. In a third aspect, the present invention provides a crystalline semiconductor material purified by the method of the first aspect of the invention. Brief Description of the Drawings One preferred form of the invention will now be described, by way of example only, with reference to the accompanying drawing. Figure 1 is a schematic representation of an apparatus for the purification of a liquid phase epitaxially grown gallium arsenide (GaAs) crystal.

Best Mode of Carrying out the Invention Prior to placement in a high purity silica reaction vessel 10, a high purity silica crucible 11 was etched in a 4:1 solution of HNO_:HF for ten minutes and then thoroughly rinsed in 18 ΩH-O and dried. A film 12 of 99.99999% gallium was applied to the inside bottom face of the crucible 11. LPE GaAs samples 13 were degreased in xylene, rinsed in methanol, rinsed in 18 MΩH„0, etched for approximately 30 seconds in 3:1:1 H₂S0₄:H₂0₂:H₂0 at 60°C, rinsed again in 18 M H₂0 dried and placed on the gallium film 12.

The crucible 11 with the gallium film 12 and containing the samples 13 were then loaded into the reaction vessel 10 so as to be supported on an anneling arm 14 which extends through a seal 16 at one end of reaction vessel 10 for connection to a reciprocating drive. The vessel was flushed with palladium-diffused, ultra pure hydrogen at a flow rate of 1.5 1/min for a period of twelve hours. The reaction vessel 10 was then heated to approximately 600°C by the electric furnace 15 and maintained iso-thermally for 100 hours. A thermocouple 17 is located in the annealing arm and is connected by leads 18 to a monitor for monitoring temperature. Heat reflecting plates 19 are mounted in the upstream end of the vessel.

LPE GaAs typically has a net carrier concentration in the order of 2 x 10 15 cm-3 and at least preferred embodiments of the present invention typically reduce this level by a factor of in the order of 100, to a value of approximately 2 x.10 13 cm-3 The above described method was utilised in an example, the results of which are plotted as figure 2. It is to be noted from figure 2 that a limiting value of net carrier concentration was reached after approximately 100 hrs of annealing and that the rate of decrease of net carrier concentration decreased with time.

The precise mechanism by which the electrically significant impurity level of the samples were reduced is not known but it is suggested that the principal impurity is oxygen and that during the annealing process of the present invention, unpaired oxygen electrons are bound to yield electrically non-active oxides. However, this suggested mechanism is only an hypothesis and as such the invention is not to be in any way construed as being limited to such a mechanism.

Claims

Claims :

1. A method of purifying semiconductor material comprising the steps of:

(a) providing a sample of high purity crystalline semiconductor material,

(b) placing the sample into a substantially contaminant free reaction vessel,

(c) maintaining an atmosphere within the reaction vessel which avoids contamination of the sample, (d) providing an elevated annealing temperature with the reaction vessel, and

(e) annealing the sample by maintaining the annealing temperature for a period of time sufficient to realise a lowering of the net carrier concentration of the sample.

2. A method as claimed in claim 1 wherein the semiconductor material is an n-type semiconductor material containing shallow donor producing oxygen impurities.

3. A method as claimed in claim 1 or claim 2 wherein the semiconductor material is a III-V compound semiconductor material.

4. A method as claimed in any one of the preceding claims wherein the semiconductor material has been prepared by liquid phase epitaxy.

5. A method as^' claimed in any one of the preceding claims wherein the sample is cleansed prior to placement in the reaction vessel.

6. A method as claimed in claim 5 wherein the cleansing comprises the steps of degreasing the material in a suitable solvent, rinsing the material with ultra pure water, etching the material with an acidified solution, re-rinsing the material with ultra pure water and drying the material.

7. A method as claimed in any one of the preceding claims wherein the reaction vessel is made from high purity silica and the method includes flushing the reaction vessel with a non-contaminating gas prior to placement of the sample.

8. A method as claimed in claim 7 wherein the non-contaminating gas is palladium diffused ultra pure hydrogen and the reaction vessel is flushed for about 12 hours at a flow rate of about 1.5 1/min.

9. A method as claimed in any one of the preceding claims wherein, after placing the sample in the reaction vessel, a flow of non-contaminating gas is provided to maintain the non-contaminating atmosphere.

10. A method as claimed in claim 9 wherein the non-contiminating gas is palladium diffused ultra pure hydrogen at a flow rate of about 1.5 1/min.

11. A method as claimed in any one of the preceding claims wherein the elevated annealing temperature is provided by an electric furnace.

12. A method as claimed in any one of the preceding claims wherein the sample is maintained substantially iso-thermally during annealing.

13. A method as claimed in any one of the preceding claims wherein the sample is annealed in the presence of a contaminant collecting material.

14. A method as claimed in claim 13 wherein the contaminant collecting material is very high purity aluminium or gallium.

15. A method as claimed in any one of the preceding claims wherein the period of annealing is in the order of

100 hours.

16. A method of purifying LPE gallium arsenide comprising using the method as claimed in any one of the preceding claims and wherein the annealing temperature is about 600°C and, net carrier concentration is reduced by a factor of the order of 100 to about 2 x 10 13cm-3

17. A crystalline semiconductor material purified by a method as claimed in any one of the preceding claims.

18. An apparatus for use in a method as claimed in any one of claims 1-16, the apparatus comprising a substantially contaminant free reaction vessel, a source of substantially contaminant free gas for maintaining a substantially i contaminant free atmosphere within the reaction vessel, and heating means for elevating the temperature within the reaction vessel.

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